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X-AuditID: c39127d2-0d3b770000001c86-3b-6049b55609e9 Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 88.F2.07302.655B9406; Thu, 11 Mar 2021 07:14:46 +0100 (CET) Received: from augenblix2.phytec.de ([172.16.0.56]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2021031107144628-117005 ; Thu, 11 Mar 2021 07:14:46 +0100 From: Teresa Remmet To: linux-arm-kernel@lists.infradead.org Cc: Sascha Hauer , Rob Herring , Shawn Guo , Fabio Estevam , Krzysztof Kozlowski , Marek Vasut , Heiko Schocher Subject: [PATCH 1/2] arm64: dts: imx8mp-phyboard-pollux-rdk: Add missing pinctrl entry Date: Thu, 11 Mar 2021 07:14:45 +0100 Message-Id: <1615443286-182173-1-git-send-email-t.remmet@phytec.de> X-Mailer: git-send-email 2.7.4 X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 11.03.2021 07:14:46, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 11.03.2021 07:14:46, Serialize complete at 11.03.2021 07:14:46 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrFJMWRmVeSWpSXmKPExsWyRoCBSzdsq2eCwcM2cYuHV/0tdty5z2xx /vwGdotNj6+xWrxpa2S0aN17hN3i7/ZNLBYvtog7cHjMm3WCxWPnrLvsHptWdbJ5bF5S79H/ 1yCANYrLJiU1J7MstUjfLoEr4+OZjWwFbTwVN643sTUw7ufqYuTkkBAwkTjz8CxjFyMXh5DA VkaJfc92sUM45xklPk1bxwxSxSagIfF0xWkmEFsEyJ7S9RisiFngI6PEo7f7wYqEBcIkzm57 zdrFyMHBIqAqcfdEOkiYV8BZ4vqXt8wQ2+Qkbp7rZAbplRBoZJJ48GEVI0RCSOL04rPMExh5 FjAyrGIUys1Mzk4tyszWK8ioLElN1ktJ3cQIDJ/DE9Uv7WDsm+NxiJGJg/EQowQHs5IIr99x twQh3pTEyqrUovz4otKc1OJDjNIcLErivBt4S8KEBNITS1KzU1MLUotgskwcnFINjMHuv4KO Naf7hek6fJL7kr//yqWAhw0xq0pFLefm3gxsl31t8/i2/eEPPNYx4vyPjrSyCPpGH5u7yLf1 zzOpbZk/9e+v7yk+93fR3q/FTpv4Ff+Jh5xwSvYSuLyKfxP3yfLFhaW+KR7vJrJmTqmx5uhe JbKsoqz17g/Jqu/T4iXdZ7klXfrbrsRSnJFoqMVcVJwIANCB0IwNAgAA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210311_061448_364263_B7C19E92 X-CRM114-Status: GOOD ( 12.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add missing pinctrl-names for i2c gpio recovery mode. Fixes: 88f7f6bcca37 ("arm64: dts: freescale: Add support for phyBOARD-Pollux-i.MX8MP") Signed-off-by: Teresa Remmet --- arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 2 +- arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts index f33f2c0a22a2..2031a9d40bed 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts @@ -59,7 +59,7 @@ &i2c2 { clock-frequency = <400000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; pinctrl-1 = <&pinctrl_i2c2_gpio>; sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi index 44a8c2337cee..f3965ec5b31d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi @@ -67,7 +67,7 @@ &i2c1 { clock-frequency = <400000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; pinctrl-1 = <&pinctrl_i2c1_gpio>; sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; From patchwork Thu Mar 11 06:14:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Teresa Remmet X-Patchwork-Id: 12130341 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E780DC433DB for ; Thu, 11 Mar 2021 06:16:21 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6C8B264F34 for ; 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X-AuditID: c39127d2-0c7b670000001c86-3c-6049b556a288 Received: from idefix.phytec.de (Unknown_Domain [172.16.0.10]) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 19.F2.07302.655B9406; Thu, 11 Mar 2021 07:14:46 +0100 (CET) Received: from augenblix2.phytec.de ([172.16.0.56]) by idefix.phytec.de (IBM Domino Release 9.0.1FP7) with ESMTP id 2021031107144631-117006 ; Thu, 11 Mar 2021 07:14:46 +0100 From: Teresa Remmet To: linux-arm-kernel@lists.infradead.org Cc: Sascha Hauer , Rob Herring , Shawn Guo , Fabio Estevam , Krzysztof Kozlowski , Marek Vasut , Heiko Schocher Subject: [PATCH 2/2] arm64: dts: imx8mp-phyboard-pollux-rdk: Change debug UART Date: Thu, 11 Mar 2021 07:14:46 +0100 Message-Id: <1615443286-182173-2-git-send-email-t.remmet@phytec.de> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1615443286-182173-1-git-send-email-t.remmet@phytec.de> References: <1615443286-182173-1-git-send-email-t.remmet@phytec.de> X-MIMETrack: Itemize by SMTP Server on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 11.03.2021 07:14:46, Serialize by Router on Idefix/Phytec(Release 9.0.1FP7|August 17, 2016) at 11.03.2021 07:14:46, Serialize complete at 11.03.2021 07:14:46 X-TNEFEvaluated: 1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprMLMWRmVeSWpSXmKPExsWyRoCBSzdsq2eCwZd2bYuHV/0tdty5z2xx /vwGdotNj6+xWrxpa2S0aN17hN3i7/ZNLBYvtog7cHjMm3WCxWPnrLvsHptWdbJ5bF5S79H/ 1yCANYrLJiU1J7MstUjfLoErY33DBeaCCdwVffd+sjQw9nJ2MXJySAiYSEyZdZ25i5GLQ0hg K6PE8rf7oJzzjBLvrzQyglSxCWhIPF1xmgnEFgGyp3Q9ZgcpYhb4yCjx6O1+ZpCEsICfxLwl k1lAbBYBVYnlr+aA2bwCzhKX3u9lh1gnJ3HzXCdYPaeAi8Ss/7/YQGwhoJozU2exggyVEGhk knjwYRUjRIOQxOnFZ5knMPItYGRYxSiUm5mcnVqUma1XkFFZkpqsl5K6iREYcIcnql/awdg3 x+MQIxMH4yFGCQ5mJRFev+NuCUK8KYmVValF+fFFpTmpxYcYpTlYlMR5N/CWhAkJpCeWpGan phakFsFkmTg4pRoY16y7+k0yWclA6u7aA8ILq79GnvNceDc25fuDmvqCuy0G22M4roWtK54t UbBm76kmxbx1j+Wt3xjN8OfQi1K0MGH+c27rv6nXb/2VlV3L/Znp3+Z55ntf6wt/eFvjMrFj jfF1QZ7OG64nDonN8SvWa7/1Sfz30gWq7YHPTvcWHXnYquLjm/y5UImlOCPRUIu5qDgRABZx xXUmAgAA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210311_061450_637782_FB795FBE X-CRM114-Status: GOOD ( 11.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org With the first redesign the debug UART had changed from UART2 to UART1. As the first hardware revision is considered as alpha and will not be supported in future. The old setup will not be preserved. Signed-off-by: Teresa Remmet --- arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts index 2031a9d40bed..984a6b9ded8d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts @@ -16,7 +16,7 @@ "phytec,imx8mp-phycore-som", "fsl,imx8mp"; chosen { - stdout-path = &uart2; + stdout-path = &uart1; }; reg_usdhc2_vmmc: regulator-usdhc2 { @@ -95,9 +95,9 @@ }; /* debug console */ -&uart2 { +&uart1 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; + pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; @@ -154,10 +154,10 @@ >; }; - pinctrl_uart2: uart2grp { + pinctrl_uart1: uart1grp { fsl,pins = < - MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x49 - MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x49 + MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x49 + MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x49 >; };