From patchwork Thu Mar 11 15:25:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12131791 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE334C4332E for ; Thu, 11 Mar 2021 15:27:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7484364FEC for ; Thu, 11 Mar 2021 15:27:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234261AbhCKP01 (ORCPT ); Thu, 11 Mar 2021 10:26:27 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:33817 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234168AbhCKPZy (ORCPT ); Thu, 11 Mar 2021 10:25:54 -0500 Received: from mail-ed1-f72.google.com ([209.85.208.72]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lKNCC-0004kv-K4 for netdev@vger.kernel.org; Thu, 11 Mar 2021 15:25:52 +0000 Received: by mail-ed1-f72.google.com with SMTP id cq11so10035057edb.14 for ; Thu, 11 Mar 2021 07:25:52 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=p7A+DSDQBb7c5EIU5TSfMWRw1BEprqFYaBkLJEF1chQ=; b=jVp+s9LBTiJPxwCxi2q+1JqLDzmFkQNJvr4dN2ZrYNTzP99Jnj8AdfRZa0BIxdc5ad mRXphtw8VozNkBoXutl1StAcB2to2nDPY6ItlweXWyvT51NBTYLflVQwe4tv5z95A8Ao rBb/68pQP4H3LVv97VxB13vlTv7VVAA6eVZojrqzwNT4qRQQufUQpCMRnEqeyvZWSpr+ dEfAwCKLWyF5mws1UI0g4xZjjHfxhvzuf1F30aZqLCPfgFLWh+i7l0w/9sQPpmjTuB1a 7dthOPxTFXM6/n+vvGpIn3PEcrCoVY7mMK7d7DOk6Rbq7MdSNKb8xlZew5BxKmmRKSrg TKVg== X-Gm-Message-State: AOAM530u6aCoTaxqPAQowW8UCiYU51UzW5/lh+B4pPr66zrJe/+Cvflz ZLUP56zz2sEpmrT+5JZTRjVJawd15nl+pQTApYdtxVc1noUv4p0LpWHT8hCeeQ3bRpJ+7I7l5xL e6lWcIH6EU0KwidtR0Li3c1Tl3uBAN/0FiQ== X-Received: by 2002:a17:907:ea3:: with SMTP id ho35mr3611128ejc.219.1615476352237; Thu, 11 Mar 2021 07:25:52 -0800 (PST) X-Google-Smtp-Source: ABdhPJyz6VZBJQtyn1vJqNDMxNUwbfgoz1dh4Krocm3RNptCj8qhNdcuXhZNjAdYrrhTwPdtlG670g== X-Received: by 2002:a17:907:ea3:: with SMTP id ho35mr3611099ejc.219.1615476351969; Thu, 11 Mar 2021 07:25:51 -0800 (PST) Received: from localhost.localdomain (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id v25sm1517826edr.18.2021.03.11.07.25.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:25:51 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 01/15] clk: socfpga: allow building N5X clocks with ARCH_N5X Date: Thu, 11 Mar 2021 16:25:31 +0100 Message-Id: <20210311152545.1317581-2-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The Intel's eASIC N5X (ARCH_N5X) architecture shares a lot with Agilex (ARCH_AGILEX) so it uses the same socfpga_agilex.dtsi, with minor changes. Also the clock drivers are the same. However the clock drivers won't be build without ARCH_AGILEX. One could assume that ARCH_N5X simply depends on ARCH_AGILEX but this was not modeled in Kconfig. In current stage the ARCH_N5X is simply unbootable. Add a separate Kconfig entry for clocks used by both ARCH_N5X and ARCH_AGILEX so the necessary objects will be built if either of them is selected. Signed-off-by: Krzysztof Kozlowski --- drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/socfpga/Kconfig | 6 ++++++ drivers/clk/socfpga/Makefile | 4 ++-- 4 files changed, 10 insertions(+), 2 deletions(-) create mode 100644 drivers/clk/socfpga/Kconfig diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index a588d56502d4..1d1891b9cad2 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -394,6 +394,7 @@ source "drivers/clk/renesas/Kconfig" source "drivers/clk/rockchip/Kconfig" source "drivers/clk/samsung/Kconfig" source "drivers/clk/sifive/Kconfig" +source "drivers/clk/socfpga/Kconfig" source "drivers/clk/sprd/Kconfig" source "drivers/clk/sunxi/Kconfig" source "drivers/clk/sunxi-ng/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index b22ae4f81e0b..12e46b12e587 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -106,6 +106,7 @@ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ obj-$(CONFIG_ARCH_AGILEX) += socfpga/ +obj-$(CONFIG_ARCH_N5X) += socfpga/ obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig new file mode 100644 index 000000000000..3c30617169bf --- /dev/null +++ b/drivers/clk/socfpga/Kconfig @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0 +config CLK_INTEL_SOCFPGA64 + bool + # Intel Agilex / N5X clock controller support + default (ARCH_AGILEX || ARCH_N5X) + depends on ARCH_AGILEX || ARCH_N5X diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile index bf736f8d201a..c6db8dd4ab35 100644 --- a/drivers/clk/socfpga/Makefile +++ b/drivers/clk/socfpga/Makefile @@ -3,5 +3,5 @@ obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o -obj-$(CONFIG_ARCH_AGILEX) += clk-agilex.o -obj-$(CONFIG_ARCH_AGILEX) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o +obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-agilex.o +obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o From patchwork Thu Mar 11 15:25:32 2021 Content-Type: text/plain; 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[84.226.167.205]) by smtp.gmail.com with ESMTPSA id v25sm1517826edr.18.2021.03.11.07.25.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:25:52 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 02/15] ARM: socfpga: introduce common ARCH_INTEL_SOCFPGA Date: Thu, 11 Mar 2021 16:25:32 +0100 Message-Id: <20210311152545.1317581-3-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. Signed-off-by: Krzysztof Kozlowski --- arch/arm/Kconfig | 2 +- arch/arm/Kconfig.debug | 6 +++--- arch/arm/Makefile | 2 +- arch/arm/boot/dts/Makefile | 2 +- arch/arm/mach-socfpga/Kconfig | 4 ++++ arch/arm64/Kconfig.platforms | 4 ++++ arch/arm64/boot/dts/altera/Makefile | 2 +- 7 files changed, 15 insertions(+), 7 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 853aab5ab327..37f94cf0cfdb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1320,7 +1320,7 @@ config ARM_PSCI # selected platforms. config ARCH_NR_GPIO int - default 2048 if ARCH_SOCFPGA + default 2048 if ARCH_INTEL_SOCFPGA default 1024 if ARCH_BRCMSTB || ARCH_RENESAS || ARCH_TEGRA || \ ARCH_ZYNQ || ARCH_ASPEED default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \ diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 9e0b5e7f12af..36016497b1b3 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1087,7 +1087,7 @@ choice on SD5203 UART. config DEBUG_SOCFPGA_UART0 - depends on ARCH_SOCFPGA + depends on ARCH_INTEL_SOCFPGA bool "Use SOCFPGA UART0 for low-level debug" select DEBUG_UART_8250 help @@ -1095,7 +1095,7 @@ choice on SOCFPGA(Cyclone 5 and Arria 5) based platforms. config DEBUG_SOCFPGA_ARRIA10_UART1 - depends on ARCH_SOCFPGA + depends on ARCH_INTEL_SOCFPGA bool "Use SOCFPGA Arria10 UART1 for low-level debug" select DEBUG_UART_8250 help @@ -1103,7 +1103,7 @@ choice on SOCFPGA(Arria 10) based platforms. config DEBUG_SOCFPGA_CYCLONE5_UART1 - depends on ARCH_SOCFPGA + depends on ARCH_INTEL_SOCFPGA bool "Use SOCFPGA Cyclone 5 UART1 for low-level debug" select DEBUG_UART_8250 help diff --git a/arch/arm/Makefile b/arch/arm/Makefile index dad5502ecc28..415c3514573a 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -209,7 +209,7 @@ machine-$(CONFIG_PLAT_SAMSUNG) += s3c machine-$(CONFIG_ARCH_S5PV210) += s5pv210 machine-$(CONFIG_ARCH_SA1100) += sa1100 machine-$(CONFIG_ARCH_RENESAS) += shmobile -machine-$(CONFIG_ARCH_SOCFPGA) += socfpga +machine-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga machine-$(CONFIG_ARCH_STI) += sti machine-$(CONFIG_ARCH_STM32) += stm32 machine-$(CONFIG_ARCH_SUNXI) += sunxi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 53b6e06bf19a..fe8f7c349f1d 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1033,7 +1033,7 @@ dtb-$(CONFIG_ARCH_S5PV210) += \ s5pv210-smdkc110.dtb \ s5pv210-smdkv210.dtb \ s5pv210-torbreck.dtb -dtb-$(CONFIG_ARCH_SOCFPGA) += \ +dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ socfpga_arria5_socdk.dtb \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index c3bb68d57cea..e43ed0ca6860 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -2,6 +2,7 @@ menuconfig ARCH_SOCFPGA bool "Altera SOCFPGA family" depends on ARCH_MULTI_V7 + select ARCH_INTEL_SOCFPGA select ARCH_SUPPORTS_BIG_ENDIAN select ARM_AMBA select ARM_GIC @@ -20,6 +21,9 @@ menuconfig ARCH_SOCFPGA select PL310_ERRATA_769419 if ARCH_SOCFPGA +config ARCH_INTEL_SOCFPGA + bool + config SOCFPGA_SUSPEND bool "Suspend to RAM on SOCFPGA" help diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index cdfd5fed457f..ecab67a1afb8 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -256,9 +256,13 @@ config ARCH_SEATTLE config ARCH_STRATIX10 bool "Altera's Stratix 10 SoCFPGA Family" + select ARCH_INTEL_SOCFPGA help This enables support for Altera's Stratix 10 SoCFPGA Family. +config ARCH_INTEL_SOCFPGA + bool + config ARCH_SYNQUACER bool "Socionext SynQuacer SoC Family" diff --git a/arch/arm64/boot/dts/altera/Makefile b/arch/arm64/boot/dts/altera/Makefile index 10119c7ab437..4db83fbeb115 100644 --- a/arch/arm64/boot/dts/altera/Makefile +++ b/arch/arm64/boot/dts/altera/Makefile @@ -1,3 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_ARCH_STRATIX10) += socfpga_stratix10_socdk.dtb \ +dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_stratix10_socdk.dtb \ socfpga_stratix10_socdk_nand.dtb From patchwork Thu Mar 11 15:25:33 2021 Content-Type: text/plain; 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[84.226.167.205]) by smtp.gmail.com with ESMTPSA id v25sm1517826edr.18.2021.03.11.07.25.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:25:54 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 03/15] mfd: altera: merge ARCH_SOCFPGA and ARCH_STRATIX10 Date: Thu, 11 Mar 2021 16:25:33 +0100 Message-Id: <20210311152545.1317581-4-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. The side effect is that the MFD_ALTERA_A10SR will now be available for both 32-bit and 64-bit Intel SoCFPGA, even though it is used only for 32-bit. Signed-off-by: Krzysztof Kozlowski Acked-by: Lee Jones --- drivers/mfd/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index a03de3f7a8ed..8af8c3196f1d 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -21,7 +21,7 @@ config MFD_CS5535 config MFD_ALTERA_A10SR bool "Altera Arria10 DevKit System Resource chip" - depends on ARCH_SOCFPGA && SPI_MASTER=y && OF + depends on ARCH_INTEL_SOCFPGA && SPI_MASTER=y && OF select REGMAP_SPI select MFD_CORE help @@ -32,7 +32,7 @@ config MFD_ALTERA_A10SR config MFD_ALTERA_SYSMGR bool "Altera SOCFPGA System Manager" - depends on (ARCH_SOCFPGA || ARCH_STRATIX10) && OF + depends on ARCH_INTEL_SOCFPGA && OF select MFD_SYSCON help Select this to get System Manager support for all Altera branded From patchwork Thu Mar 11 15:25:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12131799 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A31AEC2BA1A for ; Thu, 11 Mar 2021 15:27:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 744EE64E59 for ; Thu, 11 Mar 2021 15:27:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234289AbhCKP0j (ORCPT ); Thu, 11 Mar 2021 10:26:39 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:34022 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234248AbhCKP0I (ORCPT ); Thu, 11 Mar 2021 10:26:08 -0500 Received: from mail-ej1-f69.google.com ([209.85.218.69]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lKNCR-00051w-4a for netdev@vger.kernel.org; Thu, 11 Mar 2021 15:26:07 +0000 Received: by mail-ej1-f69.google.com with SMTP id gn30so8761010ejc.3 for ; Thu, 11 Mar 2021 07:26:07 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=seRfZbNnrbt83A3lqfbME46rdPLUXBuaJIJzFEroJqM=; b=FJf5pZgadRYPJ2wRY/eRP4WXbxJDaENjOzn0MkZqFENty94wdzrDSsymKrfnnWsKXo w5sIJL7wvy9t0fSXCGKuyj4/V6e/jx6zYXBF6Yy6U+U0yKcZ7vadLQg3chs+raNrHmLN 0wAqdr4PG2rtvYoFQHvurO8R9J9NMqj0ZV20XPQKpGpn9x1PouPguadbTPQ/n79rXA6c AwMr2kN7XDN80C6lQCoAKECt1/mGTumwwSKBPN50kKgHIMPQgxcOKPdqib5UqtHTL4D9 E9qM764CpMuTGzpa727JtoE3bKmrWTeMSQGW7O1oegghbMVVudCeIl1d7W3mIbUy1F82 vhrg== X-Gm-Message-State: AOAM532jmSu+H+l1n4FgT2tO1ZrzZuGrLqGhjiSNVu6AXiLb/E7Dxcgo NGkA4QvjHbuoElcpozDhnLQIqa8P4AT61j+Y3EdmEB6KSscGuFVkMSLuceZdSx6Q330aKrn0S4R p05BdtUDX/v6274Zei9MMxTugJS5l1nIphA== X-Received: by 2002:a17:906:2c44:: with SMTP id f4mr3504726ejh.508.1615476355784; Thu, 11 Mar 2021 07:25:55 -0800 (PST) X-Google-Smtp-Source: ABdhPJyyTATyAQcbeENIUwKOgFEFyZfkouzkosm1a5SyTcN6wlVTiKi+ARuyDQUI5aUuLLjUtpz6tg== X-Received: by 2002:a17:906:2c44:: with SMTP id f4mr3504683ejh.508.1615476355579; Thu, 11 Mar 2021 07:25:55 -0800 (PST) Received: from localhost.localdomain (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id v25sm1517826edr.18.2021.03.11.07.25.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:25:55 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 04/15] net: stmmac: merge ARCH_SOCFPGA and ARCH_STRATIX10 Date: Thu, 11 Mar 2021 16:25:34 +0100 Message-Id: <20210311152545.1317581-5-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. Signed-off-by: Krzysztof Kozlowski --- drivers/net/ethernet/stmicro/stmmac/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig index e675ba12fde2..7737e4d0bb9e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -140,8 +140,8 @@ config DWMAC_ROCKCHIP config DWMAC_SOCFPGA tristate "SOCFPGA dwmac support" - default (ARCH_SOCFPGA || ARCH_STRATIX10) - depends on OF && (ARCH_SOCFPGA || ARCH_STRATIX10 || COMPILE_TEST) + default ARCH_INTEL_SOCFPGA + depends on OF && (ARCH_INTEL_SOCFPGA || COMPILE_TEST) select MFD_SYSCON help Support for ethernet controller on Altera SOCFPGA From patchwork Thu Mar 11 15:25:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12131797 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA5B2C2BA12 for ; Thu, 11 Mar 2021 15:27:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8A5CF64E59 for ; Thu, 11 Mar 2021 15:27:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234255AbhCKP0e (ORCPT ); Thu, 11 Mar 2021 10:26:34 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:33890 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234144AbhCKPZ6 (ORCPT ); Thu, 11 Mar 2021 10:25:58 -0500 Received: from mail-ed1-f70.google.com ([209.85.208.70]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lKNCH-0004qJ-4w for netdev@vger.kernel.org; Thu, 11 Mar 2021 15:25:57 +0000 Received: by mail-ed1-f70.google.com with SMTP id i6so10110806edq.12 for ; Thu, 11 Mar 2021 07:25:57 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iqBtdrPZUrIr273DOWXhTiFtzvKiycYDoohgxVay2ig=; b=A7/tZP5F5jmMucvSauoNI1qIBeDuHBvh8IgygBI55D/fzgOZ90Mqu36HhCDbPyO7jq Ez4M+nYNyn9F98W4dpYq7EL9dQLl2nJYU1HZPUMeCh1FRNoaB49c1ek4CHoZgP8L+his ZI/EQnorNicoZY1rxU/9332T98tt7GwGqBLHTFMJbyEYV8GDSUqiFJ/XLv3HW+b08fma rBLer4LziozhBCX7x9FZQUC7sqj1ORk2JXGTgLuqWWCIGeiGJHoYar3nlpzLSPTZZyg2 dLcIKfBPt7TarquvgaP+QtTIjJDalZ/rRWqklEjJe4OCMqoj3GeNjv3dPhnk/QajxkVC kMFg== X-Gm-Message-State: AOAM533Yi1Hsx1fVR+315LRRuGbmVVUDIoM1hLarYk3QSjAL1B51txkg f4CnmBWKcAe3pOJJopjLYdnWrjwk+3UZ5TGevyrfFPU26OGfJ3dpPPF8akf8oZJhYubvEpUj8JS +UQ3Oubog0lHVYxfYAzQoFmF/K9gFbosIxw== X-Received: by 2002:a17:906:3e92:: with SMTP id a18mr3481180ejj.95.1615476356730; Thu, 11 Mar 2021 07:25:56 -0800 (PST) X-Google-Smtp-Source: ABdhPJzBK+qKCuhZ0F3r9CfvieGjxQ0hczqfyfgEN1oKXCTHk7Irl87ZJGZ5ydURk3A6P7WXhh1OmQ== X-Received: by 2002:a17:906:3e92:: with SMTP id a18mr3481161ejj.95.1615476356529; Thu, 11 Mar 2021 07:25:56 -0800 (PST) Received: from localhost.localdomain (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id v25sm1517826edr.18.2021.03.11.07.25.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:25:56 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 05/15] clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers Date: Thu, 11 Mar 2021 16:25:35 +0100 Message-Id: <20210311152545.1317581-6-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On a multiplatform kernel there is little benefit in splitting each clock driver per platform because space savings are minimal. Such split also complicates the code, especially after adding compile testing. Build all arm64 Intel SoCFPGA clocks together with one entry in Makefile. This also removed duplicated line in the Makefile (selecting common part of clocks per platform). Signed-off-by: Krzysztof Kozlowski --- drivers/clk/socfpga/Kconfig | 6 +++--- drivers/clk/socfpga/Makefile | 7 +++---- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index 3c30617169bf..bc102e0f0be0 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 config CLK_INTEL_SOCFPGA64 bool - # Intel Agilex / N5X clock controller support - default (ARCH_AGILEX || ARCH_N5X) - depends on ARCH_AGILEX || ARCH_N5X + # Intel Stratix / Agilex / N5X clock controller support + default (ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10) + depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile index c6db8dd4ab35..ebd3538d12de 100644 --- a/drivers/clk/socfpga/Makefile +++ b/drivers/clk/socfpga/Makefile @@ -1,7 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o -obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o -obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o -obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-agilex.o -obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o +obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-s10.o \ + clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o \ + clk-agilex.o From patchwork Thu Mar 11 15:25:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12131803 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1F2CC4332B for ; Thu, 11 Mar 2021 15:27:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C0AD264E59 for ; Thu, 11 Mar 2021 15:27:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234180AbhCKP0l (ORCPT ); Thu, 11 Mar 2021 10:26:41 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:34048 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234252AbhCKP0J (ORCPT ); Thu, 11 Mar 2021 10:26:09 -0500 Received: from mail-lj1-f199.google.com ([209.85.208.199]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lKNCS-00053W-EN for netdev@vger.kernel.org; Thu, 11 Mar 2021 15:26:08 +0000 Received: by mail-lj1-f199.google.com with SMTP id s17so8664853ljs.19 for ; Thu, 11 Mar 2021 07:26:08 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Xs6GGjw8nQu2H0zJNhMFfPjtjv4pASlZetLF+qPJ3jI=; b=rOfcCfSSmoSwxDR51A/CMc11y3B8kd+6LHZy1UC8TRV0fM+BDTknPRegiaCm9kUDnT AJbgz+ejMNkxaIfIXXAYh6iOxBNMQ6qOGv/15b8DR2ZuONZDfvgGUZh8H8CBQgwh4G8L YMQwHNVv3mJPzVuMyRh0rC/ayFEZh8ZUR908nrQ+ldpfWjnvg3dZg1u5uvpdfNBhUIsq k6ygzwlrGPcK+I/JBVER6xZ7PaLOvkJhPZOJq8jBJkIkpORbuu9bz8h+LvpgnRavVyCo meSBW/6+IFwYmlMRuSzuAL8nQGlMz5L184efQpgamDeKCfnJ8FgBnk5XLeVb03XY3FTb ntyQ== X-Gm-Message-State: AOAM532QOlSEv/HkP8zujOG3YCwUlOqcVzrAYvje8b1IieJEdFPw6nQM sUzYLtFtwaPPfkPuY4HXoFcdCYjV/UoVQqHxZIGUxdXEPHsDNJdBZm5YJyUafHMj8TpFrqrB7F+ Fo9W32+uoGdPK7UuqyIjg+q+i7gdNqlKlaA== X-Received: by 2002:a05:6402:2070:: with SMTP id bd16mr9025994edb.133.1615476357798; Thu, 11 Mar 2021 07:25:57 -0800 (PST) X-Google-Smtp-Source: ABdhPJxEy/VWcYtVhHpWmtyv1K3JAU4Nmfhx02KoGEuoEu8P/ERdDmK4z05THjQn7v4EX/URDdO6zA== X-Received: by 2002:a05:6402:2070:: with SMTP id bd16mr9025945edb.133.1615476357547; Thu, 11 Mar 2021 07:25:57 -0800 (PST) Received: from localhost.localdomain (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id v25sm1517826edr.18.2021.03.11.07.25.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:25:57 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 06/15] clk: socfpga: merge ARCH_SOCFPGA and ARCH_STRATIX10 Date: Thu, 11 Mar 2021 16:25:36 +0100 Message-Id: <20210311152545.1317581-7-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. Signed-off-by: Krzysztof Kozlowski --- drivers/clk/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 12e46b12e587..1e29e5ad107a 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -104,10 +104,9 @@ obj-y += renesas/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ +obj-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga/ obj-$(CONFIG_ARCH_AGILEX) += socfpga/ obj-$(CONFIG_ARCH_N5X) += socfpga/ -obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ obj-$(CONFIG_ARCH_STI) += st/ From patchwork Thu Mar 11 15:25:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12131805 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B32DC2BA1B for ; Thu, 11 Mar 2021 15:27:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EB28F64FF6 for ; Thu, 11 Mar 2021 15:27:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234311AbhCKP0m (ORCPT ); Thu, 11 Mar 2021 10:26:42 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:34072 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234257AbhCKP0L (ORCPT ); Thu, 11 Mar 2021 10:26:11 -0500 Received: from mail-lf1-f72.google.com ([209.85.167.72]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lKNCU-00055d-DF for netdev@vger.kernel.org; Thu, 11 Mar 2021 15:26:10 +0000 Received: by mail-lf1-f72.google.com with SMTP id a9so6843512lfb.19 for ; Thu, 11 Mar 2021 07:26:10 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kUT7ytcjB6VCPdAxIBqG0E5rhLsqE5uC2TbGUeGX+rU=; b=kEhwI9khlJsUtm1ecdzo4415Mxgf8ZbiJE61iL2gdJhtagTg5za09XvH+zdrrHv2lt 1kUzltUsGoEXc+3kn91f+LKw4Aht/3FqPsgaKBPh2atEgOE3gBhPwoWp8ipB8W4GfL+F jitTuHAIpl6C7RNEzICZiq2FNZ/jxS8Ebe2wO6GEQOCX/cTrp5MB8VRZ09EMSH7NSZlj WGRr17NP0Q0Zd+NxfouG5aN1Ih2pLed9Ai/M2WfdAo4wsQ09qFqY6isWbGSLPL1wK3oX IudnEgLSCQRqS7bsQA6t8h9CuAHrsC8Z8dkQNICXoLzNsBd0TUEhwEJJkV+WAr3l5Z3W A8uQ== X-Gm-Message-State: AOAM532ij3WjSeienkiuVhOm+j9fGfrI4ILpkXY0TEOx+zi/4LL9Q6C4 sQpX2JLtHY6xfjS2vvDpClFzYbhGfTvVjDC6x1hxnLCqL4cGyA2aIgo80unEQ/W9WlLj5wocG3K DHR84w5+mrfvzRtecMuEgUtC/hmfjsbS5bg== X-Received: by 2002:a17:906:894:: with SMTP id n20mr3550499eje.57.1615476359035; Thu, 11 Mar 2021 07:25:59 -0800 (PST) X-Google-Smtp-Source: ABdhPJzewwKul+qByKNtSAFVbtVEtU+PJVW0lvuxaGwwO1QNpVsWLj92RBZH/7UiX/uUZip32n7cVA== X-Received: by 2002:a17:906:894:: with SMTP id n20mr3550472eje.57.1615476358839; Thu, 11 Mar 2021 07:25:58 -0800 (PST) Received: from localhost.localdomain (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id v25sm1517826edr.18.2021.03.11.07.25.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:25:58 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 07/15] EDAC: altera: merge ARCH_SOCFPGA and ARCH_STRATIX10 Date: Thu, 11 Mar 2021 16:25:37 +0100 Message-Id: <20210311152545.1317581-8-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. This the common practice for other platforms. Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come from multiple vendors. Signed-off-by: Krzysztof Kozlowski --- drivers/edac/Kconfig | 2 +- drivers/edac/altera_edac.c | 17 +++++++++++------ 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index 27d0c4cdc58d..1e836e320edd 100644 --- a/drivers/edac/Kconfig +++ b/drivers/edac/Kconfig @@ -396,7 +396,7 @@ config EDAC_THUNDERX config EDAC_ALTERA bool "Altera SOCFPGA ECC" - depends on EDAC=y && (ARCH_SOCFPGA || ARCH_STRATIX10) + depends on EDAC=y && ARCH_INTEL_SOCFPGA help Support for error detection and correction on the Altera SOCs. This is the global enable for the diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c index e91cf1147a4e..5f7fd79ec82f 100644 --- a/drivers/edac/altera_edac.c +++ b/drivers/edac/altera_edac.c @@ -1501,8 +1501,13 @@ static int altr_portb_setup(struct altr_edac_device_dev *device) dci->mod_name = ecc_name; dci->dev_name = ecc_name; - /* Update the PortB IRQs - A10 has 4, S10 has 2, Index accordingly */ -#ifdef CONFIG_ARCH_STRATIX10 + /* + * Update the PortB IRQs - A10 has 4, S10 has 2, Index accordingly + * + * FIXME: Instead of ifdefs with different architectures the driver + * should properly use compatibles. + */ +#ifdef CONFIG_64BIT altdev->sb_irq = irq_of_parse_and_map(np, 1); #else altdev->sb_irq = irq_of_parse_and_map(np, 2); @@ -1521,7 +1526,7 @@ static int altr_portb_setup(struct altr_edac_device_dev *device) goto err_release_group_1; } -#ifdef CONFIG_ARCH_STRATIX10 +#ifdef CONFIG_64BIT /* Use IRQ to determine SError origin instead of assigning IRQ */ rc = of_property_read_u32_index(np, "interrupts", 1, &altdev->db_irq); if (rc) { @@ -1931,7 +1936,7 @@ static int altr_edac_a10_device_add(struct altr_arria10_edac *edac, goto err_release_group1; } -#ifdef CONFIG_ARCH_STRATIX10 +#ifdef CONFIG_64BIT /* Use IRQ to determine SError origin instead of assigning IRQ */ rc = of_property_read_u32_index(np, "interrupts", 0, &altdev->db_irq); if (rc) { @@ -2016,7 +2021,7 @@ static const struct irq_domain_ops a10_eccmgr_ic_ops = { /************** Stratix 10 EDAC Double Bit Error Handler ************/ #define to_a10edac(p, m) container_of(p, struct altr_arria10_edac, m) -#ifdef CONFIG_ARCH_STRATIX10 +#ifdef CONFIG_64BIT /* panic routine issues reboot on non-zero panic_timeout */ extern int panic_timeout; @@ -2109,7 +2114,7 @@ static int altr_edac_a10_probe(struct platform_device *pdev) altr_edac_a10_irq_handler, edac); -#ifdef CONFIG_ARCH_STRATIX10 +#ifdef CONFIG_64BIT { int dberror, err_addr; From patchwork Thu Mar 11 15:25:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12131801 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D10EC46461 for ; Thu, 11 Mar 2021 15:27:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E283064FA6 for ; Thu, 11 Mar 2021 15:27:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234284AbhCKP0h (ORCPT ); Thu, 11 Mar 2021 10:26:37 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:33926 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234194AbhCKP0B (ORCPT ); Thu, 11 Mar 2021 10:26:01 -0500 Received: from mail-ej1-f70.google.com ([209.85.218.70]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lKNCK-0004uN-IO for netdev@vger.kernel.org; Thu, 11 Mar 2021 15:26:00 +0000 Received: by mail-ej1-f70.google.com with SMTP id kx22so768686ejc.17 for ; Thu, 11 Mar 2021 07:26:00 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=64x8YpaZ8HtZHSdGhulwSXZBkEtDNxGWQlJcY2WZReQ=; b=rn/N/umvHVDVvHhBNBl9KberIhBNnf/GQ3xl0dZEky9zEEI6Xbp46xMjvmWxowVUgQ 98HQK19vUoH9vsDTbuC3h0uooYvn/YgiN/c+5sVKikux79D1+1IYvHoyDZrrcsdeQabp JlM5HRPWumvLzlXA8YDitUDnm+XTC0oHx0qlpOp+9nNcRJa37bxRDqcRxrWegfVF7NbP 4IZ4Dv+NClpNIpP90ROUetDblZoFY2KOLUf85XOlRqFXA27Gzmy7OgAeltWYkclQrqK1 MSZjA9/SAxB11+o4mD/NdGKKWG29Hp8t54bdlqlQyLZPokKE5BL0UALkVPjhwbhnfew5 XxsQ== X-Gm-Message-State: AOAM533MJQ6KoIT3RCGzJw7lPc1fI5Ct8LjgYwfWXnLABHPd2Ap3tIie VWZ9J7+fFUVVc7SUVvDJP9UauDAGvEkfwzAXReEXRQmPMEGtzVHF7dePOLc02CFNq7HdbYZKmAO wtSG3rq0/EvHoDQoDPjVaTLWywMk7kkIEfA== X-Received: by 2002:a05:6402:1393:: with SMTP id b19mr9029429edv.333.1615476360053; Thu, 11 Mar 2021 07:26:00 -0800 (PST) X-Google-Smtp-Source: ABdhPJyK46E5y/32Jy/9Voo0TUZtd7fHKBU61YwAFS87oJZxm94dz2uI8Cz0UtNhcGCnNvg52FFB5Q== X-Received: by 2002:a05:6402:1393:: with SMTP id b19mr9029395edv.333.1615476359877; Thu, 11 Mar 2021 07:25:59 -0800 (PST) Received: from localhost.localdomain (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id v25sm1517826edr.18.2021.03.11.07.25.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:25:59 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 08/15] arm64: socfpga: merge Agilex and N5X into ARCH_INTEL_SOCFPGA Date: Thu, 11 Mar 2021 16:25:38 +0100 Message-Id: <20210311152545.1317581-9-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Agilex, N5X and Stratix 10 share all quite similar arm64 hard cores and SoC-part. Up to a point that N5X uses the same DTSI as Agilex. From the Linux kernel point of view these are flavors of the same architecture so there is no need for three top-level arm64 architectures. Simplify this by merging all three architectures into ARCH_INTEL_SOCFPGA and dropping the other ARCH* arm64 Kconfig entries. The side effect is that the INTEL_STRATIX10_SERVICE will now be available for both 32-bit and 64-bit Intel SoCFPGA, even though it is used only for 64-bit. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/Kconfig.platforms | 21 ++++----------------- arch/arm64/boot/dts/intel/Makefile | 6 +++--- arch/arm64/configs/defconfig | 3 +-- drivers/clk/Makefile | 2 -- drivers/clk/socfpga/Kconfig | 4 ++-- drivers/firmware/Kconfig | 2 +- drivers/fpga/Kconfig | 2 +- drivers/reset/Kconfig | 2 +- 8 files changed, 13 insertions(+), 29 deletions(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index ecab67a1afb8..ce50dd129eec 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -8,16 +8,6 @@ config ARCH_ACTIONS help This enables support for the Actions Semiconductor S900 SoC family. -config ARCH_AGILEX - bool "Intel's Agilex SoCFPGA Family" - help - This enables support for Intel's Agilex SoCFPGA Family. - -config ARCH_N5X - bool "Intel's eASIC N5X SoCFPGA Family" - help - This enables support for Intel's eASIC N5X SoCFPGA Family. - config ARCH_SUNXI bool "Allwinner sunxi 64-bit SoC Family" select ARCH_HAS_RESET_CONTROLLER @@ -254,14 +244,11 @@ config ARCH_SEATTLE help This enables support for AMD Seattle SOC Family -config ARCH_STRATIX10 - bool "Altera's Stratix 10 SoCFPGA Family" - select ARCH_INTEL_SOCFPGA - help - This enables support for Altera's Stratix 10 SoCFPGA Family. - config ARCH_INTEL_SOCFPGA - bool + bool "Intel's SoCFPGA ARMv8 Families" + help + This enables support for Intel's SoCFPGA ARMv8 families: + Stratix 10 (ex. Altera), Agilex and eASIC N5X. config ARCH_SYNQUACER bool "Socionext SynQuacer SoC Family" diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile index 3a052540605b..0b5477442263 100644 --- a/arch/arm64/boot/dts/intel/Makefile +++ b/arch/arm64/boot/dts/intel/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_ARCH_AGILEX) += socfpga_agilex_socdk.dtb \ - socfpga_agilex_socdk_nand.dtb +dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_socdk.dtb \ + socfpga_agilex_socdk_nand.dtb \ + socfpga_n5x_socdk.dtb dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb -dtb-$(CONFIG_ARCH_N5X) += socfpga_n5x_socdk.dtb diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index d612f633b771..cf8a3009b858 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -28,7 +28,6 @@ CONFIG_KALLSYMS_ALL=y # CONFIG_COMPAT_BRK is not set CONFIG_PROFILING=y CONFIG_ARCH_ACTIONS=y -CONFIG_ARCH_AGILEX=y CONFIG_ARCH_SUNXI=y CONFIG_ARCH_ALPINE=y CONFIG_ARCH_BCM2835=y @@ -50,7 +49,7 @@ CONFIG_ARCH_RENESAS=y CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_S32=y CONFIG_ARCH_SEATTLE=y -CONFIG_ARCH_STRATIX10=y +CONFIG_ARCH_INTEL_SOCFPGA=y CONFIG_ARCH_SYNQUACER=y CONFIG_ARCH_TEGRA=y CONFIG_ARCH_SPRD=y diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 1e29e5ad107a..96802294d35a 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -105,8 +105,6 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ obj-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga/ -obj-$(CONFIG_ARCH_AGILEX) += socfpga/ -obj-$(CONFIG_ARCH_N5X) += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ obj-$(CONFIG_ARCH_STI) += st/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index bc102e0f0be0..b6c5b9737174 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -2,5 +2,5 @@ config CLK_INTEL_SOCFPGA64 bool # Intel Stratix / Agilex / N5X clock controller support - default (ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10) - depends on ARCH_AGILEX || ARCH_N5X || ARCH_STRATIX10 + default ARM64 && ARCH_INTEL_SOCFPGA + depends on ARM64 && ARCH_INTEL_SOCFPGA diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index 3f14dffb9669..6a4e882e448d 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -206,7 +206,7 @@ config FW_CFG_SYSFS_CMDLINE config INTEL_STRATIX10_SERVICE tristate "Intel Stratix10 Service Layer" - depends on (ARCH_STRATIX10 || ARCH_AGILEX) && HAVE_ARM_SMCCC + depends on ARCH_INTEL_SOCFPGA && HAVE_ARM_SMCCC default n help Intel Stratix10 service layer runs at privileged exception level, diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 5ff9438b7b46..fd325e9c5ce6 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -60,7 +60,7 @@ config FPGA_MGR_ZYNQ_FPGA config FPGA_MGR_STRATIX10_SOC tristate "Intel Stratix10 SoC FPGA Manager" - depends on (ARCH_STRATIX10 && INTEL_STRATIX10_SERVICE) + depends on (ARCH_INTEL_SOCFPGA && INTEL_STRATIX10_SERVICE) help FPGA manager driver support for the Intel Stratix10 SoC. diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 4171c6f76385..b1e8efa16166 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -183,7 +183,7 @@ config RESET_SCMI config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST - default ARCH_AGILEX || ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARC + default ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC help This enables a simple reset controller driver for reset lines that that can be asserted and deasserted by toggling bits in a contiguous, From patchwork Thu Mar 11 15:27:07 2021 Content-Type: text/plain; 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[84.226.167.205]) by smtp.gmail.com with ESMTPSA id y12sm1473148ejb.104.2021.03.11.07.27.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:27:11 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 09/15] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks Date: Thu, 11 Mar 2021 16:27:07 +0100 Message-Id: <20210311152707.1317791-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The Stratix 10 / Agilex / N5X clocks do not use anything other than OF or COMMON_CLK so they should be compile testable on most of the platforms. Signed-off-by: Krzysztof Kozlowski --- drivers/clk/Makefile | 2 +- drivers/clk/socfpga/Kconfig | 15 ++++++++++++--- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 96802294d35a..9b582b3fca34 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -104,7 +104,7 @@ obj-y += renesas/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ -obj-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga/ +obj-y += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ obj-$(CONFIG_ARCH_STI) += st/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index b6c5b9737174..b62ede8cad01 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -1,6 +1,15 @@ # SPDX-License-Identifier: GPL-2.0 +config CLK_INTEL_SOCFPGA + bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_INTEL_SOCFPGA + default ARCH_INTEL_SOCFPGA + help + Support for the clock controllers present on Intel SoCFPGA and eASIC + devices like Stratix 10, Agilex and N5X eASIC. + +if CLK_INTEL_SOCFPGA + config CLK_INTEL_SOCFPGA64 - bool - # Intel Stratix / Agilex / N5X clock controller support + bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && (!ARM64 || !ARCH_INTEL_SOCFPGA) default ARM64 && ARCH_INTEL_SOCFPGA - depends on ARM64 && ARCH_INTEL_SOCFPGA + +endif # CLK_INTEL_SOCFPGA From patchwork Thu Mar 11 15:27:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12131837 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 862F9C433DB for ; Thu, 11 Mar 2021 15:28:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3A6AC64E59 for ; Thu, 11 Mar 2021 15:28:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234415AbhCKP2H (ORCPT ); Thu, 11 Mar 2021 10:28:07 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:34199 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234372AbhCKP1b (ORCPT ); Thu, 11 Mar 2021 10:27:31 -0500 Received: from mail-wr1-f72.google.com ([209.85.221.72]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lKNDm-0005Z5-IV for netdev@vger.kernel.org; Thu, 11 Mar 2021 15:27:30 +0000 Received: by mail-wr1-f72.google.com with SMTP id v13so9679001wrs.21 for ; Thu, 11 Mar 2021 07:27:30 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/3UhGLxhWacdcsSpVsIOhi7iq++tfBdPJwQmfZFh1zw=; b=UFOZCmQvyTYogkQe0MTon27B8yPqQOVV+TRPQ/ikBCXAsqIbc/vwa8tMwzxB15lm9M jqUOZs+CSmzGgiGTesu4NiSbbSmZ25MzujSriIvwJDIHmlmQ96HfhB1mKK0IAtYfuM6S 0LO4JcAzJhmkgejDghcLfNxZCEtQcrX1PevqgL/GgpV4agxSRRFN2UQXqI4Lf837Z2cz F9J2buC30kezQkGFMua7gxNo7xJeAJE1yieD5t2IwhwB6tpy1V7zWUTRKCfINnmpOyXx 4kR/CHSc1uXLujHHMZj6NeAUzm7B/T5kRkVjxMk3JSeaaTJLhEjuGbp5JR9Bf7uQwH9s m1Og== X-Gm-Message-State: AOAM533YrQkeddp0xhY50N9sYsH6ex8tF6NCCCcDaOCeLKcrSVy09LjY XYbaQ+tgsSd0CFdgELpfAgua8i35rFTf9Rbwj6lVcd+/8I1SoAoorKzX+AudhWNUrkmZ2tERenH Rzjsey6tyuUSAA3bPaIwYz0rLpsXHWGfpkw== X-Received: by 2002:a05:6402:1103:: with SMTP id u3mr8916746edv.205.1615476439289; Thu, 11 Mar 2021 07:27:19 -0800 (PST) X-Google-Smtp-Source: ABdhPJykFYMegR7g3sofzBC+1YkJVaDapoNS+bRGUtFV8/I7aVJB5VDHjlbA8PWaxRhm9KLVG244sg== X-Received: by 2002:a05:6402:1103:: with SMTP id u3mr8916710edv.205.1615476439104; Thu, 11 Mar 2021 07:27:19 -0800 (PST) Received: from localhost.localdomain (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id yk8sm1445697ejb.123.2021.03.11.07.27.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:27:18 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 10/15] clk: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs (and compile test) Date: Thu, 11 Mar 2021 16:27:15 +0100 Message-Id: <20210311152715.1317848-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the 32-bit ARM drivers to rely on new symbol. There is little point to share clock controller drivers between 32-bit and 64-bit platforms because there will not be a generic image for both of them. Therefore add a new Kconfig entry for building 32-bit clock driverss, similar to one for 64-bit. This allows enabling compile testing. Signed-off-by: Krzysztof Kozlowski --- drivers/clk/socfpga/Kconfig | 6 +++++- drivers/clk/socfpga/Makefile | 4 ++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig index b62ede8cad01..0cf16b894efb 100644 --- a/drivers/clk/socfpga/Kconfig +++ b/drivers/clk/socfpga/Kconfig @@ -4,10 +4,14 @@ config CLK_INTEL_SOCFPGA default ARCH_INTEL_SOCFPGA help Support for the clock controllers present on Intel SoCFPGA and eASIC - devices like Stratix 10, Agilex and N5X eASIC. + devices like Aria, Cyclone, Stratix 10, Agilex and N5X eASIC. if CLK_INTEL_SOCFPGA +config CLK_INTEL_SOCFPGA32 + bool "Intel Aria / Cyclone clock controller support" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA) + default ARM && ARCH_INTEL_SOCFPGA + config CLK_INTEL_SOCFPGA64 bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && (!ARM64 || !ARCH_INTEL_SOCFPGA) default ARM64 && ARCH_INTEL_SOCFPGA diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile index ebd3538d12de..e8dfce339c91 100644 --- a/drivers/clk/socfpga/Makefile +++ b/drivers/clk/socfpga/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o -obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o +obj-$(CONFIG_CLK_INTEL_SOCFPGA32) += clk.o clk-gate.o clk-pll.o clk-periph.o \ + clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-s10.o \ clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o \ clk-agilex.o From patchwork Thu Mar 11 15:27:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12131839 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5441FC43142 for ; Thu, 11 Mar 2021 15:28:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 22B7064FD6 for ; Thu, 11 Mar 2021 15:28:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234363AbhCKP2K (ORCPT ); Thu, 11 Mar 2021 10:28:10 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:34219 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234215AbhCKP1f (ORCPT ); Thu, 11 Mar 2021 10:27:35 -0500 Received: from mail-ed1-f71.google.com ([209.85.208.71]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lKNDp-0005aa-PY for netdev@vger.kernel.org; Thu, 11 Mar 2021 15:27:33 +0000 Received: by mail-ed1-f71.google.com with SMTP id m8so4344826edv.11 for ; Thu, 11 Mar 2021 07:27:33 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UjkBHzEIXy3Qt0KfyB8W+UTqTimKf+/Z4F2P3MBYO1k=; b=g7m8c/mV1fXi4FCHyIWTsoTMH6NfujnaYhh+vG7t8EJYg9AJ/nEyx6mPJ6w5D4FsAt Z0YBNtG2u6kSBmwqLvRT5LOMPqWvyaw8JtE4ceoJKws7DF/bWIxUJYo1xlarCcfgJd44 cFwVc2Gn5gaoV6xmRdejLLUE4Vm5YNFKOavR0JnzuvQkcgKtqxqHpQhpWbMX7vcAaWjB XodaBtWDMQMnfzuUYo246i8HLQD1K9q01pPm8yud1OzVi3YhEi09G/KwcTCdG/6GE+tE qDYuh8KGGmLbw/pGUyBeG+0hMm8ezVFyvuXGTJGXhFc+7AT8uYl+GkHirhptaFpAygSW fchA== X-Gm-Message-State: AOAM530vbKNTg6qN136sfTuJ+XsVRdDrVZz9tS/78h3da/k5LHdT5DAA nyTnIdWx8bTI7pOmoxPFfGIaoT5T78aDQ8hvSfARSfXFkpPs14zUQCKoni7OwWLA2/tVaMo1MfH EXxmAasjn5IH+qcvw1kPwtHlOgl5lH9EoPQ== X-Received: by 2002:a05:6402:149:: with SMTP id s9mr9105074edu.247.1615476453450; Thu, 11 Mar 2021 07:27:33 -0800 (PST) X-Google-Smtp-Source: ABdhPJy9JEFJOCs9xlVCDjG2l3JIb1sIqxzKP3KekIDHOJltUt18JZjWfClKITi/qC3i9sP0ViNxqQ== X-Received: by 2002:a05:6402:149:: with SMTP id s9mr9105059edu.247.1615476453282; Thu, 11 Mar 2021 07:27:33 -0800 (PST) Received: from localhost.localdomain (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id t15sm1552389edw.84.2021.03.11.07.27.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:27:32 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 11/15] dmaengine: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs Date: Thu, 11 Mar 2021 16:27:31 +0100 Message-Id: <20210311152731.1318428-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the 32-bit ARM drivers to rely on new symbol. Signed-off-by: Krzysztof Kozlowski --- drivers/dma/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index 0c2827fd8c19..a0836ffc22e0 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -100,7 +100,7 @@ config AT_XDMAC config AXI_DMAC tristate "Analog Devices AXI-DMAC DMA support" - depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST + depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS select REGMAP_MMIO From patchwork Thu Mar 11 15:27:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12131841 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0DD50C28E80 for ; Thu, 11 Mar 2021 15:28:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D44C564FEC for ; Thu, 11 Mar 2021 15:28:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234402AbhCKP2L (ORCPT ); Thu, 11 Mar 2021 10:28:11 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:34244 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234234AbhCKP1j (ORCPT ); Thu, 11 Mar 2021 10:27:39 -0500 Received: from mail-ed1-f69.google.com ([209.85.208.69]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lKNDt-0005cg-K6 for netdev@vger.kernel.org; Thu, 11 Mar 2021 15:27:37 +0000 Received: by mail-ed1-f69.google.com with SMTP id t27so10043332edi.2 for ; Thu, 11 Mar 2021 07:27:37 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xL1edBPIXb5EtPx7dtqi4BTArR+ixt/89Ez9ALjb7AY=; b=Z+dPPncy018wFwtKQniuXtq5sdQ0miM2qQzzHIlT4A6UDnfxtOc1C8K6McWVXw2V3M 2cBzCYsfO7GAme3ZcP9n03JQ9sycM3hfM4g2UVcgZye8je2GiofakrHlEKElTS+pPDJY bKEbhNpHabtPwPcv++r2Fc+BT9tvJK01TILhjaWgT+E5Uquf8Fi9oidX3OgoNlFlnWgq a3WK0Cg5Znco8b5xh8ck1m5OCk6cQnzoJ+GAVaaBiSnoWibzlhtNvTUnvaqc/siNBBhF cjxqPXwL+2FtzjqhMvz+YzjBa94VXjyOKb28EIAs5nZlBJ2ReDXmNVEjQo7OerrtcRuH MJXg== X-Gm-Message-State: AOAM533Q1+GjQjidD3dUd7CWjO/9nz2NA5KJhZa9di3+8wiGNjV48NLq 9PeXjYrCrbDdTJ+FsXw8PO+vbTHxbK3Zdjp7Bd1VrBYkp4uaAHzhju5qbt4Vm/TFiEGVSn+TNP5 euAhJ+Q0bip76sXB6UCifzCjwbaleUvSslQ== X-Received: by 2002:a05:6402:10c8:: with SMTP id p8mr8958385edu.144.1615476457312; Thu, 11 Mar 2021 07:27:37 -0800 (PST) X-Google-Smtp-Source: ABdhPJwym688lccoWS0vQKon5fsVW74N9HWG5xLsZvi1pg+uqrC83DObGrD7/MK6ibsjBN6gGqRDFQ== X-Received: by 2002:a05:6402:10c8:: with SMTP id p8mr8958352edu.144.1615476457175; Thu, 11 Mar 2021 07:27:37 -0800 (PST) Received: from localhost.localdomain (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id eo22sm1528960ejc.0.2021.03.11.07.27.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:27:36 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 12/15] fpga: altera: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs Date: Thu, 11 Mar 2021 16:27:35 +0100 Message-Id: <20210311152735.1318487-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the 32-bit ARM drivers to rely on new symbol. Signed-off-by: Krzysztof Kozlowski Acked-by: Moritz Fischer --- drivers/fpga/Kconfig | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index fd325e9c5ce6..b1026c6fb119 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -14,13 +14,13 @@ if FPGA config FPGA_MGR_SOCFPGA tristate "Altera SOCFPGA FPGA Manager" - depends on ARCH_SOCFPGA || COMPILE_TEST + depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST help FPGA manager driver support for Altera SOCFPGA. config FPGA_MGR_SOCFPGA_A10 tristate "Altera SoCFPGA Arria10" - depends on ARCH_SOCFPGA || COMPILE_TEST + depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST select REGMAP_MMIO help FPGA manager driver support for Altera Arria10 SoCFPGA. @@ -99,7 +99,7 @@ config FPGA_BRIDGE config SOCFPGA_FPGA_BRIDGE tristate "Altera SoCFPGA FPGA Bridges" - depends on ARCH_SOCFPGA && FPGA_BRIDGE + depends on ARCH_INTEL_SOCFPGA && FPGA_BRIDGE help Say Y to enable drivers for FPGA bridges for Altera SOCFPGA devices. From patchwork Thu Mar 11 15:27:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12131843 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58E91C28E86 for ; Thu, 11 Mar 2021 15:28:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2FF8564D9F for ; Thu, 11 Mar 2021 15:28:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234441AbhCKP2N (ORCPT ); Thu, 11 Mar 2021 10:28:13 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:34271 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234357AbhCKP1o (ORCPT ); Thu, 11 Mar 2021 10:27:44 -0500 Received: from mail-ej1-f69.google.com ([209.85.218.69]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lKNDw-0005eq-RS for netdev@vger.kernel.org; Thu, 11 Mar 2021 15:27:40 +0000 Received: by mail-ej1-f69.google.com with SMTP id fy8so8811749ejb.19 for ; Thu, 11 Mar 2021 07:27:40 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lXB/iL6vA5+sCIUzf2o2vRh/ni0zGUa9h57FfrwufeA=; b=eSSQ8CXufNILEyz7QZPpd4p71CiSGp57HAzg8B0eh9oSo7NpiR4hM3v2qmkAreKLaN MNteiSeAtwfCVZWZioOS3HgjmoXfnNwiUpk3S97Pfyiz+XFNvy7ks3129HHiww61MGmu eF8bVQ78un8mHmQgaIBIIo49ONw3rgC9s1RVLf4Fm9E7UpJTbM5hHrrIVgTr7mcpICRT /VVTmvwGYryQ48ASn1jIzMPTa8du50iyP5vXnEPOaqNW6UR2qpUU3pm+hFbu0cFffe7o mg1MihDnqrmJahKmDpozgcwmbLAw6phPcgnCl1T0PAmWcSclzrPCOBUxWMzsZXMwd86z 8x4Q== X-Gm-Message-State: AOAM532Tu5SiL6G0Mx47/4PfcQ4AXvAkDL+/f48FlP1npN5V+jMFBQ8P khTPWmtuaPI41mSbYwEMpwMnzkHttNDH4t2RQE3M2Gz+isUP0yKMAwAi1Lvh9VB1HbYxZ16uS8t ell72CSCCgbcuOCLIyv3yZ8Ih/8orhq9mYw== X-Received: by 2002:a17:906:753:: with SMTP id z19mr3596701ejb.447.1615476460420; Thu, 11 Mar 2021 07:27:40 -0800 (PST) X-Google-Smtp-Source: ABdhPJwn2V3fXBoj0gUy8DLvmPZgdZVpI4oNbBPuRpgJS86sHTABegOHS6FeUR0VFJ6Dqnh8S7uUpw== X-Received: by 2002:a17:906:753:: with SMTP id z19mr3596661ejb.447.1615476460220; Thu, 11 Mar 2021 07:27:40 -0800 (PST) Received: from localhost.localdomain (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id g1sm1497413edh.31.2021.03.11.07.27.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:27:39 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 13/15] i2c: altera: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs Date: Thu, 11 Mar 2021 16:27:38 +0100 Message-Id: <20210311152738.1318541-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the 32-bit ARM drivers to rely on new symbol. The side effect is that the I2C_ALTERA will now be available for both 32-bit and 64-bit Intel SoCFPGA, even though it is used only for 32-bit. Signed-off-by: Krzysztof Kozlowski --- drivers/i2c/busses/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 05ebf7546e3f..3eec59f1fed3 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -369,7 +369,7 @@ comment "I2C system bus drivers (mostly embedded / system-on-chip)" config I2C_ALTERA tristate "Altera Soft IP I2C" - depends on ARCH_SOCFPGA || NIOS2 || COMPILE_TEST + depends on ARCH_INTEL_SOCFPGA || NIOS2 || COMPILE_TEST depends on OF help If you say yes to this option, support will be included for the From patchwork Thu Mar 11 15:27:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12131847 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 862FFC28E87 for ; Thu, 11 Mar 2021 15:28:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5389264DE8 for ; Thu, 11 Mar 2021 15:28:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234449AbhCKP2P (ORCPT ); Thu, 11 Mar 2021 10:28:15 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:34281 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234360AbhCKP1p (ORCPT ); Thu, 11 Mar 2021 10:27:45 -0500 Received: from mail-ej1-f69.google.com ([209.85.218.69]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lKNDz-0005gR-Kn for netdev@vger.kernel.org; Thu, 11 Mar 2021 15:27:43 +0000 Received: by mail-ej1-f69.google.com with SMTP id 11so8805679ejz.20 for ; Thu, 11 Mar 2021 07:27:43 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RBN1O3Wcnz1uvA/bXXgFQO/02vpYiyGG/6WCSqIa6KY=; b=hKyaW5tlxjFVz3qRxTses3burc/6vWa+e1AakqRn9x6/J6VIEXsYNDkxxS50D+xZ7q DoD7fZnla+qVnbd65x+gSK+PZNCz2EIuh4v0hCvEy2oIsZjG4S3Sh8vPPyLpELdsK6WL KuFuFG/TPLMFxj82bC8zrYdjTxcCRFUWr6zGtJhzZUXGphvIctfu60ArEGNKi0HdZzQz 9jbRfpKgvrs2OAfzfWOoMXbC2AAWEy0IIRM4vCQZppKfi6X68tVdqsFEoUHfPClNP5YY 67kphHdikDi45mz2huFg5SUO9i3jqTFyNa1+CxAiVcmjDPvo9K/KQGTiFtu5WKpbHEeM sTyg== X-Gm-Message-State: AOAM531CZZMavyCsnIfGf+9Ac3ER2WxwZ/y+jcAyOieYEdCnE8P1Q3BG VA0efwl3IQ2LUjw/04ATq8ARf83LEpmay4inXTU3CkTomRolhzxhK7ykwZfaeoRkHL9O+fPbF64 +BTPfJIm+vky1IRbmgNFyA1C+PHpUh/aLzg== X-Received: by 2002:a05:6402:510b:: with SMTP id m11mr9145602edd.103.1615476463285; Thu, 11 Mar 2021 07:27:43 -0800 (PST) X-Google-Smtp-Source: ABdhPJzftQgQhm6JCnX7NkcREdfHxQ79cH5j2A8F4fhogge3Hb8YjiFCimex/EvBlWPVnkSsMSMXPQ== X-Received: by 2002:a05:6402:510b:: with SMTP id m11mr9145573edd.103.1615476463167; Thu, 11 Mar 2021 07:27:43 -0800 (PST) Received: from localhost.localdomain (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id k9sm1567062edn.68.2021.03.11.07.27.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:27:42 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 14/15] reset: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs Date: Thu, 11 Mar 2021 16:27:41 +0100 Message-Id: <20210311152741.1318599-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the 32-bit ARM drivers to rely on new symbol. Signed-off-by: Krzysztof Kozlowski --- drivers/reset/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index b1e8efa16166..7043c7f6dcf0 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -205,8 +205,8 @@ config RESET_STM32MP157 This enables the RCC reset controller driver for STM32 MPUs. config RESET_SOCFPGA - bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA - default ARCH_SOCFPGA + bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA) + default ARM && ARCH_INTEL_SOCFPGA select RESET_SIMPLE help This enables the reset driver for the SoCFPGA ARMv7 platforms. This From patchwork Thu Mar 11 15:27:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 12131845 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95535C28E8A for ; Thu, 11 Mar 2021 15:28:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6C6F965006 for ; Thu, 11 Mar 2021 15:28:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234460AbhCKP2Q (ORCPT ); Thu, 11 Mar 2021 10:28:16 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:34382 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234408AbhCKP17 (ORCPT ); Thu, 11 Mar 2021 10:27:59 -0500 Received: from mail-lf1-f72.google.com ([209.85.167.72]) by youngberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1lKNEE-0005qJ-7H for netdev@vger.kernel.org; Thu, 11 Mar 2021 15:27:58 +0000 Received: by mail-lf1-f72.google.com with SMTP id k14so6831265lfg.16 for ; Thu, 11 Mar 2021 07:27:58 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LkS1dLaLUNf0Tu13eWfZQBLP6fiimg7+EWMMMS6XyYM=; b=XynV7bKu3L+GAum5Q/Ay12yP8ppslmwrFSRSZknUDcWjl2mNiJ1PyOWNYg51Jb+MQz QiuKzuCfTHbRRM6CQ6ziXc2kdN5D0tsjME03dKPdHOP2SzyePCXznAUJHFvpKLaGzIfE LjN1hZW7a3tWDqem4h+v3ktp9IW9v/zhLCl4YuGsiSLH9yL5ye92fElr8KT5RAFy732O RQxxoTzykLjxN1ITFsp1NsbI93grUsE4kWXltMJJ1exaAhQeeKwMy+H87qWA346REF9V yX/H5dlve67ibEUleLOBQ1C0wAiDi6lRGVZ14vEtu4jcuEa4e9889eTJ62Sz/5oKqiV2 xjAA== X-Gm-Message-State: AOAM5315g8gnq+xa5PzkaXlw8QMwIQXPjtVCdK0PX3i9TYnpT28LoZhV CafljLVxvdfrxc2QnLMnhkNCOs3g5jQv0rrDtLxWDL1RFtFy9hTN5hm3QVN1homoajAS7K7Ruyt 9KnaOvmCzacKokwP2HbIf/OuDT1jKVxzcEQ== X-Received: by 2002:a05:6402:10c9:: with SMTP id p9mr9186814edu.268.1615476466826; Thu, 11 Mar 2021 07:27:46 -0800 (PST) X-Google-Smtp-Source: ABdhPJwiRng9hU7KaBQ9hI2y61WSuJDlIqArf08ScSxAu55vb9/puMamEp/Rnnmw5+yqMGNTUgkwAA== X-Received: by 2002:a05:6402:10c9:: with SMTP id p9mr9186761edu.268.1615476466574; Thu, 11 Mar 2021 07:27:46 -0800 (PST) Received: from localhost.localdomain (adsl-84-226-167-205.adslplus.ch. [84.226.167.205]) by smtp.gmail.com with ESMTPSA id t15sm1518545edc.34.2021.03.11.07.27.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Mar 2021 07:27:46 -0800 (PST) From: Krzysztof Kozlowski List-Id: To: Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , Dinh Nguyen , Catalin Marinas , Will Deacon , Michael Turquette , Stephen Boyd , Vinod Koul , Borislav Petkov , Tony Luck , James Morse , Robert Richter , Moritz Fischer , Tom Rix , Lee Jones , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Philipp Zabel , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, dmaengine@vger.kernel.org, linux-edac@vger.kernel.org, linux-fpga@vger.kernel.org, linux-i2c@vger.kernel.org, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Krzysztof Kozlowski Subject: [PATCH v3 15/15] ARM: socfpga: drop ARCH_SOCFPGA Date: Thu, 11 Mar 2021 16:27:44 +0100 Message-Id: <20210311152744.1318653-1-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> References: <20210311152545.1317581-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only one for both of them. After conversion of all drivers to use the new ARCH_INTEL_SOCFPGA, the remaining ARM option can be removed. Signed-off-by: Krzysztof Kozlowski --- arch/arm/configs/multi_v7_defconfig | 2 +- arch/arm/configs/socfpga_defconfig | 2 +- arch/arm/mach-socfpga/Kconfig | 8 ++------ 3 files changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 3823da605430..591b15164e3d 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -79,7 +79,7 @@ CONFIG_ARCH_MSM8960=y CONFIG_ARCH_MSM8974=y CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_RENESAS=y -CONFIG_ARCH_SOCFPGA=y +CONFIG_ARCH_INTEL_SOCFPGA=y CONFIG_PLAT_SPEAR=y CONFIG_ARCH_SPEAR13XX=y CONFIG_MACH_SPEAR1310=y diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig index 0c60eb382c80..2d9404ea52c6 100644 --- a/arch/arm/configs/socfpga_defconfig +++ b/arch/arm/configs/socfpga_defconfig @@ -9,7 +9,7 @@ CONFIG_NAMESPACES=y CONFIG_BLK_DEV_INITRD=y CONFIG_EMBEDDED=y CONFIG_PROFILING=y -CONFIG_ARCH_SOCFPGA=y +CONFIG_ARCH_INTEL_SOCFPGA=y CONFIG_ARM_THUMBEE=y CONFIG_SMP=y CONFIG_NR_CPUS=2 diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index e43ed0ca6860..43ddec677c0b 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -1,8 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only -menuconfig ARCH_SOCFPGA +menuconfig ARCH_INTEL_SOCFPGA bool "Altera SOCFPGA family" depends on ARCH_MULTI_V7 - select ARCH_INTEL_SOCFPGA select ARCH_SUPPORTS_BIG_ENDIAN select ARM_AMBA select ARM_GIC @@ -20,10 +19,7 @@ menuconfig ARCH_SOCFPGA select PL310_ERRATA_753970 if PL310 select PL310_ERRATA_769419 -if ARCH_SOCFPGA -config ARCH_INTEL_SOCFPGA - bool - +if ARCH_INTEL_SOCFPGA config SOCFPGA_SUSPEND bool "Suspend to RAM on SOCFPGA" help