From patchwork Fri Mar 12 17:34:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ameynarkhede03 X-Patchwork-Id: 12135581 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9F9DC43381 for ; Fri, 12 Mar 2021 17:37:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 83EC364F6F for ; Fri, 12 Mar 2021 17:37:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231557AbhCLRgx (ORCPT ); Fri, 12 Mar 2021 12:36:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232398AbhCLRgn (ORCPT ); Fri, 12 Mar 2021 12:36:43 -0500 Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48810C061574; Fri, 12 Mar 2021 09:36:43 -0800 (PST) Received: by mail-pj1-x102d.google.com with SMTP id lr1-20020a17090b4b81b02900ea0a3f38c1so3565099pjb.0; Fri, 12 Mar 2021 09:36:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1Y1htRxzwe4GvUrmVHitMsRW0eXRp0985GL3PMPoywk=; b=muJS2aQvJm8TGBVf+gd2klUHo+uSGPPcfJqaL5x4H3vCYH7Flj+nwMOW46CrNsbOrd WZamp5cG5ueUQHjZ29mg6ZJVWPxAyujQtCjRVBlsIbQ00VBrd202qEMJ1/gB1IckHPor DjQ9XOfBGUKgOhtPE7ZE4jgrgAxnWrmRVK9oMo2L8/DyL7rXkEImFKKXrHe45laFWB2v 673SzVhjP5zLNgFRo2VudrKafHffYysaCSQ1/aqAicyLINRHTiBZKagC8u8OG8nEDi0q Q/ZvIyk4gg5JgCJDyu1E0hx8Ul3V/IKuYiw/l32hMybAMr/JP2jvGxLyEYYIIkyBwMit FjTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1Y1htRxzwe4GvUrmVHitMsRW0eXRp0985GL3PMPoywk=; b=NiNy0DZSnee0qdngdJ+UT+NiYe9RKwF3HzYN5uz9ljYSn5N4Cyg6cmUxM65mXhq+tF kFnm7GWcSbD/8aWb4d+z/v6xg5o+C7VeXJSJZ0DUFewmr/y3Ey1HITHxsa3koM/PqE7Z hlOcEoQLeXMibIY+P8B0FJAx8r7PMfBtsooSsvvSnahjE8tUQ7bCHM+NjWQdyPuywdu+ Ohp+MMsEO4FwdNAunKPZwBGVF09+YLz0QBjR/Yd+pXimUTJJ9Sph9Yfo4Di4ejT3Hzzm K+1dIkUIrOGDKN4tpJAquQoKbZ5t//9ILDxNQTpyqlSF5R8G6d2mMBk+OOCUDFWR84Qg zJTA== X-Gm-Message-State: AOAM531VWCok/r50XMcHNn3iA/87qCPHzzAxd9dAAx9ofpmPVsMjkY1z gYx3DumLNfuN2mzD3De7VQo= X-Google-Smtp-Source: ABdhPJx8X5eUIY/Vv5eoDYuqyxS3392B2yM95G9bKH2hNncfLaySXC76EoqAeai8I6aVWzeJxKw/6g== X-Received: by 2002:a17:90b:4008:: with SMTP id ie8mr15775538pjb.231.1615570602851; Fri, 12 Mar 2021 09:36:42 -0800 (PST) Received: from localhost.localdomain ([103.248.31.144]) by smtp.googlemail.com with ESMTPSA id l10sm180045pfc.125.2021.03.12.09.36.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Mar 2021 09:36:42 -0800 (PST) From: ameynarkhede03@gmail.com To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, alex.williamson@redhat.com, raphael.norwitz@nutanix.com, Amey Narkhede Subject: [PATCH 1/4] PCI: Refactor pcie_flr to follow calling convention of other reset methods Date: Fri, 12 Mar 2021 23:04:49 +0530 Message-Id: <20210312173452.3855-2-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210312173452.3855-1-ameynarkhede03@gmail.com> References: <20210312173452.3855-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Amey Narkhede Currently there is separate function pcie_has_flr to probe whether pcie flr is supported or not by the device which does not match the calling convention followed by all other reset methods which use second function argument to decide whether to probe or not. Refactor pcie_flr to follow calling convention of reset methods and remove superfluous pcie_has_flr function. Signed-off-by: Amey Narkhede --- Reviewed-by: Alex Williamson Reviewed-by: Raphael Norwitz drivers/crypto/cavium/nitrox/nitrox_main.c | 4 +- drivers/crypto/qat/qat_common/adf_aer.c | 2 +- drivers/infiniband/hw/hfi1/chip.c | 4 +- drivers/net/ethernet/broadcom/bnxt/bnxt.c | 2 +- .../ethernet/cavium/liquidio/lio_vf_main.c | 2 +- .../ethernet/cavium/liquidio/octeon_mailbox.c | 2 +- drivers/net/ethernet/freescale/enetc/enetc.c | 2 +- .../ethernet/freescale/enetc/enetc_pci_mdio.c | 2 +- drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 4 +- drivers/pci/pci.c | 65 ++++++++++--------- drivers/pci/pcie/aer.c | 12 ++-- drivers/pci/quirks.c | 15 ++--- include/linux/pci.h | 4 +- 13 files changed, 58 insertions(+), 62 deletions(-) -- 2.30.2 diff --git a/drivers/crypto/cavium/nitrox/nitrox_main.c b/drivers/crypto/cavium/nitrox/nitrox_main.c index facc8e6bc..dbf9499f4 100644 --- a/drivers/crypto/cavium/nitrox/nitrox_main.c +++ b/drivers/crypto/cavium/nitrox/nitrox_main.c @@ -306,9 +306,7 @@ static int nitrox_device_flr(struct pci_dev *pdev) return -ENOMEM; } - /* check flr support */ - if (pcie_has_flr(pdev)) - pcie_flr(pdev); + pcie_flr(pdev, 0); pci_restore_state(pdev); diff --git a/drivers/crypto/qat/qat_common/adf_aer.c b/drivers/crypto/qat/qat_common/adf_aer.c index d2ae293d0..7716a6b8b 100644 --- a/drivers/crypto/qat/qat_common/adf_aer.c +++ b/drivers/crypto/qat/qat_common/adf_aer.c @@ -65,7 +65,7 @@ EXPORT_SYMBOL_GPL(adf_reset_sbr); void adf_reset_flr(struct adf_accel_dev *accel_dev) { - pcie_flr(accel_to_pci_dev(accel_dev)); + pcie_flr(accel_to_pci_dev(accel_dev), 0); } EXPORT_SYMBOL_GPL(adf_reset_flr); diff --git a/drivers/infiniband/hw/hfi1/chip.c b/drivers/infiniband/hw/hfi1/chip.c index 993cbf37e..b2cc0dd9b 100644 --- a/drivers/infiniband/hw/hfi1/chip.c +++ b/drivers/infiniband/hw/hfi1/chip.c @@ -14099,7 +14099,7 @@ static int init_chip(struct hfi1_devdata *dd) dd_dev_info(dd, "Resetting CSRs with FLR\n"); /* do the FLR, the DC reset will remain */ - pcie_flr(dd->pcidev); + pcie_flr(dd->pcidev, 0); /* restore command and BARs */ ret = restore_pci_variables(dd); @@ -14111,7 +14111,7 @@ static int init_chip(struct hfi1_devdata *dd) if (is_ax(dd)) { dd_dev_info(dd, "Resetting CSRs with FLR\n"); - pcie_flr(dd->pcidev); + pcie_flr(dd->pcidev, 0); ret = restore_pci_variables(dd); if (ret) { dd_dev_err(dd, "%s: Could not restore PCI variables\n", diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c index a680fd9c6..dd2b539c7 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c @@ -12750,7 +12750,7 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) */ if (is_kdump_kernel()) { pci_clear_master(pdev); - pcie_flr(pdev); + pcie_flr(pdev, 0); } max_irqs = bnxt_get_max_irq(pdev); diff --git a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c index 516f166ce..9b9d305c6 100644 --- a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c +++ b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c @@ -429,7 +429,7 @@ static void octeon_pci_flr(struct octeon_device *oct) pci_write_config_word(oct->pci_dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE); - pcie_flr(oct->pci_dev); + pcie_flr(oct->pci_dev, 0); pci_cfg_access_unlock(oct->pci_dev); diff --git a/drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c b/drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c index ad685f5d0..ed9e68a4b 100644 --- a/drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c +++ b/drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c @@ -260,7 +260,7 @@ static int octeon_mbox_process_cmd(struct octeon_mbox *mbox, dev_info(&oct->pci_dev->dev, "got a request for FLR from VF that owns DPI ring %u\n", mbox->q_no); - pcie_flr(oct->sriov_info.dpiring_to_vfpcidev_lut[mbox->q_no]); + pcie_flr(oct->sriov_info.dpiring_to_vfpcidev_lut[mbox->q_no], 0); break; case OCTEON_PF_CHANGED_VF_MACADDR: diff --git a/drivers/net/ethernet/freescale/enetc/enetc.c b/drivers/net/ethernet/freescale/enetc/enetc.c index c78d12229..8fb11c63c 100644 --- a/drivers/net/ethernet/freescale/enetc/enetc.c +++ b/drivers/net/ethernet/freescale/enetc/enetc.c @@ -1895,7 +1895,7 @@ int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv) size_t alloc_size; int err, len; - pcie_flr(pdev); + pcie_flr(pdev, 0); err = pci_enable_device_mem(pdev); if (err) { dev_err(&pdev->dev, "device enable failed\n"); diff --git a/drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c b/drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c index 15f37c5b8..7cd6bf124 100644 --- a/drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c +++ b/drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c @@ -47,7 +47,7 @@ static int enetc_pci_mdio_probe(struct pci_dev *pdev, mdio_priv->mdio_base = ENETC_EMDIO_BASE; snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev)); - pcie_flr(pdev); + pcie_flr(pdev, 0); err = pci_enable_device_mem(pdev); if (err) { dev_err(dev, "device enable failed\n"); diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c index fae84202d..c638fb650 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c @@ -7624,7 +7624,7 @@ static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter) pci_read_config_word(vfdev, PCI_STATUS, &status_reg); if (status_reg != IXGBE_FAILED_READ_CFG_WORD && status_reg & PCI_STATUS_REC_MASTER_ABORT) - pcie_flr(vfdev); + pcie_flr(vfdev, 0); } } @@ -11241,7 +11241,7 @@ static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev, * VFLR. Just clean up the AER in that case. */ if (vfdev) { - pcie_flr(vfdev); + pcie_flr(vfdev, 0); /* Free device reference count */ pci_dev_put(vfdev); } diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 16a17215f..4a7c084a3 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4574,33 +4574,13 @@ int pci_wait_for_pending_transaction(struct pci_dev *dev) EXPORT_SYMBOL(pci_wait_for_pending_transaction); /** - * pcie_has_flr - check if a device supports function level resets - * @dev: device to check - * - * Returns true if the device advertises support for PCIe function level - * resets. - */ -bool pcie_has_flr(struct pci_dev *dev) -{ - u32 cap; - - if (dev->dev_flags & PCI_DEV_FLAGS_NO_FLR_RESET) - return false; - - pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &cap); - return cap & PCI_EXP_DEVCAP_FLR; -} -EXPORT_SYMBOL_GPL(pcie_has_flr); - -/** - * pcie_flr - initiate a PCIe function level reset + * pcie_reset_flr - initiate a PCIe function level reset * @dev: device to reset * - * Initiate a function level reset on @dev. The caller should ensure the - * device supports FLR before calling this function, e.g. by using the - * pcie_has_flr() helper. + * Initiate a function level reset unconditionally on @dev without + * checking any flags and DEVCAP */ -int pcie_flr(struct pci_dev *dev) +int pcie_reset_flr(struct pci_dev *dev) { if (!pci_wait_for_pending_transaction(dev)) pci_err(dev, "timed out waiting for pending transaction; performing function level reset anyway\n"); @@ -4619,6 +4599,30 @@ int pcie_flr(struct pci_dev *dev) return pci_dev_wait(dev, "FLR", PCIE_RESET_READY_POLL_MS); } + +/** + * pcie_flr - initiate a PCIe function level reset + * @dev: device to reset + * @probe: If set, only check if the device can be reset this way. + * + * Initiate a function level reset on @dev. + */ +int pcie_flr(struct pci_dev *dev, int probe) +{ + u32 cap; + + if (dev->dev_flags & PCI_DEV_FLAGS_NO_FLR_RESET) + return -ENOTTY; + + pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &cap); + if (!(cap & PCI_EXP_DEVCAP_FLR)) + return -ENOTTY; + + if (probe) + return 0; + + return pcie_reset_flr(dev); +} EXPORT_SYMBOL_GPL(pcie_flr); static int pci_af_flr(struct pci_dev *dev, int probe) @@ -5091,11 +5095,9 @@ int __pci_reset_function_locked(struct pci_dev *dev) rc = pci_dev_specific_reset(dev, 0); if (rc != -ENOTTY) return rc; - if (pcie_has_flr(dev)) { - rc = pcie_flr(dev); - if (rc != -ENOTTY) - return rc; - } + rc = pcie_flr(dev, 0); + if (rc != -ENOTTY) + return rc; rc = pci_af_flr(dev, 0); if (rc != -ENOTTY) return rc; @@ -5129,8 +5131,9 @@ int pci_probe_reset_function(struct pci_dev *dev) rc = pci_dev_specific_reset(dev, 1); if (rc != -ENOTTY) return rc; - if (pcie_has_flr(dev)) - return 0; + rc = pcie_flr(dev, 1); + if (rc != -ENOTTY) + return rc; rc = pci_af_flr(dev, 1); if (rc != -ENOTTY) return rc; diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index ba2238834..57a8806a9 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -1405,13 +1405,11 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) } if (type == PCI_EXP_TYPE_RC_EC || type == PCI_EXP_TYPE_RC_END) { - if (pcie_has_flr(dev)) { - rc = pcie_flr(dev); - pci_info(dev, "has been reset (%d)\n", rc); - } else { - pci_info(dev, "not reset (no FLR support)\n"); - rc = -ENOTTY; - } + rc = pcie_flr(dev, 0); + if (!rc) + pci_info(dev, "has been reset\n"); + else + pci_info(dev, "not reset (no FLR support: %d)\n", rc); } else { rc = pci_bus_error_reset(dev); pci_info(dev, "%s Port link has been reset (%d)\n", diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 653660e3b..0a3df84c9 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3692,7 +3692,7 @@ static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, int probe) * supported. */ if (!probe) - pcie_flr(dev); + pcie_reset_flr(dev); return 0; } @@ -3795,7 +3795,7 @@ static int reset_chelsio_generic_dev(struct pci_dev *dev, int probe) PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL); - pcie_flr(dev); + pcie_flr(dev, 0); /* * Restore the configuration information (BAR values, etc.) including @@ -3831,7 +3831,7 @@ static int nvme_disable_and_flr(struct pci_dev *dev, int probe) u32 cfg; if (dev->class != PCI_CLASS_STORAGE_EXPRESS || - !pcie_has_flr(dev) || !pci_resource_start(dev, 0)) + pcie_flr(dev, 1) || !pci_resource_start(dev, 0)) return -ENOTTY; if (probe) @@ -3887,7 +3887,7 @@ static int nvme_disable_and_flr(struct pci_dev *dev, int probe) pci_iounmap(dev, bar); - pcie_flr(dev); + pcie_flr(dev, 0); return 0; } @@ -3900,13 +3900,10 @@ static int nvme_disable_and_flr(struct pci_dev *dev, int probe) */ static int delay_250ms_after_flr(struct pci_dev *dev, int probe) { - if (!pcie_has_flr(dev)) - return -ENOTTY; + int ret = pcie_flr(dev, probe); if (probe) - return 0; - - pcie_flr(dev); + return ret; msleep(250); diff --git a/include/linux/pci.h b/include/linux/pci.h index 86c799c97..621ff5224 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1217,8 +1217,8 @@ u32 pcie_bandwidth_available(struct pci_dev *dev, struct pci_dev **limiting_dev, enum pci_bus_speed *speed, enum pcie_link_width *width); void pcie_print_link_status(struct pci_dev *dev); -bool pcie_has_flr(struct pci_dev *dev); -int pcie_flr(struct pci_dev *dev); +int pcie_reset_flr(struct pci_dev *dev); +int pcie_flr(struct pci_dev *dev, int probe); int __pci_reset_function_locked(struct pci_dev *dev); int pci_reset_function(struct pci_dev *dev); int pci_reset_function_locked(struct pci_dev *dev); From patchwork Fri Mar 12 17:34:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ameynarkhede03 X-Patchwork-Id: 12135583 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26C1FC4332D for ; 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Fri, 12 Mar 2021 09:36:46 -0800 (PST) Received: from localhost.localdomain ([103.248.31.144]) by smtp.googlemail.com with ESMTPSA id l10sm180045pfc.125.2021.03.12.09.36.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Mar 2021 09:36:46 -0800 (PST) From: ameynarkhede03@gmail.com To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, alex.williamson@redhat.com, raphael.norwitz@nutanix.com, Amey Narkhede Subject: [PATCH 2/4] PCI: Add new bitmap for keeping track of supported reset mechanisms Date: Fri, 12 Mar 2021 23:04:50 +0530 Message-Id: <20210312173452.3855-3-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210312173452.3855-1-ameynarkhede03@gmail.com> References: <20210312173452.3855-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Amey Narkhede Introduce a new bitmap reset_methods in struct pci_dev to keep track of reset mechanisms supported by the device. Also refactor probing and reset functions to take advantage of calling convention of reset functions. Signed-off-by: Amey Narkhede --- Reviewed-by: Alex Williamson Reviewed-by: Raphael Norwitz drivers/pci/pci.c | 106 ++++++++++++++++++++++++-------------------- drivers/pci/pci.h | 11 ++++- drivers/pci/probe.c | 5 +-- include/linux/pci.h | 10 +++++ 4 files changed, 79 insertions(+), 53 deletions(-) -- 2.30.2 diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 4a7c084a3..407b44e85 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -40,6 +40,26 @@ const char *pci_power_names[] = { }; EXPORT_SYMBOL_GPL(pci_power_names); +static int pci_af_flr(struct pci_dev *dev, int probe); +static int pci_pm_reset(struct pci_dev *dev, int probe); +static int pci_dev_reset_slot_function(struct pci_dev *dev, int probe); +static int pci_parent_bus_reset(struct pci_dev *dev, int probe); + +/* + * The ordering for functions in pci_reset_fn_methods + * is required for bitmap positions defined + * in reset_methods in struct pci_dev + */ +const struct pci_reset_fn_method pci_reset_fn_methods[] = { + { .reset_fn = &pci_dev_specific_reset, .name = "device_specific" }, + { .reset_fn = &pcie_flr, .name = "flr" }, + { .reset_fn = &pci_af_flr, .name = "af_flr" }, + { .reset_fn = &pci_pm_reset, .name = "pm" }, + { .reset_fn = &pci_dev_reset_slot_function, .name = "slot" }, + { .reset_fn = &pci_parent_bus_reset, .name = "bus" }, + { 0 }, +}; + int isa_dma_bridge_buggy; EXPORT_SYMBOL(isa_dma_bridge_buggy); @@ -5080,71 +5100,59 @@ static void pci_dev_restore(struct pci_dev *dev) */ int __pci_reset_function_locked(struct pci_dev *dev) { - int rc; + int i, rc = -ENOTTY; + const struct pci_reset_fn_method *reset; might_sleep(); - /* - * A reset method returns -ENOTTY if it doesn't support this device - * and we should try the next method. - * - * If it returns 0 (success), we're finished. If it returns any - * other error, we're also finished: this indicates that further - * reset mechanisms might be broken on the device. - */ - rc = pci_dev_specific_reset(dev, 0); - if (rc != -ENOTTY) - return rc; - rc = pcie_flr(dev, 0); - if (rc != -ENOTTY) - return rc; - rc = pci_af_flr(dev, 0); - if (rc != -ENOTTY) - return rc; - rc = pci_pm_reset(dev, 0); - if (rc != -ENOTTY) - return rc; - rc = pci_dev_reset_slot_function(dev, 0); - if (rc != -ENOTTY) - return rc; - return pci_parent_bus_reset(dev, 0); + for (i = 0, reset = pci_reset_fn_methods; reset->reset_fn; i++, reset++) { + if (!(dev->reset_methods & (1 << i))) + continue; + + /* + * A reset method returns -ENOTTY if it doesn't support this device + * and we should try the next method. + * + * If it returns 0 (success), we're finished. If it returns any + * other error, we're also finished: this indicates that further + * reset mechanisms might be broken on the device. + */ + rc = reset->reset_fn(dev, 0); + if (rc != -ENOTTY) + return rc; + } + return rc; } EXPORT_SYMBOL_GPL(__pci_reset_function_locked); /** - * pci_probe_reset_function - check whether the device can be safely reset - * @dev: PCI device to reset + * pci_init_reset_methods - check whether device can be safely reset + * and store supported reset mechanisms. + * @dev: PCI device to check for reset mechanisms * * Some devices allow an individual function to be reset without affecting * other functions in the same device. The PCI device must be responsive - * to PCI config space in order to use this function. + * to reads and writes to its PCI config space in order to use this function. * - * Returns 0 if the device function can be reset or negative if the - * device doesn't support resetting a single function. + * Stores reset mechanisms supported by device in reset_methods bitmap + * field of struct pci_dev */ -int pci_probe_reset_function(struct pci_dev *dev) +void pci_init_reset_methods(struct pci_dev *dev) { - int rc; + int i, rc; + const struct pci_reset_fn_method *reset; - might_sleep(); + dev->reset_methods = 0; - rc = pci_dev_specific_reset(dev, 1); - if (rc != -ENOTTY) - return rc; - rc = pcie_flr(dev, 1); - if (rc != -ENOTTY) - return rc; - rc = pci_af_flr(dev, 1); - if (rc != -ENOTTY) - return rc; - rc = pci_pm_reset(dev, 1); - if (rc != -ENOTTY) - return rc; - rc = pci_dev_reset_slot_function(dev, 1); - if (rc != -ENOTTY) - return rc; + might_sleep(); - return pci_parent_bus_reset(dev, 1); + for (i = 0, reset = pci_reset_fn_methods; reset->reset_fn; i++, reset++) { + rc = reset->reset_fn(dev, 1); + if (!rc) + dev->reset_methods |= (1 << i); + else if (rc != -ENOTTY) + break; + } } /** diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index ef7c46613..ec093efdc 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -39,7 +39,7 @@ enum pci_mmap_api { int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai, enum pci_mmap_api mmap_api); -int pci_probe_reset_function(struct pci_dev *dev); +void pci_init_reset_methods(struct pci_dev *dev); int pci_bridge_secondary_bus_reset(struct pci_dev *dev); int pci_bus_error_reset(struct pci_dev *dev); @@ -612,6 +612,15 @@ struct pci_dev_reset_methods { int (*reset)(struct pci_dev *dev, int probe); }; +typedef int (*pci_reset_fn_t)(struct pci_dev *, int); + +struct pci_reset_fn_method { + pci_reset_fn_t reset_fn; + char *name; +}; + +extern const struct pci_reset_fn_method pci_reset_fn_methods[]; + #ifdef CONFIG_PCI_QUIRKS int pci_dev_specific_reset(struct pci_dev *dev, int probe); #else diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 953f15abc..01dd037bd 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2403,9 +2403,8 @@ static void pci_init_capabilities(struct pci_dev *dev) pci_rcec_init(dev); /* Root Complex Event Collector */ pcie_report_downtraining(dev); - - if (pci_probe_reset_function(dev) == 0) - dev->reset_fn = 1; + pci_init_reset_methods(dev); + dev->reset_fn = !!dev->reset_methods; } /* diff --git a/include/linux/pci.h b/include/linux/pci.h index 621ff5224..56d6e4750 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -325,6 +325,16 @@ struct pci_dev { unsigned int class; /* 3 bytes: (base,sub,prog-if) */ u8 revision; /* PCI revision, low byte of class word */ u8 hdr_type; /* PCI header type (`multi' flag masked out) */ + /* + * bit 0 -> dev_specific + * bit 1 -> flr + * bit 2 -> af_flr + * bit 3 -> pm + * bit 4 -> slot + * bit 5 -> bus + * See pci_reset_fn_methods array in pci.c + */ + u8 __bitwise reset_methods; /* bitmap for device supported reset capabilities */ #ifdef CONFIG_PCIEAER u16 aer_cap; /* AER capability offset */ struct aer_stats *aer_stats; /* AER stats for this device */ From patchwork Fri Mar 12 17:34:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ameynarkhede03 X-Patchwork-Id: 12135585 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3BC36C43332 for ; Fri, 12 Mar 2021 17:37:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 251AD64F0B for ; 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Fri, 12 Mar 2021 09:36:49 -0800 (PST) From: ameynarkhede03@gmail.com To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, alex.williamson@redhat.com, raphael.norwitz@nutanix.com, Amey Narkhede Subject: [PATCH 3/4] PCI: Remove reset_fn field from pci_dev Date: Fri, 12 Mar 2021 23:04:51 +0530 Message-Id: <20210312173452.3855-4-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210312173452.3855-1-ameynarkhede03@gmail.com> References: <20210312173452.3855-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Amey Narkhede reset_fn field is used to indicate whether the device supports any reset mechanism or not. Deprecate use of reset_fn in favor of new reset_methods bitmap which can be used to keep track of all supported reset mechanisms of a device. Signed-off-by: Amey Narkhede --- Reviewed-by: Alex Williamson Reviewed-by: Raphael Norwitz drivers/net/ethernet/cavium/liquidio/lio_vf_main.c | 2 +- drivers/pci/pci-sysfs.c | 6 ++---- drivers/pci/pci.c | 6 +++--- drivers/pci/probe.c | 1 - drivers/pci/quirks.c | 2 +- include/linux/pci.h | 1 - 6 files changed, 7 insertions(+), 11 deletions(-) -- 2.30.2 diff --git a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c index 9b9d305c6..3e2c49e08 100644 --- a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c +++ b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c @@ -526,7 +526,7 @@ static void octeon_destroy_resources(struct octeon_device *oct) oct->irq_name_storage = NULL; } /* Soft reset the octeon device before exiting */ - if (oct->pci_dev->reset_fn) + if (oct->pci_dev->reset_methods) octeon_pci_flr(oct); else cn23xx_vf_ask_pf_to_do_flr(oct); diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index f8afd54ca..78d2c130c 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -1334,7 +1334,7 @@ static int pci_create_capabilities_sysfs(struct pci_dev *dev) pcie_vpd_create_sysfs_dev_files(dev); - if (dev->reset_fn) { + if (dev->reset_methods) { retval = device_create_file(&dev->dev, &dev_attr_reset); if (retval) goto error; @@ -1417,10 +1417,8 @@ int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) static void pci_remove_capabilities_sysfs(struct pci_dev *dev) { pcie_vpd_remove_sysfs_dev_files(dev); - if (dev->reset_fn) { + if (dev->reset_methods) device_remove_file(&dev->dev, &dev_attr_reset); - dev->reset_fn = 0; - } } /** diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 407b44e85..b7f6c6588 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -5175,7 +5175,7 @@ int pci_reset_function(struct pci_dev *dev) { int rc; - if (!dev->reset_fn) + if (!dev->reset_methods) return -ENOTTY; pci_dev_lock(dev); @@ -5211,7 +5211,7 @@ int pci_reset_function_locked(struct pci_dev *dev) { int rc; - if (!dev->reset_fn) + if (!dev->reset_methods) return -ENOTTY; pci_dev_save_and_disable(dev); @@ -5234,7 +5234,7 @@ int pci_try_reset_function(struct pci_dev *dev) { int rc; - if (!dev->reset_fn) + if (!dev->reset_methods) return -ENOTTY; if (!pci_dev_trylock(dev)) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 01dd037bd..4764e031a 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -2404,7 +2404,6 @@ static void pci_init_capabilities(struct pci_dev *dev) pcie_report_downtraining(dev); pci_init_reset_methods(dev); - dev->reset_fn = !!dev->reset_methods; } /* diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 0a3df84c9..20a81b1bc 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5535,7 +5535,7 @@ static void quirk_reset_lenovo_thinkpad_p50_nvgpu(struct pci_dev *pdev) if (pdev->subsystem_vendor != PCI_VENDOR_ID_LENOVO || pdev->subsystem_device != 0x222e || - !pdev->reset_fn) + !pdev->reset_methods) return; if (pci_enable_device_mem(pdev)) diff --git a/include/linux/pci.h b/include/linux/pci.h index 56d6e4750..a2f003f4e 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -437,7 +437,6 @@ struct pci_dev { unsigned int state_saved:1; unsigned int is_physfn:1; unsigned int is_virtfn:1; - unsigned int reset_fn:1; unsigned int is_hotplug_bridge:1; unsigned int shpc_managed:1; /* SHPC owned by shpchp */ unsigned int is_thunderbolt:1; /* Thunderbolt controller */ From patchwork Fri Mar 12 17:34:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ameynarkhede03 X-Patchwork-Id: 12135587 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4075FC433E0 for ; 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Fri, 12 Mar 2021 09:36:53 -0800 (PST) Received: from localhost.localdomain ([103.248.31.144]) by smtp.googlemail.com with ESMTPSA id l10sm180045pfc.125.2021.03.12.09.36.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Mar 2021 09:36:53 -0800 (PST) From: ameynarkhede03@gmail.com To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, alex.williamson@redhat.com, raphael.norwitz@nutanix.com, Amey Narkhede Subject: [PATCH 4/4] PCI/sysfs: Allow userspace to query and set device reset mechanism Date: Fri, 12 Mar 2021 23:04:52 +0530 Message-Id: <20210312173452.3855-5-ameynarkhede03@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210312173452.3855-1-ameynarkhede03@gmail.com> References: <20210312173452.3855-1-ameynarkhede03@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Amey Narkhede Add reset_methods_enabled bitmap to struct pci_dev to keep track of user preferred device reset mechanisms. Add reset_method sysfs attribute to query and set user preferred device reset mechanisms. Signed-off-by: Amey Narkhede --- Reviewed-by: Alex Williamson Reviewed-by: Raphael Norwitz Documentation/ABI/testing/sysfs-bus-pci | 15 ++++++ drivers/pci/pci-sysfs.c | 66 +++++++++++++++++++++++-- drivers/pci/pci.c | 3 +- include/linux/pci.h | 2 + 4 files changed, 82 insertions(+), 4 deletions(-) -- 2.30.2 diff --git a/Documentation/ABI/testing/sysfs-bus-pci b/Documentation/ABI/testing/sysfs-bus-pci index 25c9c3977..ae53ecd2e 100644 --- a/Documentation/ABI/testing/sysfs-bus-pci +++ b/Documentation/ABI/testing/sysfs-bus-pci @@ -121,6 +121,21 @@ Description: child buses, and re-discover devices removed earlier from this part of the device tree. +What: /sys/bus/pci/devices/.../reset_method +Date: March 2021 +Contact: Amey Narkhede +Description: + Some devices allow an individual function to be reset + without affecting other functions in the same slot. + For devices that have this support, a file named reset_method + will be present in sysfs. Reading this file will give names + of the device supported reset methods. Currently used methods + are enclosed in brackets. Writing the name of any of the device + supported reset method to this file will set the reset method to + be used when resetting the device. Writing "none" to this file + will disable ability to reset the device and writing "default" + will return to the original value. + What: /sys/bus/pci/devices/.../reset Date: July 2009 Contact: Michael S. Tsirkin diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 78d2c130c..3cd06d1c0 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -1304,6 +1304,59 @@ static const struct bin_attribute pcie_config_attr = { .write = pci_write_config, }; +static ssize_t reset_method_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + const struct pci_reset_fn_method *reset; + struct pci_dev *pdev = to_pci_dev(dev); + ssize_t len = 0; + int i; + + for (i = 0, reset = pci_reset_fn_methods; reset->reset_fn; i++, reset++) { + if (pdev->reset_methods_enabled & (1 << i)) + len += sysfs_emit_at(buf, len, "[%s] ", reset->name); + else if (pdev->reset_methods & (1 << i)) + len += sysfs_emit_at(buf, len, "%s ", reset->name); + } + + return len; +} + +static ssize_t reset_method_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + const struct pci_reset_fn_method *reset = pci_reset_fn_methods; + struct pci_dev *pdev = to_pci_dev(dev); + u8 reset_mechanism; + int i = 0; + + /* Writing none disables reset */ + if (sysfs_streq(buf, "none")) { + reset_mechanism = 0; + } else if (sysfs_streq(buf, "default")) { + /* Writing default returns to initial value */ + reset_mechanism = pdev->reset_methods; + } else { + reset_mechanism = 0; + for (; reset->reset_fn; i++, reset++) { + if (sysfs_streq(buf, reset->name)) { + reset_mechanism = 1 << i; + break; + } + } + if (!reset_mechanism || !(pdev->reset_methods & reset_mechanism)) + return -EINVAL; + } + + pdev->reset_methods_enabled = reset_mechanism; + + return count; +} + +static DEVICE_ATTR_RW(reset_method); + static ssize_t reset_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { @@ -1337,11 +1390,16 @@ static int pci_create_capabilities_sysfs(struct pci_dev *dev) if (dev->reset_methods) { retval = device_create_file(&dev->dev, &dev_attr_reset); if (retval) - goto error; + goto err_reset; + retval = device_create_file(&dev->dev, &dev_attr_reset_method); + if (retval) + goto err_method; } return 0; -error: +err_method: + device_remove_file(&dev->dev, &dev_attr_reset); +err_reset: pcie_vpd_remove_sysfs_dev_files(dev); return retval; } @@ -1417,8 +1475,10 @@ int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) static void pci_remove_capabilities_sysfs(struct pci_dev *dev) { pcie_vpd_remove_sysfs_dev_files(dev); - if (dev->reset_methods) + if (dev->reset_methods) { device_remove_file(&dev->dev, &dev_attr_reset); + device_remove_file(&dev->dev, &dev_attr_reset_method); + } } /** diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index b7f6c6588..81cebea56 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -5106,7 +5106,7 @@ int __pci_reset_function_locked(struct pci_dev *dev) might_sleep(); for (i = 0, reset = pci_reset_fn_methods; reset->reset_fn; i++, reset++) { - if (!(dev->reset_methods & (1 << i))) + if (!(dev->reset_methods_enabled & (1 << i))) continue; /* @@ -5153,6 +5153,7 @@ void pci_init_reset_methods(struct pci_dev *dev) else if (rc != -ENOTTY) break; } + dev->reset_methods_enabled = dev->reset_methods; } /** diff --git a/include/linux/pci.h b/include/linux/pci.h index a2f003f4e..400f614e0 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -335,6 +335,8 @@ struct pci_dev { * See pci_reset_fn_methods array in pci.c */ u8 __bitwise reset_methods; /* bitmap for device supported reset capabilities */ + /* bitmap for user enabled and device supported reset capabilities */ + u8 __bitwise reset_methods_enabled; #ifdef CONFIG_PCIEAER u16 aer_cap; /* AER capability offset */ struct aer_stats *aer_stats; /* AER stats for this device */