From patchwork Wed Mar 17 21:26:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gwan-gyeong Mun X-Patchwork-Id: 12147023 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA57EC433DB for ; Wed, 17 Mar 2021 21:26:43 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 40B3A64DAE for ; Wed, 17 Mar 2021 21:26:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 40B3A64DAE Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 80C706E853; Wed, 17 Mar 2021 21:26:42 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 999B76E03E for ; Wed, 17 Mar 2021 21:26:41 +0000 (UTC) IronPort-SDR: Fpl+lUz5utFB0fEfuqDk6xWF2F0FjZRkG/H+9ktruthZ6DCJpAaKFplK1E9xqufzALBLo/wFOJ 3PmgTiTg/6+A== X-IronPort-AV: E=McAfee;i="6000,8403,9926"; a="188915413" X-IronPort-AV: E=Sophos;i="5.81,257,1610438400"; d="scan'208";a="188915413" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Mar 2021 14:26:41 -0700 IronPort-SDR: B5RTKWbZOa5X4qZq7Cc4zEZQ3OjY94Y7MdvmcNNYTb63JaRZS0vh5JsUOI0hzl5slkJ3L61oUD l9YRm5SU45PA== X-IronPort-AV: E=Sophos;i="5.81,257,1610438400"; d="scan'208";a="412810536" Received: from lbozovsk-mobl3.ger.corp.intel.com (HELO helsinki.intel.com) ([10.251.188.228]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Mar 2021 14:26:39 -0700 From: Gwan-gyeong Mun To: intel-gfx@lists.freedesktop.org Date: Wed, 17 Mar 2021 23:26:32 +0200 Message-Id: <20210317212632.2211971-1-gwan-gyeong.mun@intel.com> X-Mailer: git-send-email 2.30.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2] drm/i915/display: Not to try to re-enable PSR after being raised an irq aux error X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" If an irq aux error happens, it does not need to wait for PSR "IDLE state" for re-enabling PSR. And it should not try to re-enable PSR. The PSR interrupt handler sets irq_aux_error when the PSR error happens. And it schedules the inter_psr_work(). but the current intel_psr_work() can be scheduled by another PSR internal routine. Therefore, we should not re-enable PSR after handing irq_aux_error in intel_psr_work(). v2: Address Jose's review comment. - Handling the closing function in the check routine of irq_aux_error. - Add a detailed commit message for the scenario. Cc: José Roberto de Souza Signed-off-by: Gwan-gyeong Mun Reviewed-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_psr.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index cd434285e3b7..aba15846e78e 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1683,8 +1683,10 @@ static void intel_psr_work(struct work_struct *work) if (!intel_dp->psr.enabled) goto unlock; - if (READ_ONCE(intel_dp->psr.irq_aux_error)) + if (READ_ONCE(intel_dp->psr.irq_aux_error)) { intel_psr_handle_irq(intel_dp); + goto unlock; + } /* * We have to make sure PSR is ready for re-enable