From patchwork Thu Mar 18 13:26:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12148243 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2686BC433E6 for ; Thu, 18 Mar 2021 13:27:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EC2CE64F11 for ; Thu, 18 Mar 2021 13:27:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230476AbhCRN0i (ORCPT ); Thu, 18 Mar 2021 09:26:38 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:39890 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S230285AbhCRN0g (ORCPT ); Thu, 18 Mar 2021 09:26:36 -0400 Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 12ID39Fw158235 for ; Thu, 18 Mar 2021 09:26:35 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=pp1; bh=M8xLTkL9j6ngiKlwIMFE9zEapnX+WxzRfGWNXgxUC3g=; b=l/l4IfQnh9Ru8jQOo9gfYKk1dRJ5aMtZQsxoX4IeKRfQ7z0F98BoyP0wZmO08ewDmqhC LPSTfMCnGlPDrgtq+ZvXBo1Vq6QDG3uVn+6NIuauYNSw8uKDqzyLe442nuBcuYdAn4Oo p0EIakA1tO6xT9NSinRJzjJ6sOmhceISp+MGnepT/xfmaNu+cLU+v0TZvRV01Yax2L6T ySeJcsrRz6KuCBLLy3FAdZy3SUk0dDSWjBTtaIereVzTIqwTd0eU5gKmFtkoad3Fj9nb FN2FHSwbTqWuPO2xVMdscqqvH1FdPYgIlL7d6oWcgGGeW48pe1So2CbqXMZ/imAQa1dG fw== Received: from pps.reinject (localhost [127.0.0.1]) by mx0b-001b2d01.pphosted.com with ESMTP id 37byr3dkhy-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 18 Mar 2021 09:26:35 -0400 Received: from m0098414.ppops.net (m0098414.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.43/8.16.0.43) with SMTP id 12ID5RkZ167523 for ; Thu, 18 Mar 2021 09:26:35 -0400 Received: from ppma06fra.de.ibm.com (48.49.7a9f.ip4.static.sl-reverse.com [159.122.73.72]) by mx0b-001b2d01.pphosted.com with ESMTP id 37byr3dkhe-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 18 Mar 2021 09:26:35 -0400 Received: from pps.filterd (ppma06fra.de.ibm.com [127.0.0.1]) by ppma06fra.de.ibm.com (8.16.0.43/8.16.0.43) with SMTP id 12IDNWeD030235; Thu, 18 Mar 2021 13:26:33 GMT Received: from b06avi18626390.portsmouth.uk.ibm.com (b06avi18626390.portsmouth.uk.ibm.com [9.149.26.192]) by ppma06fra.de.ibm.com with ESMTP id 378mnhahsa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 18 Mar 2021 13:26:33 +0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 12IDQDS021496122 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 18 Mar 2021 13:26:13 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 43C2E4C05C; Thu, 18 Mar 2021 13:26:30 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F387F4C052; Thu, 18 Mar 2021 13:26:29 +0000 (GMT) Received: from oc3016276355.ibm.com (unknown [9.145.64.4]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 18 Mar 2021 13:26:29 +0000 (GMT) From: Pierre Morel To: kvm@vger.kernel.org Cc: frankja@linux.ibm.com, david@redhat.com, thuth@redhat.com, cohuck@redhat.com, imbrenda@linux.ibm.com Subject: [kvm-unit-tests PATCH v1 1/6] s390x: lib: css: disabling a subchannel Date: Thu, 18 Mar 2021 14:26:23 +0100 Message-Id: <1616073988-10381-2-git-send-email-pmorel@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1616073988-10381-1-git-send-email-pmorel@linux.ibm.com> References: <1616073988-10381-1-git-send-email-pmorel@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.761 definitions=2021-03-18_07:2021-03-17,2021-03-18 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 phishscore=0 mlxlogscore=999 malwarescore=0 bulkscore=0 adultscore=0 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103180097 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Some tests require to disable a subchannel. Let's implement the css_disable() function. Signed-off-by: Pierre Morel Reviewed-by: Cornelia Huck --- lib/s390x/css.h | 1 + lib/s390x/css_lib.c | 69 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 70 insertions(+) diff --git a/lib/s390x/css.h b/lib/s390x/css.h index 7e3d261..b0de3a3 100644 --- a/lib/s390x/css.h +++ b/lib/s390x/css.h @@ -284,6 +284,7 @@ int css_enumerate(void); #define IO_SCH_ISC 3 int css_enable(int schid, int isc); bool css_enabled(int schid); +int css_disable(int schid); /* Library functions */ int start_ccw1_chain(unsigned int sid, struct ccw1 *ccw); diff --git a/lib/s390x/css_lib.c b/lib/s390x/css_lib.c index efc7057..f8db205 100644 --- a/lib/s390x/css_lib.c +++ b/lib/s390x/css_lib.c @@ -186,6 +186,75 @@ bool css_enabled(int schid) } return true; } + +/* + * css_disable: disable the subchannel + * @schid: Subchannel Identifier + * Return value: + * On success: 0 + * On error the CC of the faulty instruction + * or -1 if the retry count is exceeded. + */ +int css_disable(int schid) +{ + struct pmcw *pmcw = &schib.pmcw; + int retry_count = 0; + int cc; + + /* Read the SCHIB for this subchannel */ + cc = stsch(schid, &schib); + if (cc) { + report_info("stsch: sch %08x failed with cc=%d", schid, cc); + return cc; + } + + if (!(pmcw->flags & PMCW_ENABLE)) { + report_info("stsch: sch %08x already disabled", schid); + return 0; + } + +retry: + /* Update the SCHIB to disable the subchannel */ + pmcw->flags &= ~PMCW_ENABLE; + + /* Tell the CSS we want to modify the subchannel */ + cc = msch(schid, &schib); + if (cc) { + /* + * If the subchannel is status pending or + * if a function is in progress, + * we consider both cases as errors. + */ + report_info("msch: sch %08x failed with cc=%d", schid, cc); + return cc; + } + + /* + * Read the SCHIB again to verify the enablement + */ + cc = stsch(schid, &schib); + if (cc) { + report_info("stsch: updating sch %08x failed with cc=%d", + schid, cc); + return cc; + } + + if (!(pmcw->flags & PMCW_ENABLE)) { + if (retry_count) + report_info("stsch: sch %08x successfully disabled after %d retries", + schid, retry_count); + return 0; + } + + if (retry_count++ < MAX_ENABLE_RETRIES) { + mdelay(10); /* the hardware was not ready, give it some time */ + goto retry; + } + + report_info("msch: modifying sch %08x failed after %d retries. pmcw flags: %04x", + schid, retry_count, pmcw->flags); + return -1; +} /* * css_enable: enable the subchannel with the specified ISC * @schid: Subchannel Identifier From patchwork Thu Mar 18 13:26:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12148241 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11C1BC433E0 for ; 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Thu, 18 Mar 2021 13:26:13 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 95B9A4C046; Thu, 18 Mar 2021 13:26:30 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5BFA84C066; Thu, 18 Mar 2021 13:26:30 +0000 (GMT) Received: from oc3016276355.ibm.com (unknown [9.145.64.4]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 18 Mar 2021 13:26:30 +0000 (GMT) From: Pierre Morel To: kvm@vger.kernel.org Cc: frankja@linux.ibm.com, david@redhat.com, thuth@redhat.com, cohuck@redhat.com, imbrenda@linux.ibm.com Subject: [kvm-unit-tests PATCH v1 2/6] s390x: lib: css: SCSW bit definitions Date: Thu, 18 Mar 2021 14:26:24 +0100 Message-Id: <1616073988-10381-3-git-send-email-pmorel@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1616073988-10381-1-git-send-email-pmorel@linux.ibm.com> References: <1616073988-10381-1-git-send-email-pmorel@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.761 definitions=2021-03-18_07:2021-03-17,2021-03-18 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 malwarescore=0 bulkscore=0 clxscore=1015 suspectscore=0 mlxlogscore=969 adultscore=0 phishscore=0 lowpriorityscore=0 impostorscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103180097 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org We need the SCSW definitions to test clear and halt subchannel. Signed-off-by: Pierre Morel --- lib/s390x/css.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/lib/s390x/css.h b/lib/s390x/css.h index b0de3a3..460b0bd 100644 --- a/lib/s390x/css.h +++ b/lib/s390x/css.h @@ -67,6 +67,29 @@ struct scsw { #define SCSW_SC_PRIMARY 0x00000004 #define SCSW_SC_INTERMEDIATE 0x00000008 #define SCSW_SC_ALERT 0x00000010 +#define SCSW_AC_SUSPEND_PEND 0x00000020 +#define SCSW_AC_DEVICE_PEND 0x00000040 +#define SCSW_AC_SUBCHANNEL_PEND 0x00000080 +#define SCSW_AC_CLEAR_PEND 0x00000100 +#define SCSW_AC_HALT_PEND 0x00000200 +#define SCSW_AC_START_PEND 0x00000400 +#define SCSW_AC_RESUME_PEND 0x00000800 +#define SCSW_FC_CLEAR 0x00001000 +#define SCSW_FC_HALT 0x00002000 +#define SCSW_FC_START 0x00004000 +#define SCSW_QDIO_RESERVED 0x00008000 +#define SCSW_PATH_NON_OP 0x00010000 +#define SCSW_EXTENDED_CTRL 0x00020000 +#define SCSW_ZERO_COND 0x00040000 +#define SCSW_SUPPRESS_SUSP_INT 0x00080000 +#define SCSW_IRB_FMT_CTRL 0x00100000 +#define SCSW_INITIAL_IRQ_STATUS 0x00200000 +#define SCSW_PREFETCH 0x00400000 +#define SCSW_CCW_FORMAT 0x00800000 +#define SCSW_DEFERED_CC 0x03000000 +#define SCSW_ESW_FORMAT 0x04000000 +#define SCSW_SUSPEND_CTRL 0x08000000 +#define SCSW_KEY 0xf0000000 uint32_t ctrl; uint32_t ccw_addr; #define SCSW_DEVS_DEV_END 0x04 From patchwork Thu Mar 18 13:26:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12148247 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BFCCC433E9 for ; Thu, 18 Mar 2021 13:27:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 30E1964F1B for ; Thu, 18 Mar 2021 13:27:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231184AbhCRN0k (ORCPT ); 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Thu, 18 Mar 2021 13:26:31 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0003F4C044; Thu, 18 Mar 2021 13:26:30 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AE9104C04E; Thu, 18 Mar 2021 13:26:30 +0000 (GMT) Received: from oc3016276355.ibm.com (unknown [9.145.64.4]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 18 Mar 2021 13:26:30 +0000 (GMT) From: Pierre Morel To: kvm@vger.kernel.org Cc: frankja@linux.ibm.com, david@redhat.com, thuth@redhat.com, cohuck@redhat.com, imbrenda@linux.ibm.com Subject: [kvm-unit-tests PATCH v1 3/6] s390x: lib: css: upgrading IRQ handling Date: Thu, 18 Mar 2021 14:26:25 +0100 Message-Id: <1616073988-10381-4-git-send-email-pmorel@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1616073988-10381-1-git-send-email-pmorel@linux.ibm.com> References: <1616073988-10381-1-git-send-email-pmorel@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.761 definitions=2021-03-18_07:2021-03-17,2021-03-18 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 bulkscore=0 mlxlogscore=999 phishscore=0 lowpriorityscore=0 malwarescore=0 impostorscore=0 adultscore=0 spamscore=0 priorityscore=1501 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103180097 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Until now we had very few usage of interrupts, to be able to handle several interrupts coming up asynchronously we need to take care to save the previous interrupt before handling the next one. Signed-off-by: Pierre Morel --- lib/s390x/css.h | 29 +++++++++++ lib/s390x/css_lib.c | 117 ++++++++++++++++++++++++++++++++++---------- 2 files changed, 120 insertions(+), 26 deletions(-) diff --git a/lib/s390x/css.h b/lib/s390x/css.h index 460b0bd..65fc335 100644 --- a/lib/s390x/css.h +++ b/lib/s390x/css.h @@ -425,4 +425,33 @@ struct measurement_block_format1 { uint32_t irq_prio_delay_time; }; +struct irq_entry { + struct irq_entry *next; + struct irb irb; + uint32_t sid; +}; + +struct irq_entry *alloc_irq(void); +struct irq_entry *get_irq(void); +void put_irq(struct irq_entry *irq); + +#include +static inline void disable_io_irq(void) +{ + uint64_t mask; + + mask = extract_psw_mask(); + mask &= ~PSW_MASK_IO; + load_psw_mask(mask); +} + +static inline void enable_io_irq(void) +{ + uint64_t mask; + + mask = extract_psw_mask(); + mask |= PSW_MASK_IO; + load_psw_mask(mask); +} + #endif diff --git a/lib/s390x/css_lib.c b/lib/s390x/css_lib.c index f8db205..211c73c 100644 --- a/lib/s390x/css_lib.c +++ b/lib/s390x/css_lib.c @@ -9,6 +9,8 @@ */ #include #include +#include +#include #include #include #include @@ -22,6 +24,46 @@ struct schib schib; struct chsc_scsc *chsc_scsc; +static struct irq_entry *irqs; + +struct irq_entry *get_irq(void) +{ + struct irq_entry *irq = NULL; + + if (irqs) { + irq = irqs; + irqs = irq->next; + } + return irq; +} + +void put_irq(struct irq_entry *irq) +{ + free(irq); +} + +static void save_irq(struct irq_entry *irq) +{ + struct irq_entry *e; + + if (!irqs) { + irqs = irq; + } else { + e = irqs; + while (e && e->next) + e = e->next; + e->next = irq; + } +} + +struct irq_entry *alloc_irq(void) +{ + struct irq_entry *irq; + + irq = calloc(1, sizeof(*irq)); + return irq; +} + static const char * const chsc_rsp_description[] = { "CHSC unknown error", "Command executed", @@ -422,38 +464,38 @@ static struct irb irb; void css_irq_io(void) { int ret = 0; - char *flags; - int sid; + struct irq_entry *irq; report_prefix_push("Interrupt"); - sid = lowcore_ptr->subsys_id_word; + irq = alloc_irq(); + assert(irq); + + irq->sid = lowcore_ptr->subsys_id_word; /* Lowlevel set the SID as interrupt parameter. */ - if (lowcore_ptr->io_int_param != sid) { + if (lowcore_ptr->io_int_param != irq->sid) { report(0, "io_int_param: %x differs from subsys_id_word: %x", - lowcore_ptr->io_int_param, sid); + lowcore_ptr->io_int_param, irq->sid); goto pop; } report_prefix_pop(); report_prefix_push("tsch"); - ret = tsch(sid, &irb); + ret = tsch(irq->sid, &irq->irb); switch (ret) { case 1: - dump_irb(&irb); - flags = dump_scsw_flags(irb.scsw.ctrl); - report(0, - "I/O interrupt, but tsch returns CC 1 for subchannel %08x. SCSW flags: %s", - sid, flags); + report_info("no status pending on %08x : %s", irq->sid, + dump_scsw_flags(irq->irb.scsw.ctrl)); break; case 2: report(0, "tsch returns unexpected CC 2"); break; case 3: - report(0, "tsch reporting sch %08x as not operational", sid); + report(0, "tsch reporting sch %08x as not operational", irq->sid); break; case 0: /* Stay humble on success */ + save_irq(irq); break; } pop: @@ -498,47 +540,70 @@ struct ccw1 *ccw_alloc(int code, void *data, int count, unsigned char flags) int wait_and_check_io_completion(int schid) { int ret = 0; - - wait_for_interrupt(PSW_MASK_IO); + struct irq_entry *irq = NULL; report_prefix_push("check I/O completion"); - if (lowcore_ptr->io_int_param != schid) { + disable_io_irq(); + irq = get_irq(); + while (!irq) { + wait_for_interrupt(PSW_MASK_IO); + disable_io_irq(); + irq = get_irq(); + report_info("next try"); + } + enable_io_irq(); + + assert(irq); + + if (irq->sid != schid) { report(0, "interrupt parameter: expected %08x got %08x", - schid, lowcore_ptr->io_int_param); + schid, irq->sid); ret = -1; goto end; } /* Verify that device status is valid */ - if (!(irb.scsw.ctrl & SCSW_SC_PENDING)) { - report(0, "No status pending after interrupt. Subch Ctrl: %08x", - irb.scsw.ctrl); - ret = -1; + if (!(irq->irb.scsw.ctrl & SCSW_SC_PENDING)) { + ret = 0; goto end; } - if (!(irb.scsw.ctrl & (SCSW_SC_SECONDARY | SCSW_SC_PRIMARY))) { + /* clear and halt pending are valid even without secondary or primary status */ + if (irq->irb.scsw.ctrl & (SCSW_FC_CLEAR | SCSW_FC_HALT)) { + ret = 0; + goto end; + } + + /* For start pending we need at least one of primary or secondary status */ + if (!(irq->irb.scsw.ctrl & (SCSW_SC_SECONDARY | SCSW_SC_PRIMARY))) { report(0, "Primary or secondary status missing. Subch Ctrl: %08x", - irb.scsw.ctrl); + irq->irb.scsw.ctrl); ret = -1; goto end; } - if (!(irb.scsw.dev_stat & (SCSW_DEVS_DEV_END | SCSW_DEVS_SCH_END))) { + /* For start pending we also need to have device or channel end information */ + if (!(irq->irb.scsw.dev_stat & (SCSW_DEVS_DEV_END | SCSW_DEVS_SCH_END))) { report(0, "No device end or sch end. Dev. status: %02x", - irb.scsw.dev_stat); + irq->irb.scsw.dev_stat); ret = -1; goto end; } - if (irb.scsw.sch_stat & ~SCSW_SCHS_IL) { - report_info("Unexpected Subch. status %02x", irb.scsw.sch_stat); + /* We only accept the SubCHannel Status for Illegal Length */ + if (irq->irb.scsw.sch_stat & ~SCSW_SCHS_IL) { + report_info("Unexpected Subch. status %02x", + irq->irb.scsw.sch_stat); ret = -1; goto end; } end: + if (ret) + dump_irb(&irq->irb); + + put_irq(irq); report_prefix_pop(); return ret; } From patchwork Thu Mar 18 13:26:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12148249 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C57B1C433DB for ; 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Thu, 18 Mar 2021 13:26:31 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5BCE94C058; Thu, 18 Mar 2021 13:26:31 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 17C394C059; Thu, 18 Mar 2021 13:26:31 +0000 (GMT) Received: from oc3016276355.ibm.com (unknown [9.145.64.4]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 18 Mar 2021 13:26:31 +0000 (GMT) From: Pierre Morel To: kvm@vger.kernel.org Cc: frankja@linux.ibm.com, david@redhat.com, thuth@redhat.com, cohuck@redhat.com, imbrenda@linux.ibm.com Subject: [kvm-unit-tests PATCH v1 4/6] s390x: lib: css: add expectations to wait for interrupt Date: Thu, 18 Mar 2021 14:26:26 +0100 Message-Id: <1616073988-10381-5-git-send-email-pmorel@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1616073988-10381-1-git-send-email-pmorel@linux.ibm.com> References: <1616073988-10381-1-git-send-email-pmorel@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.761 definitions=2021-03-18_07:2021-03-17,2021-03-18 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 phishscore=0 mlxlogscore=801 malwarescore=0 bulkscore=0 adultscore=0 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103180097 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org When waiting for an interrupt we may need to check the cause of the interrupt depending on the test case. Let's provide the tests the possibility to check if the last valid IRQ received is for the expected instruction. Signed-off-by: Pierre Morel --- lib/s390x/css.h | 2 +- lib/s390x/css_lib.c | 11 ++++++++++- s390x/css.c | 4 ++-- 3 files changed, 13 insertions(+), 4 deletions(-) diff --git a/lib/s390x/css.h b/lib/s390x/css.h index 65fc335..add3b4e 100644 --- a/lib/s390x/css.h +++ b/lib/s390x/css.h @@ -316,7 +316,7 @@ void css_irq_io(void); int css_residual_count(unsigned int schid); void enable_io_isc(uint8_t isc); -int wait_and_check_io_completion(int schid); +int wait_and_check_io_completion(int schid, uint32_t pending); /* * CHSC definitions diff --git a/lib/s390x/css_lib.c b/lib/s390x/css_lib.c index 211c73c..4cdd7ad 100644 --- a/lib/s390x/css_lib.c +++ b/lib/s390x/css_lib.c @@ -537,7 +537,7 @@ struct ccw1 *ccw_alloc(int code, void *data, int count, unsigned char flags) * completion. * Only report failures. */ -int wait_and_check_io_completion(int schid) +int wait_and_check_io_completion(int schid, uint32_t pending) { int ret = 0; struct irq_entry *irq = NULL; @@ -569,6 +569,15 @@ int wait_and_check_io_completion(int schid) goto end; } + if (pending) { + if (!(pending & irq->irb.scsw.ctrl)) { + report_info("%08x : %s", schid, dump_scsw_flags(irq->irb.scsw.ctrl)); + report_info("expect : %s", dump_scsw_flags(pending)); + ret = -1; + goto end; + } + } + /* clear and halt pending are valid even without secondary or primary status */ if (irq->irb.scsw.ctrl & (SCSW_FC_CLEAR | SCSW_FC_HALT)) { ret = 0; diff --git a/s390x/css.c b/s390x/css.c index c340c53..a6a9773 100644 --- a/s390x/css.c +++ b/s390x/css.c @@ -94,7 +94,7 @@ static void test_sense(void) goto error; } - if (wait_and_check_io_completion(test_device_sid) < 0) + if (wait_and_check_io_completion(test_device_sid, SCSW_FC_START) < 0) goto error; /* Test transfer completion */ @@ -137,7 +137,7 @@ static void sense_id(void) { assert(!start_ccw1_chain(test_device_sid, ccw)); - assert(wait_and_check_io_completion(test_device_sid) >= 0); + assert(wait_and_check_io_completion(test_device_sid, SCSW_FC_START) >= 0); } static void css_init(void) From patchwork Thu Mar 18 13:26:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12148253 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 124D5C433E6 for ; Thu, 18 Mar 2021 13:27:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D699C64F04 for ; Thu, 18 Mar 2021 13:27:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231222AbhCRN1M (ORCPT ); Thu, 18 Mar 2021 09:27:12 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:29518 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230318AbhCRN0h (ORCPT ); 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Thu, 18 Mar 2021 13:26:31 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 73D9C4C044; Thu, 18 Mar 2021 13:26:31 +0000 (GMT) Received: from oc3016276355.ibm.com (unknown [9.145.64.4]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 18 Mar 2021 13:26:31 +0000 (GMT) From: Pierre Morel To: kvm@vger.kernel.org Cc: frankja@linux.ibm.com, david@redhat.com, thuth@redhat.com, cohuck@redhat.com, imbrenda@linux.ibm.com Subject: [kvm-unit-tests PATCH v1 5/6] s390x: css: testing ssch error response Date: Thu, 18 Mar 2021 14:26:27 +0100 Message-Id: <1616073988-10381-6-git-send-email-pmorel@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1616073988-10381-1-git-send-email-pmorel@linux.ibm.com> References: <1616073988-10381-1-git-send-email-pmorel@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.761 definitions=2021-03-18_07:2021-03-17,2021-03-18 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 clxscore=1015 mlxlogscore=999 impostorscore=0 malwarescore=0 lowpriorityscore=0 suspectscore=0 spamscore=0 mlxscore=0 adultscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103180097 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Checking error response on various eroneous SSCH instructions: - ORB alignment - ORB above 2G - CCW above 2G - bad ORB flags Signed-off-by: Pierre Morel --- s390x/css.c | 102 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/s390x/css.c b/s390x/css.c index a6a9773..1c891f8 100644 --- a/s390x/css.c +++ b/s390x/css.c @@ -51,6 +51,107 @@ static void test_enable(void) report(cc == 0, "Enable subchannel %08x", test_device_sid); } +static void test_ssch(void) +{ + struct orb orb = { + .intparm = test_device_sid, + .ctrl = ORB_CTRL_ISIC | ORB_CTRL_FMT | ORB_LPM_DFLT, + }; + int i; + phys_addr_t base, top; + + assert(css_enable(test_device_sid, IO_SCH_ISC) == 0); + assert(register_io_int_func(css_irq_io) == 0); + + /* ORB address should be aligned on 32 bits */ + report_prefix_push("ORB alignment"); + expect_pgm_int(); + ssch(test_device_sid, (void *)0x110002); + check_pgm_int_code(PGM_INT_CODE_SPECIFICATION); + report_prefix_pop(); + + /* ORB address should be lower than 2G */ + report_prefix_push("ORB Address above 2G"); + expect_pgm_int(); + ssch(test_device_sid, (void *)0x80000000); + check_pgm_int_code(PGM_INT_CODE_ADDRESSING); + report_prefix_pop(); + + phys_alloc_get_unused(&base, &top); + report_info("base %08lx, top %08lx", base, top); + + /* ORB address should be available we check 1G*/ + report_prefix_push("ORB Address must be available"); + if (top < 0x40000000) { + expect_pgm_int(); + ssch(test_device_sid, (void *)0x40000000); + check_pgm_int_code(PGM_INT_CODE_ADDRESSING); + } else { + report_skip("guest started with more than 1G memory"); + } + report_prefix_pop(); + + report_prefix_push("CCW address above 2G"); + orb.cpa = 0x80000000; + expect_pgm_int(); + ssch(test_device_sid, &orb); + check_pgm_int_code(PGM_INT_CODE_OPERAND); + report_prefix_pop(); + + senseid = alloc_io_mem(sizeof(*senseid), 0); + assert(senseid); + orb.cpa = (uint64_t)ccw_alloc(CCW_CMD_SENSE_ID, senseid, + sizeof(*senseid), CCW_F_SLI); + assert(orb.cpa); + + report_prefix_push("Disabled subchannel"); + assert(css_disable(test_device_sid) == 0); + report(ssch(test_device_sid, &orb) == 3, "CC = 3"); + assert(css_enable(test_device_sid, IO_SCH_ISC) == 0); + report_prefix_pop(); + + /* + * Check sending a second SSCH before clearing the status with TSCH + * the subchannel is left disabled. + */ + report_prefix_push("SSCH on channel with status pending"); + assert(css_enable(test_device_sid, IO_SCH_ISC) == 0); + assert(ssch(test_device_sid, &orb) == 0); + report(ssch(test_device_sid, &orb) == 1, "CC = 1"); + /* now we clear the status */ + assert(wait_and_check_io_completion(test_device_sid, SCSW_FC_START) == 0); + assert(css_disable(test_device_sid) == 0); + report_prefix_pop(); + + report_prefix_push("ORB MIDAW unsupported"); + assert(css_enable(test_device_sid, IO_SCH_ISC) == 0); + orb.ctrl |= ORB_CTRL_MIDAW; + expect_pgm_int(); + ssch(test_device_sid, &orb); + check_pgm_int_code(PGM_INT_CODE_OPERAND); + report_prefix_pop(); + orb.ctrl = 0; + + for (i = 0; i < 5; i++) { + char buffer[30]; + + orb.ctrl = (0x02 << i); + snprintf(buffer, 30, "ORB reserved ctrl flags %02x", orb.ctrl); + report_prefix_push(buffer); + expect_pgm_int(); + ssch(test_device_sid, &orb); + check_pgm_int_code(PGM_INT_CODE_OPERAND); + report_prefix_pop(); + } + + report_prefix_push("ORB wrong ctrl flags"); + orb.ctrl |= 0x040000; + expect_pgm_int(); + ssch(test_device_sid, &orb); + check_pgm_int_code(PGM_INT_CODE_OPERAND); + report_prefix_pop(); +} + /* * test_sense * Pre-requisites: @@ -339,6 +440,7 @@ static struct { { "initialize CSS (chsc)", css_init }, { "enumerate (stsch)", test_enumerate }, { "enable (msch)", test_enable }, + { "start subchannel", test_ssch }, { "sense (ssch/tsch)", test_sense }, { "measurement block (schm)", test_schm }, { "measurement block format0", test_schm_fmt0 }, From patchwork Thu Mar 18 13:26:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12148251 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE1B2C433E0 for ; Thu, 18 Mar 2021 13:27:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BB23A64F2A for ; Thu, 18 Mar 2021 13:27:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230297AbhCRN1L (ORCPT ); Thu, 18 Mar 2021 09:27:11 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:56628 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230348AbhCRN0i (ORCPT ); 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Thu, 18 Mar 2021 13:26:32 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C814A4C040; Thu, 18 Mar 2021 13:26:31 +0000 (GMT) Received: from oc3016276355.ibm.com (unknown [9.145.64.4]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 18 Mar 2021 13:26:31 +0000 (GMT) From: Pierre Morel To: kvm@vger.kernel.org Cc: frankja@linux.ibm.com, david@redhat.com, thuth@redhat.com, cohuck@redhat.com, imbrenda@linux.ibm.com Subject: [kvm-unit-tests PATCH v1 6/6] s390x: css: testing clear and halt subchannel Date: Thu, 18 Mar 2021 14:26:28 +0100 Message-Id: <1616073988-10381-7-git-send-email-pmorel@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1616073988-10381-1-git-send-email-pmorel@linux.ibm.com> References: <1616073988-10381-1-git-send-email-pmorel@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.761 definitions=2021-03-18_07:2021-03-17,2021-03-18 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 adultscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 phishscore=0 mlxlogscore=789 spamscore=0 mlxscore=0 clxscore=1015 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103180097 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org checking return values for CSCH and HSCH for various configurations. Signed-off-by: Pierre Morel --- s390x/css.c | 172 +++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 171 insertions(+), 1 deletion(-) diff --git a/s390x/css.c b/s390x/css.c index 1c891f8..ee02cdd 100644 --- a/s390x/css.c +++ b/s390x/css.c @@ -51,6 +51,175 @@ static void test_enable(void) report(cc == 0, "Enable subchannel %08x", test_device_sid); } +static void dummy_irq(void) +{ +} + +static int check_io_completion(int sid, uint32_t expected) +{ + struct irb irb; + int ret; + + report_prefix_push("IRQ flags"); + + ret = tsch(sid, &irb); + if (ret) + goto end; + + if (!expected) + goto end; + + if (!(expected & irb.scsw.ctrl)) { + report_info("expect: %s got: %s", + dump_scsw_flags(expected), + dump_scsw_flags(irb.scsw.ctrl)); + ret = -1; + } + +end: + report(!ret, "expectations"); + report_prefix_pop(); + return ret; +} + +static void test_csch(void) +{ + struct orb orb = { + .intparm = test_device_sid, + .ctrl = ORB_CTRL_ISIC | ORB_CTRL_FMT | ORB_LPM_DFLT, + }; + struct ccw1 *ccw; + + senseid = alloc_io_mem(sizeof(*senseid), 0); + assert(senseid); + ccw = ccw_alloc(CCW_CMD_SENSE_ID, senseid, sizeof(*senseid), CCW_F_SLI); + assert(ccw); + orb.cpa = (uint64_t)ccw; + + /* 1- Basic check for CSCH */ + report_prefix_push("CSCH on a quiet subchannel"); + assert(css_enable(test_device_sid, IO_SCH_ISC) == 0); + report(csch(test_device_sid) == 0, "subchannel clear"); + + /* now we check the flags */ + report_prefix_push("IRQ flags"); + report(wait_and_check_io_completion(test_device_sid, SCSW_FC_CLEAR) == 0, "expected"); + report_prefix_pop(); + + assert(css_disable(test_device_sid) == 0); + report_prefix_pop(); + + /* For the following checks we need to execute tsch synchronously */ + assert(unregister_io_int_func(css_irq_io) == 0); + assert(register_io_int_func(dummy_irq) == 0); + + /* 2- We want to check if the IRQ flags of SSCH are erased by clear */ + report_prefix_push("CSCH on SSCH status pending subchannel"); + assert(css_enable(test_device_sid, IO_SCH_ISC) == 0); + assert(ssch(test_device_sid, &orb) == 0); + report(csch(test_device_sid) == 0, "subchannel cleared"); + check_io_completion(test_device_sid, SCSW_FC_CLEAR); + + assert(css_disable(test_device_sid) == 0); + report_prefix_pop(); + + /* 3- Checking CSCH after HSCH */ + report_prefix_push("CSCH on a halted subchannel"); + assert(css_enable(test_device_sid, IO_SCH_ISC) == 0); + assert(hsch(test_device_sid) == 0); + report(csch(test_device_sid) == 0, "subchannel cleared"); + check_io_completion(test_device_sid, SCSW_FC_CLEAR); + + assert(css_disable(test_device_sid) == 0); + report_prefix_pop(); + + /* 4- Checking CSCH after CSCH */ + report_prefix_push("CSCH on a cleared subchannel"); + assert(css_enable(test_device_sid, IO_SCH_ISC) == 0); + assert(csch(test_device_sid) == 0); + report(csch(test_device_sid) == 0, "subchannel cleared"); + check_io_completion(test_device_sid, SCSW_FC_CLEAR); + + assert(css_disable(test_device_sid) == 0); + report_prefix_pop(); + + /* Reset the IRQ handler */ + assert(unregister_io_int_func(dummy_irq) == 0); + assert(register_io_int_func(css_irq_io) == 0); + + free_io_mem(senseid, sizeof(*senseid)); + free_io_mem(ccw, sizeof(*ccw)); +} + +static void test_hsch(void) +{ + struct orb orb = { + .intparm = test_device_sid, + .ctrl = ORB_CTRL_ISIC | ORB_CTRL_FMT | ORB_LPM_DFLT, + }; + struct ccw1 *ccw; + + senseid = alloc_io_mem(sizeof(*senseid), 0); + assert(senseid); + ccw = ccw_alloc(CCW_CMD_SENSE_ID, senseid, sizeof(*senseid), CCW_F_SLI); + assert(ccw); + orb.cpa = (uint64_t)ccw; + + /* 1- Basic HSCH */ + report_prefix_push("HSCH on a quiet subchannel"); + assert(css_enable(test_device_sid, IO_SCH_ISC) == 0); + report(hsch(test_device_sid) == 0, "subchannel halted"); + + /* now we check the flags */ + report_prefix_push("IRQ flags"); + report(wait_and_check_io_completion(test_device_sid, SCSW_FC_HALT) == 0, "expected"); + report_prefix_pop(); + + assert(css_disable(test_device_sid) == 0); + report_prefix_pop(); + + /* For the following checks we need to execute tsch synchronously */ + assert(unregister_io_int_func(css_irq_io) == 0); + assert(register_io_int_func(dummy_irq) == 0); + + /* 2- Check HSCH after SSCH */ + report_prefix_push("HSCH on status pending subchannel"); + assert(css_enable(test_device_sid, IO_SCH_ISC) == 0); + assert(ssch(test_device_sid, &orb) == 0); + report(hsch(test_device_sid) == 1, "Halt subchannel should fail with CC 1"); + check_io_completion(test_device_sid, SCSW_FC_START); + + assert(css_disable(test_device_sid) == 0); + report_prefix_pop(); + + /* 3- Check HSCH after CSCH */ + report_prefix_push("HSCH on busy on CSCH subchannel"); + assert(css_enable(test_device_sid, IO_SCH_ISC) == 0); + assert(csch(test_device_sid) == 0); + report(hsch(test_device_sid) == 1, "Halt subchannel should fail with CC 1"); + check_io_completion(test_device_sid, SCSW_FC_CLEAR); + + assert(css_disable(test_device_sid) == 0); + report_prefix_pop(); + + /* 4- Check HSCH after HSCH */ + report_prefix_push("HSCH on busy on HSCH subchannel"); + assert(css_enable(test_device_sid, IO_SCH_ISC) == 0); + assert(hsch(test_device_sid) == 0); + report(hsch(test_device_sid) == 1, "Halt subchannel should fail with CC 1"); + check_io_completion(test_device_sid, SCSW_FC_HALT); + + assert(css_disable(test_device_sid) == 0); + report_prefix_pop(); + + /* Reset the IRQ handler */ + assert(unregister_io_int_func(dummy_irq) == 0); + assert(register_io_int_func(css_irq_io) == 0); + + free_io_mem(senseid, sizeof(*senseid)); + free_io_mem(ccw, sizeof(*ccw)); +} + static void test_ssch(void) { struct orb orb = { @@ -61,7 +230,6 @@ static void test_ssch(void) phys_addr_t base, top; assert(css_enable(test_device_sid, IO_SCH_ISC) == 0); - assert(register_io_int_func(css_irq_io) == 0); /* ORB address should be aligned on 32 bits */ report_prefix_push("ORB alignment"); @@ -441,6 +609,8 @@ static struct { { "enumerate (stsch)", test_enumerate }, { "enable (msch)", test_enable }, { "start subchannel", test_ssch }, + { "halt subchannel", test_hsch }, + { "clear subchannel", test_csch }, { "sense (ssch/tsch)", test_sense }, { "measurement block (schm)", test_schm }, { "measurement block format0", test_schm_fmt0 },