From patchwork Fri Mar 19 12:54:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kalyan Thota X-Patchwork-Id: 12151009 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1139FC433E0 for ; Fri, 19 Mar 2021 12:54:38 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C2C2464EA4 for ; Fri, 19 Mar 2021 12:54:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C2C2464EA4 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0C4216E9FD; Fri, 19 Mar 2021 12:54:37 +0000 (UTC) Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5177E6E9FC; Fri, 19 Mar 2021 12:54:35 +0000 (UTC) Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 19 Mar 2021 05:54:34 -0700 X-QCInternal: smtphost Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 19 Mar 2021 05:54:32 -0700 X-QCInternal: smtphost Received: from kalyant-linux.qualcomm.com ([10.204.66.210]) by ironmsg01-blr.qualcomm.com with ESMTP; 19 Mar 2021 18:24:09 +0530 Received: by kalyant-linux.qualcomm.com (Postfix, from userid 94428) id 879904309; Fri, 19 Mar 2021 05:54:08 -0700 (PDT) From: Kalyan Thota To: y@qualcomm.com, dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [v1] drm/msm/disp/dpu1: fix display underruns during modeset. Date: Fri, 19 Mar 2021 05:54:06 -0700 Message-Id: <1616158446-19290-1-git-send-email-kalyan_t@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mkrishn@codeaurora.org, dianders@chromium.org, linux-kernel@vger.kernel.org, Kalyan Thota MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" During crtc disable, display perf structures are reset to 0 which includes state varibles which are immutable. On crtc enable, we use the same structures and they don't refelect the actual values 1) Fix is to avoid updating the state structures during disable. 2) Reset the perf structures during atomic check when there is no modeset enable. Signed-off-by: Kalyan Thota Reported-by: Stephen Boyd Tested-by: Douglas Anderson --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 37c8270..b4cd479 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -382,7 +382,6 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc, } else { DPU_DEBUG("crtc=%d disable\n", crtc->base.id); memset(old, 0, sizeof(*old)); - memset(new, 0, sizeof(*new)); update_bus = true; update_clk = true; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 9a80981..a821e2c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -912,6 +912,7 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc, if (!state->enable || !state->active) { DPU_DEBUG("crtc%d -> enable %d, active %d, skip atomic_check\n", crtc->base.id, state->enable, state->active); + memset(&cstate->new_perf, 0, sizeof(cstate->new_perf)); goto end; }