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Wed, 21 Nov 2018 12:05:22 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com, linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org, Chanwoo Choi , devicetree@vger.kernel.org, Krzysztof Kozlowski , Kukjin Kim , Mark Rutland , Rob Herring , Sylwester Nawrocki , Bartlomiej Zolnierkiewicz , Marek Szyprowski Subject: [PATCH 1/4] clk: samsung: exynos5433: fix name typos Date: Wed, 21 Nov 2018 13:05:06 +0100 Message-Id: <20181121120509.18892-2-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181121120509.18892-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02SbUhTYRTHfXZ3t7vh9G5KHlSKpmUZakLhhcxKNIYI9aUPtQ858+KsTWVz vtSXke/zvUWpM43Q0uFczpdMTchXQvGNhkpUUmllVjinFWXm9Rb57XfO/384//PwEJikDfcm kpLTaE2yQiXlCbmdwz/Gg7CYNfnh7G+BVGulFadmnO9xqm5wHKdK+zYRVfb2E0ZNTDzkUyvF r3CqcqKPQ1kGX/KphpkpDpX7ZJBPDSzn4yddZc21zUhmMxfyZE+/9HJkpe1mJFu17T6LXxCG J9CqpHRaExIRJ1Tal/tRaqs4s7hnkqdHpe4GRBBAHoGq5ycMSEhIyEYEsw19XAMSbBVOBBvF AlZYRfB1uBZjBGbA0lqAscIDBPXWGj5bbE3YLU4e4+KRYfDm0RiHYU/yNJQaTTzGhJF5GCyY DNuCB3kcpudGMSYHl9wHNytCGRSRUVAyFMku2wP67jY+wwIyGixG+3Y6ESmGZ1Xvthnb8mR3 mP6G6+bDaI0/y1GQ27CBWPaApZF2Psu+MGos5rKcAT0di9v5gcxBcMd4j8MKx2BgZApn8mDk QbB2h7DtUzB0q4TPvpwbzH4WsxHc4EbnbYxti6AgT8K6g6B2cwxn2QcMmy04a5HBdE50Odpb veOW6h23VP9fexdhZuRF67TqRFobmkxnBGsVaq0uOTH4Uorahra+0ujvEUcXWpuO70ckgaSu ojgPp1yCK9K1Wep+BAQm9RSdD1+TS0QJiqyrtCblokanorX9yIfgSr1E11zm5RIyUZFGX6Hp VFrzT+UQAm898jMuND7OOYpS4XWRwC/MzItZzRcH23RqulDd5FD6H3IvfxFgOqf/qB8f+9D7 K3Y9zL3MUXffydVEpHZ1NPmuLy1miR01VWq7Cc+ptEZ6iq0r8/GX93/nKFVFLiGdJWdiZ6cm D0zWV5QEq1DLHE/np8SMrT8TrlsDMnd5TUi5WqUiNBDTaBV/AP4FIhxGAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrCIsWRmVeSWpSXmKPExsVy+t/xe7rMXl+jDRYtYLHYOGM9q8X1L89Z LeYfOcdq0bfvP6NF/+PXzBbnz29gt/jYc4/VYsb5fUwWa4/cZbdYev0ik0Xr3iPsFofftLM6 8HismbeG0WPTqk42j4Pv9jB59G1ZxejxeZNcAGuUnk1RfmlJqkJGfnGJrVK0oYWRnqGlhZ6R iaWeobF5rJWRqZK+nU1Kak5mWWqRvl2CXsbVN4cYCzYKVvTsvsDWwNjH38XIySEhYCKxdmMH cxcjF4eQwFJGiVn9u5khEtISjadXM0HYwhJ/rnWxQRR9YpSY9vE7G0iCTcBc4tH2M2BFIgIe EjMmLmYFKWIW6GOW+HzwPDtIQljAVuLSzdNAUzk4WARUJaZMNAQxeQVcJHqPOkHMl5do2LUZ rJpTwFVi7eSrLCAlQiAll3hBwrwCghInZz5hAbGZgcqbt85mnsAoMAtJahaS1AJGplWMIqml xbnpucVGesWJucWleel6yfm5mxiBMbTt2M8tOxi73gUfYhTgYFTi4U0Q/hItxJpYVlyZe4hR goNZSYQ30uZrtBBvSmJlVWpRfnxRaU5q8SFGU6APJjJLiSbnA+M7ryTe0NTQ3MLS0NzY3NjM Qkmc97xBZZSQQHpiSWp2ampBahFMHxMHp1QDoxtf4uar/XGH/C5n7Nh//uTxsleJH56KHzdd s+LSbsMExRd6DGGsmz+wTfp3Lmjlv7+cF54syTqpfOBHzJ5dKxZoXkxusbh15nvv+211XW2G Oi/WzTdL+S0Wq3HLeduth4l8l+4tOH57piHP/DqnUlaz886l/HvfzvFxWzPX/FSZmfuebz/T /zxUYinOSDTUYi4qTgQAZA4Je7cCAAA= X-CMS-MailID: 20181121120523eucas1p1e69848a515c713315499e6e21f099cc2 X-Msg-Generator: CA X-RootMTR: 20181121120523eucas1p1e69848a515c713315499e6e21f099cc2 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181121120523eucas1p1e69848a515c713315499e6e21f099cc2 References: <20181121120509.18892-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Fix typo in imem sssx name and typo 200 switched with 266. Signed-off-by: Kamil Konieczny Acked-by: Chanwoo Choi --- drivers/clk/samsung/clk-exynos5433.c | 6 +++--- include/dt-bindings/clock/exynos5433.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 751e2c4fb65b..24c3360db65b 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -559,7 +559,7 @@ static const struct samsung_gate_clock top_gate_clks[] __initconst = { /* ENABLE_ACLK_TOP */ GATE(CLK_ACLK_G3D_400, "aclk_g3d_400", "div_aclk_g3d_400", ENABLE_ACLK_TOP, 30, CLK_IS_CRITICAL, 0), - GATE(CLK_ACLK_IMEM_SSX_266, "aclk_imem_ssx_266", + GATE(CLK_ACLK_IMEM_SSSX_266, "aclk_imem_sssx_266", "div_aclk_imem_sssx_266", ENABLE_ACLK_TOP, 29, CLK_IGNORE_UNUSED, 0), GATE(CLK_ACLK_BUS0_400, "aclk_bus0_400", "div_aclk_bus0_400", @@ -568,10 +568,10 @@ static const struct samsung_gate_clock top_gate_clks[] __initconst = { GATE(CLK_ACLK_BUS1_400, "aclk_bus1_400", "div_aclk_bus1_400", ENABLE_ACLK_TOP, 25, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), - GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_266", + GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_200", ENABLE_ACLK_TOP, 24, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), - GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_200", + GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_266", ENABLE_ACLK_TOP, 23, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), GATE(CLK_ACLK_PERIC_66, "aclk_peric_66", "div_aclk_peric_66_b", diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h index 98bd85ce1e45..87bb2b017143 100644 --- a/include/dt-bindings/clock/exynos5433.h +++ b/include/dt-bindings/clock/exynos5433.h @@ -156,7 +156,7 @@ #define CLK_ACLK_G2D_266 220 #define CLK_ACLK_G2D_400 221 #define CLK_ACLK_G3D_400 222 -#define CLK_ACLK_IMEM_SSX_266 223 +#define CLK_ACLK_IMEM_SSSX_266 223 #define CLK_ACLK_BUS0_400 224 #define CLK_ACLK_BUS1_400 225 #define CLK_ACLK_IMEM_200 226 From patchwork Wed Nov 21 12:05:07 2018 Content-Type: text/plain; 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Wed, 21 Nov 2018 12:05:23 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com, linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org, Chanwoo Choi , devicetree@vger.kernel.org, Krzysztof Kozlowski , Kukjin Kim , Mark Rutland , Rob Herring , Sylwester Nawrocki , Bartlomiej Zolnierkiewicz , Marek Szyprowski Subject: [PATCH 2/4] arm64: dts: bindings: document imem clock Date: Wed, 21 Nov 2018 13:05:07 +0100 Message-Id: <20181121120509.18892-3-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181121120509.18892-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrOKsWRmVeSWpSXmKPExsWy7djPc7osXl+jDU6fk7DYOGM9q8X1L89Z LeYfOcdq0bfvP6NF/+PXzBbnz29gt/jYc4/VYsb5fUwWa4/cZbdYev0ik0Xr3iPsFofftLM6 8HismbeG0WPTqk42j4Pv9jB59G1ZxejxeZNcAGsUl01Kak5mWWqRvl0CV8bz2T9ZC14KVCzp qGtgfMvbxcjJISFgItH/5z5rFyMXh5DACkaJxkMnmSGcL4wS/S1foTKfGSUedfxmg2mZ9u4q VNVyRoklvffY4VqW3GliB6liEzCXeLT9DBOILSLgJtE3eTYbSBGzQBuzxNPZXWAJYQE7if37 TwLt4OBgEVCV2P0gDCTMK+AisfvDNKht8hINuzaDzeQUcJVYO/kqC0SNoMTJmU/AbGagmuat s8EukhDYxi7xvOc6O0Szi8T/nctYIWxhiVfHt0DFZYDi85kg7HKJ3VufsUM0tzBKzJ28CCph LXH4+EWw45gFNCXW79KHCDtKtN5qZQYJSwjwSdx4KwhxA5/EpG3TocK8Eh1tQhDVuhLz/p+B ukBaouv/OijbQ6J32wPmCYyKs5B8MwvJN7MQ9i5gZF7FKJ5aWpybnlpslJdarlecmFtcmpeu l5yfu4kRmJxO/zv+ZQfjrj9JhxgFOBiVeHgThL9EC7EmlhVX5h5ilOBgVhLhjbT5Gi3Em5JY WZValB9fVJqTWnyIUZqDRUmct5rhQbSQQHpiSWp2ampBahFMlomDU6qBMUy/f2UnI9O512tP BUVyvcrckZEx2fvSgW/JHvJKOndcIlzaz5re44uUWnDIwyT+S8T1+Vtn7Lv0+p9s8GvbsMqO SJfjIrd/d52Saduo3RR1NOpWWP9ERkuVBW+uNesWecstjFh0M+ycfYvCZZVeWefbr2+cn63i odcaxr5X6b9r09NtZzoPKLEUZyQaajEXFScCALmPdT5KAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrCIsWRmVeSWpSXmKPExsVy+t/xe7rMXl+jDXb3qFpsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW3zsucdqMeP8PiaLtUfuslssvX6RyaJ17xF2i8Nv2lkd eDzWzFvD6LFpVSebx8F3e5g8+rasYvT4vEkugDVKz6Yov7QkVSEjv7jEVina0MJIz9DSQs/I xFLP0Ng81srIVEnfziYlNSezLLVI3y5BL+P57J+sBS8FKpZ01DUwvuXtYuTkkBAwkZj27ipz FyMXh5DAUkaJmZsfsUEkpCUaT69mgrCFJf5c62KDKPrEKNHZuQsswSZgLvFo+xkwW0TAQ2LG xMWsIEXMAn3MEp8PnmcHSQgL2Ens338SKMHBwSKgKrH7QRhImFfARWL3h2lQy+QlGnZtBivn FHCVWDv5KgtIuRBQTe8lXohyQYmTM5+wgNjMQOXNW2czT2AUmIUkNQtJagEj0ypGkdTS4tz0 3GJDveLE3OLSvHS95PzcTYzAGNp27OfmHYyXNgYfYhTgYFTi4U0Q/hItxJpYVlyZe4hRgoNZ SYQ30uZrtBBvSmJlVWpRfnxRaU5q8SFGU6AXJjJLiSbnA+M7ryTe0NTQ3MLS0NzY3NjMQkmc 97xBZZSQQHpiSWp2ampBahFMHxMHp1QD47wS3s2SBy7e0Fj91Wid/DWWO0q3X1gVnnO58sQz LWW3n4V/FHc3b7bRxYK3C75NMVd645bwLEjqRI5+7J+g6KNtx/cYaz1Y0DPli3LE2l6V8x0O Jk89pv3zjL/iUjv3yMKPfAXhr9ZyT/zPnGNesuKh/lH5Q+uPl/2/xDx5bf+X1Q6Plx3b0KHE UpyRaKjFXFScCAAZclGJtwIAAA== X-CMS-MailID: 20181121120523eucas1p1e8c1ef3d19d0f71bbdc57e2a470c80b0 X-Msg-Generator: CA X-RootMTR: 20181121120523eucas1p1e8c1ef3d19d0f71bbdc57e2a470c80b0 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181121120523eucas1p1e8c1ef3d19d0f71bbdc57e2a470c80b0 References: <20181121120509.18892-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document imem clock bindings for SSS (Security SubSystem) and SlimSSS IPs. Signed-off-by: Kamil Konieczny --- .../bindings/clock/exynos5433-clock.txt | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index 50d5897c9849..4e4352bf5a0b 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -19,6 +19,8 @@ Required Properties: which generates clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC IPs. - "samsung,exynos5433-cmu-fsys" - clock controller compatible for CMU_FSYS which generates clocks for USB/UFS/SDMMC/TSI/PDMA IPs. + - "samsung,exynos5433-cmu-imem" - clock controller compatible for CMU_IMEM + which generates clocks for SSS (Security SubSystem) and SlimSSS IPs. - "samsung,exynos5433-cmu-g2d" - clock controller compatible for CMU_G2D which generates clocks for G2D/MDMA IPs. - "samsung,exynos5433-cmu-disp" - clock controller compatible for CMU_DISP @@ -88,6 +90,12 @@ Required Properties: - sclk_usbhost30_fsys - sclk_usbdrd30_fsys + Input clocks for imem clock controller: + - oscclk + - aclk_imem_sssx_266 + - aclk_imem_266 + - aclk_imem_200 + Input clocks for g2d clock controller: - oscclk - aclk_g2d_266 @@ -264,6 +272,21 @@ Example 2: Examples of clock controller nodes are listed below. <&cmu_top CLK_SCLK_USBDRD30_FSYS>; }; + cmu_imem: clock-controller@11060000 { + compatible = "samsung,exynos5433-cmu-imem"; + reg = <0x11060000 0x1000>; + #clock-cells = <1>; + + clock-names = "oscclk", + "aclk_imem_sssx_266", + "aclk_imem_266", + "aclk_imem_200"; + clocks = <&xxti>, + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_200>; + }; + cmu_g2d: clock-controller@12460000 { compatible = "samsung,exynos5433-cmu-g2d"; reg = <0x12460000 0x0b08>; From patchwork Wed Nov 21 12:05:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamil Konieczny X-Patchwork-Id: 10692497 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BA0C116B1 for ; Wed, 21 Nov 2018 12:05:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A82E22BA34 for ; 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The users can use compatibility "samsung,exynos5433-cmu-imem". Signed-off-by: Kamil Konieczny --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 2131f12364cb..34055fa3a9d0 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -340,6 +340,21 @@ <&cmu_top CLK_SCLK_USBDRD30_FSYS>; }; + cmu_imem: clock-controller@11060000 { + compatible = "samsung,exynos5433-cmu-imem"; + reg = <0x11060000 0x1000>; + #clock-cells = <1>; + + clock-names = "oscclk", + "aclk_imem_sssx_266", + "aclk_imem_266", + "aclk_imem_200"; + clocks = <&xxti>, + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_200>; + }; + cmu_g2d: clock-controller@12460000 { compatible = "samsung,exynos5433-cmu-g2d"; reg = <0x12460000 0x1000>; From patchwork Wed Nov 21 12:05:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamil Konieczny X-Patchwork-Id: 10692503 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D188F16B1 for ; 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Wed, 21 Nov 2018 12:05:24 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com Cc: Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] clk: samsung: exynos5433: add imem clock Date: Wed, 21 Nov 2018 13:05:09 +0100 Message-Id: <20181121120509.18892-5-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181121120509.18892-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrCKsWRmVeSWpSXmKPExsWy7djP87qsXl+jDRZ1a1jMP3KO1aJv339G i/7Hr5ktzp/fwG6x6fE1VovLu+awWcw4v4/JYun1i0wWrXuPsDtweqyZt4bRY9OqTjaPzUvq PQ6+28Pk8XmTXABrFJdNSmpOZllqkb5dAlfGoxtTWAuuOVW8uNLC3sDYY9XFyMkhIWAise/k LOYuRi4OIYEVjBI9Rw4ygySEBL4wSqzb5glhf2aUeH7WEaZh3vtZrBANy4Hir14jNDxf4gdi swmYSzzafoYJxBYRUJaYfG862AZmgRlMEmuOfWXrYuTgEBawlfi5GqyeRUBV4vTy3YwgNq+A i8S9l6eYIJbJSzTs2swOYnMKuEqsnXyVBaJGUOLkzCdgNjNQTfPW2WDzJQQWsUucv74OqtlF Yn3vFChbWOLV8S3sELaMxP+d86Hi5RK7tz5jh2huYZSYO3kRVMJa4vDxi6wghzILaEqs36UP YkoIOEr8m1UBYfJJ3HgrCHECn8SkbSAvgoR5JTrahCBm6ErM+3+GFcKWluj6vw7K9pA4/G43 4wRGxVlInpmF5JlZCGsXMDKvYhRPLS3OTU8tNsxLLdcrTswtLs1L10vOz93ECEw7p/8d/7SD 8eulpEOMAhyMSjy8CcJfooVYE8uKK3MPMUpwMCuJ8EbafI0W4k1JrKxKLcqPLyrNSS0+xCjN waIkzlvN8CBaSCA9sSQ1OzW1ILUIJsvEwSnVwNgUe35H7YQeubVGU3jcbhz/OfOfv0raVdsD iXt5DyyRsp6Xsrz9jsXjB747gzqj4rez/O59+SNgbUeb1lYp6ZUx/w3rdLKdeF3bSkR0Mndz 2xRX/6mXvnKYe2N3gcuTPqm55t9bRRQufPBMr8/Y91k1X+RxxIdD/8w33Uo2vM3wIi3srIqP rhJLcUaioRZzUXEiABZoeXg3AwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprKIsWRmVeSWpSXmKPExsVy+t/xe7osXl+jDaZsUbOYf+Qcq0Xfvv+M Fv2PXzNbnD+/gd1i0+NrrBaXd81hs5hxfh+TxdLrF5ksWvceYXfg9Fgzbw2jx6ZVnWwem5fU exx8t4fJ4/MmuQDWKD2bovzSklSFjPziElulaEMLIz1DSws9IxNLPUNj81grI1MlfTublNSc zLLUIn27BL2MRzemsBZcc6p4caWFvYGxx6qLkZNDQsBEYt77WaxdjFwcQgJLGSW+XznNDJGQ lmg8vZoJwhaW+HOtiw2i6BOjxNX2SYwgCTYBc4lH28+AFYkIKEtMvjedGaSIWWABk8SWK8+A ijg4hAVsJX6u9gOpYRFQlTi9fDdYL6+Ai8S9l6egFshLNOzazA5icwq4SqydfJUFpFUIqKb3 Ei9EuaDEyZlPWEBsZqDy5q2zmScwCsxCkpqFJLWAkWkVo0hqaXFuem6xoV5xYm5xaV66XnJ+ 7iZGYJRsO/Zz8w7GSxuDDzEKcDAq8fAmCH+JFmJNLCuuzD3EKMHBrCTCG2nzNVqINyWxsiq1 KD++qDQntfgQoynQDxOZpUST84ERnFcSb2hqaG5haWhubG5sZqEkznveoDJKSCA9sSQ1OzW1 ILUIpo+Jg1OqgTFu1YqLNgW212aa13QcrJ4cbHc83lt69onm7ZK8cwyW/5j8Pa3+ova2bY8W V4kZPjC7t+zM77iEWSlny/Z8YV23OlzeuuVPgmiK5K/gnVN3TOJ1dFswe8qMg3ttzu5efDnw 7e7m68XO0c0zUivf1VWq6EqxsxzUelRd5PH3za8c0SsTD3d+C3msxFKckWioxVxUnAgAbKtu mqgCAAA= X-CMS-MailID: 20181121120524eucas1p166a26857df78947c9e08f0fb8dbf75e4 X-Msg-Generator: CA X-RootMTR: 20181121120524eucas1p166a26857df78947c9e08f0fb8dbf75e4 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181121120524eucas1p166a26857df78947c9e08f0fb8dbf75e4 References: <20181121120509.18892-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add imem clock for exynos5433. Signed-off-by: Kamil Konieczny --- drivers/clk/samsung/clk-exynos5433.c | 123 +++++++++++++++++++++++++ include/dt-bindings/clock/exynos5433.h | 55 +++++++++++ 2 files changed, 178 insertions(+) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 24c3360db65b..db29cbd1fbdc 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -2345,6 +2345,129 @@ static const struct samsung_cmu_info fsys_cmu_info __initconst = { .clk_name = "aclk_fsys_200", }; +/* + * Register offset definitions for CMU_IMEM + * + */ + +#define ENABLE_ACLK_IMEM 0x0800 +#define ENABLE_ACLK_IMEM_SSS 0x0808 +#define ENABLE_ACLK_IMEM_SLIMSSS 0x080c +#define ENABLE_PCLK_IMEM 0x0900 +#define ENABLE_PCLK_IMEM_SSS 0x0904 +#define ENABLE_PCLK_IMEM_SLIMSSS 0x0908 + +static const unsigned long imem_clk_regs[] __initconst = { +ENABLE_ACLK_IMEM, +ENABLE_ACLK_IMEM_SSS, +ENABLE_ACLK_IMEM_SLIMSSS, +ENABLE_PCLK_IMEM, +ENABLE_PCLK_IMEM_SSS, +ENABLE_PCLK_IMEM_SLIMSSS, +}; + +static const struct samsung_gate_clock imem_gate_clks[] __initconst = { + /* ENABLE_ACLK_IMEM */ + GATE(CLK_ACLK_AXI2AHB_IMEMH, "aclk_axi2ahb_imemh", "aclk_imem_200", + ENABLE_ACLK_IMEM, 24, 0, 0), + GATE(CLK_ACLK_AXIDS_SROMC, "aclk_axids_sromc", "aclk_imem_200", + ENABLE_ACLK_IMEM, 23, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_SROMC, "aclk_sromc", "aclk_imem_200", + ENABLE_ACLK_IMEM, 22, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_ARBG_TX, "aclk_bts_arbg_tx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 21, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXI_IMEMX, "aclk_asyncaxi_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 20, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIUS_IMEMX, "aclk_axius_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 19, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_IMEMX, "aclk_xiu_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 18, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXI_SSSX, "aclk_asyncaxi_sssx", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SLIMSSS, "aclk_bts_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SSS_DRAM, "aclk_bts_sss_dram", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SSS_CCI, "aclk_bts_sss_cci", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 13, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ALB_IMEM, "aclk_alb_imem", "aclk_imem_266", + ENABLE_ACLK_IMEM, 12, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM1P, "aclk_axids_pimemx_imem1p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 11, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM0P, "aclk_axids_pimemx_imem0p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 10, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_GIC, "aclk_axids_pimemx_gic", "aclk_imem_200", + ENABLE_ACLK_IMEM, 9, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAHBM_SSS_ATLAS, "aclk_asyncahbm_sss_atlas", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXIS_MIF_PIMEMX, "aclk_asyncaxis_mif_pimemx", "aclk_imem_200", + ENABLE_ACLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXI2APB_IMEM1P, "aclk_axi2apb_imem1p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXI2APB_IMEM0P, "aclk_axi2apb_imem0p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_SSSX, "aclk_xiu_sssx", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_PIMEMX, "aclk_xiu_pimemx", "aclk_imem_200", + ENABLE_ACLK_IMEM, 2, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_IMEMND_266, "aclk_imemnd_266", "aclk_imem_266", + ENABLE_ACLK_IMEM, 1, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_GIC, "aclk_gic", "aclk_imem_200", + ENABLE_ACLK_IMEM, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_ACLK_IMEM_SSS */ + GATE(CLK_ACLK_SSS, "aclk_sss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_SLIMSSS */ + GATE(CLK_ACLK_SLIMSSS, "aclk_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_PCLK_IMEM */ + GATE(CLK_PCLK_GPIO_IMEM, "pclk_gpio_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ASYNCAXI_IMEMX, "pclk_asyncaxi_imemx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 16, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_ARBG_TX, "pclk_bts_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ASYNCAPB_ARBG_TX, "pclk_asyncapb_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), + + GATE(CLK_PCLK_BTS_SLIMSSS, "pclk_bts_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM, 8, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_SSS_DRAM, "pclk_bts_sss_dram", "aclk_imem_200", + ENABLE_PCLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_SSS_CCI, "pclk_bts_sss_cci", "aclk_imem_200", + ENABLE_PCLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ALB_IMEM, "pclk_alb_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_PMU_IMEM, "pclk_pmu_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_SYSREG_IMEM, "pclk_sysreg_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SSS */ + GATE(CLK_PCLK_SSS, "pclk_sss", "aclk_imem_200", + ENABLE_PCLK_IMEM, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SLIMSSS */ + GATE(CLK_PCLK_SLIMSSS, "pclk_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM, 0, CLK_IGNORE_UNUSED, 0), +}; + +static const struct samsung_cmu_info imem_cmu_info __initconst = { + .gate_clks = imem_gate_clks, + .nr_gate_clks = ARRAY_SIZE(imem_gate_clks), + .nr_clk_ids = IMEM_NR_CLK, + .clk_regs = imem_clk_regs, + .nr_clk_regs = ARRAY_SIZE(imem_clk_regs), +}; + +static void __init exynos5433_cmu_imem_init(struct device_node *np) +{ + samsung_cmu_register_one(np, &imem_cmu_info); +} + +CLK_OF_DECLARE(exynos5433_cmu_imem, "samsung,exynos5433-cmu-imem", + exynos5433_cmu_imem_init); + /* * Register offset definitions for CMU_G2D */ diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h index 87bb2b017143..312d8810b56d 100644 --- a/include/dt-bindings/clock/exynos5433.h +++ b/include/dt-bindings/clock/exynos5433.h @@ -623,6 +623,61 @@ #define FSYS_NR_CLK 116 +/* CMU_IMEM */ +#define CLK_ACLK_SSS 1 +#define CLK_ACLK_SLIMSSS 2 +#define CLK_ACLK_RTIC 3 +#define CLK_ACLK_XIU_SSSX 4 +#define CLK_ACLK_ASYNCAHBM_SSS_ATLAS 5 +#define CLK_ACLK_ASYNCAXI_SSSX 6 +#define CLK_ACLK_BTS_SSS_CCI 7 +#define CLK_ACLK_BTS_SSS_DRAM 8 +#define CLK_ACLK_BTS_SLIMSSS 9 +#define CLK_ACLK_SMMU_SSS_CCI 10 +#define CLK_ACLK_SMMU_SSS_DRAM 11 +#define CLK_ACLK_SMMU_SLIMSSS 12 +#define CLK_ACLK_SMMU_RTIC 13 +#define CLK_ACLK_IMEMND_266 14 +#define CLK_ACLK_ALB_IMEM 15 +#define CLK_ACLK_XIU_IMEMX 16 +#define CLK_ACLK_AXIUS_IMEMX 17 +#define CLK_ACLK_ASYNCAXI_IMEMX 18 +#define CLK_ACLK_ARBG_TX 19 +#define CLK_ACLK_BTS_ARBG_TX 20 +#define CLK_ACLK_SMMU_ARBG_TX 21 +#define CLK_ACLK_GIC 22 +#define CLK_ACLK_INT_MEM 23 +#define CLK_ACLK_XIU_PIMEMX 24 +#define CLK_ACLK_AXI2APB_IMEM0P 25 +#define CLK_ACLK_AXI2APB_IMEM1P 26 +#define CLK_ACLK_ASYNCAXIS_MIF_PIMEMX 27 +#define CLK_ACLK_AXIDS_PIMEMX_GIC 28 +#define CLK_ACLK_AXIDS_PIMEMX_IMEM0P 29 +#define CLK_ACLK_AXIDS_PIMEMX_IMEM1P 30 +#define CLK_ACLK_SROMC 31 +#define CLK_ACLK_AXIDS_SROMC 32 +#define CLK_ACLK_AXI2AHB_IMEMH 33 +#define CLK_PCLK_SSS 34 +#define CLK_PCLK_SLIMSSS 35 +#define CLK_PCLK_RTIC 36 +#define CLK_PCLK_SYSREG_IMEM 37 +#define CLK_PCLK_PMU_IMEM 38 +#define CLK_PCLK_ALB_IMEM 39 +#define CLK_PCLK_BTS_SSS_CCI 40 +#define CLK_PCLK_BTS_SSS_DRAM 41 +#define CLK_PCLK_BTS_SLIMSSS 42 +#define CLK_PCLK_SMMU_SSS_CCI 43 +#define CLK_PCLK_SMMU_SSS_DRAM 44 +#define CLK_PCLK_SMMU_SLIMSSS 45 +#define CLK_PCLK_SMMU_RTIC 46 +#define CLK_PCLK_ASYNCAPB_ARBG_TX 47 +#define CLK_PCLK_BTS_ARBG_TX 48 +#define CLK_PCLK_SMMU_ARBG_TX 49 +#define CLK_PCLK_ASYNCAXI_IMEMX 50 +#define CLK_PCLK_GPIO_IMEM 51 + +#define IMEM_NR_CLK 52 + /* CMU_G2D */ #define CLK_MUX_ACLK_G2D_266_USER 1 #define CLK_MUX_ACLK_G2D_400_USER 2