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[2003:dc:d732:f500:597d:16a6:3157:3221]) by smtp.googlemail.com with ESMTPSA id g198sm11495337wmd.23.2018.11.23.11.53.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 11:53:24 -0800 (PST) From: Martin Blumenstingl To: carlo@caione.org, khilman@baylibre.com, linux-amlogic@lists.infradead.org Subject: [PATCH 1/6] ARM: meson: select HAVE_ARM_TWD and ARM_GLOBAL_TIMER Date: Fri, 23 Nov 2018 20:53:06 +0100 Message-Id: <20181123195311.4578-2-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> References: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181123_115336_999592_EB136CBB X-CRM114-Status: UNSURE ( 9.18 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The 32-bit Meson SoCs use multiple Cortex-A9 (Meson8 and Meson8m2) or Cortex-A5 (Meson8b) CPU cores. These come with the "ARM global timer" and "Timer-Watchdog" (aka TWD, which provides both a per-cpu local timer and watchdog). Selecting ARM_GLOBAL_TIMER and HAVE_ARM_TWD allows us to add the timers to the SoC.dtsi files. Signed-off-by: Martin Blumenstingl --- arch/arm/mach-meson/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index d51cfda953d4..b16831697183 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -4,12 +4,14 @@ menuconfig ARCH_MESON select GPIOLIB select GENERIC_IRQ_CHIP select ARM_GIC + select ARM_GLOBAL_TIMER select CACHE_L2X0 select PINCTRL select PINCTRL_MESON select COMMON_CLK select COMMON_CLK_AMLOGIC select HAVE_ARM_SCU if SMP + select HAVE_ARM_TWD if SMP if ARCH_MESON From patchwork Fri Nov 23 19:53:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 10696353 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 70C4714BD for ; Fri, 23 Nov 2018 20:00:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5E053286AE for ; Fri, 23 Nov 2018 20:00:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 51D7A2BF83; Fri, 23 Nov 2018 20:00:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 01911286AE for ; Fri, 23 Nov 2018 20:00:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=D0ZJzpbvpDeZGoT3C9C3xF5eKRT6MBV8geaAexOHmSk=; b=s7BVpAXH5AKax3 SNtZAzuhKpKQNZFXDzELHksl50Vx2STaNxYLe10cyvWlejsJgCVyAeOdCD6HPaV6gLsK0jBqOYFmh /UquD0DaEOK/ckzdamPjj1FYvpqA95S2NuroqM0gIQS8Ke3APqVVGO0vOPxAIG+wUaWxs+Qcd3RU0 LPgo0F1KKQIIdJC4R4m05FKzvyELwWYUFRgEAfUfBk69SkmlistVaIDXix9Keqleo1adTwnOy3p5s hlDE5UjotvDeHFc2NP9kPGOxjaV3XBnSdCKW6YxjssFTlBhQp+Y96Yxqh3pOe8dj4RDdlM398Tao2 znfjViD5fzvjl9Ol2OVg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gQHcy-0004Iw-PG; Fri, 23 Nov 2018 20:00:36 +0000 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gQHWE-0007dw-54; Fri, 23 Nov 2018 19:53:39 +0000 Received: by mail-wm1-x341.google.com with SMTP id u13-v6so12978588wmc.4; Fri, 23 Nov 2018 11:53:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Uk6NbW6xFFI/4/JJNngXdoHaDRPggf+bny1s89MRwTM=; b=MNgeUNvVGBLyaLH4ke0l9DdlneCQT5PmpstMQ74LIjJupfYPa8aINF+dRcYQktr59Y 4sY9NSG2VDwd6MGUrYWwgcixradfn8C4iWwv3A5tjOLx4Q2WjDaqgzCUQuLNv5h/exCY aNm1BasYP6Qui/wb7NNQvwPkHZX7T8djUFacnbDrBj/SVX5u7P5yZHmRT1CFBiklPf31 iaKa5qbEMdFPdSr0QoFO5TBgXPJqYQBQx+/twitijqf4CGv1PDCHCFjiYv3ebPYYJrlh CGkzBgdxFvKOEt2WrQFg99nvhc1xrpCWUIqSJIBcZi0cR/tCvtvNyShCwcxG4o7BACS8 dglQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Uk6NbW6xFFI/4/JJNngXdoHaDRPggf+bny1s89MRwTM=; b=LTy68Rv4cQ+HfmRCS09HTyIaALMOvibHGJEaANWlS2MhUGE9gxiiRBqdIdj8MN0CKF ACCz5TDKsB8pRf6tLhdA35O7zPZCVI6L0GrfoRFeNZHenZ8rF2eH1XK8AF+kynX8hqyW xg+5e6JO11Nq0IChwVhWvWS3xM9FFEGXjCSzW/VFywf21/w6gdkquG8qzDW5CQBIQ+6g dZ4lcN4V8HZMBYdDs/6kFYLO+DqtxoyJqahwM2x0wbH3sqGWp9btLIho6A/i90J8SwYF +/Qu7u/cMxrfFT3cqpgMipZMUPEOlJQPKDbMMNf1/+u202kDdNrvMy92WJ2rE1/TtU8G tQxg== X-Gm-Message-State: AA+aEWYr89ps64+JXOiwE4i4aBF6XKawd18JfaFf5/6mB5fmy/VJMgp3 AaGX1lEB5gzP4ULn+q/dCFz65k3+ X-Google-Smtp-Source: AFSGD/WjneB/cPaXtp4qCTMTg78oMJHAtgOSgrgtky6YR75WtV0VRog9ctb+PenzpvqXhMUIUyxBrQ== X-Received: by 2002:a1c:2d5:: with SMTP id 204mr11905221wmc.115.1543002806306; Fri, 23 Nov 2018 11:53:26 -0800 (PST) Received: from blackbox.darklights.net (p200300DCD732F500597D16A631573221.dip0.t-ipconnect.de. [2003:dc:d732:f500:597d:16a6:3157:3221]) by smtp.googlemail.com with ESMTPSA id g198sm11495337wmd.23.2018.11.23.11.53.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 11:53:25 -0800 (PST) From: Martin Blumenstingl To: carlo@caione.org, khilman@baylibre.com, linux-amlogic@lists.infradead.org Subject: [PATCH 2/6] ARM: dts: meson: group the Cortex-A5 / Cortex-A9 peripherals Date: Fri, 23 Nov 2018 20:53:07 +0100 Message-Id: <20181123195311.4578-3-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> References: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181123_115338_191445_B5CCF0F0 X-CRM114-Status: GOOD ( 11.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The public Meson8b (S805) datasheet describes a memory region called "A9 Periph base" which starts at 0xC4300000 and ends at 0xC430FFFF. Add a simple-bus node and move all peripherals that are part of this memory region. This makes the .dts a bit easier to read. No functional changes. Signed-off-by: Martin Blumenstingl --- arch/arm/boot/dts/meson.dtsi | 24 ++++++++++++++++-------- arch/arm/boot/dts/meson8.dtsi | 12 +++++++----- arch/arm/boot/dts/meson8b.dtsi | 12 +++++++----- 3 files changed, 30 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index 0839da07a75c..e4645f612712 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -59,14 +59,6 @@ cache-level = <2>; }; - gic: interrupt-controller@c4301000 { - compatible = "arm,cortex-a9-gic"; - reg = <0xc4301000 0x1000>, - <0xc4300100 0x0100>; - interrupt-controller; - #interrupt-cells = <3>; - }; - soc { compatible = "simple-bus"; #address-cells = <1>; @@ -207,6 +199,22 @@ }; }; + periph: bus@c4300000 { + compatible = "simple-bus"; + reg = <0xc4300000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xc4300000 0x10000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a9-gic"; + reg = <0x1000 0x1000>, + <0x100 0x100>; + interrupt-controller; + #interrupt-cells = <3>; + }; + }; + aobus: aobus@c8100000 { compatible = "simple-bus"; reg = <0xc8100000 0x100000>; diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 3be5fbd07997..28b9f6779993 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -129,11 +129,6 @@ no-map; }; }; - - scu@c4300000 { - compatible = "arm,cortex-a9-scu"; - reg = <0xc4300000 0x100>; - }; }; /* end of / */ &aobus { @@ -362,6 +357,13 @@ arm,shared-override; }; +&periph { + scu@0 { + compatible = "arm,cortex-a9-scu"; + reg = <0x0 0x100>; + }; +}; + &pwm_ab { compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm"; }; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 587a855f872b..6b097ab8637f 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -112,11 +112,6 @@ no-map; }; }; - - scu@c4300000 { - compatible = "arm,cortex-a5-scu"; - reg = <0xc4300000 0x100>; - }; }; /* end of / */ &aobus { @@ -349,6 +344,13 @@ arm,shared-override; }; +&periph { + scu@0 { + compatible = "arm,cortex-a5-scu"; + reg = <0x0 0x100>; + }; +}; + &pwm_ab { compatible = "amlogic,meson8b-pwm"; }; From patchwork Fri Nov 23 19:53:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 10696351 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 349BC14BD for ; Fri, 23 Nov 2018 20:00:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 236852BF82 for ; Fri, 23 Nov 2018 20:00:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1742F2BF84; Fri, 23 Nov 2018 20:00:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id ACAB32BF82 for ; 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[2003:dc:d732:f500:597d:16a6:3157:3221]) by smtp.googlemail.com with ESMTPSA id g198sm11495337wmd.23.2018.11.23.11.53.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 11:53:26 -0800 (PST) From: Martin Blumenstingl To: carlo@caione.org, khilman@baylibre.com, linux-amlogic@lists.infradead.org Subject: [PATCH 3/6] ARM: dts: meson8: add the ARM TWD timer Date: Fri, 23 Nov 2018 20:53:08 +0100 Message-Id: <20181123195311.4578-4-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> References: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181123_115338_191802_3B583085 X-CRM114-Status: GOOD ( 11.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Meson8 and Meson8m2 SoC are using four ARM Cortex-A9 cores which come with a "TWD" (Timer-Watchdog) based timer. This adds support for the ARM TWD Timer on these two SoCs. Suggested-by: Carlo Caione [ rebased patch from Carlo, use IRQ_TYPE_EDGE_RISING instead of IRQ_TYPE_LEVEL_LOW to prevent "GIC: PPI13 is secure or misconfigured" message during boot, use pre-processor macros to specify the IRQ, added the correct clock, dropped TWD watchdog node since there's no driver for it anymore ] Signed-off-by: Martin Blumenstingl --- arch/arm/boot/dts/meson8.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 28b9f6779993..2b0b3edbd896 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -362,6 +362,13 @@ compatible = "arm,cortex-a9-scu"; reg = <0x0 0x100>; }; + + timer@600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x600 0x20>; + interrupts = ; + clocks = <&clkc CLKID_PERIPH>; + }; }; &pwm_ab { From patchwork Fri Nov 23 19:53:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 10696333 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5761813BB for ; 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[2003:dc:d732:f500:597d:16a6:3157:3221]) by smtp.googlemail.com with ESMTPSA id g198sm11495337wmd.23.2018.11.23.11.53.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 11:53:28 -0800 (PST) From: Martin Blumenstingl To: carlo@caione.org, khilman@baylibre.com, linux-amlogic@lists.infradead.org Subject: [PATCH 4/6] ARM: dts: meson8: add the Cortex-A9 global timer Date: Fri, 23 Nov 2018 20:53:09 +0100 Message-Id: <20181123195311.4578-5-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> References: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181123_115340_818719_B46B8966 X-CRM114-Status: GOOD ( 12.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Meson8 and Meson8m2 SoCs are using four Cortex-A9 cores. These come with an ARM global timer. This adds the Cortex-A9 global timer but keeps it disabled for now. The timer is clocked by the "PERIPH" clock whose rate can change during runtime (when changing the frequency of the CPU clock). Unfortunately the arm_global_timer driver does not handle changes to the clock rate yet. Signed-off-by: Martin Blumenstingl --- arch/arm/boot/dts/meson8.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 2b0b3edbd896..2575a5835567 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -363,6 +363,19 @@ reg = <0x0 0x100>; }; + timer@200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x200 0x20>; + interrupts = ; + clocks = <&clkc CLKID_PERIPH>; + + /* + * the arm_global_timer driver currently does not handle clock + * rate changes. Keep it disabled for now. + */ + status = "disabled"; + }; + timer@600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x600 0x20>; From patchwork Fri Nov 23 19:53:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 10696339 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5C1855A4 for ; Fri, 23 Nov 2018 19:54:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4AFB4286DF for ; Fri, 23 Nov 2018 19:54:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3E7CE2BF0D; Fri, 23 Nov 2018 19:54:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E8C08286DF for ; Fri, 23 Nov 2018 19:54:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=8dryhG81fgacgHIpkqRZ2BJSNX8bXrPc7tgb2n51v2w=; b=ZdYtxFdLaGVdZE u/BRZQwwkzJkLCQHlR2jsIAV8RD1gkhmutQpz6Lw39Kq1miPmIPvqHYzPPq3jKnNkqA/xp2lWeCSi AhaBsWsfT3U55TE5cyrKB0iQDTuK0jARR3WXKX2U/BWErYvkojM/ZBgQ+DZtWvOpbC7vw1p6bvdVm hv1PBU+mDIx7+uOQrr4P0+HoPBC2mDRRpIYYxqXmd0eEz9ljqySF5s5qZit44NhfTBBjphEpnhuPf QBId8kRmU0X0MzZaSInfa4bR9S3EKtmJhGA/EcZHXAyVGGlitNrViNV3Rfi8FFEE7oZ2rpf0nwhVy 3es/eCcYWbCvYWNqK9oA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gQHX4-00005q-Hq; Fri, 23 Nov 2018 19:54:30 +0000 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gQHWH-0007eA-QY; Fri, 23 Nov 2018 19:53:45 +0000 Received: by mail-wr1-x444.google.com with SMTP id r10so13323028wrs.10; Fri, 23 Nov 2018 11:53:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HrHiabzypDdx9sXk/8fCSUY/mMOsDJBAnI+t/Q5NOr4=; b=Ej+/3NqgYL6iugilKeZ6Fxa/3llufEJG0Vo7RoAS8oiyiiZgNi4/WzAvt9uvp/B8oW D0fqd5SH8FwvgbUbOLfEbbqwekCPR98rdtwAuk6KT3VPVxmhb//Sm2+nR7QSZGJGQPQ+ RTEW/BiVNn8L90xVaIDwGCJcx/g/WYZxoDucIf0Pr0fZUIJuE5Qc++mII0051jGS9IUF tqIaJot+ETjObqwUr17KpH1ZhaWlO0xBjT8p74Jt3oMACzKEF1nS7NIEELd1kR71h+ok BFWGjqWGJatJ9hJEqcH89yU1YvHOZNEfEWBR3IFka/aw9EYVOp9BMYfYoN/AuwHUqveC +mZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HrHiabzypDdx9sXk/8fCSUY/mMOsDJBAnI+t/Q5NOr4=; b=sOc10FNvAYug+yQiNMIv4i57dyW28jWw3qIaIBvmAl78Petdc+Ff4hhfADSDXguBU1 hts/2edOHp9FyeF2f3nlJrptUUAuaTri+x2ZK25tQgu2ydegUEqujTF4q7B7TyhN1CPP KjhxUzto+XCKdQdH3avuIReks0UM2ekYnpkf04oVhtJHiwvhVBpCE69OtxMQrQFbt4re UyM0yaDlHlQbBazzjOn4NGZ6cQLhZTYIAS1sKPAzRLpizQwJL/zYE38rcRIBlSpPUKka DPf5WlXo9uBhByE5g8K8l798PXubHHieSIg0MxUikdknnFIcURXDhy0LmNdpc8rxFDJk f4hg== X-Gm-Message-State: AA+aEWap/k2qk7RGTsj8WpnI1Ju56d1JNHwvcFN+KzrcAqCUleorroKI wDid87yFvqjdzNGFwqgDnhk= X-Google-Smtp-Source: AFSGD/UlnQrPsB5Ujyi8MQoIsaH/g/I5gwf206RcLXExa2vxtpmhmi4D+pHqfQGRV2c9V5MDmCbpjQ== X-Received: by 2002:a5d:56d2:: with SMTP id m18mr16323404wrw.113.1543002810075; Fri, 23 Nov 2018 11:53:30 -0800 (PST) Received: from blackbox.darklights.net (p200300DCD732F500597D16A631573221.dip0.t-ipconnect.de. [2003:dc:d732:f500:597d:16a6:3157:3221]) by smtp.googlemail.com with ESMTPSA id g198sm11495337wmd.23.2018.11.23.11.53.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 11:53:29 -0800 (PST) From: Martin Blumenstingl To: carlo@caione.org, khilman@baylibre.com, linux-amlogic@lists.infradead.org Subject: [PATCH 5/6] ARM: dts: meson8b: add the ARM TWD timer Date: Fri, 23 Nov 2018 20:53:10 +0100 Message-Id: <20181123195311.4578-6-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> References: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181123_115342_345467_9C7665F4 X-CRM114-Status: GOOD ( 10.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Meson8B SoC is using four ARM Cortex-A5 cores which come with a "TWD" (Timer-Watchdog) based timer. This adds support for the ARM TWD Timer on this SoC. Suggested-by: Carlo Caione [ rebased patch from Carlo, use IRQ_TYPE_EDGE_RISING instead of IRQ_TYPE_LEVEL_LOW to prevent "GIC: PPI13 is secure or misconfigured" message during boot, use pre-processor macros to specify the IRQ, added the correct clock, dropped TWD watchdog node since there's no driver for it anymore ] Signed-off-by: Martin Blumenstingl --- arch/arm/boot/dts/meson8b.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 6b097ab8637f..a3a5649e32fa 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -349,6 +349,13 @@ compatible = "arm,cortex-a5-scu"; reg = <0x0 0x100>; }; + + timer@600 { + compatible = "arm,cortex-a5-twd-timer"; + reg = <0x600 0x20>; + interrupts = ; + clocks = <&clkc CLKID_PERIPH>; + }; }; &pwm_ab { From patchwork Fri Nov 23 19:53:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Blumenstingl X-Patchwork-Id: 10696341 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 71BC013AD for ; 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[2003:dc:d732:f500:597d:16a6:3157:3221]) by smtp.googlemail.com with ESMTPSA id g198sm11495337wmd.23.2018.11.23.11.53.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 11:53:30 -0800 (PST) From: Martin Blumenstingl To: carlo@caione.org, khilman@baylibre.com, linux-amlogic@lists.infradead.org Subject: [PATCH 6/6] ARM: dts: meson8b: add the Cortex-A5 global timer Date: Fri, 23 Nov 2018 20:53:11 +0100 Message-Id: <20181123195311.4578-7-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> References: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181123_115343_295959_21A2E16D X-CRM114-Status: GOOD ( 11.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The Meson8b SoC is using four Cortex-A5 cores. These come with an ARM global timer. This adds the Cortex-A5 global timer but keeps it disabled for now. The timer is clocked by the "PERIPH" clock whose rate can change during runtime (when changing the frequency of the CPU clock). Unfortunately the arm_global_timer driver does not handle changes to the clock rate yet. Signed-off-by: Martin Blumenstingl --- arch/arm/boot/dts/meson8b.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index a3a5649e32fa..a38d187d3d6e 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -350,6 +350,19 @@ reg = <0x0 0x100>; }; + timer@200 { + compatible = "arm,cortex-a5-global-timer"; + reg = <0x200 0x20>; + interrupts = ; + clocks = <&clkc CLKID_PERIPH>; + + /* + * the arm_global_timer driver currently does not handle clock + * rate changes. Keep it disabled for now. + */ + status = "disabled"; + }; + timer@600 { compatible = "arm,cortex-a5-twd-timer"; reg = <0x600 0x20>;