From patchwork Fri May 14 23:22:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 12259267 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0AC03C433ED for ; Fri, 14 May 2021 23:19:46 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B4F1F611CE for ; Fri, 14 May 2021 23:19:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B4F1F611CE Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 36E7D6F4B0; Fri, 14 May 2021 23:19:45 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7D9146F4B0 for ; Fri, 14 May 2021 23:19:44 +0000 (UTC) IronPort-SDR: W/QyLXXW8SuYDKBV8FMKALXEqKgqwZKInFSa//DMpaw6UadRbM0OFWd7MNJs/aQxzzsCw7KtQD 6FRMCSAirB+w== X-IronPort-AV: E=McAfee;i="6200,9189,9984"; a="199938030" X-IronPort-AV: E=Sophos;i="5.82,300,1613462400"; d="scan'208";a="199938030" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2021 16:19:43 -0700 IronPort-SDR: mTj0sVSny+id9SiMgXtwhcAN5BbrYs9zVnNo+cz1VkT3knaSpo3ajXXr15auksoR49crjHd3ZK KBimoqmrZLVQ== X-IronPort-AV: E=Sophos;i="5.82,300,1613462400"; d="scan'208";a="627453929" Received: from rmjoslin-mobl.amr.corp.intel.com (HELO josouza-mobl2.intel.com) ([10.254.1.40]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2021 16:19:41 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 14 May 2021 16:22:44 -0700 Message-Id: <20210514232247.144542-1-jose.souza@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 1/4] drm/i915/display: Fix fastsets involving PSR X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Commit 78b772e1a01f ("drm/i915/display: Fill PSR state during hardware configuration read out") is not allowing fastsets to happen when PSR states changes but PSR is a feature that can be enabled and disabled during fastsets. So here moving the PSR pipe conf checks to a block that is only executed when checking if HW state matches with requested state, not during the phase where it checks if fastset is possible or not. There still a state mismatch not allowing fastsets between states turning off or on PSR because of crtc_state->infoframes.enable BIT(DP_SDP_VSC) but at least for now it will allow a fastset between PSR1 <-> PSR2, that is a case heavilly used by CI due to pipe CRC not work with PSR2, but the remaning issue will be fixed in a future patch. Cc: Gwan-gyeong Mun Cc: Radhakrishna Sripada Reported-by: Ville Syrjälä Fixes: 78b772e1a01f ("drm/i915/display: Fill PSR state during hardware configuration read out") Signed-off-by: José Roberto de Souza Reviewed-by: Gwan-gyeong Mun --- drivers/gpu/drm/i915/display/intel_display.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 0c2b194006f8..51f499271cc8 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -8548,6 +8548,11 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, bp_gamma = intel_color_get_gamma_bit_precision(pipe_config); if (bp_gamma) PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, hw.gamma_lut, bp_gamma); + + PIPE_CONF_CHECK_BOOL(has_psr); + PIPE_CONF_CHECK_BOOL(has_psr2); + PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch); + PIPE_CONF_CHECK_I(dc3co_exitline); } PIPE_CONF_CHECK_BOOL(double_wide); @@ -8631,11 +8636,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_I(vrr.flipline); PIPE_CONF_CHECK_I(vrr.pipeline_full); - PIPE_CONF_CHECK_BOOL(has_psr); - PIPE_CONF_CHECK_BOOL(has_psr2); - PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch); - PIPE_CONF_CHECK_I(dc3co_exitline); - #undef PIPE_CONF_CHECK_X #undef PIPE_CONF_CHECK_I #undef PIPE_CONF_CHECK_BOOL From patchwork Fri May 14 23:22:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 12259271 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37B7DC43460 for ; Fri, 14 May 2021 23:19:49 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F0BE0613DA for ; Fri, 14 May 2021 23:19:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F0BE0613DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 81CF26F4B3; Fri, 14 May 2021 23:19:48 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id B4E6D6F4B1 for ; Fri, 14 May 2021 23:19:44 +0000 (UTC) IronPort-SDR: pEIVTh2bGjbPFtdMq4qQhYaOQlcTYi2TxD20eK1i07bgqXXP4V+eu5inDpyvy3OqwWgzk/i/qo bz5N4qUq2P+Q== X-IronPort-AV: E=McAfee;i="6200,9189,9984"; a="199938032" X-IronPort-AV: E=Sophos;i="5.82,300,1613462400"; d="scan'208";a="199938032" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2021 16:19:43 -0700 IronPort-SDR: 0DjfNuyjyGKSL8bN7CumVztX8nQ+tUaTDqJSFrBXQhByJdW2PGsM27tY8gNMqbv6N2ic+zkk56 rBO4JlZU270g== X-IronPort-AV: E=Sophos;i="5.82,300,1613462400"; d="scan'208";a="627453933" Received: from rmjoslin-mobl.amr.corp.intel.com (HELO josouza-mobl2.intel.com) ([10.254.1.40]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2021 16:19:41 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 14 May 2021 16:22:45 -0700 Message-Id: <20210514232247.144542-2-jose.souza@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210514232247.144542-1-jose.souza@intel.com> References: <20210514232247.144542-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 2/4] drm/i915/display: Allow fastsets when DP_SDP_VSC infoframe do not match with PSR enabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" When PSR is enabled it handles DP_SDP_VSC, changing revision and all the other fields as necessary. It can also enabled and disable this SDP as needed without a full modeset. So here masking DP_SDP_VSC bit when previous and future state PSR enabled, it will still be checked when comparing the asked state to what was programmed to hardware. Cc: Gwan-gyeong Mun Cc: Radhakrishna Sripada Reported-by: Ville Syrjälä Fixes: 78b772e1a01f ("drm/i915/display: Fill PSR state during hardware configuration read out" Signed-off-by: José Roberto de Souza Reviewed-by: Gwan-gyeong Mun --- drivers/gpu/drm/i915/display/intel_display.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 51f499271cc8..ebac1bd5cfe5 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -8260,6 +8260,16 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, } \ } while (0) +#define PIPE_CONF_CHECK_X_WITH_MASK(name, mask) do { \ + if ((current_config->name & (mask)) != (pipe_config->name & (mask))) { \ + pipe_config_mismatch(fastset, crtc, __stringify(name), \ + "(expected 0x%08x, found 0x%08x)", \ + current_config->name & (mask), \ + pipe_config->name & (mask)); \ + ret = false; \ + } \ +} while (0) + #define PIPE_CONF_CHECK_I(name) do { \ if (current_config->name != pipe_config->name) { \ pipe_config_mismatch(fastset, crtc, __stringify(name), \ @@ -8606,7 +8616,12 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_I(min_voltage_level); } - PIPE_CONF_CHECK_X(infoframes.enable); + if (fastset && (current_config->has_psr || pipe_config->has_psr)) + PIPE_CONF_CHECK_X_WITH_MASK(infoframes.enable, + ~intel_hdmi_infoframe_enable(DP_SDP_VSC)); + else + PIPE_CONF_CHECK_X(infoframes.enable); + PIPE_CONF_CHECK_X(infoframes.gcp); PIPE_CONF_CHECK_INFOFRAME(avi); PIPE_CONF_CHECK_INFOFRAME(spd); From patchwork Fri May 14 23:22:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 12259269 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F117C433B4 for ; Fri, 14 May 2021 23:19:47 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4C04F613DA for ; Fri, 14 May 2021 23:19:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4C04F613DA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CE0BE6F4B1; Fri, 14 May 2021 23:19:46 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 18A966F4B1 for ; Fri, 14 May 2021 23:19:45 +0000 (UTC) IronPort-SDR: EY1Z1QBEEwtpgx0Ouhw2PxgKIiMVLkcUVh7g5VDBe4rpY9o7d0T+TwDRU2m3Yq5brT+KfMFvC9 6KKmtIq7dT3Q== X-IronPort-AV: E=McAfee;i="6200,9189,9984"; a="199938033" X-IronPort-AV: E=Sophos;i="5.82,300,1613462400"; d="scan'208";a="199938033" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2021 16:19:44 -0700 IronPort-SDR: OjUxlz7tvIYcjY33iEwmYBB8QvJfjgL4KjgLJIUEj2llE09RYbSsHzzH+cyrHnIW+0sBPgoXsT 4IXMYOycVNzQ== X-IronPort-AV: E=Sophos;i="5.82,300,1613462400"; d="scan'208";a="627453936" Received: from rmjoslin-mobl.amr.corp.intel.com (HELO josouza-mobl2.intel.com) ([10.254.1.40]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2021 16:19:42 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 14 May 2021 16:22:46 -0700 Message-Id: <20210514232247.144542-3-jose.souza@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210514232247.144542-1-jose.souza@intel.com> References: <20210514232247.144542-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 3/4] drm/i915/display: Nuke has_infoframe X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This was only reduntant information has_hdmi_sink can do the same job. set_infoframes() hooks will call intel_write_infoframe() for the supported infoframes types and it will only be enabled if given type is set in crtc_state->infoframes.enable. While at it also fixing the style of dig_port->set_infoframes() calls. Cc: Ville Syrjälä Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/g4x_hdmi.c | 22 ++++++------------- drivers/gpu/drm/i915/display/intel_ddi.c | 17 +++++--------- drivers/gpu/drm/i915/display/intel_display.c | 6 ++--- .../drm/i915/display/intel_display_types.h | 3 --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 ++-- drivers/gpu/drm/i915/display/intel_hdmi.c | 13 +++++------ 6 files changed, 22 insertions(+), 43 deletions(-) diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c index be352e9f0afc..f35db96e6239 100644 --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c @@ -105,9 +105,6 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder, pipe_config->infoframes.enable |= intel_hdmi_infoframes_enabled(encoder, pipe_config); - if (pipe_config->infoframes.enable) - pipe_config->has_infoframe = true; - if (tmp & HDMI_AUDIO_ENABLE) pipe_config->has_audio = true; @@ -343,9 +340,7 @@ static void intel_disable_hdmi(struct intel_atomic_state *state, intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true); } - dig_port->set_infoframes(encoder, - false, - old_crtc_state, old_conn_state); + dig_port->set_infoframes(encoder, false, old_crtc_state, old_conn_state); intel_dp_dual_mode_set_tmds_output(intel_hdmi, false); } @@ -390,9 +385,8 @@ static void intel_hdmi_pre_enable(struct intel_atomic_state *state, intel_hdmi_prepare(encoder, pipe_config); - dig_port->set_infoframes(encoder, - pipe_config->has_infoframe, - pipe_config, conn_state); + dig_port->set_infoframes(encoder, pipe_config->has_hdmi_sink, + pipe_config, conn_state); } static void vlv_hdmi_pre_enable(struct intel_atomic_state *state, @@ -410,9 +404,8 @@ static void vlv_hdmi_pre_enable(struct intel_atomic_state *state, 0x2b245f5f, 0x00002000, 0x5578b83a, 0x2b247878); - dig_port->set_infoframes(encoder, - pipe_config->has_infoframe, - pipe_config, conn_state); + dig_port->set_infoframes(encoder, pipe_config->has_hdmi_sink, + pipe_config, conn_state); g4x_enable_hdmi(state, encoder, pipe_config, conn_state); @@ -487,9 +480,8 @@ static void chv_hdmi_pre_enable(struct intel_atomic_state *state, /* Use 800mV-0dB */ chv_set_phy_signal_level(encoder, pipe_config, 128, 102, false); - dig_port->set_infoframes(encoder, - pipe_config->has_infoframe, - pipe_config, conn_state); + dig_port->set_infoframes(encoder, pipe_config->has_hdmi_sink, + pipe_config, conn_state); g4x_enable_hdmi(state, encoder, pipe_config, conn_state); diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index b7a2fce684c9..5bc5528f3091 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2722,9 +2722,8 @@ static void intel_ddi_pre_enable_hdmi(struct intel_atomic_state *state, intel_ddi_enable_pipe_clock(encoder, crtc_state); - dig_port->set_infoframes(encoder, - crtc_state->has_infoframe, - crtc_state, conn_state); + dig_port->set_infoframes(encoder, crtc_state->has_hdmi_sink, crtc_state, + conn_state); } static void intel_ddi_pre_enable(struct intel_atomic_state *state, @@ -2765,9 +2764,8 @@ static void intel_ddi_pre_enable(struct intel_atomic_state *state, /* FIXME precompute everything properly */ /* FIXME how do we turn infoframes off again? */ if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink) - dig_port->set_infoframes(encoder, - crtc_state->has_infoframe, - crtc_state, conn_state); + dig_port->set_infoframes(encoder, true, crtc_state, + conn_state); } } @@ -2813,8 +2811,8 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state, enum phy phy = intel_port_to_phy(dev_priv, encoder->port); if (!is_mst) - intel_dp_set_infoframes(encoder, false, - old_crtc_state, old_conn_state); + intel_dp_set_infoframes(encoder, false, old_crtc_state, + old_conn_state); /* * Power down sink before disabling the port, otherwise we end @@ -3569,9 +3567,6 @@ static void intel_ddi_read_func_ctl(struct intel_encoder *encoder, pipe_config->infoframes.enable |= intel_hdmi_infoframes_enabled(encoder, pipe_config); - if (pipe_config->infoframes.enable) - pipe_config->has_infoframe = true; - if (temp & TRANS_DDI_HDMI_SCRAMBLING) pipe_config->hdmi_scrambling = true; if (temp & TRANS_DDI_HIGH_TMDS_CHAR_RATE) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index ebac1bd5cfe5..5d68b253bdfe 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7594,9 +7594,8 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config, } drm_dbg_kms(&dev_priv->drm, - "audio: %i, infoframes: %i, infoframes enabled: 0x%x\n", - pipe_config->has_audio, pipe_config->has_infoframe, - pipe_config->infoframes.enable); + "audio: %i, infoframes enabled: 0x%x\n", + pipe_config->has_audio, pipe_config->infoframes.enable); if (pipe_config->infoframes.enable & intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GENERAL_CONTROL)) @@ -8508,7 +8507,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_BOOL(hdmi_scrambling); PIPE_CONF_CHECK_BOOL(hdmi_high_tmds_clock_ratio); - PIPE_CONF_CHECK_BOOL(has_infoframe); /* FIXME do the readout properly and get rid of this quirk */ if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_BIGJOINER_SLAVE)) PIPE_CONF_CHECK_BOOL(fec_enable); diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 9c0adfc60c6f..669c5d8a2131 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -952,9 +952,6 @@ struct intel_crtc_state { * between pch encoders and cpu encoders. */ bool has_pch_encoder; - /* Are we sending infoframes on the attached port */ - bool has_infoframe; - /* CPU Transcoder for the pipe. Currently this can only differ from the * pipe on Haswell and later (where we have a special eDP transcoder) * and Broxton (where we have special DSI transcoders). */ diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 332d2f9fda5c..1eb54f8ed51a 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -435,8 +435,8 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state, * the transcoder clock select is set to none. */ if (last_mst_stream) - intel_dp_set_infoframes(&dig_port->base, false, - old_crtc_state, NULL); + intel_dp_set_infoframes(&dig_port->base, false, old_crtc_state, + old_conn_state); /* * From TGL spec: "If multi-stream slave transcoder: Configure * Transcoder Clock Select to direct no clock to the transcoder" diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 4a1b2d863b0c..4b970587067d 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -712,7 +712,7 @@ intel_hdmi_compute_avi_infoframe(struct intel_encoder *encoder, struct drm_connector *connector = conn_state->connector; int ret; - if (!crtc_state->has_infoframe) + if (!crtc_state->has_hdmi_sink) return true; crtc_state->infoframes.enable |= @@ -766,7 +766,7 @@ intel_hdmi_compute_spd_infoframe(struct intel_encoder *encoder, struct hdmi_spd_infoframe *frame = &crtc_state->infoframes.spd.spd; int ret; - if (!crtc_state->has_infoframe) + if (!crtc_state->has_hdmi_sink) return true; crtc_state->infoframes.enable |= @@ -796,7 +796,7 @@ intel_hdmi_compute_hdmi_infoframe(struct intel_encoder *encoder, &conn_state->connector->display_info; int ret; - if (!crtc_state->has_infoframe || !info->has_hdmi_infoframe) + if (!crtc_state->has_hdmi_sink || !info->has_hdmi_infoframe) return true; crtc_state->infoframes.enable |= @@ -827,7 +827,7 @@ intel_hdmi_compute_drm_infoframe(struct intel_encoder *encoder, if (DISPLAY_VER(dev_priv) < 10) return true; - if (!crtc_state->has_infoframe) + if (!crtc_state->has_hdmi_sink) return true; if (!conn_state->hdr_output_metadata) @@ -1018,7 +1018,7 @@ static void intel_hdmi_compute_gcp_infoframe(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - if (IS_G4X(dev_priv) || !crtc_state->has_infoframe) + if (IS_G4X(dev_priv) || !crtc_state->has_hdmi_sink) return; crtc_state->infoframes.enable |= @@ -2172,9 +2172,6 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder, pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_hdmi, conn_state); - if (pipe_config->has_hdmi_sink) - pipe_config->has_infoframe = true; - if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK) pipe_config->pixel_multiplier = 2; From patchwork Fri May 14 23:22:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 12259273 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AAE64C433B4 for ; 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a="199938034" X-IronPort-AV: E=Sophos;i="5.82,300,1613462400"; d="scan'208";a="199938034" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2021 16:19:44 -0700 IronPort-SDR: UdtjGJnlicOY6d2Be7Vsnw+sNcd1NYjCi14zTYLQE+ACoZhDzLvoUTOWFDsEFmfSim2DEK9Ki8 HFlDvMR8QxYA== X-IronPort-AV: E=Sophos;i="5.82,300,1613462400"; d="scan'208";a="627453940" Received: from rmjoslin-mobl.amr.corp.intel.com (HELO josouza-mobl2.intel.com) ([10.254.1.40]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2021 16:19:42 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 14 May 2021 16:22:47 -0700 Message-Id: <20210514232247.144542-4-jose.souza@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210514232247.144542-1-jose.souza@intel.com> References: <20210514232247.144542-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 4/4] drm/i915/display: Drop FIXME about turn off infoframes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" intel_dp_set_infoframes() call in intel_ddi_post_disable_dp() will take care to disable all enabled infoframes. Cc: Ville Syrjälä Signed-off-by: José Roberto de Souza Reviewed-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/display/intel_ddi.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 5bc5528f3091..d3bc5a1a936a 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2762,7 +2762,6 @@ static void intel_ddi_pre_enable(struct intel_atomic_state *state, conn_state); /* FIXME precompute everything properly */ - /* FIXME how do we turn infoframes off again? */ if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink) dig_port->set_infoframes(encoder, true, crtc_state, conn_state);