From patchwork Sun May 16 21:18:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Kettenis X-Patchwork-Id: 12260643 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-23.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2AF08C433B4 for ; Sun, 16 May 2021 21:26:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 02DD6610FC for ; Sun, 16 May 2021 21:26:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230252AbhEPV1n (ORCPT ); Sun, 16 May 2021 17:27:43 -0400 Received: from lb1-smtp-cloud8.xs4all.net ([194.109.24.21]:57347 "EHLO lb1-smtp-cloud8.xs4all.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229600AbhEPV1m (ORCPT ); Sun, 16 May 2021 17:27:42 -0400 Received: from copland.sibelius.xs4all.nl ([83.163.83.176]) by smtp-cloud8.xs4all.net with ESMTP id iOA9lJWwKWkKbiOAJlkPrN; Sun, 16 May 2021 23:19:11 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=xs4all.nl; s=s2; t=1621199951; bh=q2RC92/hLaydTt0okUIaSkxR8QBeVY8t6TyQtHRgv44=; h=From:To:Subject:Date:Message-Id:MIME-Version:From:Subject; b=tQyV6JXw5L3Mr/9g2paWsUvCsIaUyENSlWfzYW5LXkpr+vmrUSc4Ol44CkSJCFrrx P2RRhH3MWgUhLQSTvTWVvVH1RvIJfmcnR3WaBgyLVPwBEu9xDZi/BfiJuFU29CLhA+ SruAHWzW75nX5ZDlT1cjYx7mf6NbP9vpSaEHeGTsV2rIAgTrvWpLDKQR4bzjS8j0ZA K0tOx6brcx60Phx74h8r1fnwAXdj3kSyUNpemFvncc8fv7eWyZQsC/R45LpjJWlZ33 wcEgU/tSgU0drmdq2wSXmXPaWNLrpkhLx1dVWSvimUm8xwBSGXEiUhU/1eMwqvpSC3 xr2HZ18AUuikQ== From: Mark Kettenis To: devicetree@vger.kernel.org Cc: maz@kernel.org, arnd@arndb.de, Mark Kettenis , Hector Martin , Bjorn Helgaas , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: pci: Add DT bindings for apple,pcie Date: Sun, 16 May 2021 23:18:46 +0200 Message-Id: <20210516211851.74921-2-mark.kettenis@xs4all.nl> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516211851.74921-1-mark.kettenis@xs4all.nl> References: <20210516211851.74921-1-mark.kettenis@xs4all.nl> MIME-Version: 1.0 X-CMAE-Envelope: MS4xfJvxWUUCHehoXYbOzuVATHDHqh8QmGvFtp9FrCC7AWfboWK8mWyaDIsNx1ZhbrOwX3mHxMHf56sutw1oXpqEkwSvMnAyLcPjfFiX08HXD3Kr+a6BiPpC /JRPskO7qrAPZuboIAGU+D677hmGtqgneVsQnpoNh2AoEDWMFCRRtchckZ1oa5dw5RjT1fLHSW1Q1fHxWpPxrbTsvvfe+RmKHPavMiDhqJHyv2QfqDiJuWQi Dxk4s9vxpfulkho4yAtwTGvvQrU93D4uAkvd7lPIcAH/8ou5vTYLrQOp/INzxEN7t5KEOAJNuuk50EIAqRHymi8pv2YLzQ9YYNjr3GQgldXSPnGWzNtaty8v dYxTw1IlFqDupUMltip/NhXXQgt7uxd+nGRQUo1UmgZrbPzooWrnLEPeiWeDEabzNYheAE5gwx+0laglXtVoLlYAOTOq6Iw640D8BaRusdf/nAdwPLRCMD9V CdwJpSb81hVFQJvNHFx+DHobgvAQdMQxz6YE3kvk+2B9+26UkotcIT1wnpg= Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Mark Kettenis The Apple PCIe host controller is a PCIe host controller with multiple root ports present in Apple ARM SoC platforms, including various iPhone and iPad devices and the "Apple Silicon" Macs. Signed-off-by: Mark Kettenis --- .../devicetree/bindings/pci/apple,pcie.yaml | 150 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 151 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/apple,pcie.yaml diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml new file mode 100644 index 000000000000..af3c9f64e380 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml @@ -0,0 +1,150 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/apple,pcie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple PCIe host controller + +maintainers: + - Mark Kettenis + +description: | + The Apple PCIe host controller is a PCIe host controller with + multiple root ports present in Apple ARM SoC platforms, including + various iPhone and iPad devices and the "Apple Silicon" Macs. + +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + +properties: + compatible: + items: + - const: apple,t8103-pcie + - const: apple,pcie + + reg: + minItems: 4 + maxItems: 6 + + reg-names: + minItems: 4 + maxItems: 7 + items: + - const: ecam + - const: rc + - const: phy + - const: port0 + - const: port1 + - const: port2 + + ranges: + minItems: 2 + maxItems: 2 + + interrupts: + minItems: 3 + maxItems: 3 + + msi-ranges: + description: + A list of pairs , where "intid" is the first + interrupt number that can be used as an MSI, and "span" the size + of that range. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + minItems: 2 + maxItems: 2 + +required: + - compatible + - reg + - reg-names + - bus-range + - interrupts + - msi-controller + - msi-parent + - msi-ranges + +unevaluatedProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + pcie0: pcie@690000000 { + compatible = "apple,t8103-pcie", "apple,pcie"; + device_type = "pci"; + + reg = <0x6 0x90000000 0x0 0x1000000>, + <0x6 0x80000000 0x0 0x4000>, + <0x6 0x8c000000 0x0 0x4000>, + <0x6 0x81000000 0x0 0x8000>, + <0x6 0x82000000 0x0 0x8000>, + <0x6 0x83000000 0x0 0x8000>; + reg-names = "ecam", "rc", "phy", "port0", "port1", "port2"; + + interrupt-parent = <&aic>; + interrupts = , + , + ; + + msi-controller; + msi-parent = <&pcie0>; + msi-ranges = <704 32>; + + iommu-map = <0x0 &dart0 0x8000 0x100>, + <0x100 &dart0 0x100 0x100>, + <0x200 &dart1 0x200 0x100>, + <0x300 &dart2 0x300 0x100>; + iommu-map-mask = <0xff00>; + + bus-range = <0 7>; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>, + <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>; + + clocks = <&pcie_core_clk>, <&pcie_aux_clk>, <&pcie_ref_clk>; + pinctrl-0 = <&pcie_pins>; + pinctrl-names = "default"; + + pci@0,0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + reset-gpios = <&pinctrl_ap 152 0>; + max-link-speed = <2>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + + pci@1,0 { + device_type = "pci"; + reg = <0x800 0x0 0x0 0x0 0x0>; + reset-gpios = <&pinctrl_ap 153 0>; + max-link-speed = <2>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + + pci@2,0 { + device_type = "pci"; + reg = <0x1000 0x0 0x0 0x0 0x0>; + reset-gpios = <&pinctrl_ap 33 0>; + max-link-speed = <1>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 7327c9b778f1..789d79315485 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1654,6 +1654,7 @@ C: irc://chat.freenode.net/asahi-dev T: git https://github.com/AsahiLinux/linux.git F: Documentation/devicetree/bindings/arm/apple.yaml F: Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml +F: Documentation/devicetree/bindings/pci/apple,pcie.yaml F: Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml F: arch/arm64/boot/dts/apple/ F: drivers/irqchip/irq-apple-aic.c From patchwork Sun May 16 21:18:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Kettenis X-Patchwork-Id: 12260641 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7EF21C433ED for ; Sun, 16 May 2021 21:26:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4D9F56115C for ; Sun, 16 May 2021 21:26:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229600AbhEPV1n (ORCPT ); Sun, 16 May 2021 17:27:43 -0400 Received: from lb2-smtp-cloud8.xs4all.net ([194.109.24.25]:52865 "EHLO lb2-smtp-cloud8.xs4all.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230158AbhEPV1n (ORCPT ); Sun, 16 May 2021 17:27:43 -0400 Received: from copland.sibelius.xs4all.nl ([83.163.83.176]) by smtp-cloud8.xs4all.net with ESMTP id iOA9lJWwKWkKbiOAPlkPrx; Sun, 16 May 2021 23:19:17 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=xs4all.nl; s=s2; t=1621199957; bh=HOikwmeJWakjyZ7lU+im9UqH19VkGuK5u0ycvEvKpYg=; h=From:To:Subject:Date:Message-Id:MIME-Version:From:Subject; b=YQDeZVcVf6d38kGbeZ0705ZtiQkW7XYyau0Y9RpL3drHc9fwEbfB1bDVARECJbvA8 Z9WHsTSGEUQ+cxLWfOzyE8r4qrMLSiZIy0+g4vbccART7rB11EZ3VNJDm/IM+A61SW GP+Mad4JxMH98+PAMKCScfziBg7C/rayfZpPbyW1AULWKg6kYx8JTycpAX7dBkPU2A hxfTXeO0J2kychGYdfky4xNvmwIsX3eHP3I4Ej0SoU0MTAi5oNap93vNqDVEKmYJld Vz6hj4ULV6p6Riig6uALO+H+RhHTwpnPKLiM/7g38Jpez+LArbX8OgyE1MObJvGoYD hpcjoQdYJzZbQ== From: Mark Kettenis To: devicetree@vger.kernel.org Cc: maz@kernel.org, arnd@arndb.de, Mark Kettenis , Hector Martin , Bjorn Helgaas , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] arm64: apple: Add PCIe node Date: Sun, 16 May 2021 23:18:47 +0200 Message-Id: <20210516211851.74921-3-mark.kettenis@xs4all.nl> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516211851.74921-1-mark.kettenis@xs4all.nl> References: <20210516211851.74921-1-mark.kettenis@xs4all.nl> MIME-Version: 1.0 X-CMAE-Envelope: MS4xfFZK+xFYmI4iu+AvuNjdTrW1Fj61/71SG98CoULY7GKFiYRox6X/GCgTJdRU/rHlsuQvOAxBmauzAJjKYWoBowS1cXcCyTDlrNr4ipOS/AhaQO3jI47o DKx3dgubfDSJZ39muL/J5dhiUDbbfD15VEcp2VYyIkbOUqg9lhPzw/eSpDeCJHEw/J/NPSn9tZEjcAx9smwN9Jwq/71hoHgJcL9L8vLZWIUzwhEpoYQmJ6Zg SD3IFVLRLttF0UvFe8a3VHZwxzaD3azLQaBtIcTrKPbxTB0gz6HXW2FfQWe6xi4RlKiVSn6gvdit9Cd5ysyzAx7pUZBOY6kmqKyPMyTDeid/HngOG41m6iL/ 43092UZGvKmh93K36abWvEVU5P6HOtQXs58d5hx/JhXwJYNeXRJWEN6g0LYrGU4592/LB9V2xiIMJDObeMoRUXkIjeQYL6xk/B2o3oixyEADP0XVvT/HgoAQ KQbSUMMYwkx2+l0kY4DA1uK7LHMahVlozumbRgZmJBNucP3VELyz8xnHtTI= Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Mark Kettenis Add node corresponding to the apcie,t8103 node in the Apple device tree for the Mac mini (M1, 2020). Clock references and DART (IOMMU) references are left out at the moment and will be added once the appropriate bindings have been settled upon. Signed-off-by: Mark Kettenis --- arch/arm64/boot/dts/apple/t8103.dtsi | 64 ++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi index 503a76fc30e6..102947935d63 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -214,5 +214,69 @@ pinctrl_smc: pinctrl@23e820000 { , ; }; + + pcie0: pcie@690000000 { + compatible = "apple,t8103-pcie", "apple,pcie"; + device_type = "pci"; + + reg = <0x6 0x90000000 0x0 0x1000000>, + <0x6 0x80000000 0x0 0x4000>, + <0x6 0x8c000000 0x0 0x4000>, + <0x6 0x81000000 0x0 0x8000>, + <0x6 0x82000000 0x0 0x8000>, + <0x6 0x83000000 0x0 0x8000>; + reg-names = "ecam", "rc", "phy", "port0", "port1", "port2"; + + interrupt-parent = <&aic>; + interrupts = , + , + ; + + msi-controller; + msi-parent = <&pcie0>; + msi-ranges = <704 32>; + + bus-range = <0 7>; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>, + <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>; + + pinctrl-0 = <&pcie_pins>; + pinctrl-names = "default"; + + pci@0,0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + reset-gpios = <&pinctrl_ap 152 0>; + max-link-speed = <2>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + + pci@1,0 { + device_type = "pci"; + reg = <0x800 0x0 0x0 0x0 0x0>; + reset-gpios = <&pinctrl_ap 153 0>; + max-link-speed = <2>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + + pci@2,0 { + device_type = "pci"; + reg = <0x1000 0x0 0x0 0x0 0x0>; + reset-gpios = <&pinctrl_ap 33 0>; + max-link-speed = <1>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; }; };