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[73.25.156.94]) by smtp.gmail.com with ESMTPSA id v9sm114698pfn.22.2021.05.19.11.35.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 11:35:09 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Rob Clark , Sumit Semwal , =?utf-8?q?Christian_K=C3=B6nig?= , linux-media@vger.kernel.org (open list:DMA BUFFER SHARING FRAMEWORK), linaro-mm-sig@lists.linaro.org (moderated list:DMA BUFFER SHARING FRAMEWORK), linux-kernel@vger.kernel.org (open list) Subject: [RFC 1/3] dma-fence: Add boost fence op Date: Wed, 19 May 2021 11:38:52 -0700 Message-Id: <20210519183855.1523927-2-robdclark@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210519183855.1523927-1-robdclark@gmail.com> References: <20210519183855.1523927-1-robdclark@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Rob Clark Add a way to hint to the fence signaler that a fence waiter has missed a deadline waiting on the fence. In some cases, missing a vblank can result in lower gpu utilization, when really we want to go in the opposite direction and boost gpu freq. The boost callback gives some feedback to the fence signaler that we are missing deadlines, so it can take this into account in it's freq/ utilization calculations. Signed-off-by: Rob Clark --- include/linux/dma-fence.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h index 9f12efaaa93a..172702521acc 100644 --- a/include/linux/dma-fence.h +++ b/include/linux/dma-fence.h @@ -231,6 +231,17 @@ struct dma_fence_ops { signed long (*wait)(struct dma_fence *fence, bool intr, signed long timeout); + /** + * @boost: + * + * Optional callback, to indicate that a fence waiter missed a deadline. + * This can serve as a signal that (if possible) whatever signals the + * fence should boost it's clocks. + * + * This can be called in any context that can call dma_fence_wait(). + */ + void (*boost)(struct dma_fence *fence); + /** * @release: * @@ -586,6 +597,21 @@ static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr) return ret < 0 ? ret : 0; } +/** + * dma_fence_boost - hint from waiter that it missed a deadline + * + * @fence: the fence that caused the missed deadline + * + * This function gives a hint from a fence waiter that a deadline was + * missed, so that the fence signaler can factor this in to device + * power state decisions + */ +static inline void dma_fence_boost(struct dma_fence *fence) +{ + if (fence->ops->boost) + fence->ops->boost(fence); +} + struct dma_fence *dma_fence_get_stub(void); u64 dma_fence_context_alloc(unsigned num); From patchwork Wed May 19 18:38:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 12268113 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83DA3C433B4 for ; Wed, 19 May 2021 18:35:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5B24A6135A for ; Wed, 19 May 2021 18:35:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231590AbhESSgg (ORCPT ); Wed, 19 May 2021 14:36:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231576AbhESSge (ORCPT ); Wed, 19 May 2021 14:36:34 -0400 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 17255C06175F; Wed, 19 May 2021 11:35:15 -0700 (PDT) Received: by mail-pl1-x630.google.com with SMTP id n8so2327544plf.7; Wed, 19 May 2021 11:35:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=n5uWZIfYNT9NU92iv+57nnURivFj6aDlrNkoAZSXV/w=; b=KOarvd9cHWYKgnPJf9nSyzfOesTFIXD7IGNVJ+du1Z0SHpY0Xm/EXFqN9HQCuRMAQv 2kguO8VQtBzz6vByBahivwR4XUM3q8ulOI8YpSsXjpoEOvnn5Q8Agif1PURmqHLXabsp 7ut0TDH/YxF+ybzk5eNjGyIgsd59xbXVTFbcLLxezlV9PYiC90gA5k4sHMSHYcE/eL71 WDNWal+4Iwi/BnBVwN/Ro2dY2R06U35roeH5Zz9oUvtHgiLl40sNw1Oan98B2QWU9aFW 27b1mG8mnUdeTGBpYRnPwm0j9hU/61yxlpITvDf8+bBkjQqHITe1Egm6dmEBdNCIeVEm 1sag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=n5uWZIfYNT9NU92iv+57nnURivFj6aDlrNkoAZSXV/w=; b=Q1VuU+BjWrGwr4FK5whZQMkjD61v+9J0jZvDqz5ElgV5FKq76OLePsKnVa1Dj/zDjv V1+AH/VsUswyTGI2BSURaWYv+3dlD+mr5wsnzy2iOdlC/Z52ErCj0UZ/g/ty8KV4cSNz V+F4kcOLfeDCJQ3OjbsAFkUxM7gkYwPnMT+YsdxS7cIjxVyEZmF07epNpLGGYaeOZtNo lkFd6bixJDpipb0GhweXS3kSjTBoTyIYgn4erqk2I2UQZLsx8hJrxOfD+d2T7zd7mUDv fEUo9drsXOZvDqAoeC30FjuivzXu60D+A4G0Vp8w7GU43mQ1dMmEhCq1hhKLDQCs7EGe 2f3Q== X-Gm-Message-State: AOAM533E/CSSo/VHcLy4Z2qMYvkCRLv/0IBS+jI6UL/hc2DZs8wSzCbr 0YKXmiAOBhnh+PJPZ694mnU= X-Google-Smtp-Source: ABdhPJx7j2+wCkNK1D1YUAjaIZNBYpRrQkfJ3sHGCatwOmy6egf6QrGebz1yZKbJJVE5Een+NF84FA== X-Received: by 2002:a17:902:8e88:b029:ee:b947:d7df with SMTP id bg8-20020a1709028e88b02900eeb947d7dfmr1029276plb.48.1621449314588; Wed, 19 May 2021 11:35:14 -0700 (PDT) Received: from localhost (c-73-25-156-94.hsd1.or.comcast.net. [73.25.156.94]) by smtp.gmail.com with ESMTPSA id a24sm68148pgv.76.2021.05.19.11.35.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 11:35:13 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Rob Clark , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Sumit Semwal , =?utf-8?q?Christian_K=C3=B6nig?= , linux-kernel@vger.kernel.org (open list), linux-media@vger.kernel.org (open list:DMA BUFFER SHARING FRAMEWORK), linaro-mm-sig@lists.linaro.org (moderated list:DMA BUFFER SHARING FRAMEWORK) Subject: [RFC 3/3] drm/msm: Wire up gpu boost Date: Wed, 19 May 2021 11:38:54 -0700 Message-Id: <20210519183855.1523927-4-robdclark@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210519183855.1523927-1-robdclark@gmail.com> References: <20210519183855.1523927-1-robdclark@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Rob Clark Note, at this point I haven't given a lot of consideration into how much we should boost, and for how long. And perhaps we should only boost at less than 50% utilization? At this point, this is only an example of dma_fence_boost() implementation. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_fence.c | 10 ++++++++++ drivers/gpu/drm/msm/msm_gpu.c | 13 +++++++++++++ drivers/gpu/drm/msm/msm_gpu.h | 2 ++ 3 files changed, 25 insertions(+) diff --git a/drivers/gpu/drm/msm/msm_fence.c b/drivers/gpu/drm/msm/msm_fence.c index cd59a5918038..e58895603726 100644 --- a/drivers/gpu/drm/msm/msm_fence.c +++ b/drivers/gpu/drm/msm/msm_fence.c @@ -8,6 +8,7 @@ #include "msm_drv.h" #include "msm_fence.h" +#include "msm_gpu.h" struct msm_fence_context * @@ -114,10 +115,19 @@ static bool msm_fence_signaled(struct dma_fence *fence) return fence_completed(f->fctx, f->base.seqno); } +static void msm_fence_boost(struct dma_fence *fence) +{ + struct msm_fence *f = to_msm_fence(fence); + struct msm_drm_private *priv = f->fctx->dev->dev_private; + + msm_gpu_boost(priv->gpu); +} + static const struct dma_fence_ops msm_fence_ops = { .get_driver_name = msm_fence_get_driver_name, .get_timeline_name = msm_fence_get_timeline_name, .signaled = msm_fence_signaled, + .boost = msm_fence_boost, }; struct dma_fence * diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 9dd1c58430ab..c90b79116500 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -62,6 +62,10 @@ static int msm_devfreq_get_dev_status(struct device *dev, status->total_time = ktime_us_delta(time, gpu->devfreq.time); gpu->devfreq.time = time; + if (atomic_dec_if_positive(&gpu->devfreq.boost) >= 0) { + status->busy_time = status->total_time; + } + return 0; } @@ -84,6 +88,15 @@ static struct devfreq_dev_profile msm_devfreq_profile = { .get_cur_freq = msm_devfreq_get_cur_freq, }; +void msm_gpu_boost(struct msm_gpu *gpu) +{ + if (!gpu->funcs->gpu_busy) + return; + + /* Add three devfreq polling intervals worth of boost: */ + atomic_add(3, &gpu->devfreq.boost); +} + static void msm_devfreq_init(struct msm_gpu *gpu) { /* We need target support to do devfreq */ diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 18baf935e143..7a082a12d98f 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -150,6 +150,7 @@ struct msm_gpu { struct devfreq *devfreq; u64 busy_cycles; ktime_t time; + atomic_t boost; } devfreq; uint32_t suspend_count; @@ -295,6 +296,7 @@ static inline void gpu_write64(struct msm_gpu *gpu, u32 lo, u32 hi, u64 val) int msm_gpu_pm_suspend(struct msm_gpu *gpu); int msm_gpu_pm_resume(struct msm_gpu *gpu); void msm_gpu_resume_devfreq(struct msm_gpu *gpu); +void msm_gpu_boost(struct msm_gpu *gpu); int msm_gpu_hw_init(struct msm_gpu *gpu);