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[75.142.250.213]) by smtp.gmail.com with ESMTPSA id h10sm2703247qka.26.2021.05.20.11.29.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 May 2021 11:29:34 -0700 (PDT) From: trix@redhat.com To: mdf@kernel.org, hao.wu@intel.com, michal.simek@xilinx.com Cc: linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Tom Rix Subject: [PATCH v2 1/5] fpga: generalize updating the card Date: Thu, 20 May 2021 11:29:30 -0700 Message-Id: <20210520182930.2021923-1-trix@redhat.com> X-Mailer: git-send-email 2.26.3 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix There is a need to update the whole card. An fpga can contain non-fpga components whose firmware needs to be updated at the same time as the fpga rtl images and may need to be handled differently from the existing fpga reconfiguration in the the fpga manager. Move the write_* ops out of fpga_manager_ops and into a new fpga_manager_update_ops struct. Add two update_ops back to fpga_manager_ops, reconfig for the exiting functionality and reimage for the new functionity. Rewire fpga devs to use reconfig ops Signed-off-by: Tom Rix Reported-by: kernel test robot --- drivers/fpga/altera-cvp.c | 8 ++++---- drivers/fpga/altera-pr-ip-core.c | 8 ++++---- drivers/fpga/altera-ps-spi.c | 8 ++++---- drivers/fpga/dfl-fme-mgr.c | 10 +++++----- drivers/fpga/fpga-mgr.c | 23 ++++++++++++----------- drivers/fpga/ice40-spi.c | 8 ++++---- drivers/fpga/machxo2-spi.c | 8 ++++---- drivers/fpga/socfpga-a10.c | 10 +++++----- drivers/fpga/socfpga.c | 8 ++++---- drivers/fpga/stratix10-soc.c | 8 ++++---- drivers/fpga/ts73xx-fpga.c | 8 ++++---- drivers/fpga/xilinx-spi.c | 8 ++++---- drivers/fpga/zynq-fpga.c | 10 +++++----- drivers/fpga/zynqmp-fpga.c | 8 ++++---- include/linux/fpga/fpga-mgr.h | 32 +++++++++++++++++++++----------- 15 files changed, 88 insertions(+), 77 deletions(-) diff --git a/drivers/fpga/altera-cvp.c b/drivers/fpga/altera-cvp.c index 4e0edb60bfba6..e107651f89bbd 100644 --- a/drivers/fpga/altera-cvp.c +++ b/drivers/fpga/altera-cvp.c @@ -516,10 +516,10 @@ static int altera_cvp_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops altera_cvp_ops = { - .state = altera_cvp_state, - .write_init = altera_cvp_write_init, - .write = altera_cvp_write, - .write_complete = altera_cvp_write_complete, + .state = altera_cvp_state, + .reconfig.write_init = altera_cvp_write_init, + .reconfig.write = altera_cvp_write, + .reconfig.write_complete = altera_cvp_write_complete, }; static const struct cvp_priv cvp_priv_v1 = { diff --git a/drivers/fpga/altera-pr-ip-core.c b/drivers/fpga/altera-pr-ip-core.c index 5b130c4d98829..3385587679d5b 100644 --- a/drivers/fpga/altera-pr-ip-core.c +++ b/drivers/fpga/altera-pr-ip-core.c @@ -167,10 +167,10 @@ static int alt_pr_fpga_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops alt_pr_ops = { - .state = alt_pr_fpga_state, - .write_init = alt_pr_fpga_write_init, - .write = alt_pr_fpga_write, - .write_complete = alt_pr_fpga_write_complete, + .state = alt_pr_fpga_state, + .reconfig.write_init = alt_pr_fpga_write_init, + .reconfig.write = alt_pr_fpga_write, + .reconfig.write_complete = alt_pr_fpga_write_complete, }; int alt_pr_register(struct device *dev, void __iomem *reg_base) diff --git a/drivers/fpga/altera-ps-spi.c b/drivers/fpga/altera-ps-spi.c index 23bfd4d1ad0f7..2b01a3c53d374 100644 --- a/drivers/fpga/altera-ps-spi.c +++ b/drivers/fpga/altera-ps-spi.c @@ -231,10 +231,10 @@ static int altera_ps_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops altera_ps_ops = { - .state = altera_ps_state, - .write_init = altera_ps_write_init, - .write = altera_ps_write, - .write_complete = altera_ps_write_complete, + .state = altera_ps_state, + .reconfig.write_init = altera_ps_write_init, + .reconfig.write = altera_ps_write, + .reconfig.write_complete = altera_ps_write_complete, }; static const struct altera_ps_data *id_to_data(const struct spi_device_id *id) diff --git a/drivers/fpga/dfl-fme-mgr.c b/drivers/fpga/dfl-fme-mgr.c index d5861d13b3069..89913d27d877c 100644 --- a/drivers/fpga/dfl-fme-mgr.c +++ b/drivers/fpga/dfl-fme-mgr.c @@ -265,11 +265,11 @@ static u64 fme_mgr_status(struct fpga_manager *mgr) } static const struct fpga_manager_ops fme_mgr_ops = { - .write_init = fme_mgr_write_init, - .write = fme_mgr_write, - .write_complete = fme_mgr_write_complete, - .state = fme_mgr_state, - .status = fme_mgr_status, + .state = fme_mgr_state, + .status = fme_mgr_status, + .reconfig.write_init = fme_mgr_write_init, + .reconfig.write = fme_mgr_write, + .reconfig.write_complete = fme_mgr_write_complete, }; static void fme_mgr_get_compat_id(void __iomem *fme_pr, diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c index b85bc47c91a9a..e3fc1b0bd7181 100644 --- a/drivers/fpga/fpga-mgr.c +++ b/drivers/fpga/fpga-mgr.c @@ -83,9 +83,9 @@ static int fpga_mgr_write_init_buf(struct fpga_manager *mgr, mgr->state = FPGA_MGR_STATE_WRITE_INIT; if (!mgr->mops->initial_header_size) - ret = mgr->mops->write_init(mgr, info, NULL, 0); + ret = mgr->mops->reconfig.write_init(mgr, info, NULL, 0); else - ret = mgr->mops->write_init( + ret = mgr->mops->reconfig.write_init( mgr, info, buf, min(mgr->mops->initial_header_size, count)); if (ret) { @@ -147,7 +147,7 @@ static int fpga_mgr_write_complete(struct fpga_manager *mgr, int ret; mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE; - ret = mgr->mops->write_complete(mgr, info); + ret = mgr->mops->reconfig.write_complete(mgr, info); if (ret) { dev_err(&mgr->dev, "Error after writing image data to FPGA\n"); mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR; @@ -187,14 +187,14 @@ static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, /* Write the FPGA image to the FPGA. */ mgr->state = FPGA_MGR_STATE_WRITE; - if (mgr->mops->write_sg) { - ret = mgr->mops->write_sg(mgr, sgt); + if (mgr->mops->reconfig.write_sg) { + ret = mgr->mops->reconfig.write_sg(mgr, sgt); } else { struct sg_mapping_iter miter; sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG); while (sg_miter_next(&miter)) { - ret = mgr->mops->write(mgr, miter.addr, miter.length); + ret = mgr->mops->reconfig.write(mgr, miter.addr, miter.length); if (ret) break; } @@ -224,7 +224,7 @@ static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr, * Write the FPGA image to the FPGA. */ mgr->state = FPGA_MGR_STATE_WRITE; - ret = mgr->mops->write(mgr, buf, count); + ret = mgr->mops->reconfig.write(mgr, buf, count); if (ret) { dev_err(&mgr->dev, "Error while writing image data to FPGA\n"); mgr->state = FPGA_MGR_STATE_WRITE_ERR; @@ -264,7 +264,7 @@ static int fpga_mgr_buf_load(struct fpga_manager *mgr, * contiguous kernel buffer and the driver doesn't require SG, non-SG * drivers will still work on the slow path. */ - if (mgr->mops->write) + if (mgr->mops->reconfig.write) return fpga_mgr_buf_load_mapped(mgr, info, buf, count); /* @@ -568,9 +568,10 @@ struct fpga_manager *fpga_mgr_create(struct device *dev, const char *name, struct fpga_manager *mgr; int id, ret; - if (!mops || !mops->write_complete || !mops->state || - !mops->write_init || (!mops->write && !mops->write_sg) || - (mops->write && mops->write_sg)) { + if (!mops || !mops->reconfig.write_complete || !mops->state || + !mops->reconfig.write_init || (!mops->reconfig.write && + !mops->reconfig.write_sg) || + (mops->reconfig.write && mops->reconfig.write_sg)) { dev_err(dev, "Attempt to register without fpga_manager_ops\n"); return NULL; } diff --git a/drivers/fpga/ice40-spi.c b/drivers/fpga/ice40-spi.c index 69dec5af23c36..3bdc3fe8ece97 100644 --- a/drivers/fpga/ice40-spi.c +++ b/drivers/fpga/ice40-spi.c @@ -126,10 +126,10 @@ static int ice40_fpga_ops_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops ice40_fpga_ops = { - .state = ice40_fpga_ops_state, - .write_init = ice40_fpga_ops_write_init, - .write = ice40_fpga_ops_write, - .write_complete = ice40_fpga_ops_write_complete, + .state = ice40_fpga_ops_state, + .reconfig.write_init = ice40_fpga_ops_write_init, + .reconfig.write = ice40_fpga_ops_write, + .reconfig.write_complete = ice40_fpga_ops_write_complete, }; static int ice40_fpga_probe(struct spi_device *spi) diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c index 114a64d2b7a4d..8b860e9a19c92 100644 --- a/drivers/fpga/machxo2-spi.c +++ b/drivers/fpga/machxo2-spi.c @@ -350,10 +350,10 @@ static int machxo2_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops machxo2_ops = { - .state = machxo2_spi_state, - .write_init = machxo2_write_init, - .write = machxo2_write, - .write_complete = machxo2_write_complete, + .state = machxo2_spi_state, + .reconfig.write_init = machxo2_write_init, + .reconfig.write = machxo2_write, + .reconfig.write_complete = machxo2_write_complete, }; static int machxo2_spi_probe(struct spi_device *spi) diff --git a/drivers/fpga/socfpga-a10.c b/drivers/fpga/socfpga-a10.c index 573d88bdf7307..e60bf844b4c40 100644 --- a/drivers/fpga/socfpga-a10.c +++ b/drivers/fpga/socfpga-a10.c @@ -458,11 +458,11 @@ static enum fpga_mgr_states socfpga_a10_fpga_state(struct fpga_manager *mgr) } static const struct fpga_manager_ops socfpga_a10_fpga_mgr_ops = { - .initial_header_size = (RBF_DECOMPRESS_OFFSET + 1) * 4, - .state = socfpga_a10_fpga_state, - .write_init = socfpga_a10_fpga_write_init, - .write = socfpga_a10_fpga_write, - .write_complete = socfpga_a10_fpga_write_complete, + .initial_header_size = (RBF_DECOMPRESS_OFFSET + 1) * 4, + .state = socfpga_a10_fpga_state, + .reconfig.write_init = socfpga_a10_fpga_write_init, + .reconfig.write = socfpga_a10_fpga_write, + .reconfig.write_complete = socfpga_a10_fpga_write_complete, }; static int socfpga_a10_fpga_probe(struct platform_device *pdev) diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c index 1f467173fc1f3..cc752a3f742c2 100644 --- a/drivers/fpga/socfpga.c +++ b/drivers/fpga/socfpga.c @@ -534,10 +534,10 @@ static enum fpga_mgr_states socfpga_fpga_ops_state(struct fpga_manager *mgr) } static const struct fpga_manager_ops socfpga_fpga_ops = { - .state = socfpga_fpga_ops_state, - .write_init = socfpga_fpga_ops_configure_init, - .write = socfpga_fpga_ops_configure_write, - .write_complete = socfpga_fpga_ops_configure_complete, + .state = socfpga_fpga_ops_state, + .reconfig.write_init = socfpga_fpga_ops_configure_init, + .reconfig.write = socfpga_fpga_ops_configure_write, + .reconfig.write_complete = socfpga_fpga_ops_configure_complete, }; static int socfpga_fpga_probe(struct platform_device *pdev) diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/stratix10-soc.c index 657a70c5fc996..c746a43e6438f 100644 --- a/drivers/fpga/stratix10-soc.c +++ b/drivers/fpga/stratix10-soc.c @@ -394,10 +394,10 @@ static enum fpga_mgr_states s10_ops_state(struct fpga_manager *mgr) } static const struct fpga_manager_ops s10_ops = { - .state = s10_ops_state, - .write_init = s10_ops_write_init, - .write = s10_ops_write, - .write_complete = s10_ops_write_complete, + .state = s10_ops_state, + .partial_reconfig.write_init = s10_ops_write_init, + .partial_reconfig.write = s10_ops_write, + .partial_reconfig.write_complete = s10_ops_write_complete, }; static int s10_probe(struct platform_device *pdev) diff --git a/drivers/fpga/ts73xx-fpga.c b/drivers/fpga/ts73xx-fpga.c index 101f016c6ed8c..ab799aa05b9a2 100644 --- a/drivers/fpga/ts73xx-fpga.c +++ b/drivers/fpga/ts73xx-fpga.c @@ -98,10 +98,10 @@ static int ts73xx_fpga_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops ts73xx_fpga_ops = { - .state = ts73xx_fpga_state, - .write_init = ts73xx_fpga_write_init, - .write = ts73xx_fpga_write, - .write_complete = ts73xx_fpga_write_complete, + .state = ts73xx_fpga_state, + .reconfig.write_init = ts73xx_fpga_write_init, + .reconfig.write = ts73xx_fpga_write, + .reconfig.write_complete = ts73xx_fpga_write_complete, }; static int ts73xx_fpga_probe(struct platform_device *pdev) diff --git a/drivers/fpga/xilinx-spi.c b/drivers/fpga/xilinx-spi.c index fee4d0abf6bfe..4d092f30bf700 100644 --- a/drivers/fpga/xilinx-spi.c +++ b/drivers/fpga/xilinx-spi.c @@ -214,10 +214,10 @@ static int xilinx_spi_write_complete(struct fpga_manager *mgr, } static const struct fpga_manager_ops xilinx_spi_ops = { - .state = xilinx_spi_state, - .write_init = xilinx_spi_write_init, - .write = xilinx_spi_write, - .write_complete = xilinx_spi_write_complete, + .state = xilinx_spi_state, + .reconfig.write_init = xilinx_spi_write_init, + .reconfig.write = xilinx_spi_write, + .reconfig.write_complete = xilinx_spi_write_complete, }; static int xilinx_spi_probe(struct spi_device *spi) diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c index 07fa8d9ec6750..dde10f1ce1f57 100644 --- a/drivers/fpga/zynq-fpga.c +++ b/drivers/fpga/zynq-fpga.c @@ -543,11 +543,11 @@ static enum fpga_mgr_states zynq_fpga_ops_state(struct fpga_manager *mgr) } static const struct fpga_manager_ops zynq_fpga_ops = { - .initial_header_size = 128, - .state = zynq_fpga_ops_state, - .write_init = zynq_fpga_ops_write_init, - .write_sg = zynq_fpga_ops_write, - .write_complete = zynq_fpga_ops_write_complete, + .initial_header_size = 128, + .state = zynq_fpga_ops_state, + .reconfig.write_init = zynq_fpga_ops_write_init, + .reconfig.write_sg = zynq_fpga_ops_write, + .reconfig.write_complete = zynq_fpga_ops_write_complete, }; static int zynq_fpga_probe(struct platform_device *pdev) diff --git a/drivers/fpga/zynqmp-fpga.c b/drivers/fpga/zynqmp-fpga.c index 125743c9797ff..3bb9824a2a881 100644 --- a/drivers/fpga/zynqmp-fpga.c +++ b/drivers/fpga/zynqmp-fpga.c @@ -84,10 +84,10 @@ static enum fpga_mgr_states zynqmp_fpga_ops_state(struct fpga_manager *mgr) } static const struct fpga_manager_ops zynqmp_fpga_ops = { - .state = zynqmp_fpga_ops_state, - .write_init = zynqmp_fpga_ops_write_init, - .write = zynqmp_fpga_ops_write, - .write_complete = zynqmp_fpga_ops_write_complete, + .state = zynqmp_fpga_ops_state, + .reconfig.write_init = zynqmp_fpga_ops_write_init, + .reconfig.write = zynqmp_fpga_ops_write, + .reconfig.write_complete = zynqmp_fpga_ops_write_complete, }; static int zynqmp_fpga_probe(struct platform_device *pdev) diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h index 2bc3030a69e54..50a9fea3c47ef 100644 --- a/include/linux/fpga/fpga-mgr.h +++ b/include/linux/fpga/fpga-mgr.h @@ -106,14 +106,29 @@ struct fpga_image_info { }; /** - * struct fpga_manager_ops - ops for low level fpga manager drivers - * @initial_header_size: Maximum number of bytes that should be passed into write_init - * @state: returns an enum value of the FPGA's state - * @status: returns status of the FPGA, including reconfiguration error code + * struct fpga_manager_update_ops - ops updating fpga * @write_init: prepare the FPGA to receive confuration data * @write: write count bytes of configuration data to the FPGA * @write_sg: write the scatter list of configuration data to the FPGA * @write_complete: set FPGA to operating state after writing is done + */ +struct fpga_manager_update_ops { + int (*write_init)(struct fpga_manager *mgr, + struct fpga_image_info *info, + const char *buf, size_t count); + int (*write)(struct fpga_manager *mgr, const char *buf, size_t count); + int (*write_sg)(struct fpga_manager *mgr, struct sg_table *sgt); + int (*write_complete)(struct fpga_manager *mgr, + struct fpga_image_info *info); +}; + +/** + * struct fpga_manager_ops - ops for low level fpga manager drivers + * @initial_header_size: Maximum number of bytes that should be passed into write_init + * @state: returns an enum value of the FPGA's state + * @status: returns status of the FPGA, including reconfiguration error code + * @partial_update: ops for doing partial reconfiguration + * @full_update: ops for doing a full card update, user,shell,fw ie. the works * @fpga_remove: optional: Set FPGA into a specific state during driver remove * @groups: optional attribute groups. * @@ -125,13 +140,8 @@ struct fpga_manager_ops { size_t initial_header_size; enum fpga_mgr_states (*state)(struct fpga_manager *mgr); u64 (*status)(struct fpga_manager *mgr); - int (*write_init)(struct fpga_manager *mgr, - struct fpga_image_info *info, - const char *buf, size_t count); - int (*write)(struct fpga_manager *mgr, const char *buf, size_t count); - int (*write_sg)(struct fpga_manager *mgr, struct sg_table *sgt); - int (*write_complete)(struct fpga_manager *mgr, - struct fpga_image_info *info); + struct fpga_manager_update_ops reconfig; + struct fpga_manager_update_ops reimage; void (*fpga_remove)(struct fpga_manager *mgr); const struct attribute_group **groups; }; From patchwork Thu May 20 18:30:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rix X-Patchwork-Id: 12271155 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AECFEC43460 for ; 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[75.142.250.213]) by smtp.gmail.com with ESMTPSA id p11sm2723200qkj.3.2021.05.20.11.30.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 May 2021 11:30:08 -0700 (PDT) From: trix@redhat.com To: mdf@kernel.org Cc: linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, Tom Rix Subject: [PATCH v2 2/5] fpga: add FPGA_MGR_REIMAGE flag Date: Thu, 20 May 2021 11:30:04 -0700 Message-Id: <20210520183004.2022169-1-trix@redhat.com> X-Mailer: git-send-email 2.26.3 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix If this flag is set the reimage ops will be used otherwise the reconfig ops will be used to write the image Signed-off-by: Tom Rix --- include/linux/fpga/fpga-mgr.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h index 50a9fea3c47ef..bb11b18527326 100644 --- a/include/linux/fpga/fpga-mgr.h +++ b/include/linux/fpga/fpga-mgr.h @@ -67,12 +67,15 @@ enum fpga_mgr_states { * %FPGA_MGR_BITSTREAM_LSB_FIRST: SPI bitstream bit order is LSB first * * %FPGA_MGR_COMPRESSED_BITSTREAM: FPGA bitstream is compressed + * + * %FPGA_MGR_REIMAGE: Reimage the whole card, fpga bs and other device fw */ #define FPGA_MGR_PARTIAL_RECONFIG BIT(0) #define FPGA_MGR_EXTERNAL_CONFIG BIT(1) #define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2) #define FPGA_MGR_BITSTREAM_LSB_FIRST BIT(3) #define FPGA_MGR_COMPRESSED_BITSTREAM BIT(4) +#define FPGA_MGR_REIMAGE BIT(5) /** * struct fpga_image_info - information specific to a FPGA image From patchwork Thu May 20 18:30:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rix X-Patchwork-Id: 12271157 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43BDFC433B4 for ; Thu, 20 May 2021 18:30:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 28AF2611AB for ; Thu, 20 May 2021 18:30:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235117AbhETSbv (ORCPT ); Thu, 20 May 2021 14:31:51 -0400 Received: from us-smtp-delivery-124.mimecast.com ([216.205.24.124]:51538 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233462AbhETSbu (ORCPT ); Thu, 20 May 2021 14:31:50 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1621535428; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=/bPnMh8D9HEJogKStb+MSo8WLoMkx+68yj+/mcrE5vw=; b=OXvfoIAwQRFzegxOksvSoWUjT3UiOg18sWEfTlyBmWucnQOwHTKwoceKtfhTWvia00p1f+ G0KR9WdXivOrE4pKEWt6fvdKmAURT+zJIA7kQQ0crRLyt4E7ean/mqOBcm0h8TYZQev7VL lIwGme4y2tQaxCOW5FdS8rjaAbseWsg= Received: from mail-qv1-f72.google.com (mail-qv1-f72.google.com [209.85.219.72]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-525-crN2U07tO02FXMqymTZHSQ-1; Thu, 20 May 2021 14:30:27 -0400 X-MC-Unique: crN2U07tO02FXMqymTZHSQ-1 Received: by mail-qv1-f72.google.com with SMTP id b24-20020a0cb3d80000b02901e78b82d74aso13930967qvf.20 for ; Thu, 20 May 2021 11:30:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=/bPnMh8D9HEJogKStb+MSo8WLoMkx+68yj+/mcrE5vw=; b=dXCQFvYArJ+oXEY0j+qjYDzpmcTVlWDRpGbpbUeT5SQyUunIqs+xnrJ+NJSvHYMGwP MhJpHuQyN9fteDyTH3U00CJrWWN04tl28Vbgxin8tcsS98lUsKWS1d4OWl9Sm+grt+Tz W++T67RrV5IkBCqDhRoA29OD0M2Quqvxy4dtuGK5r2iofNW9POqcr+Q7ZvFyt4oJmmdL Cl6rm/gtwFrhU2OTgVo8K03HS6tsuLYXsDK52IIE7CPsCcNnKDNvOeP+vME9gY8QtvD0 Z3DT4NY7/XLu/D1KWLC2zZ3fcjO9URXfG/AX16/6f0gYl7sRL8OHddJDRIQutym1Q2ZO gtfg== X-Gm-Message-State: AOAM533CgK1TslrGg2q9Q6sEmWTD2ITo0ICk2wl13PAa4gMGoDxCDMlN 8JIyDpLW4HE2omYwzhH679N9m8VGPCQnqtmDRjovw+doQOuIyiX4+EMZNfmDdWrEYr3IhYJjJKC pwy+6cSNY6SkUQCj+llfouA== X-Received: by 2002:ad4:420b:: with SMTP id k11mr7416626qvp.18.1621535426950; Thu, 20 May 2021 11:30:26 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwfidu4zN2uet8HOwwObbCGcgkQBZyXWsGSIncju4TJAnj0jTlP5hQB9h0cdJsfDlnQx5Otkw== X-Received: by 2002:ad4:420b:: with SMTP id k11mr7416605qvp.18.1621535426777; Thu, 20 May 2021 11:30:26 -0700 (PDT) Received: from localhost.localdomain.com (075-142-250-213.res.spectrum.com. [75.142.250.213]) by smtp.gmail.com with ESMTPSA id u26sm2512296qtf.24.2021.05.20.11.30.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 May 2021 11:30:26 -0700 (PDT) From: trix@redhat.com To: mdf@kernel.org Cc: linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, Tom Rix Subject: [PATCH v2 3/5] fpga: pass fpga_manager_update_ops to the fpga_manager_write functions Date: Thu, 20 May 2021 11:30:22 -0700 Message-Id: <20210520183022.2022394-1-trix@redhat.com> X-Mailer: git-send-email 2.26.3 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix Refactor fpga_manager_write* functions for reimaging, pass the update_ops as a parameter. Only do the reconfig ops. Signed-off-by: Tom Rix --- drivers/fpga/fpga-mgr.c | 57 ++++++++++++++++++++++++----------------- 1 file changed, 34 insertions(+), 23 deletions(-) diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c index e3fc1b0bd7181..4263c9e94949d 100644 --- a/drivers/fpga/fpga-mgr.c +++ b/drivers/fpga/fpga-mgr.c @@ -77,16 +77,17 @@ EXPORT_SYMBOL_GPL(fpga_image_info_free); */ static int fpga_mgr_write_init_buf(struct fpga_manager *mgr, struct fpga_image_info *info, + const struct fpga_manager_update_ops *uops, const char *buf, size_t count) { int ret; mgr->state = FPGA_MGR_STATE_WRITE_INIT; if (!mgr->mops->initial_header_size) - ret = mgr->mops->reconfig.write_init(mgr, info, NULL, 0); + ret = uops->write_init(mgr, info, NULL, 0); else - ret = mgr->mops->reconfig.write_init( - mgr, info, buf, min(mgr->mops->initial_header_size, count)); + ret = uops->write_init( + mgr, info, buf, min(mgr->mops->initial_header_size, count)); if (ret) { dev_err(&mgr->dev, "Error preparing FPGA for writing\n"); @@ -99,6 +100,7 @@ static int fpga_mgr_write_init_buf(struct fpga_manager *mgr, static int fpga_mgr_write_init_sg(struct fpga_manager *mgr, struct fpga_image_info *info, + const struct fpga_manager_update_ops *uops, struct sg_table *sgt) { struct sg_mapping_iter miter; @@ -107,7 +109,7 @@ static int fpga_mgr_write_init_sg(struct fpga_manager *mgr, int ret; if (!mgr->mops->initial_header_size) - return fpga_mgr_write_init_buf(mgr, info, NULL, 0); + return fpga_mgr_write_init_buf(mgr, info, uops, NULL, 0); /* * First try to use miter to map the first fragment to access the @@ -116,7 +118,7 @@ static int fpga_mgr_write_init_sg(struct fpga_manager *mgr, sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG); if (sg_miter_next(&miter) && miter.length >= mgr->mops->initial_header_size) { - ret = fpga_mgr_write_init_buf(mgr, info, miter.addr, + ret = fpga_mgr_write_init_buf(mgr, info, uops, miter.addr, miter.length); sg_miter_stop(&miter); return ret; @@ -130,7 +132,7 @@ static int fpga_mgr_write_init_sg(struct fpga_manager *mgr, len = sg_copy_to_buffer(sgt->sgl, sgt->nents, buf, mgr->mops->initial_header_size); - ret = fpga_mgr_write_init_buf(mgr, info, buf, len); + ret = fpga_mgr_write_init_buf(mgr, info, uops, buf, len); kfree(buf); @@ -142,12 +144,13 @@ static int fpga_mgr_write_init_sg(struct fpga_manager *mgr, * finish and set the FPGA into operating mode. */ static int fpga_mgr_write_complete(struct fpga_manager *mgr, - struct fpga_image_info *info) + struct fpga_image_info *info, + const struct fpga_manager_update_ops *uops) { int ret; mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE; - ret = mgr->mops->reconfig.write_complete(mgr, info); + ret = uops->write_complete(mgr, info); if (ret) { dev_err(&mgr->dev, "Error after writing image data to FPGA\n"); mgr->state = FPGA_MGR_STATE_WRITE_COMPLETE_ERR; @@ -162,6 +165,7 @@ static int fpga_mgr_write_complete(struct fpga_manager *mgr, * fpga_mgr_buf_load_sg - load fpga from image in buffer from a scatter list * @mgr: fpga manager * @info: fpga image specific information + * @uops: which update ops to use * @sgt: scatterlist table * * Step the low level fpga manager through the device-specific steps of getting @@ -177,24 +181,25 @@ static int fpga_mgr_write_complete(struct fpga_manager *mgr, */ static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, struct fpga_image_info *info, + const struct fpga_manager_update_ops *uops, struct sg_table *sgt) { int ret; - ret = fpga_mgr_write_init_sg(mgr, info, sgt); + ret = fpga_mgr_write_init_sg(mgr, info, uops, sgt); if (ret) return ret; /* Write the FPGA image to the FPGA. */ mgr->state = FPGA_MGR_STATE_WRITE; - if (mgr->mops->reconfig.write_sg) { - ret = mgr->mops->reconfig.write_sg(mgr, sgt); + if (uops->write_sg) { + ret = uops->write_sg(mgr, sgt); } else { struct sg_mapping_iter miter; sg_miter_start(&miter, sgt->sgl, sgt->nents, SG_MITER_FROM_SG); while (sg_miter_next(&miter)) { - ret = mgr->mops->reconfig.write(mgr, miter.addr, miter.length); + ret = uops->write(mgr, miter.addr, miter.length); if (ret) break; } @@ -207,16 +212,17 @@ static int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, return ret; } - return fpga_mgr_write_complete(mgr, info); + return fpga_mgr_write_complete(mgr, info, uops); } static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr, struct fpga_image_info *info, + const struct fpga_manager_update_ops *uops, const char *buf, size_t count) { int ret; - ret = fpga_mgr_write_init_buf(mgr, info, buf, count); + ret = fpga_mgr_write_init_buf(mgr, info, uops, buf, count); if (ret) return ret; @@ -224,20 +230,21 @@ static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr, * Write the FPGA image to the FPGA. */ mgr->state = FPGA_MGR_STATE_WRITE; - ret = mgr->mops->reconfig.write(mgr, buf, count); + ret = uops->write(mgr, buf, count); if (ret) { dev_err(&mgr->dev, "Error while writing image data to FPGA\n"); mgr->state = FPGA_MGR_STATE_WRITE_ERR; return ret; } - return fpga_mgr_write_complete(mgr, info); + return fpga_mgr_write_complete(mgr, info, uops); } /** * fpga_mgr_buf_load - load fpga from image in buffer * @mgr: fpga manager * @info: fpga image info + * @uops: which update ops to use * @buf: buffer contain fpga image * @count: byte count of buf * @@ -250,6 +257,7 @@ static int fpga_mgr_buf_load_mapped(struct fpga_manager *mgr, */ static int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info, + const struct fpga_manager_update_ops *uops, const char *buf, size_t count) { struct page **pages; @@ -264,8 +272,8 @@ static int fpga_mgr_buf_load(struct fpga_manager *mgr, * contiguous kernel buffer and the driver doesn't require SG, non-SG * drivers will still work on the slow path. */ - if (mgr->mops->reconfig.write) - return fpga_mgr_buf_load_mapped(mgr, info, buf, count); + if (uops->write) + return fpga_mgr_buf_load_mapped(mgr, info, uops, buf, count); /* * Convert the linear kernel pointer into a sg_table of pages for use @@ -300,7 +308,7 @@ static int fpga_mgr_buf_load(struct fpga_manager *mgr, if (rc) return rc; - rc = fpga_mgr_buf_load_sg(mgr, info, &sgt); + rc = fpga_mgr_buf_load_sg(mgr, info, uops, &sgt); sg_free_table(&sgt); return rc; @@ -322,6 +330,7 @@ static int fpga_mgr_buf_load(struct fpga_manager *mgr, */ static int fpga_mgr_firmware_load(struct fpga_manager *mgr, struct fpga_image_info *info, + const struct fpga_manager_update_ops *uops, const char *image_name) { struct device *dev = &mgr->dev; @@ -339,7 +348,7 @@ static int fpga_mgr_firmware_load(struct fpga_manager *mgr, return ret; } - ret = fpga_mgr_buf_load(mgr, info, fw->data, fw->size); + ret = fpga_mgr_buf_load(mgr, info, uops, fw->data, fw->size); release_firmware(fw); @@ -358,12 +367,14 @@ static int fpga_mgr_firmware_load(struct fpga_manager *mgr, */ int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info) { + const struct fpga_manager_update_ops *uops = &mgr->mops->reconfig; + if (info->sgt) - return fpga_mgr_buf_load_sg(mgr, info, info->sgt); + return fpga_mgr_buf_load_sg(mgr, info, uops, info->sgt); if (info->buf && info->count) - return fpga_mgr_buf_load(mgr, info, info->buf, info->count); + return fpga_mgr_buf_load(mgr, info, uops, info->buf, info->count); if (info->firmware_name) - return fpga_mgr_firmware_load(mgr, info, info->firmware_name); + return fpga_mgr_firmware_load(mgr, info, uops, info->firmware_name); return -EINVAL; } EXPORT_SYMBOL_GPL(fpga_mgr_load); From patchwork Thu May 20 18:30:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rix X-Patchwork-Id: 12271159 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD0C2C433B4 for ; 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[75.142.250.213]) by smtp.gmail.com with ESMTPSA id t17sm2377264qto.92.2021.05.20.11.30.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 May 2021 11:30:53 -0700 (PDT) From: trix@redhat.com To: mdf@kernel.org Cc: linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, Tom Rix Subject: [PATCH v2 4/5] fpga: defer checking for update ops until they are used Date: Thu, 20 May 2021 11:30:48 -0700 Message-Id: <20210520183048.2022642-1-trix@redhat.com> X-Mailer: git-send-email 2.26.3 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix Which update ops need to be used will depend on the FPGA_MGR_REIMAGE bit in the fpga_image_info flags. reimaging is optional, no drv that does not need to remimage should be forced to provide stub functions. Signed-off-by: Tom Rix --- drivers/fpga/fpga-mgr.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c index 4263c9e94949d..5247703a3743d 100644 --- a/drivers/fpga/fpga-mgr.c +++ b/drivers/fpga/fpga-mgr.c @@ -369,6 +369,14 @@ int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info) { const struct fpga_manager_update_ops *uops = &mgr->mops->reconfig; + if (!uops->write_complete || + !uops->write_init || + (!uops->write && !uops->write_sg) || + (uops->write && uops->write_sg)) { + dev_err(&mgr->dev, "Attempt to load an image without fpga_manager_update_ops\n"); + return -EOPNOTSUPP; + } + if (info->sgt) return fpga_mgr_buf_load_sg(mgr, info, uops, info->sgt); if (info->buf && info->count) @@ -579,10 +587,7 @@ struct fpga_manager *fpga_mgr_create(struct device *dev, const char *name, struct fpga_manager *mgr; int id, ret; - if (!mops || !mops->reconfig.write_complete || !mops->state || - !mops->reconfig.write_init || (!mops->reconfig.write && - !mops->reconfig.write_sg) || - (mops->reconfig.write && mops->reconfig.write_sg)) { + if (!mops || !mops->state) { dev_err(dev, "Attempt to register without fpga_manager_ops\n"); return NULL; } From patchwork Thu May 20 18:31:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rix X-Patchwork-Id: 12271161 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B880C433ED for ; Thu, 20 May 2021 18:31:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 01CB1611AE for ; Thu, 20 May 2021 18:31:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234617AbhETScf (ORCPT ); Thu, 20 May 2021 14:32:35 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]:51553 "EHLO us-smtp-delivery-124.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232273AbhETScf (ORCPT ); Thu, 20 May 2021 14:32:35 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1621535473; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=rzVWT+hgucJulWTbb27JAU0YdQhBiQeXz3Y6dtzUOvc=; b=XZ3qQjrWc8Msy6XS98kSc2oF+ldsgQTI5YRDcWokREWNhIKxX85Lx+lYJ9pLsZTszrKDpu rEODKXULl/o21vgJxB6Ym4TbHK8me0Xb/zdlPOuNdD8DDh60H2Hr/tF2loI9WcWqV+6yrQ sAMM39cT3cY/fEq3oC5Kx6MRm19KJ7I= Received: from mail-qv1-f69.google.com (mail-qv1-f69.google.com [209.85.219.69]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-258--OZnmJzgOnyNaHnVshFyrQ-1; Thu, 20 May 2021 14:31:11 -0400 X-MC-Unique: -OZnmJzgOnyNaHnVshFyrQ-1 Received: by mail-qv1-f69.google.com with SMTP id d9-20020a0ce4490000b02901f0bee07112so7667572qvm.7 for ; Thu, 20 May 2021 11:31:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=rzVWT+hgucJulWTbb27JAU0YdQhBiQeXz3Y6dtzUOvc=; b=F2OrgVS7Ep2FffHZXLVFQBfFm8NgNxm1uoDQNAWi3kfmNy1uqBPToanj34cB1UVbJb XY82dNxzvDIfKO2yPtUn30LqHQYXMepfcRywNvdjcBu6li/Xd0j8p0zFgy9adYjZHyT4 fRsYDCmsAdn6rGbqTMO+Ym5M4w71C4n7/GzOSmrE+33E4u5vCpyjzvWfYTDqxRkWa9FC tzDF0flzeGXFtvLBzIDI7HcuCRrRQzFN+ixphrMc8a7TrYAiOYnm4u0rGCdD9Vjhm/QE qOTrvrHK31cieiXqFB5mkoPG7CzL/th9Tmsx9qEndR5C06AGRDcgsDj05eIr65Q4pe9R FvaQ== X-Gm-Message-State: AOAM532sSu6AJWRDKLSf0wA0z55inyLOdo4j4bnKYqtcfkStklL8i77H cjlLQnU/wrK1XaJg3r4ll4EfLcIENEpwDGCyOeS2J17vJgnooUpAKHPpsbfCHKptVWWIToX8rs0 2qOTQ2mHVrBoqZUXgXLo85w== X-Received: by 2002:a05:620a:4101:: with SMTP id j1mr6928632qko.473.1621535471202; Thu, 20 May 2021 11:31:11 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwr9bSXVI+qKOI/88WMXKcwo9b+VphJpj50l+bbQ3An4TsZbQnI8rlBxiGYrWYuBqzTclLdbg== X-Received: by 2002:a05:620a:4101:: with SMTP id j1mr6928619qko.473.1621535471070; Thu, 20 May 2021 11:31:11 -0700 (PDT) Received: from localhost.localdomain.com (075-142-250-213.res.spectrum.com. [75.142.250.213]) by smtp.gmail.com with ESMTPSA id y8sm2544801qtn.61.2021.05.20.11.31.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 May 2021 11:31:10 -0700 (PDT) From: trix@redhat.com To: mdf@kernel.org Cc: linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org, Tom Rix Subject: [PATCH v2 5/5] fpga: use reimage ops in fpga_mgr_load() Date: Thu, 20 May 2021 11:31:06 -0700 Message-Id: <20210520183106.2022873-1-trix@redhat.com> X-Mailer: git-send-email 2.26.3 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-fpga@vger.kernel.org From: Tom Rix If the fpga_image_info flags FPGA_MGR_REIMAGE bit is set swap out the reconfig ops for the reimage ops and do the load. Signed-off-by: Tom Rix --- drivers/fpga/fpga-mgr.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/fpga/fpga-mgr.c b/drivers/fpga/fpga-mgr.c index 5247703a3743d..34d251e87ca6c 100644 --- a/drivers/fpga/fpga-mgr.c +++ b/drivers/fpga/fpga-mgr.c @@ -369,6 +369,9 @@ int fpga_mgr_load(struct fpga_manager *mgr, struct fpga_image_info *info) { const struct fpga_manager_update_ops *uops = &mgr->mops->reconfig; + if (info->flags & FPGA_MGR_REIMAGE) + uops = &mgr->mops->reimage; + if (!uops->write_complete || !uops->write_init || (!uops->write && !uops->write_sg) ||