From patchwork Tue Jun 1 15:00:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12291517 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90A5AC47080 for ; Tue, 1 Jun 2021 15:03:16 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5E54A61263 for ; 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Tue, 1 Jun 2021 10:00:43 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 1 Jun 2021 10:00:43 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 1 Jun 2021 10:00:43 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 151F0hmC124364; Tue, 1 Jun 2021 10:00:43 -0500 Received: from localhost ([10.250.35.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 151F0hWb109744; Tue, 1 Jun 2021 10:00:43 -0500 From: Suman Anna To: Nishanth Menon Subject: [PATCH v2 1/2] arm64: dts: ti: k3-am65-main: Add ICSSG MDIO nodes Date: Tue, 1 Jun 2021 10:00:31 -0500 Message-ID: <20210601150032.11432-2-s-anna@ti.com> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210601150032.11432-1-s-anna@ti.com> References: <20210601150032.11432-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210601_080045_682096_34DAA0EF X-CRM114-Status: GOOD ( 13.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Grzegorz Jaszczyk , Grygorii Strashko , Vignesh Raghavendra , Lokesh Vutla , Jan Kiszka , Kishon Vijay Abraham I , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Roger Quadros The ICSSGs on K3 AM65x SoCs contain an MDIO controller that can be used to control external PHYs associated with the Industrial Ethernet peripherals within each ICSSG instance. The MDIO module used within the ICSSG is similar to the MDIO Controller used in TI Davinci SoCs. A bus frequency of 1 MHz is chosen for the MDIO operations. The nodes are added and enabled in the common k3-am65-main.dtsi file by default, and disabled in the existing AM65 board dts files. These nodes need pinctrl lines, and so should be enabled only on boards where they are actually wired and pinned out for ICSSG Ethernet. Any new board dts file should disable these if they are not sure. Signed-off-by: Roger Quadros [s-anna@ti.com: move the disabled status to board dts files] Signed-off-by: Suman Anna Reviewed-by: Grygorii Strashko Acked-by: Jan Kiszka --- .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 12 ++++++++ arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 30 +++++++++++++++++++ .../arm64/boot/dts/ti/k3-am654-base-board.dts | 12 ++++++++ 3 files changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi index d90abda1de84..8c6b538c53f3 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -702,3 +702,15 @@ &mailbox0_cluster10 { &mailbox0_cluster11 { status = "disabled"; }; + +&icssg0_mdio { + status = "disabled"; +}; + +&icssg1_mdio { + status = "disabled"; +}; + +&icssg2_mdio { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index f97fc00c00ca..e679394d0b7e 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -1052,6 +1052,16 @@ tx_pru0_1: txpru@c000 { reg-names = "iram", "control", "debug"; firmware-name = "am65x-txpru0_1-fw"; }; + + icssg0_mdio: mdio@32400 { + compatible = "ti,davinci_mdio"; + reg = <0x32400 0x100>; + clocks = <&k3_clks 62 3>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <0>; + bus_freq = <1000000>; + }; }; icssg1: icssg@b100000 { @@ -1183,6 +1193,16 @@ tx_pru1_1: txpru@c000 { reg-names = "iram", "control", "debug"; firmware-name = "am65x-txpru1_1-fw"; }; + + icssg1_mdio: mdio@32400 { + compatible = "ti,davinci_mdio"; + reg = <0x32400 0x100>; + clocks = <&k3_clks 63 3>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <0>; + bus_freq = <1000000>; + }; }; icssg2: icssg@b200000 { @@ -1314,5 +1334,15 @@ tx_pru2_1: txpru@c000 { reg-names = "iram", "control", "debug"; firmware-name = "am65x-txpru2_1-fw"; }; + + icssg2_mdio: mdio@32400 { + compatible = "ti,davinci_mdio"; + reg = <0x32400 0x100>; + clocks = <&k3_clks 64 3>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <0>; + bus_freq = <1000000>; + }; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts index 60e43fd7af12..fa057a85e833 100644 --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts @@ -539,3 +539,15 @@ &mcasp2 { &dss { status = "disabled"; }; + +&icssg0_mdio { + status = "disabled"; +}; + +&icssg1_mdio { + status = "disabled"; +}; + +&icssg2_mdio { + status = "disabled"; +}; From patchwork Tue Jun 1 15:00:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 12291519 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 207D0C4708F for ; Tue, 1 Jun 2021 15:03:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CA07761263 for ; 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Tue, 1 Jun 2021 10:00:48 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 1 Jun 2021 10:00:48 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 1 Jun 2021 10:00:48 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 151F0m5E124436; Tue, 1 Jun 2021 10:00:48 -0500 Received: from localhost ([10.250.35.153]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 151F0mxw109775; Tue, 1 Jun 2021 10:00:48 -0500 From: Suman Anna To: Nishanth Menon Subject: [PATCH v2 2/2] arm64: dts: ti: k3-j721e-main: Add ICSSG MDIO nodes Date: Tue, 1 Jun 2021 10:00:32 -0500 Message-ID: <20210601150032.11432-3-s-anna@ti.com> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210601150032.11432-1-s-anna@ti.com> References: <20210601150032.11432-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210601_080050_159992_36C598DF X-CRM114-Status: GOOD ( 13.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Grzegorz Jaszczyk , Grygorii Strashko , Vignesh Raghavendra , Lokesh Vutla , Jan Kiszka , Kishon Vijay Abraham I , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The ICSSGs on K3 J721E SoCs contain an MDIO controller that can be used to control external PHYs associated with the Industrial Ethernet peripherals within each ICSSG instance. The MDIO module used within the ICSSG is similar to the MDIO Controller used in TI Davinci SoCs. A bus frequency of 1 MHz is chosen for the MDIO operations. The nodes are added and enabled in the common k3-j721e-main.dtsi file by default, and disabled in the existing J721E board dts file. These nodes need pinctrl lines, and so should be enabled only on boards where they are actually wired and pinned out for ICSSG Ethernet. Any new board dts file should disable these if they are not sure. Signed-off-by: Suman Anna Reviewed-by: Grygorii Strashko --- .../dts/ti/k3-j721e-common-proc-board.dts | 8 ++++++++ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 20 +++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 351bb84db65b..1991f620d94b 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -718,3 +718,11 @@ &pcie3_ep { &dss { status = "disabled"; }; + +&icssg0_mdio { + status = "disabled"; +}; + +&icssg1_mdio { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 3bcafe4c1742..598613876b0f 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -1794,6 +1794,16 @@ tx_pru0_1: txpru@c000 { reg-names = "iram", "control", "debug"; firmware-name = "j7-txpru0_1-fw"; }; + + icssg0_mdio: mdio@32400 { + compatible = "ti,davinci_mdio"; + reg = <0x32400 0x100>; + clocks = <&k3_clks 119 1>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <0>; + bus_freq = <1000000>; + }; }; icssg1: icssg@b100000 { @@ -1925,5 +1935,15 @@ tx_pru1_1: txpru@c000 { reg-names = "iram", "control", "debug"; firmware-name = "j7-txpru1_1-fw"; }; + + icssg1_mdio: mdio@32400 { + compatible = "ti,davinci_mdio"; + reg = <0x32400 0x100>; + clocks = <&k3_clks 120 4>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <0>; + bus_freq = <1000000>; + }; }; };