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Thu, 29 Nov 2018 15:51:44 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com, linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org, Chanwoo Choi , devicetree@vger.kernel.org, Krzysztof Kozlowski , Kukjin Kim , Mark Rutland , Rob Herring , Sylwester Nawrocki , Bartlomiej Zolnierkiewicz , Marek Szyprowski , stable@vger.kernel.org Subject: [PATCH v2 1/5] clk: samsung: exynos5433: fix typo in imem divider Date: Thu, 29 Nov 2018 16:51:30 +0100 Message-Id: <20181129155134.19141-2-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181129155134.19141-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrNKsWRmVeSWpSXmKPExsWy7djPc7qC3AwxBvNfqltsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW3zsucdqMeP8PiaLtUfuslssvX6RyaJ17xF2i8Nv2lkt Fmx8xOjA67Fm3hpGj02rOtk8Dr7bw+TRt2UVo8fnTXIBrFFcNimpOZllqUX6dglcGSf7TjMV vOWsaJq5ma2B8RRHFyMnh4SAicS1SX1sXYxcHEICKxglpn7+BOV8YZQ4vPI7I0iVkMBnRolZ 84xgOnZtP80CEV/OKPFikztcw4Qb68Ea2ATMJR5tP8MEYosIuEn0TZ4NNpVZYB6zxKmfU1i7 GDk4hAW8JJ7cCAOpYRFQlVj/8xs7iM0r4CLxc/saFohl8hINuzaDxTkFXCWmrdzPDFEjKHFy 5hOwGmagmuats5lB5ksI7GOXaD2/lhWi2UVi+8tXUIOEJV4d38IOYctI/N85nwnCLpfYvfUZ O0RzC6PE3MmLoBLWEoePXwQ7lFlAU2L9Ln2IsKPE1YPH2EHCEgJ8EjfeCkLcwCcxadt0Zogw r0RHmxBEta7EvP9noK6Rluj6vw7K9pCYs3QD8wRGxVlIvpmF5JtZCHsXMDKvYhRPLS3OTU8t NsxLLdcrTswtLs1L10vOz93ECExSp/8d/7SD8eulpEOMAhyMSjy8L77/jxZiTSwrrsw9xCjB wawkwnuYgyFGiDclsbIqtSg/vqg0J7X4EKM0B4uSOG81w4NoIYH0xJLU7NTUgtQimCwTB6dU A2OJuVN1Q6mZ7atLxlYafxsrZzb3S03v2+Lc+EDq39ya/5dtjS7e7vtpb2xTJzBX1O1r6cYa Di0FfS+7dVzlx31u2p17sPlNfcFU64DvsXH5PkH7lr/Vus3Bd45VZeLyGfPqL16Y2ySh8Wbn nrA75TylzYdyrz9lc+o5+UXwz0LmtTkn61V3/FJiKc5INNRiLipOBAA4P+9wTgMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrNIsWRmVeSWpSXmKPExsVy+t/xe7oC3AwxBvuuqVlsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW3zsucdqMeP8PiaLtUfuslssvX6RyaJ17xF2i8Nv2lkt Fmx8xOjA67Fm3hpGj02rOtk8Dr7bw+TRt2UVo8fnTXIBrFF6NkX5pSWpChn5xSW2StGGFkZ6 hpYWekYmlnqGxuaxVkamSvp2NimpOZllqUX6dgl6GSf7TjMVvOWsaJq5ma2B8RRHFyMnh4SA icSu7adZuhi5OIQEljJK3OlaxQKRkJZoPL2aCcIWlvhzrYsNougTo8Tai7vAEmwC5hKPtp8B s0UEPCRmTFzMClLELLCCWeL2u7fsXYwcHMICXhJPboSB1LAIqEqs//mNHcTmFXCR+Ll9DdQy eYmGXZvB4pwCrhLTVu5nBrGFgGoeHVrOCFEvKHFy5hOwemag+uats5knMArMQpKahSS1gJFp FaNIamlxbnpusZFecWJucWleul5yfu4mRmBEbTv2c8sOxq53wYcYBTgYlXh4HX79jxZiTSwr rsw9xCjBwawkwnuYgyFGiDclsbIqtSg/vqg0J7X4EKMp0BMTmaVEk/OB0Z5XEm9oamhuYWlo bmxubGahJM573qAySkggPbEkNTs1tSC1CKaPiYNTqoGx1Om/5ibPWaZrHj35mbdqTc9EzTKR l1z18xp6z7QY92VNVA4Wclkf3yrgNnWe2qXjH/88yzT56OhnX1Y3zbZq4YNNd/s2rpFrCn4t VFn21GG3/B47z61XrdnMDN47phesuj43dJpx7rqFSr7FTA+VdZ6fPszRd6dK5LWSxqvYDvtP b80sLhorsRRnJBpqMRcVJwIAdtaoHr4CAAA= X-CMS-MailID: 20181129155145eucas1p18b3f72cb77218279c9a844cbc179b728 X-Msg-Generator: CA X-RootMTR: 20181129155145eucas1p18b3f72cb77218279c9a844cbc179b728 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181129155145eucas1p18b3f72cb77218279c9a844cbc179b728 References: <20181129155134.19141-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Fix typo in imem clock divider 200 switched with 266. Fixes: 5785d6e61f27 ("clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains") Signed-off-by: Kamil Konieczny Reviewed-by: Chanwoo Choi --- drivers/clk/samsung/clk-exynos5433.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 751e2c4fb65b..ea47f49abc7f 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -568,10 +568,10 @@ static const struct samsung_gate_clock top_gate_clks[] __initconst = { GATE(CLK_ACLK_BUS1_400, "aclk_bus1_400", "div_aclk_bus1_400", ENABLE_ACLK_TOP, 25, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), - GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_266", + GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_200", ENABLE_ACLK_TOP, 24, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), - GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_200", + GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_266", ENABLE_ACLK_TOP, 23, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), GATE(CLK_ACLK_PERIC_66, "aclk_peric_66", "div_aclk_peric_66_b", From patchwork Thu Nov 29 15:51:31 2018 Content-Type: text/plain; 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Thu, 29 Nov 2018 15:51:44 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com, linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org, Chanwoo Choi , devicetree@vger.kernel.org, Krzysztof Kozlowski , Kukjin Kim , Mark Rutland , Rob Herring , Sylwester Nawrocki , Bartlomiej Zolnierkiewicz , Marek Szyprowski Subject: [PATCH v2 2/5] clk: samsung: exynos5433: fix name typo in sssx Date: Thu, 29 Nov 2018 16:51:31 +0100 Message-Id: <20181129155134.19141-3-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181129155134.19141-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrOKsWRmVeSWpSXmKPExsWy7djP87pC3AwxBt/auCw2zljPanH9y3NW i/lHzrFa9O37z2jR//g1s8X58xvYLT723GO1mHF+H5PF2iN32S2WXr/IZNG69wi7xeE37awO PB5r5q1h9Ni0qpPN4+C7PUwefVtWMXp83iQXwBrFZZOSmpNZllqkb5fAlbFo4nmmgmfcFYc3 P2NrYFzI1cXIySEhYCLx790l1i5GLg4hgRWMEhOun2OHcL4wSpxf38sKUiUk8JlR4tjGDJiO XY92M0EULWeUWPP+KjNcx+ZDD5hAqtgEzCUebT8DZosIuEn0TZ7NBlLELNDGLPF0dhdYQljA XeLc3q3MIDaLgKrE1K0z2EFsXgEXiY+nDjJCrJOXaNi1GSzOKeAqMW3lfmaIGkGJkzOfsIDY zEA1zVtng10hIbCJXWLqrcXsEM0uEk9PLIKyhSVeHd8CZctInJ7cwwJhl0vs3vqMHaK5hVFi 7uRFTBAJa4nDxy8CA4ADaIOmxPpd+iCmhICjxIYt1RAmn8SNt4IQJ/BJTNo2nRkizCvR0SYE MUNXYt7/M6wQtrRE1/91ULaHxOTm84wTGBVnIXlmFpJnZiGsXcDIvIpRPLW0ODc9tdg4L7Vc rzgxt7g0L10vOT93EyMwOZ3+d/zrDsZ9f5IOMQpwMCrx8Dr8+h8txJpYVlyZe4hRgoNZSYT3 MAdDjBBvSmJlVWpRfnxRaU5q8SFGaQ4WJXHeaoYH0UIC6YklqdmpqQWpRTBZJg5OqQbGzd0q D9lM7Nxt8lW0f8hvurZINetLTNpG6Z3lK76VBz+oUfl1RHTn4k3f/k/g/z3hWtPuW5khG52N LRZ/ZXsbvV3shs6/xOz/EwW35Rv0ykav2X04/KKldWtn49JXLKnJx89M3at8Z3tgr88yI3V3 ieke4nFfXjAWckieuR+0MiXzYPf3LzxlSizFGYmGWsxFxYkANNOTtEoDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrOIsWRmVeSWpSXmKPExsVy+t/xe7qC3AwxBp9fcFpsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW3zsucdqMeP8PiaLtUfuslssvX6RyaJ17xF2i8Nv2lkd eDzWzFvD6LFpVSebx8F3e5g8+rasYvT4vEkugDVKz6Yov7QkVSEjv7jEVina0MJIz9DSQs/I xFLP0Ng81srIVEnfziYlNSezLLVI3y5BL2PRxPNMBc+4Kw5vfsbWwLiQq4uRk0NCwERi16Pd TF2MXBxCAksZJdqeT2WHSEhLNJ5ezQRhC0v8udbFBlH0iVFi2ZRrLCAJNgFziUfbz4AViQh4 SMyYuJgVpIhZoI9Z4vPB82CThAXcJc7t3coMYrMIqEpM3ToDLM4r4CLx8dRBRogN8hINuzaD xTkFXCWmrdwPVi8EVPPo0HJGiHpBiZMzn4AtZgaqb946m3kCo8AsJKlZSFILGJlWMYqklhbn pucWG+oVJ+YWl+al6yXn525iBEbStmM/N+9gvLQx+BCjAAejEg+vw6//0UKsiWXFlbmHGCU4 mJVEeA9zMMQI8aYkVlalFuXHF5XmpBYfYjQFemIis5Rocj4wyvNK4g1NDc0tLA3Njc2NzSyU xHnPG1RGCQmkJ5akZqemFqQWwfQxcXBKNTCytQpqXIvIqTkoXtmWrySYLrzk/S2h9XI5+bub z09gq46YuY3T9Hei/mU7FQ3PzCfpXx1rDaRfFDBme2fs/blydsjsSfX+CXr3cxsLEsx7XtWI z6vL3bl9UfTG1wesNnKks1Twb2IOdp1YL+BSsVzsY3tH818Xx2hT7+3vpq98LCO5Zr/5ZiWW 4oxEQy3mouJEAETqX766AgAA X-CMS-MailID: 20181129155145eucas1p2bcf8fe4747d16d721ade85dc520551e4 X-Msg-Generator: CA X-RootMTR: 20181129155145eucas1p2bcf8fe4747d16d721ade85dc520551e4 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181129155145eucas1p2bcf8fe4747d16d721ade85dc520551e4 References: <20181129155134.19141-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Fix typo in sssx name, there should be three letters 's'. Signed-off-by: Kamil Konieczny Reviewed-by: Chanwoo Choi --- drivers/clk/samsung/clk-exynos5433.c | 2 +- include/dt-bindings/clock/exynos5433.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index ea47f49abc7f..24c3360db65b 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -559,7 +559,7 @@ static const struct samsung_gate_clock top_gate_clks[] __initconst = { /* ENABLE_ACLK_TOP */ GATE(CLK_ACLK_G3D_400, "aclk_g3d_400", "div_aclk_g3d_400", ENABLE_ACLK_TOP, 30, CLK_IS_CRITICAL, 0), - GATE(CLK_ACLK_IMEM_SSX_266, "aclk_imem_ssx_266", + GATE(CLK_ACLK_IMEM_SSSX_266, "aclk_imem_sssx_266", "div_aclk_imem_sssx_266", ENABLE_ACLK_TOP, 29, CLK_IGNORE_UNUSED, 0), GATE(CLK_ACLK_BUS0_400, "aclk_bus0_400", "div_aclk_bus0_400", diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h index 98bd85ce1e45..87bb2b017143 100644 --- a/include/dt-bindings/clock/exynos5433.h +++ b/include/dt-bindings/clock/exynos5433.h @@ -156,7 +156,7 @@ #define CLK_ACLK_G2D_266 220 #define CLK_ACLK_G2D_400 221 #define CLK_ACLK_G3D_400 222 -#define CLK_ACLK_IMEM_SSX_266 223 +#define CLK_ACLK_IMEM_SSSX_266 223 #define CLK_ACLK_BUS0_400 224 #define CLK_ACLK_BUS1_400 225 #define CLK_ACLK_IMEM_200 226 From patchwork Thu Nov 29 15:51:32 2018 Content-Type: text/plain; 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Thu, 29 Nov 2018 15:51:45 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com, linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org, Chanwoo Choi , devicetree@vger.kernel.org, Krzysztof Kozlowski , Kukjin Kim , Mark Rutland , Rob Herring , Sylwester Nawrocki , Bartlomiej Zolnierkiewicz , Marek Szyprowski Subject: [PATCH v2 3/5] arm64: dts: bindings: document imem clock Date: Thu, 29 Nov 2018 16:51:32 +0100 Message-Id: <20181129155134.19141-4-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181129155134.19141-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrBKsWRmVeSWpSXmKPExsWy7djPc7pC3AwxBr/+KFpsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW3zsucdqMeP8PiaLtUfuslssvX6RyaJ17xF2i8Nv2lkd eDzWzFvD6LFpVSebx8F3e5g8+rasYvT4vEkugDWKyyYlNSezLLVI3y6BK+P57J+sBS8FKpZ0 1DUwvuXtYuTkkBAwkXg3ZTFbFyMXh5DACkaJN1emM0I4Xxgl1s3sZ4VwPjNKvHo0iQ2m5Xfz fCaIxHJGidc3F7LDtbRM+skOUsUmYC7xaPsZJhBbRMBNom/ybLAlzAJtzBJPZ3eBJYQFHCV+ vrsDZrMIqEo099xlBrF5BVwkFh9YyQ6xTl6iYddmMJtTwFVi2sr9UDWCEidnPmEBsZmBapq3 zmYGWSAhsIldYs2eKVDNLhKzJzUxQtjCEq+Ob4GKy0j83zmfCcIul9i99Rk7RHMLo8TcyYug EtYSh49fBIYAB9AGTYn1u/Qhwo4SS+fMBwtLCPBJ3HgrCHEDn8SkbdOZIcK8Eh1tQhDVuhLz /p9hhbClJbr+r4OyPST2PlvOOIFRcRaSb2Yh+WYWwt4FjMyrGMVTS4tz01OLjfJSy/WKE3OL S/PS9ZLzczcxAtPT6X/Hv+xg3PUn6RCjAAejEg/vi+//o4VYE8uKK3MPMUpwMCuJ8B7mYIgR 4k1JrKxKLcqPLyrNSS0+xCjNwaIkzlvN8CBaSCA9sSQ1OzW1ILUIJsvEwSnVwKjbd9hKtqz1 omxul8jjnklrKhZtfjTxTK7tM34NXb6wFAGRt/dLDmwsfrt66jO2Bx72Lhla8mv2uf34fG1/ C1N21MUtf4J/tip5l6aUn5m1SMx8D8tVfZHTDN8mPrX+JiJv+3g9j++8RbtsXQ53zsldbbnh JodElRab9vaSf5fr737113VYI6HEUpyRaKjFXFScCABRVnNYSwMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrCIsWRmVeSWpSXmKPExsVy+t/xe7qC3AwxBkvXaFlsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW3zsucdqMeP8PiaLtUfuslssvX6RyaJ17xF2i8Nv2lkd eDzWzFvD6LFpVSebx8F3e5g8+rasYvT4vEkugDVKz6Yov7QkVSEjv7jEVina0MJIz9DSQs/I xFLP0Ng81srIVEnfziYlNSezLLVI3y5BL+P57J+sBS8FKpZ01DUwvuXtYuTkkBAwkfjdPJ8J xBYSWMooca05FiIuLdF4ejUThC0s8edaFxtEzSdGifcfckFsNgFziUfbz4DViAh4SMyYuJi1 i5GLg1mgj1ni88Hz7CAJYQFHiZ/v7oAVsQioSjT33GUGsXkFXCQWH1jJDrFAXqJh12Ywm1PA VWLayv3MEMtcJB4dWs4IUS8ocXLmExYQmxmovnnrbOYJjAKzkKRmIUktYGRaxSiSWlqcm55b bKRXnJhbXJqXrpecn7uJERhD24793LKDsetd8CFGAQ5GJR5eh1//o4VYE8uKK3MPMUpwMCuJ 8B7mYIgR4k1JrKxKLcqPLyrNSS0+xGgK9MREZinR5HxgfOeVxBuaGppbWBqaG5sbm1koifOe N6iMEhJITyxJzU5NLUgtgulj4uCUamDcE7baXW5jeQ370sot0zzfJMc+Y/9b/unkRZFkTlGp F1xLzM7e8tjbra96Pfp2mYnz4nkaaQJ8b5LYoj8Vfcp9HeFUIizwSat5yca6PZOq9jL98uAT ebtCcc7eo5wnpze9+1hz4e6rueaLljw8wm2m9XrzwQULlnCrGZ2Wsrdylc3/6cV1nF9UiaU4 I9FQi7moOBEAIfjccLcCAAA= X-CMS-MailID: 20181129155146eucas1p1518bbd1c009d340898227d3d72cbb5a1 X-Msg-Generator: CA X-RootMTR: 20181129155146eucas1p1518bbd1c009d340898227d3d72cbb5a1 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181129155146eucas1p1518bbd1c009d340898227d3d72cbb5a1 References: <20181129155134.19141-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document imem clock bindings for SSS (Security SubSystem) and SlimSSS IPs. Signed-off-by: Kamil Konieczny --- .../bindings/clock/exynos5433-clock.txt | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index 50d5897c9849..4e4352bf5a0b 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -19,6 +19,8 @@ Required Properties: which generates clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC IPs. - "samsung,exynos5433-cmu-fsys" - clock controller compatible for CMU_FSYS which generates clocks for USB/UFS/SDMMC/TSI/PDMA IPs. + - "samsung,exynos5433-cmu-imem" - clock controller compatible for CMU_IMEM + which generates clocks for SSS (Security SubSystem) and SlimSSS IPs. - "samsung,exynos5433-cmu-g2d" - clock controller compatible for CMU_G2D which generates clocks for G2D/MDMA IPs. - "samsung,exynos5433-cmu-disp" - clock controller compatible for CMU_DISP @@ -88,6 +90,12 @@ Required Properties: - sclk_usbhost30_fsys - sclk_usbdrd30_fsys + Input clocks for imem clock controller: + - oscclk + - aclk_imem_sssx_266 + - aclk_imem_266 + - aclk_imem_200 + Input clocks for g2d clock controller: - oscclk - aclk_g2d_266 @@ -264,6 +272,21 @@ Example 2: Examples of clock controller nodes are listed below. <&cmu_top CLK_SCLK_USBDRD30_FSYS>; }; + cmu_imem: clock-controller@11060000 { + compatible = "samsung,exynos5433-cmu-imem"; + reg = <0x11060000 0x1000>; + #clock-cells = <1>; + + clock-names = "oscclk", + "aclk_imem_sssx_266", + "aclk_imem_266", + "aclk_imem_200"; + clocks = <&xxti>, + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_200>; + }; + cmu_g2d: clock-controller@12460000 { compatible = "samsung,exynos5433-cmu-g2d"; reg = <0x12460000 0x0b08>; From patchwork Thu Nov 29 15:51:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamil Konieczny X-Patchwork-Id: 10704799 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 25A3C13AD for ; Thu, 29 Nov 2018 15:51:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 17B3A2F46C for ; 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Thu, 29 Nov 2018 15:51:46 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20181129155146eusmtrp27fd42086325e1362b9e944172e0a7c2e~royvstsaM2119121191eusmtrp2f; Thu, 29 Nov 2018 15:51:46 +0000 (GMT) X-AuditID: cbfec7f5-367ff700000012c6-b0-5c000b13918c Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id AF.D7.04128.21B000C5; Thu, 29 Nov 2018 15:51:46 +0000 (GMT) Received: from AMDC3218.DIGITAL.local (unknown [106.120.51.18]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20181129155145eusmtip28afef64a05e8ea39a036631ccb30b5fb~royvG6Sg92940129401eusmtip2B; Thu, 29 Nov 2018 15:51:45 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com, linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org, Chanwoo Choi , devicetree@vger.kernel.org, Krzysztof Kozlowski , Kukjin Kim , Mark Rutland , Rob Herring , Sylwester Nawrocki , Bartlomiej Zolnierkiewicz , Marek Szyprowski Subject: [PATCH v2 4/5] arm64: dts: exynos: add imem clock Date: Thu, 29 Nov 2018 16:51:33 +0100 Message-Id: <20181129155134.19141-5-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181129155134.19141-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrOKsWRmVeSWpSXmKPExsWy7djP87rC3AwxBovXc1lsnLGe1eL6l+es FvOPnGO16Nv3n9Gi//FrZovz5zewW3zsucdqMeP8PiaLtUfuslssvX6RyaJ17xF2i8Nv2lkd eDzWzFvD6LFpVSebx8F3e5g8+rasYvT4vEkugDWKyyYlNSezLLVI3y6BK+N1XxdjwUeOiv6P 8xkbGDewdzFyckgImEjsatjN1MXIxSEksIJR4k3HNUYI5wujxPvDi6AynxklHn6axArTsuRQ L1TVckaJZUvuMoEkwFrWTbECsdkEzCUebT8DFhcRcJPomzybDaSBWaCNWeLp7C6whLCAlcTl LaeYQWwWAVWJlyc6gaZycPAKuEgsPGIHsUxeomHXZrBbOQVcJaat3A9WzisgKHFy5hMWEJsZ qKZ562xmkPkSAtvYJS73fmSBaHaROP/5EROELSzx6vgWqKdlJP7vnA8VL5fYvfUZO0RzC6PE 3MmLoBLWEoePX2QFOYhZQFNi/S59iLCjRG97AzNIWEKAT+LGW0GIG/gkJm2bDhXmlehoE4Ko 1pWY9/8MNNykJbr+r4OyPSR67m5hn8CoOAvJN7OQfDMLYe8CRuZVjOKppcW56anFxnmp5XrF ibnFpXnpesn5uZsYgcnp9L/jX3cw7vuTdIhRgINRiYfX4df/aCHWxLLiytxDjBIczEoivIc5 GGKEeFMSK6tSi/Lji0pzUosPMUpzsCiJ81YzPIgWEkhPLEnNTk0tSC2CyTJxcEo1ME5vLEtu +mgQn7/oQ411t8p01T3LNnBsnrrdI+CK54S5RTK2l2ILLBqUua8Lb2id6br5C/NK34jljLU2 e6zTlKwf9m7Pnhsat+QEz/x2Vd3rVi1m9teSWyUFBRYUP57ltO9cbrO859sVqbU9r9/IPLqp Yqo+S86rZ6f359unWHuV/rr9vygzSYmlOCPRUIu5qDgRAGlJzohKAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrKIsWRmVeSWpSXmKPExsVy+t/xe7pC3AwxBl0NAhYbZ6xntbj+5Tmr xfwj51gt+vb9Z7Tof/ya2eL8+Q3sFh977rFazDi/j8li7ZG77BZLr19ksmjde4Td4vCbdlYH Ho8189Ywemxa1cnmcfDdHiaPvi2rGD0+b5ILYI3SsynKLy1JVcjILy6xVYo2tDDSM7S00DMy sdQzNDaPtTIyVdK3s0lJzcksSy3St0vQy3jd18VY8JGjov/jfMYGxg3sXYycHBICJhJLDvUy gthCAksZJa5MdoCIS0s0nl7NBGELS/y51sXWxcgFVPOJUeLrzTksIAk2AXOJR9vPgBWJCHhI zJi4mBWkiFmgj1ni88HzYBuEBawkLm85xQxiswioSrw80Qm0jYODV8BFYuERO4gF8hINuzaD lXMKuEpMW7mfGeIgF4lHh5aDHccrIChxcuYTsL3MQPXNW2czT2AUmIUkNQtJagEj0ypGkdTS 4tz03GIjveLE3OLSvHS95PzcTYzAKNp27OeWHYxd74IPMQpwMCrx8Dr8+h8txJpYVlyZe4hR goNZSYT3MAdDjBBvSmJlVWpRfnxRaU5q8SFGU6AfJjJLiSbnAyM8ryTe0NTQ3MLS0NzY3NjM Qkmc97xBZZSQQHpiSWp2ampBahFMHxMHp1QD41Jm4b0FXwWqWzdkcSl+l9/N+WjNk5xJ0dVv n920Uwrpu8WzdPrJvUqleyIOuGZu/6lT22QnEO4Rd//0G3u20jXnrFWZc1bc5S53VzvWeZNz hqtTV/lTS/FD4S5nnZ025X1YeilVqOmM9UvTA+maet4yAgLdx1znPd71hWd9/hcZc3Xt1t6X SizFGYmGWsxFxYkAxOnq1rgCAAA= X-CMS-MailID: 20181129155146eucas1p15ff987ffae765e34b64cd2244e9078c3 X-Msg-Generator: CA X-RootMTR: 20181129155146eucas1p15ff987ffae765e34b64cd2244e9078c3 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181129155146eucas1p15ff987ffae765e34b64cd2244e9078c3 References: <20181129155134.19141-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add description for imem clock. The users can use compatibility "samsung,exynos5433-cmu-imem". Signed-off-by: Kamil Konieczny --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 2131f12364cb..34055fa3a9d0 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -340,6 +340,21 @@ <&cmu_top CLK_SCLK_USBDRD30_FSYS>; }; + cmu_imem: clock-controller@11060000 { + compatible = "samsung,exynos5433-cmu-imem"; + reg = <0x11060000 0x1000>; + #clock-cells = <1>; + + clock-names = "oscclk", + "aclk_imem_sssx_266", + "aclk_imem_266", + "aclk_imem_200"; + clocks = <&xxti>, + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_200>; + }; + cmu_g2d: clock-controller@12460000 { compatible = "samsung,exynos5433-cmu-g2d"; reg = <0x12460000 0x1000>; From patchwork Thu Nov 29 15:51:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamil Konieczny X-Patchwork-Id: 10704801 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7E69B17D5 for ; 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Thu, 29 Nov 2018 15:51:46 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com Cc: Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/5] clk: samsung: exynos5433: add imem clock Date: Thu, 29 Nov 2018 16:51:34 +0100 Message-Id: <20181129155134.19141-6-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181129155134.19141-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrBKsWRmVeSWpSXmKPExsWy7djPc7rC3AwxBivW6lvMP3KO1aJv339G i/7Hr5ktzp/fwG6x6fE1VovLu+awWcw4v4/JYun1i0wWrXuPsDtweqyZt4bRY9OqTjaPzUvq PQ6+28Pk8XmTXABrFJdNSmpOZllqkb5dAlfGka272At+xlZ8Or+HpYFxYlAXIweHhICJxK+v WV2MXBxCAisYJQ6cfc0C4XxhlDi5opURwvnMKPF201r2LkZOsI4rj3axQiSWM0rsuHQeoaXp 9kUmkCo2AXOJR9vPgNkiAsoSk+9NZwYpYhaYwSSx5thXNpCEsICDxJ2N58CKWARUJRo75zKC 2LwCLhJXfq1mg1gnL9GwazPYak4BV4lpK/czQ9QISpyc+YQFxGYGqmneOhtsgYTAInaJOY0d LBDNLhKztu2AsoUlXh3fAvWDjMTpyT1Q8XKJ3VufsUM0tzBKzJ28iAkiYS1x+PhFVlAwMQto SqzfpQ8RdpR4ve4uMyT0+CRuvBWEuIFPYtK26VBhXomONiGIal2Jef/PsELY0hJd/9dB2R4S K6asYZ3AqDgLyTezkHwzC2HvAkbmVYziqaXFuempxcZ5qeV6xYm5xaV56XrJ+bmbGIHp5/S/ 4193MO77k3SIUYCDUYmH1+HX/2gh1sSy4srcQ4wSHMxKIryHORhihHhTEiurUovy44tKc1KL DzFKc7AoifNWMzyIFhJITyxJzU5NLUgtgskycXBKNTBW/fCN/G20N2ye2vWrqxw83t72ynyq 891KbrtQHm+qz4bl62rbgh6UnxeYsWjGeZ/7C0+lb328z1w04cSUitv+US7Jf3K+zRHadEq+ fbpixZdJ3z45el1W2K/h0LVuxfSzu6/5ZwSJTt3SWHNkxexl0uq/RSc1P1gT/oBr31bvlI8H C7ijpZiZlFiKMxINtZiLihMBaMSZPjsDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprGIsWRmVeSWpSXmKPExsVy+t/xe7pC3AwxBjdP61jMP3KO1aJv339G i/7Hr5ktzp/fwG6x6fE1VovLu+awWcw4v4/JYun1i0wWrXuPsDtweqyZt4bRY9OqTjaPzUvq PQ6+28Pk8XmTXABrlJ5NUX5pSapCRn5xia1StKGFkZ6hpYWekYmlnqGxeayVkamSvp1NSmpO Zllqkb5dgl7Gka272At+xlZ8Or+HpYFxYlAXIyeHhICJxJVHu1i7GLk4hASWMkqs+3SPHSIh LdF4ejUThC0s8edaFxuILSTwiVGie2MAiM0mYC7xaPsZsBoRAWWJyfemM4MMYhZYwCSx5coz RpCEsICDxJ2N58CKWARUJRo754LFeQVcJK78Ws0GsUBeomHXZrDFnAKuEtNW7meGWOYi8ejQ cqh6QYmTM5+wgNjMQPXNW2czT2AUmIUkNQtJagEj0ypGkdTS4tz03GJDveLE3OLSvHS95Pzc TYzAONl27OfmHYyXNgYfYhTgYFTi4XX49T9aiDWxrLgy9xCjBAezkgjvYQ6GGCHelMTKqtSi /Pii0pzU4kOMpkBPTGSWEk3OB8ZwXkm8oamhuYWlobmxubGZhZI473mDyighgfTEktTs1NSC 1CKYPiYOTqkGxgTbor3NCjEZ9k16qsr1YjJFSaFv8lPrOpr1f0/eoHh01k6Vs1cv7sv+d35t ovGajeYLXkhUHNJ6Y5ndfaVp4m/m5xoHdP5sdfdep3UzOuXG3OwL/xo+zTleHL7qZGz2foer k7Zt/yBs9+zz+wk6swSWHNx+/+6b5vmm108LXs4wMvD7K55o/V6JpTgj0VCLuag4EQDtDSa3 qQIAAA== X-CMS-MailID: 20181129155147eucas1p14b902fc9c4e9abda03dcf506486d4152 X-Msg-Generator: CA X-RootMTR: 20181129155147eucas1p14b902fc9c4e9abda03dcf506486d4152 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181129155147eucas1p14b902fc9c4e9abda03dcf506486d4152 References: <20181129155134.19141-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add imem clock for exynos5433. This will enable to use crypto Security SubSystem (in short SSS) and SlimSSS IP blocks. Signed-off-by: Kamil Konieczny --- drivers/clk/samsung/clk-exynos5433.c | 189 +++++++++++++++++++++++++ include/dt-bindings/clock/exynos5433.h | 55 +++++++ 2 files changed, 244 insertions(+) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 24c3360db65b..ab03126f350b 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -2345,6 +2345,192 @@ static const struct samsung_cmu_info fsys_cmu_info __initconst = { .clk_name = "aclk_fsys_200", }; +/* + * Register offset definitions for CMU_IMEM + * + */ +#define ENABLE_ACLK_IMEM 0x0800 +#define ENABLE_ACLK_IMEM_INT_MEM 0x0804 +#define ENABLE_ACLK_IMEM_SSS 0x0808 +#define ENABLE_ACLK_IMEM_SLIMSSS 0x080c +#define ENABLE_ACLK_IMEM_RTIC 0x0810 +#define ENABLE_ACLK_IMEM_SMMU_SSS 0x0814 +#define ENABLE_ACLK_IMEM_SMMU_SLIMSSS 0x0818 +#define ENABLE_ACLK_IMEM_SMMU_RTIC 0x081c +#define ENABLE_ACLK_IMEM_ARBG_TX 0x0820 +#define ENABLE_ACLK_IMEM_SMMU_ARBG_TX 0x0824 +#define ENABLE_PCLK_IMEM 0x0900 +#define ENABLE_PCLK_IMEM_SSS 0x0904 +#define ENABLE_PCLK_IMEM_SLIMSSS 0x0908 +#define ENABLE_PCLK_IMEM_RTIC 0x090c +#define ENABLE_PCLK_IMEM_SMMU_SSS 0x0910 +#define ENABLE_PCLK_IMEM_SMMU_SLIMSSS 0x0914 +#define ENABLE_PCLK_IMEM_SMMU_RTIC 0x0918 +#define ENABLE_PCLK_IMEM_SMMU_ARGB_TX 0x091c + +static const unsigned long imem_clk_regs[] __initconst = { + ENABLE_ACLK_IMEM, + ENABLE_ACLK_IMEM_INT_MEM, + ENABLE_ACLK_IMEM_SSS, + ENABLE_ACLK_IMEM_SLIMSSS, + ENABLE_ACLK_IMEM_RTIC, + ENABLE_ACLK_IMEM_SMMU_SSS, + ENABLE_ACLK_IMEM_SMMU_SLIMSSS, + ENABLE_ACLK_IMEM_SMMU_RTIC, + ENABLE_ACLK_IMEM_ARBG_TX, + ENABLE_ACLK_IMEM_SMMU_ARBG_TX, + ENABLE_PCLK_IMEM, + ENABLE_PCLK_IMEM_SSS, + ENABLE_PCLK_IMEM_SLIMSSS, + ENABLE_PCLK_IMEM_RTIC, + ENABLE_PCLK_IMEM_SMMU_SSS, + ENABLE_PCLK_IMEM_SMMU_SLIMSSS, + ENABLE_PCLK_IMEM_SMMU_RTIC, + ENABLE_PCLK_IMEM_SMMU_ARGB_TX, +}; + +static const struct samsung_gate_clock imem_gate_clks[] __initconst = { + /* ENABLE_ACLK_IMEM */ + GATE(CLK_ACLK_AXI2AHB_IMEMH, "aclk_axi2ahb_imemh", "aclk_imem_200", + ENABLE_ACLK_IMEM, 24, 0, 0), + GATE(CLK_ACLK_AXIDS_SROMC, "aclk_axids_sromc", "aclk_imem_200", + ENABLE_ACLK_IMEM, 23, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_SROMC, "aclk_sromc", "aclk_imem_200", + ENABLE_ACLK_IMEM, 22, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_ARBG_TX, "aclk_bts_arbg_tx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 21, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXI_IMEMX, "aclk_asyncaxi_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 20, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIUS_IMEMX, "aclk_axius_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 19, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_IMEMX, "aclk_xiu_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 18, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXI_SSSX, "aclk_asyncaxi_sssx", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SLIMSSS, "aclk_bts_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SSS_DRAM, "aclk_bts_sss_dram", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SSS_CCI, "aclk_bts_sss_cci", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 13, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ALB_IMEM, "aclk_alb_imem", "aclk_imem_266", + ENABLE_ACLK_IMEM, 12, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM1P, "aclk_axids_pimemx_imem1p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 11, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM0P, "aclk_axids_pimemx_imem0p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 10, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_GIC, "aclk_axids_pimemx_gic", "aclk_imem_200", + ENABLE_ACLK_IMEM, 9, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAHBM_SSS_ATLAS, "aclk_asyncahbm_sss_atlas", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXIS_MIF_PIMEMX, "aclk_asyncaxis_mif_pimemx", "aclk_imem_200", + ENABLE_ACLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXI2APB_IMEM1P, "aclk_axi2apb_imem1p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXI2APB_IMEM0P, "aclk_axi2apb_imem0p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_SSSX, "aclk_xiu_sssx", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_PIMEMX, "aclk_xiu_pimemx", "aclk_imem_200", + ENABLE_ACLK_IMEM, 2, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_IMEMND_266, "aclk_imemnd_266", "aclk_imem_266", + ENABLE_ACLK_IMEM, 1, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_GIC, "aclk_gic", "aclk_imem_200", + ENABLE_ACLK_IMEM, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_ACLK_IMEM_INT_MEM */ + GATE(CLK_ACLK_INT_MEM, "aclk_int_mem", "aclk_imem_200", + ENABLE_ACLK_IMEM_INT_MEM, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_SSS */ + GATE(CLK_ACLK_SSS, "aclk_sss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_SLIMSSS */ + GATE(CLK_ACLK_SLIMSSS, "aclk_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_RTIC */ + GATE(CLK_ACLK_RTIC, "aclk_rtic", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_RTIC, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_SMMU_SSS */ + GATE(CLK_ACLK_SMMU_SSS_DRAM, "aclk_smmu_sss_dram", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_SSS, 1, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_SMMU_SSS_CCI, "aclk_smmu_sss_cci", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_SSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_SMMU_SLIMSSS */ + GATE(CLK_ACLK_SMMU_SLIMSSS, "aclk_smmu_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_SMMU_RTIC */ + GATE(CLK_ACLK_SMMU_RTIC, "aclk_smmu_rtic", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_RTIC, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_ARBG_TX */ + GATE(CLK_ACLK_ARBG_TX, "aclk_arbg_tx", "aclk_imem_266", + ENABLE_ACLK_IMEM_ARBG_TX, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_ACLK_IMEM_SMMU_ARBG_TX */ + GATE(CLK_ACLK_SMMU_ARBG_TX, "aclk_smmu_arbg_tx", "aclk_imem_266", + ENABLE_ACLK_IMEM_SMMU_ARBG_TX, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_PCLK_IMEM */ + GATE(CLK_PCLK_GPIO_IMEM, "pclk_gpio_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ASYNCAXI_IMEMX, "pclk_asyncaxi_imemx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 16, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_ARBG_TX, "pclk_bts_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ASYNCAPB_ARBG_TX, "pclk_asyncapb_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), + + GATE(CLK_PCLK_BTS_SLIMSSS, "pclk_bts_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM, 8, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_SSS_DRAM, "pclk_bts_sss_dram", "aclk_imem_200", + ENABLE_PCLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_SSS_CCI, "pclk_bts_sss_cci", "aclk_imem_200", + ENABLE_PCLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ALB_IMEM, "pclk_alb_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_PMU_IMEM, "pclk_pmu_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_SYSREG_IMEM, "pclk_sysreg_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SSS */ + GATE(CLK_PCLK_SSS, "pclk_sss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SLIMSSS */ + GATE(CLK_PCLK_SLIMSSS, "pclk_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_RTIC */ + GATE(CLK_PCLK_RTIC, "pclk_rtic", "aclk_imem_200", + ENABLE_PCLK_IMEM_RTIC, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SMMU_SSS */ + GATE(CLK_PCLK_SMMU_SSS_DRAM, "pclk_smmu_sss_dram", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_SSS, 1, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_SMMU_SSS_CCI, "pclk_smmu_sss_cci", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_SSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SMMU_SLIMSSS */ + GATE(CLK_PCLK_SMMU_SLIMSSS, "pclk_smmu_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SMMU_RTIC */ + GATE(CLK_PCLK_SMMU_RTIC, "pclk_sss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_RTIC, 0, CLK_IGNORE_UNUSED, 0), + /* ENABLE_PCLK_IMEM_SMMU_ARGB_TX */ + GATE(CLK_PCLK_SMMU_ARBG_TX, "pclk_smmu_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_ARGB_TX, 0, CLK_IGNORE_UNUSED, 0), +}; + +static const struct samsung_cmu_info imem_cmu_info __initconst = { + .gate_clks = imem_gate_clks, + .nr_gate_clks = ARRAY_SIZE(imem_gate_clks), + .nr_clk_ids = IMEM_NR_CLK, + .clk_regs = imem_clk_regs, + .nr_clk_regs = ARRAY_SIZE(imem_clk_regs), +}; + +static void __init exynos5433_cmu_imem_init(struct device_node *np) +{ + samsung_cmu_register_one(np, &imem_cmu_info); +} + +CLK_OF_DECLARE(exynos5433_cmu_imem, "samsung,exynos5433-cmu-imem", + exynos5433_cmu_imem_init); + /* * Register offset definitions for CMU_G2D */ @@ -5648,6 +5834,9 @@ static const struct of_device_id exynos5433_cmu_of_match[] = { }, { .compatible = "samsung,exynos5433-cmu-hevc", .data = &hevc_cmu_info, + }, { + .compatible = "samsung,exynos5433-cmu-imem", + .data = &imem_cmu_info, }, { .compatible = "samsung,exynos5433-cmu-isp", .data = &isp_cmu_info, diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h index 87bb2b017143..312d8810b56d 100644 --- a/include/dt-bindings/clock/exynos5433.h +++ b/include/dt-bindings/clock/exynos5433.h @@ -623,6 +623,61 @@ #define FSYS_NR_CLK 116 +/* CMU_IMEM */ +#define CLK_ACLK_SSS 1 +#define CLK_ACLK_SLIMSSS 2 +#define CLK_ACLK_RTIC 3 +#define CLK_ACLK_XIU_SSSX 4 +#define CLK_ACLK_ASYNCAHBM_SSS_ATLAS 5 +#define CLK_ACLK_ASYNCAXI_SSSX 6 +#define CLK_ACLK_BTS_SSS_CCI 7 +#define CLK_ACLK_BTS_SSS_DRAM 8 +#define CLK_ACLK_BTS_SLIMSSS 9 +#define CLK_ACLK_SMMU_SSS_CCI 10 +#define CLK_ACLK_SMMU_SSS_DRAM 11 +#define CLK_ACLK_SMMU_SLIMSSS 12 +#define CLK_ACLK_SMMU_RTIC 13 +#define CLK_ACLK_IMEMND_266 14 +#define CLK_ACLK_ALB_IMEM 15 +#define CLK_ACLK_XIU_IMEMX 16 +#define CLK_ACLK_AXIUS_IMEMX 17 +#define CLK_ACLK_ASYNCAXI_IMEMX 18 +#define CLK_ACLK_ARBG_TX 19 +#define CLK_ACLK_BTS_ARBG_TX 20 +#define CLK_ACLK_SMMU_ARBG_TX 21 +#define CLK_ACLK_GIC 22 +#define CLK_ACLK_INT_MEM 23 +#define CLK_ACLK_XIU_PIMEMX 24 +#define CLK_ACLK_AXI2APB_IMEM0P 25 +#define CLK_ACLK_AXI2APB_IMEM1P 26 +#define CLK_ACLK_ASYNCAXIS_MIF_PIMEMX 27 +#define CLK_ACLK_AXIDS_PIMEMX_GIC 28 +#define CLK_ACLK_AXIDS_PIMEMX_IMEM0P 29 +#define CLK_ACLK_AXIDS_PIMEMX_IMEM1P 30 +#define CLK_ACLK_SROMC 31 +#define CLK_ACLK_AXIDS_SROMC 32 +#define CLK_ACLK_AXI2AHB_IMEMH 33 +#define CLK_PCLK_SSS 34 +#define CLK_PCLK_SLIMSSS 35 +#define CLK_PCLK_RTIC 36 +#define CLK_PCLK_SYSREG_IMEM 37 +#define CLK_PCLK_PMU_IMEM 38 +#define CLK_PCLK_ALB_IMEM 39 +#define CLK_PCLK_BTS_SSS_CCI 40 +#define CLK_PCLK_BTS_SSS_DRAM 41 +#define CLK_PCLK_BTS_SLIMSSS 42 +#define CLK_PCLK_SMMU_SSS_CCI 43 +#define CLK_PCLK_SMMU_SSS_DRAM 44 +#define CLK_PCLK_SMMU_SLIMSSS 45 +#define CLK_PCLK_SMMU_RTIC 46 +#define CLK_PCLK_ASYNCAPB_ARBG_TX 47 +#define CLK_PCLK_BTS_ARBG_TX 48 +#define CLK_PCLK_SMMU_ARBG_TX 49 +#define CLK_PCLK_ASYNCAXI_IMEMX 50 +#define CLK_PCLK_GPIO_IMEM 51 + +#define IMEM_NR_CLK 52 + /* CMU_G2D */ #define CLK_MUX_ACLK_G2D_266_USER 1 #define CLK_MUX_ACLK_G2D_400_USER 2