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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id v9sm1099317ljv.131.2021.06.05.09.12.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Jun 2021 09:12:11 -0700 (PDT) From: Linus Walleij List-Id: To: arm@kernel.org, soc@kernel.org Cc: linux-arm-kernel@lists.infradead.org, Linus Walleij , Corentin Labbe Subject: [PATCH] ARM: dts: ixp4xx: Add crypto engine Date: Sat, 5 Jun 2021 18:10:07 +0200 Message-Id: <20210605161007.3397216-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210605_091315_072508_6C1B5F40 X-CRM114-Status: GOOD ( 11.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the crypto engine as a child of the NPE. Cc: Corentin Labbe Signed-off-by: Linus Walleij --- ARM SoC folks: please queue this patch on top of the other ixp4xx changes sent by pull request. --- arch/arm/boot/dts/intel-ixp4xx.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/intel-ixp4xx.dtsi b/arch/arm/boot/dts/intel-ixp4xx.dtsi index 528d5dc09cfc..a50427ad05e7 100644 --- a/arch/arm/boot/dts/intel-ixp4xx.dtsi +++ b/arch/arm/boot/dts/intel-ixp4xx.dtsi @@ -113,6 +113,14 @@ timer@c8005000 { npe: npe@c8006000 { compatible = "intel,ixp4xx-network-processing-engine"; reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>; + + /* NPE-C contains a crypto accelerator */ + crypto { + compatible = "intel,ixp4xx-crypto"; + intel,npe-handle = <&npe 2>; + queue-rx = <&qmgr 30>; + queue-txready = <&qmgr 29>; + }; }; /* This is known as EthB */