From patchwork Sun Jun 6 10:36:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sven Peter X-Patchwork-Id: 12301985 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89E9BC4743F for ; Sun, 6 Jun 2021 10:37:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5C8D26142B for ; Sun, 6 Jun 2021 10:37:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230231AbhFFKiw (ORCPT ); Sun, 6 Jun 2021 06:38:52 -0400 Received: from out4-smtp.messagingengine.com ([66.111.4.28]:41669 "EHLO out4-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229465AbhFFKiv (ORCPT ); Sun, 6 Jun 2021 06:38:51 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 0D2875C010A; Sun, 6 Jun 2021 06:37:02 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute4.internal (MEProxy); Sun, 06 Jun 2021 06:37:02 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=svenpeter.dev; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; s=fm1; bh=SmKvFMjBu/a0urc3RGRKw51AD7 PuMxYFcgBohA05z0Q=; b=jnwCt1OcYp2RG/uWgT/Rt3w7wgw4B2lwS7sHkOzlUv CefOnLcPw7by9k4yrLYL5ehhn2PnB6kEGyVFwfL7YzrZl04m1olk6snXhiXck4/N 5AP1G9ec6LzKzwJ2P9pDe0LXb+rBYxH8HhtAj+iM22WJ9q0eaNvYA9BghAAPDv+p cJ5g9qaul3ShkI2WYl9PpXE1bsIHdTMQMURmOBynxxILgrBgZa1Ugdxy5Hrtkbl2 xgs7Ew6Zr/0H0bIPPQiDsCCl9I40nt7+oXB8uATlqJZoaIE1KPWjI08VQypsqrpQ bdilQyEMy9vnFK7hWDQdmSR2kPa2YbOxgiyuiVAUPhQw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :message-id:mime-version:subject:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=SmKvFMjBu/a0urc3R GRKw51AD7PuMxYFcgBohA05z0Q=; b=QaZkEO0AMDpdG4MxgVJ99h6pmiuLSGFle ZRdS3yi0DzltUhWhjjcSme1auYJ7WvVouXcJkfu4CJK31rFnxJ2FBPMclOZ2N0+F rmwVFgXsWrQeb8jplkoi+WeMrDYOnOMauk/1QnsKuCibrdv/UDAPGv8shILU884h /SkT79ISXyZRYtDkfNod3hZMUyaPCzkHTxlliAVYZj40Iu48SnEONteBHDW0rFlM ZhzpP7NzvzelGqjlaF7P5q8RHyUleE9yHf2KX68unZ/F8SI+KehJYcfI5MIkBxhl E3op1/XqYFeC1sC9FdXlMSinX8aNyXLXWdaNBKnkMEwlK6be6uLLQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeduledrfedthedgfeduucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffoggfgsedtkeertdertddtnecuhfhrohhmpefuvhgvnhcurfgv thgvrhcuoehsvhgvnhesshhvvghnphgvthgvrhdruggvvheqnecuggftrfgrthhtvghrnh epuefgleekvddtjefffeejheevleefveekgfduudfhgefhfeegtdehveejfefffffgnecu vehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepshhvvghnse hsvhgvnhhpvghtvghrrdguvghv X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 6 Jun 2021 06:37:00 -0400 (EDT) From: Sven Peter To: linux-usb@vger.kernel.org Cc: Felipe Balbi , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Arnd Bergmann , Sven Peter Subject: [PATCH v2] usb: dwc3: support 64 bit DMA in platform driver Date: Sun, 6 Jun 2021 12:36:56 +0200 Message-Id: <20210606103656.71079-1-sven@svenpeter.dev> X-Mailer: git-send-email 2.30.1 (Apple Git-130) MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Currently, the dwc3 platform driver does not explicitly ask for a DMA mask. This makes it fall back to the default 32-bit mask which breaks the driver on systems that only have RAM starting above the first 4G like the Apple M1 SoC. Fix this by using the same logic already present in xhci-plat.c: First, try to set a coherent dma mask for 64-bit, and then attempt again with a 32-bit mask if this fails. Signed-off-by: Sven Peter --- I have taken the code directly from the xhci-plat.c driver so I think this change should be fairly low risk. Unfortunately I only have the Apple M1 to test this on but here the driver still works with the iommu enabled which limits the address space to 32 bit. It also enables to use this with the iommu in bypass mode which requires 64 bit addresses. I believe this has been working fine so far since the dwc3 driver only uses a few very small buffers in host mode which might still fit within the first 4G of address space on many devices. The majority of DMA buffers are allocated inside the xhci driver which will already call dma_set_mask_and_coherent. Best, Sven changes from v1: - removed WARN_ON around !dwc->sysdev->dma_mask; pointed out by greg k-h drivers/usb/dwc3/core.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index b6e53d8212cd..4930541a8984 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1545,6 +1545,21 @@ static int dwc3_probe(struct platform_device *pdev) dwc3_get_properties(dwc); + /* Try to set 64-bit DMA first */ + if (!dwc->sysdev->dma_mask) + /* Platform did not initialize dma_mask */ + ret = dma_coerce_mask_and_coherent(dwc->sysdev, + DMA_BIT_MASK(64)); + else + ret = dma_set_mask_and_coherent(dwc->sysdev, DMA_BIT_MASK(64)); + + /* If seting 64-bit DMA mask fails, fall back to 32-bit DMA mask */ + if (ret) { + ret = dma_set_mask_and_coherent(dwc->sysdev, DMA_BIT_MASK(32)); + if (ret) + return ret; + } + dwc->reset = devm_reset_control_array_get_optional_shared(dev); if (IS_ERR(dwc->reset)) return PTR_ERR(dwc->reset);