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Wed, 16 Jun 2021 12:12:52 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 16 Jun 2021 12:12:52 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 16 Jun 2021 12:12:52 -0500 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 15GHCSuC106909; Wed, 16 Jun 2021 12:12:45 -0500 From: Aswath Govindraju To: Subject: [PATCH v5 1/3] arm64: dts: ti: k3-am64-main: Update TF-A's maximum size and node name Date: Wed, 16 Jun 2021 22:42:22 +0530 Message-ID: <20210616171224.24635-2-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210616171224.24635-1-a-govindraju@ti.com> References: <20210616171224.24635-1-a-govindraju@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210616_101254_205128_BD233B75 X-CRM114-Status: GOOD ( 11.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , devicetree@vger.kernel.org, Vignesh Raghavendra , Tero Kristo , Lokesh Vutla , linux-kernel@vger.kernel.org, Kishon Vijay Abraham I , Rob Herring , Aswath Govindraju , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The maximum size of TF-A 2.5 has been increased to 0x1c000 [1]. In order to account for future expansions too, increase the allocated size for TF-A to 0x20000, in the device tree node. Also, update the node name to "tfa-sram". [1] - https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?id=2fb5312f61a7de8b7a70e1639199c4f14a10b6f9 Signed-off-by: Aswath Govindraju Reviewed-by: Suman Anna --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index dec54243f454..e918afc2298e 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -24,8 +24,8 @@ #size-cells = <1>; ranges = <0x0 0x00 0x70000000 0x200000>; - atf-sram@0 { - reg = <0x0 0x1a000>; + tfa-sram@0 { + reg = <0x0 0x20000>; }; }; From patchwork Wed Jun 16 17:12:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aswath Govindraju X-Patchwork-Id: 12325737 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBAB4C48BE6 for ; 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Wed, 16 Jun 2021 12:13:04 -0500 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 15GHCSuD106909; Wed, 16 Jun 2021 12:12:58 -0500 From: Aswath Govindraju To: Subject: [PATCH v5 2/3] arm64: dts: ti: k3-am64-main: Reserve OCMRAM for DMSC-lite and secure proxy communication Date: Wed, 16 Jun 2021 22:42:23 +0530 Message-ID: <20210616171224.24635-3-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210616171224.24635-1-a-govindraju@ti.com> References: <20210616171224.24635-1-a-govindraju@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210616_101312_148233_1607A299 X-CRM114-Status: GOOD ( 10.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , devicetree@vger.kernel.org, Vignesh Raghavendra , Tero Kristo , Lokesh Vutla , linux-kernel@vger.kernel.org, Kishon Vijay Abraham I , Rob Herring , Aswath Govindraju , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The final 128KB in SRAM is reserved by default for DMSC-lite code and secure proxy communication buffer. The memory region used for DMSC-lite code can be optionally freed up by secure firmware API[1]. However, the buffer for secure proxy communication is not configurable. This default hardware configuration is unique for AM64. Therefore, indicate the area reserved for DMSC-lite code and secure proxy communication buffer in the oc_sram device tree node. [1] - http://downloads.ti.com/tisci/esd/latest/6_topic_user_guides/security_handover.html#triggering-security-handover Signed-off-by: Aswath Govindraju Reviewed-by: Suman Anna --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index e918afc2298e..27888ee6f039 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -27,6 +27,14 @@ tfa-sram@0 { reg = <0x0 0x20000>; }; + + dmsc-sram@1e0000 { + reg = <0x1e0000 0x1c000>; + }; + + sproxy-sram@1fc000 { + reg = <0x1fc000 0x4000>; + }; }; main_conf: syscon@43000000 { From patchwork Wed Jun 16 17:12:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aswath Govindraju X-Patchwork-Id: 12325739 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 849E7C48BE5 for ; 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Wed, 16 Jun 2021 12:13:16 -0500 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 15GHCSuE106909; Wed, 16 Jun 2021 12:13:07 -0500 From: Aswath Govindraju To: Subject: [PATCH v5 3/3] arm64: dts: ti: k3-am64-main: Update the location of TF-A in compliance with U-Boot v2021.10 Date: Wed, 16 Jun 2021 22:42:24 +0530 Message-ID: <20210616171224.24635-4-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210616171224.24635-1-a-govindraju@ti.com> References: <20210616171224.24635-1-a-govindraju@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210616_101318_267262_287B011D X-CRM114-Status: GOOD ( 11.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , devicetree@vger.kernel.org, Vignesh Raghavendra , Tero Kristo , Lokesh Vutla , linux-kernel@vger.kernel.org, Kishon Vijay Abraham I , Rob Herring , Aswath Govindraju , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Due to a limitation for USB DFU boot mode, SPL load address has to be less than or equal to 0x70001000. So, load address of SPL and TF-A have been moved to 0x70000000 and 0x701c0000 respectively, in U-Boot version 2021.10. Therefore, update TF-A's location in the device tree node. Signed-off-by: Aswath Govindraju Reviewed-by: Suman Anna --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index 27888ee6f039..62d2b8fff67d 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -24,8 +24,8 @@ #size-cells = <1>; ranges = <0x0 0x00 0x70000000 0x200000>; - tfa-sram@0 { - reg = <0x0 0x20000>; + tfa-sram@1c0000 { + reg = <0x1c0000 0x20000>; }; dmsc-sram@1e0000 {