From patchwork Mon Jun 21 07:24:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 12333965 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CCA91C49EA2 for ; Mon, 21 Jun 2021 07:24:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9E87760240 for ; Mon, 21 Jun 2021 07:24:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9E87760240 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2691689DA6; Mon, 21 Jun 2021 07:24:48 +0000 (UTC) Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0D80989DA6 for ; Mon, 21 Jun 2021 07:24:47 +0000 (UTC) Received: by mail-pj1-x102a.google.com with SMTP id bb10-20020a17090b008ab029016eef083425so11647030pjb.5 for ; Mon, 21 Jun 2021 00:24:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aJX1UFosdGgtQiivB9jicucdS1I6wv967TxVmwHSdxs=; b=V71Ch/PoqunpqXNk2/DoavvTbggIYZldcnabdHtFy1UiLBMjHIrOmIoMNQxCaDTm5c +3KxqNIZZO+knQOcz1JRXGFCJJ438OjCADQ9pTf4aNCbVuVny8KyLPLlAqTazVySGaN/ EwK0UGohgNug02bYbuADf0FVuQWHASoWe/MjM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aJX1UFosdGgtQiivB9jicucdS1I6wv967TxVmwHSdxs=; b=Dd/Wq+KBYNwhINd7PB3MPYnABGGKAjkwwLHg1JcQ8fSXejS0G32dYJsXIBsSoJ15a3 Dt6h9k7peLQVLw6fMuGNRY+h0cUGGw2V6olLUvruXQsJoXCALEJ3oTplOcuXxalZejYl 1P7LGd3Vgu+igUc9Ge/6at51yJi7IiEwDpjjG7FyvOY21+A0nUG9uNR6jHnfKqa1lkBR lXycjPaRk4eleKkmqYh7h28iMhTHWQ//deFmNKvvkOq2Wh6B6TA/X09EBe6YqHSAkDeB i9XF0nYeNmbISEZB4TgPy+mj+IGIi+OT27GX6rxQ8CsO45+2T1dPqzQu2T1jX8iicfPh lwqg== X-Gm-Message-State: AOAM531ZFoNzA91XF0F5TGyn/t1Mut42KtytgilWv1dVpEAvY3eVgIrs LU/DA5Y1aQwRS6O3LBxowMcTtg== X-Google-Smtp-Source: ABdhPJwU1bWmmohuzHzeMlHexUvRRwFgo3iijG24rag/pcc6xo/yhAOBfU/HkQeeafJbe9suXTD2cA== X-Received: by 2002:a17:90a:17ad:: with SMTP id q42mr37357200pja.181.1624260286358; Mon, 21 Jun 2021 00:24:46 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c00a:a884:139:e97f:a55d:7f66]) by smtp.gmail.com with ESMTPSA id 21sm13951294pfh.103.2021.06.21.00.24.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Jun 2021 00:24:45 -0700 (PDT) From: Jagan Teki To: Peng Fan , Shawn Guo , Sascha Hauer , Tomasz Figa , Fancy Fang Subject: [RFC PATCH 1/9] dt-bindings: display: bridge: Add Samsung SEC MIPI DSIM bindings Date: Mon, 21 Jun 2021 12:54:16 +0530 Message-Id: <20210621072424.111733-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210621072424.111733-1-jagan@amarulasolutions.com> References: <20210621072424.111733-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Francis Laniel , Matteo Lisi , Neil Armstrong , Robert Foss , Laurent Pinchart , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Andrzej Hajda , Rob Herring , NXP Linux Team , Milco Pratesi , Anthony Brandon , linux-phy@lists.infradead.org, linux-amarula@amarulasolutions.com, linux-arm-kernel@lists.infradead.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Samsung SEC MIPI DSIM Bridge controller is MIPI DSI bridge available in NXP's i.MX8M Mini and Nano Processors. Add dt-bingings for it. Cc: Andrzej Hajda Cc: Neil Armstrong Cc: Robert Foss Cc: Laurent Pinchart Cc: Rob Herring Signed-off-by: Jagan Teki --- .../display/bridge/samsung,sec-dsim.yaml | 184 ++++++++++++++++++ 1 file changed, 184 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/samsung,sec-dsim.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/samsung,sec-dsim.yaml b/Documentation/devicetree/bindings/display/bridge/samsung,sec-dsim.yaml new file mode 100644 index 000000000000..32f67f313dfd --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/samsung,sec-dsim.yaml @@ -0,0 +1,184 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/samsung,sec-dsim.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SEC MIPI DSIM Bridge controller on i.MX8M Mini and Nano SoCs + +maintainers: + - Jagan Teki + +description: | + NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for + the SOCs NWL MIPI-DSI host controller. + +allOf: + - $ref: ../dsi-controller.yaml# + +properties: + compatible: + enum: + - fsl,imx8mm-sec-dsim + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + assigned-clock-parents: true + assigned-clock-rates: true + assigned-clocks: true + + clocks: + items: + - description: DSI bus clock + - description: PHY_REF clock + + clock-names: + items: + - const: bus + - const: phy_ref + + phys: + maxItems: 1 + description: phandle to the phy module representing the DPHY + + phy-names: + items: + - const: dphy + + power-domains: + maxItems: 1 + description: phandle to the associated power domain + + samsung,burst-clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + DSIM high speed burst mode frequency. + + samsung,esc-clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + DSIM escape mode frequency. + + samsung,pll-clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + DSIM oscillator clock frequency. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + description: + Input port node to receive pixel data from the + display controller. Exactly one endpoint must be + specified. + properties: + endpoint@0: + $ref: /schemas/graph.yaml#/properties/endpoint + description: sub-node describing the input from LCDIF + + endpoint@1: + $ref: /schemas/graph.yaml#/properties/endpoint + description: sub-node describing the input from DCSS + + oneOf: + - required: + - endpoint@0 + - required: + - endpoint@1 + + unevaluatedProperties: false + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + DSI output port node to the panel or the next bridge + in the chain + + required: + - port@0 + - port@1 + +required: + - '#address-cells' + - '#size-cells' + - clock-names + - clocks + - compatible + - interrupts + - phy-names + - phys + - ports + - reg + - samsung,burst-clock-frequency + - samsung,esc-clock-frequency + - samsung,pll-clock-frequency + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + + dsi: dsi@32e10000 { + compatible = "fsl,imx8mm-sec-dsim"; + reg = <0x32e10000 0xa0>; + clocks = <&clk IMX8MM_CLK_DSI_CORE>, + <&clk IMX8MM_CLK_DSI_PHY_REF>; + clock-names = "bus", "phy_ref"; + assigned-clocks = <&clk IMX8MM_CLK_DSI_CORE>, + <&clk IMX8MM_VIDEO_PLL1_OUT>, + <&clk IMX8MM_CLK_DSI_PHY_REF>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>, + <&clk IMX8MM_VIDEO_PLL1_BYPASS>, + <&clk IMX8MM_VIDEO_PLL1_OUT>; + assigned-clock-rates = <266000000>, <594000000>, <27000000>; + interrupts = ; + phys = <&dphy>; + phy-names = "dphy"; + power-domains = <&dispmix_blk_ctl IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI>; + samsung,burst-clock-frequency = <891000000>; + samsung,esc-clock-frequency = <54000000>; + samsung,pll-clock-frequency = <27000000>; + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #size-cells = <0>; + #address-cells = <1>; + + dsi_in_lcdif: endpoint@0 { + reg = <0>; + remote-endpoint = <&lcdif_out_dsi>; + }; + }; + + port@1 { + reg = <1>; + + dsi_out_panel: endpoint { + remote-endpoint = <&panel_in_dsi>; + }; + }; + }; + }; From patchwork Mon Jun 21 07:24:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 12333967 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68469C48BE5 for ; Mon, 21 Jun 2021 07:24:56 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3296A60E08 for ; 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Mon, 21 Jun 2021 00:24:53 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c00a:a884:139:e97f:a55d:7f66]) by smtp.gmail.com with ESMTPSA id 21sm13951294pfh.103.2021.06.21.00.24.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Jun 2021 00:24:53 -0700 (PDT) From: Jagan Teki To: Peng Fan , Shawn Guo , Sascha Hauer , Tomasz Figa , Fancy Fang Subject: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver Date: Mon, 21 Jun 2021 12:54:17 +0530 Message-Id: <20210621072424.111733-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210621072424.111733-1-jagan@amarulasolutions.com> References: <20210621072424.111733-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Francis Laniel , Matteo Lisi , Neil Armstrong , Robert Foss , Laurent Pinchart , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Andrzej Hajda , NXP Linux Team , Milco Pratesi , Anthony Brandon , linux-phy@lists.infradead.org, linux-amarula@amarulasolutions.com, linux-arm-kernel@lists.infradead.org, Jagan Teki Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Samsung SEC MIPI DSIM Bridge controller is MIPI DSI bridge available in NXP's i.MX8M Mini and Nano Processors. Add bridge driver for it. Cc: Andrzej Hajda Cc: Neil Armstrong Cc: Robert Foss Cc: Laurent Pinchart Signed-off-by: Jagan Teki --- drivers/gpu/drm/bridge/Kconfig | 15 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/sec-dsim.c | 1535 +++++++++++++++++++++++++++++ 3 files changed, 1551 insertions(+) create mode 100644 drivers/gpu/drm/bridge/sec-dsim.c diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 19109c0b5481..a183eb165a35 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -189,6 +189,21 @@ config DRM_PARADE_PS8640 The PS8640 is a high-performance and low-power MIPI DSI to eDP converter +config DRM_SEC_MIPI_DSIM + tristate "Samsung SEC MIPI DSIM Bridge controller" + depends on DRM + depends on COMMON_CLK + depends on OF && HAS_IOMEM + select DRM_KMS_HELPER + select DRM_MIPI_DSI + select DRM_PANEL_BRIDGE + select GENERIC_PHY_MIPI_DPHY + select MFD_SYSCON + select REGMAP_MMIO + help + This enables the Samsung SEC MIPI DSIM Bridge controller as + for example found on NXP's i.MX8M Mini and Nano Processors. + config DRM_SIL_SII8620 tristate "Silicon Image SII8620 HDMI/MHL bridge" depends on OF diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index 88e4edf81087..ff802a4ffe65 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW) += megachips-stdpxxxx-ge-b850v obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o +obj-$(CONFIG_DRM_SEC_MIPI_DSIM) += sec-dsim.o obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o obj-$(CONFIG_DRM_SII902X) += sii902x.o obj-$(CONFIG_DRM_SII9234) += sii9234.o diff --git a/drivers/gpu/drm/bridge/sec-dsim.c b/drivers/gpu/drm/bridge/sec-dsim.c new file mode 100644 index 000000000000..5b6645bb94e7 --- /dev/null +++ b/drivers/gpu/drm/bridge/sec-dsim.c @@ -0,0 +1,1535 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Samsung SEC MIPI DSIM Bridge + * + * Copyright (C) 2018 NXP + * Copyright (c) 2014 Samsung Electronics Co., Ltd + * Copyright (C) 2021 Amarula Solutions(India) + * + * Based on the drivers/gpu/drm/exynos/exynos_drm_dsi.c + * + * Authors: + * Tomasz Figa + * Andrzej Hajda + * Fancy Fang + * Jagan Teki + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include