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Tue, 29 Jun 2021 09:41:08 +0000 Received: from xsj-pvapexch02.xlnx.xilinx.com (172.19.86.41) by xsj-pvapexch02.xlnx.xilinx.com (172.19.86.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Tue, 29 Jun 2021 02:40:55 -0700 Received: from smtp.xilinx.com (172.19.127.96) by xsj-pvapexch02.xlnx.xilinx.com (172.19.86.41) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Tue, 29 Jun 2021 02:40:55 -0700 Received: from [10.140.6.13] (port=43732 helo=xhdharinik40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1lyAEZ-0005yU-Mp; Tue, 29 Jun 2021 02:40:48 -0700 From: Harini Katakam To: , , , , , , , , , , CC: , , , , , Subject: [PATCH 1/3] include: dt-bindings: Add mscc-vsc8531 RGMII clock delay definitions Date: Tue, 29 Jun 2021 15:10:36 +0530 Message-ID: <20210629094038.18610-2-harini.katakam@xilinx.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210629094038.18610-1-harini.katakam@xilinx.com> References: <20210629094038.18610-1-harini.katakam@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ba11c726-31a9-45cc-2022-08d93ae205e1 X-MS-TrafficTypeDiagnostic: SN6PR02MB5295: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:269; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add RGMII clock delay definitions in mscc-phy-vsc8531 header. Signed-off-by: Harini Katakam Signed-off-by: Radhey Shyam Pandey Signed-off-by: Michal Simek --- include/dt-bindings/net/mscc-phy-vsc8531.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/dt-bindings/net/mscc-phy-vsc8531.h b/include/dt-bindings/net/mscc-phy-vsc8531.h index 9eb2ec2b2ea9..242eb4c7ede9 100644 --- a/include/dt-bindings/net/mscc-phy-vsc8531.h +++ b/include/dt-bindings/net/mscc-phy-vsc8531.h @@ -28,4 +28,13 @@ #define VSC8531_FORCE_LED_OFF 14 #define VSC8531_FORCE_LED_ON 15 +#define VSC8531_RGMII_CLK_DELAY_0_2_NS 0 +#define VSC8531_RGMII_CLK_DELAY_0_8_NS 1 +#define VSC8531_RGMII_CLK_DELAY_1_1_NS 2 +#define VSC8531_RGMII_CLK_DELAY_1_7_NS 3 +#define VSC8531_RGMII_CLK_DELAY_2_0_NS 4 +#define VSC8531_RGMII_CLK_DELAY_2_3_NS 5 +#define VSC8531_RGMII_CLK_DELAY_2_6_NS 6 +#define VSC8531_RGMII_CLK_DELAY_3_4_NS 7 + #endif From patchwork Tue Jun 29 09:40:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harini Katakam X-Patchwork-Id: 12349581 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3788FC11F66 for ; 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Tue, 29 Jun 2021 02:40:52 -0700 From: Harini Katakam To: , , , , , , , , , , CC: , , , , , Subject: [PATCH 2/3] dt-bindings: mscc: Add RGMII RX and TX delay tuning Date: Tue, 29 Jun 2021 15:10:37 +0530 Message-ID: <20210629094038.18610-3-harini.katakam@xilinx.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210629094038.18610-1-harini.katakam@xilinx.com> References: <20210629094038.18610-1-harini.katakam@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: abcc3d5a-1006-49f2-a104-08d93ae20377 X-MS-TrafficTypeDiagnostic: BN7PR02MB5201: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:4502; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bTPIvw5vKT6zLGWDtZGUu2sSIHhA2A2oomZGVHEvNQGgDI8Vp86zL+c1iiEg/+hUpPJ01GcBA6kVnmNifsKcuOwsy3/MMmq6CwamPXPQY0W9ORYYnCmAoyFAIzIoSHUCtvO1SdQvniR6OkMKBP6VEf32Z8w5nbsBkHingYceqwIFCV3sQK/vbNHiRAkTsAahaSIXpCdehc/YYChMht4m2C9Luwk1XBwYsj+hXbWUddaVbgD8hZqeUs1DoV7bz5nQUi8l5t9DRtHGzaZ2RDL63f59VPi432MqZN6QPYyH8GOdMmB9YNExOZ78Bl0izW4R65miQvpv5/OCQvrv8bm/5Lvf8e83JtZXdtDWUKufGs145XYVhuFizl5TCQ+Y6iAggIDibQXQfxDeTqltetSAax26mIjW5AvTQ7cX/8cdR5bvK8qnROYuK4pfWE6TmbEJ+i8pN2NBYW7t8dLILEe2u0DYxe49FvQ8bUHkxazuzz3cgjZo6KpLo0FziVC45oiejFrc/w1L3vmkW3IE+qgXCm3vp0UPObL4JPrS6hhu75d013etl3n8jSYwpeWTMYsphCwh/589SjqY3j58xcv3CrbHnwJj6km19tfaw70rCqZyLJskgRNcrIlWHxOVJObvqWuAxDPC6Ho3cGhQw6TurU141e5kyKMVqvSYjFXnCX3c3ixZ0WslcM1iRLvTtjx/wJpOWYeNB4ZuoKN8o/8+DXioV/BXZvYYryxYAgQNyXjN7ergs3w05d7S8ks/KvA4 X-Forefront-Antispam-Report: CIP:149.199.62.198; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add optional properties to tune RGMII RX and TX delay. Signed-off-by: Harini Katakam Signed-off-by: Radhey Shyam Pandey Signed-off-by: Michal Simek --- .../devicetree/bindings/net/mscc-phy-vsc8531.txt | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt b/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt index 87a27d775d48..e201d24d8e27 100644 --- a/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt +++ b/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt @@ -33,7 +33,14 @@ Optional properties: VSC8531_DUPLEX_COLLISION (8). - load-save-gpios : GPIO used for the load/save operation of the PTP hardware clock (PHC). - +- vsc8531,rx-delay : RGMII RX delay. Allowed values are defined in + "include/dt-bindings/net/mscc-phy-vsc8531.h". + Default value, set by the driver is + VSC8531_RGMII_CLK_DELAY_2_0_NS. +- vsc8531,tx-delay : RGMII TX delay. Allowed values are defined in + "include/dt-bindings/net/mscc-phy-vsc8531.h". + Default value, set by the driver is + VSC8531_RGMII_CLK_DELAY_2_0_NS. Table: 1 - Edge rate change ----------------------------------------------------------------| From patchwork Tue Jun 29 09:40:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harini Katakam X-Patchwork-Id: 12349583 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4655DC11F66 for ; Tue, 29 Jun 2021 09:43:32 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0E623613E7 for ; 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Tue, 29 Jun 2021 09:41:17 +0000 Received: from xsj-pvapexch02.xlnx.xilinx.com (172.19.86.41) by xsj-pvapexch01.xlnx.xilinx.com (172.19.86.40) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Tue, 29 Jun 2021 02:40:57 -0700 Received: from smtp.xilinx.com (172.19.127.96) by xsj-pvapexch02.xlnx.xilinx.com (172.19.86.41) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Tue, 29 Jun 2021 02:40:57 -0700 Received: from [10.140.6.13] (port=43732 helo=xhdharinik40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1lyAEi-0005yU-L8; Tue, 29 Jun 2021 02:40:57 -0700 From: Harini Katakam To: , , , , , , , , , , CC: , , , , , Subject: [PATCH 3/3] phy: mscc: Add support for VSC8531_02 with RGMII tuning Date: Tue, 29 Jun 2021 15:10:38 +0530 Message-ID: <20210629094038.18610-4-harini.katakam@xilinx.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210629094038.18610-1-harini.katakam@xilinx.com> References: <20210629094038.18610-1-harini.katakam@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: aeb8be2b-5d40-4437-d0d4-08d93ae20b51 X-MS-TrafficTypeDiagnostic: BN0PR02MB7934: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:1051; 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PTR:unknown-62-198.xilinx.com; CAT:NONE; SFS:(4636009)(136003)(346002)(396003)(376002)(39860400002)(46966006)(36840700001)(186003)(478600001)(26005)(44832011)(7416002)(5660300002)(36860700001)(2616005)(36906005)(426003)(110136005)(336012)(921005)(7696005)(36756003)(316002)(54906003)(82310400003)(47076005)(70586007)(83380400001)(6666004)(4326008)(1076003)(107886003)(9786002)(7049001)(2906002)(70206006)(7636003)(82740400003)(8676002)(8936002)(356005)(102446001)(290074003); DIR:OUT; SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jun 2021 09:41:17.5767 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: aeb8be2b-5d40-4437-d0d4-08d93ae20b51 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.62.198]; Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT0059.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN0PR02MB7934 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210629_024120_326786_984BA0E3 X-CRM114-Status: GOOD ( 14.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for VSC8531_02 (Rev 2) device. Add support for optional RGMII RX and TX delay tuning via devicetree. The hierarchy is: - Retain the defaul 0.2ns delay when RGMII tuning is not set. - Retain the default 2ns delay when RGMII tuning is set and DT delay property is NOT specified. - Use the DT delay value when RGMII tuning is set and a DT delay property is specified. Signed-off-by: Harini Katakam Signed-off-by: Radhey Shyam Pandey Signed-off-by: Michal Simek --- drivers/net/phy/mscc/mscc.h | 3 +++ drivers/net/phy/mscc/mscc_main.c | 41 ++++++++++++++++++++++++++++++-- 2 files changed, 42 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/mscc/mscc.h b/drivers/net/phy/mscc/mscc.h index a50235fdf7d9..5a26eba0ace0 100644 --- a/drivers/net/phy/mscc/mscc.h +++ b/drivers/net/phy/mscc/mscc.h @@ -281,6 +281,7 @@ enum rgmii_clock_delay { #define PHY_ID_VSC8514 0x00070670 #define PHY_ID_VSC8530 0x00070560 #define PHY_ID_VSC8531 0x00070570 +#define PHY_ID_VSC8531_02 0x00070572 #define PHY_ID_VSC8540 0x00070760 #define PHY_ID_VSC8541 0x00070770 #define PHY_ID_VSC8552 0x000704e0 @@ -373,6 +374,8 @@ struct vsc8531_private { * package. */ unsigned int base_addr; + u32 rx_delay; + u32 tx_delay; #if IS_ENABLED(CONFIG_MACSEC) /* MACsec fields: diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/net/phy/mscc/mscc_main.c index 6e32da28e138..2b501824c802 100644 --- a/drivers/net/phy/mscc/mscc_main.c +++ b/drivers/net/phy/mscc/mscc_main.c @@ -535,15 +535,16 @@ static int vsc85xx_rgmii_set_skews(struct phy_device *phydev, u32 rgmii_cntl, u16 rgmii_tx_delay_pos = ffs(rgmii_tx_delay_mask) - 1; u16 reg_val = 0; int rc; + struct vsc8531_private *vsc8531 = phydev->priv; mutex_lock(&phydev->lock); if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID || phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) - reg_val |= RGMII_CLK_DELAY_2_0_NS << rgmii_rx_delay_pos; + reg_val |= vsc8531->rx_delay << rgmii_rx_delay_pos; if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID || phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) - reg_val |= RGMII_CLK_DELAY_2_0_NS << rgmii_tx_delay_pos; + reg_val |= vsc8531->tx_delay << rgmii_tx_delay_pos; rc = phy_modify_paged(phydev, MSCC_PHY_PAGE_EXTENDED_2, rgmii_cntl, @@ -1820,6 +1821,17 @@ static int vsc85xx_config_init(struct phy_device *phydev) { int rc, i, phy_id; struct vsc8531_private *vsc8531 = phydev->priv; + struct device_node *of_node = phydev->mdio.dev.of_node; + + rc = of_property_read_u32(of_node, "vsc8531,rx-delay", + &vsc8531->rx_delay); + if (rc < 0) + vsc8531->rx_delay = RGMII_CLK_DELAY_2_0_NS; + + rc = of_property_read_u32(of_node, "vsc8531,tx-delay", + &vsc8531->tx_delay); + if (rc < 0) + vsc8531->tx_delay = RGMII_CLK_DELAY_2_0_NS; rc = vsc85xx_default_config(phydev); if (rc) @@ -2444,6 +2456,30 @@ static struct phy_driver vsc85xx_driver[] = { .get_strings = &vsc85xx_get_strings, .get_stats = &vsc85xx_get_stats, }, +{ + .phy_id = PHY_ID_VSC8531_02, + .name = "Microsemi VSC8531-02", + .phy_id_mask = 0xfffffff0, + /* PHY_GBIT_FEATURES */ + .soft_reset = &genphy_soft_reset, + .config_init = &vsc85xx_config_init, + .config_aneg = &vsc85xx_config_aneg, + .read_status = &vsc85xx_read_status, + .handle_interrupt = vsc85xx_handle_interrupt, + .config_intr = &vsc85xx_config_intr, + .suspend = &genphy_suspend, + .resume = &genphy_resume, + .probe = &vsc85xx_probe, + .set_wol = &vsc85xx_wol_set, + .get_wol = &vsc85xx_wol_get, + .get_tunable = &vsc85xx_get_tunable, + .set_tunable = &vsc85xx_set_tunable, + .read_page = &vsc85xx_phy_read_page, + .write_page = &vsc85xx_phy_write_page, + .get_sset_count = &vsc85xx_get_sset_count, + .get_strings = &vsc85xx_get_strings, + .get_stats = &vsc85xx_get_stats, +}, { .phy_id = PHY_ID_VSC8540, .name = "Microsemi FE VSC8540 SyncE", @@ -2668,6 +2704,7 @@ static struct mdio_device_id __maybe_unused vsc85xx_tbl[] = { { PHY_ID_VSC8514, 0xfffffff0, }, { PHY_ID_VSC8530, 0xfffffff0, }, { PHY_ID_VSC8531, 0xfffffff0, }, + { PHY_ID_VSC8531_02, 0xfffffff0, }, { PHY_ID_VSC8540, 0xfffffff0, }, { PHY_ID_VSC8541, 0xfffffff0, }, { PHY_ID_VSC8552, 0xfffffff0, },