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Tue, 4 Dec 2018 16:53:15 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com, linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org, Chanwoo Choi , devicetree@vger.kernel.org, Krzysztof Kozlowski , Kukjin Kim , Mark Rutland , Rob Herring , Sylwester Nawrocki , Bartlomiej Zolnierkiewicz , Marek Szyprowski , stable@vger.kernel.org Subject: [PATCH v3 1/5] clk: samsung: exynos5433: fix typo in imem divider Date: Tue, 4 Dec 2018 17:52:44 +0100 Message-Id: <20181204165248.17572-2-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181204165248.17572-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02Se0hTYRTA/XZ3t7vZ7DoFD1qZCysDNSnwQiYWGkMMgv4oTMipF5Xcw81H 1h+ZmdkqMydpio+Koa3ZdD7K1VY6SbSlCaJCGeKjzHzliwxxOa89/vudc37fd75z+AhMaMI9 iWRZGq2USVJEHD675e1qj/9aPSfmoG3em2ooNeDU4NJXnKrq6MGpAosdUXfHvmNUb289l/px +zNOlfZaWFRdxzCX0g72sajr5g4uZZ2+gVPVDaMoTCDWV+qR2Ki7yRG3zb5iiQuadEi8aNx1 Co/mhyTQKckZtDIwNJafpJk2I0Un72KToRjLRjpCjQgCyMMwVxOlRnxCSNYisLYOICZYQmAo 6eKoEW8jWEQwbj3pYMeB4bY3W1INgveL89y/J/pqryKHxSGDYfS5jeVgd/IEFGjKOQ4JIysx 6F4txh0FNzISVn7ZuQ5mk75g+mDcbCcgw6Fv4BabaecN2abGTYdHRoCxcB0xjit0PRjfdLAN 51pzOcb4Ji7ceZrKcDjcy7ds5d1gqrOJy/AOsLdWsRjOhJfNXzYnADIXQYXm0VbhCFg7+3DH kjDSDwymQGZfx6C2KJpBFxiacWVe4AJFLSUYkxZAfp6QucMfKu02nGEvUNufbbEYGvWVrELk U/bfLGX/zVL2r201wnTIg05XSRNp1SEZnRmgkkhV6bLEgHi51Ig2ftS79c7lF8iyFteOSAKJ tgmgmBMjxCUZqixpOwICE7kLPu3dSAkSJFmXaKX8vDI9hVa1Iy+CLfIQXHYaOSckEyVp9AWa VtDKP1UWwfPMRnn8oKmx5X2xXj+xJxVzWu1Dl+NDj3eHS7SLkyh3T+RpP3ZFnfaju9zsPmla zgk4E2TXzObIjzrvz79vjZ3VkRERxb5L606loYP6hVwjT/fab6HFdCVq55o5sGcC9UwoKr5Z nbsXwvxnMprj+rfHiX1s8WVVwV39IfaV1BHFWRFblSQJOoApVZLf/2zgyE0DAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrDIsWRmVeSWpSXmKPExsVy+t/xu7q/N7DFGFzdo2OxccZ6VovrX56z Wsw/co7Vom/ff0aL/sevmS3On9/AbvGx5x6rxYzz+5gs1h65y26x9PpFJovWvUfYLQ6/aWe1 WLDxEaMDr8eaeWsYPTat6mTzOPhuD5NH35ZVjB6fN8kFsEbp2RTll5akKmTkF5fYKkUbWhjp GVpa6BmZWOoZGpvHWhmZKunb2aSk5mSWpRbp2yXoZUx+s5ex4DhnxZb1U5gbGFdxdDFyckgI mEjcPXiAsYuRi0NIYCmjxIxvx1khEtISjadXM0HYwhJ/rnWxQRR9YpQ4vO0DM0iCTcBc4tH2 M2BFIgIeEjMmLmYFKWIWWMEscfvdW3aQhLCAl8S3X//BbBYBVYldFzaxgdi8Ai4SF691s0Bs kJdo2LUZrIZTwFVi04R/jCC2EFDNnGm9zBD1ghInZz4Bq2cGqm/eOpt5AqPALCSpWUhSCxiZ VjGKpJYW56bnFhvpFSfmFpfmpesl5+duYgTG1LZjP7fsYOx6F3yIUYCDUYmHV2IKW4wQa2JZ cWXuIUYJDmYlEd47akAh3pTEyqrUovz4otKc1OJDjKZAT0xklhJNzgfGe15JvKGpobmFpaG5 sbmxmYWSOO95g8ooIYH0xJLU7NTUgtQimD4mDk6pBkY9SauYuHkr52xJSN/Ns2J5SOGC14dz 6goOMcTnTq8/7La/f/3xZbw2BYJHjjYUe4n4K+477hbybDfHT7d0CY/WFSd3WJZaaT49P/lX 9dTS5J8xJ3oXBRvlSYrJ5XQ/vdx8KTYgO+FP6m2/4NiQOd+Y+M0XuJS7H3opJVTm/bP6i7xN Tjk/pxJLcUaioRZzUXEiAEqLIxC/AgAA X-CMS-MailID: 20181204165316eucas1p2da523b358ed62eca270fe24c5e2b063c X-Msg-Generator: CA X-RootMTR: 20181204165316eucas1p2da523b358ed62eca270fe24c5e2b063c X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181204165316eucas1p2da523b358ed62eca270fe24c5e2b063c References: <20181204165248.17572-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Fix typo in imem clock divider 200 switched with 266. Reviewed-by: Chanwoo Choi Signed-off-by: Kamil Konieczny --- drivers/clk/samsung/clk-exynos5433.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 751e2c4fb65b..ea47f49abc7f 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -568,10 +568,10 @@ static const struct samsung_gate_clock top_gate_clks[] __initconst = { GATE(CLK_ACLK_BUS1_400, "aclk_bus1_400", "div_aclk_bus1_400", ENABLE_ACLK_TOP, 25, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), - GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_266", + GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_200", ENABLE_ACLK_TOP, 24, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), - GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_200", + GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_266", ENABLE_ACLK_TOP, 23, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), GATE(CLK_ACLK_PERIC_66, "aclk_peric_66", "div_aclk_peric_66_b", From patchwork Tue Dec 4 16:52:45 2018 Content-Type: text/plain; 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Tue, 4 Dec 2018 16:53:15 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com, linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org, Chanwoo Choi , devicetree@vger.kernel.org, Krzysztof Kozlowski , Kukjin Kim , Mark Rutland , Rob Herring , Sylwester Nawrocki , Bartlomiej Zolnierkiewicz , Marek Szyprowski Subject: [PATCH v3 2/5] clk: samsung: exynos5433: fix name typo in sssx Date: Tue, 4 Dec 2018 17:52:45 +0100 Message-Id: <20181204165248.17572-3-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181204165248.17572-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sa0hTYRju29nZjtPJcUp7U7EcJWioFUKHCknQOhBU9EtKyJUn71N2vE0j RxfNIWpN8EZWhpXmderUeQEvZeZy+Usju6hp5o3E/Sgy17azzH/P+1x43vfjIzBJN+5JxCvS GKVCniQTiPj6V79MgX9aBFGH3hoEVGt5M05Nmr/h1MPhcZwq6rcgqnhuGaNMphYhtV74CafK Tf08qnH4o5CqnZzgUXf6hoXU0Eo+ftKFbqhuQLSuvkBAD6z18uii9npEb+h8zuMXRSdimKT4 DEYZHBotiptbfIFSK1yy7nVOCdXIJNIgJwLIEFi5O45pkIiQkM8RFJeU4NxgRqBefOMYNhA0 /Z7EtyM/DXxOeIagt6pOsB0xvuvDbC4BeRRmO408G/YgT0GRtspuwsg8DOarNHbBnTwNPX3f 7QE+eQCaZ6rtFWIyHFqfrGJc3V5QG9qENuxERoCuZAtxHjcYrfjKt2HM6rnVUWW/Aki9EAaM zXwuHA6b6lXEYXdYGmkXctgbxrSFDk8m9HQsCLnwbQQPtDU8TjgOQyMT1o0Ia4M/NBuCOToM 9KU3MRsNpCtMrbpxO7jCfX2ZgxbD3TwJ5w6EaovR8XJeoLE0OTAN74cGsBLkW7njmsod11T+ 732EsHokZdLZ5FiGPaJgMoNYeTKbrogNupqSrEPWDzW2NWLuQobNK4OIJJDMRQylgigJLs9g VcmDCAhM5iGe9rNS4hi5KptRplxWpicx7CDyIvgyqThn15dLEjJWnsYkMkwqo/yn8ggnTzWi cqZn0ifxoq461dzmhWVzC33DF8sHt7lajA2J0b507Wo7GJwQET3jHVqDOrvnE2fJutHHeesr ZSNMwL6FSK30R0KT6XXbHmx3d5qf/wfLtYLIMNOQ1Pnc9fa1Th3hFB7pQ4at7c9SnWksLF3q yCbHPzek0k/P5uY6q44l6GR8Nk5+OABTsvK/l1mrUUwDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrOIsWRmVeSWpSXmKPExsVy+t/xu7p/NrDFGOw5zm+xccZ6VovrX56z Wsw/co7Vom/ff0aL/sevmS3On9/AbvGx5x6rxYzz+5gs1h65y26x9PpFJovWvUfYLQ6/aWd1 4PFYM28No8emVZ1sHgff7WHy6NuyitHj8ya5ANYoPZui/NKSVIWM/OISW6VoQwsjPUNLCz0j E0s9Q2PzWCsjUyV9O5uU1JzMstQifbsEvYzHL1YzFszkqZi4/QZ7A+N5ri5GTg4JAROJNz92 sXQxcnEICSxllDhxfjsbREJaovH0aiYIW1jiz7UuNoiiT4wSE9cfYQFJsAmYSzzafgasSETA Q2LGxMWsIEXMAn3MEp8PnmcHSQgLuEvs3vuSGcRmEVCVWP9wHiuIzSvgIrFx8VtmiA3yEg27 NoPVcwq4Smya8I8RxBYCqpkzrZcZol5Q4uTMJ2CLmYHqm7fOZp7AKDALSWoWktQCRqZVjCKp pcW56bnFhnrFibnFpXnpesn5uZsYgZG07djPzTsYL20MPsQowMGoxMMrOYUtRog1say4MvcQ owQHs5II7x01oBBvSmJlVWpRfnxRaU5q8SFGU6AnJjJLiSbnA6M8ryTe0NTQ3MLS0NzY3NjM Qkmc97xBZZSQQHpiSWp2ampBahFMHxMHp1QDo+eyKQyHrwkH/wp25Wyd0vOsvKQigP2j9kl1 GzEd5yilitIKrpltrm5K8xwDj62fHSsgu1Ng8Yw58g/eqRnukM37w7LxYIdJwzQ14Yyza7N7 pq8NdV2qvEze5Epwd5VCa1zD+hc+909zuh2bYHgwb8N1zymVO00Ej4n6sQmnXvhuGMUbPzlP iaU4I9FQi7moOBEAjMhtQroCAAA= X-CMS-MailID: 20181204165316eucas1p2ba063b96e83d2d2be93ca067d32d7926 X-Msg-Generator: CA X-RootMTR: 20181204165316eucas1p2ba063b96e83d2d2be93ca067d32d7926 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181204165316eucas1p2ba063b96e83d2d2be93ca067d32d7926 References: <20181204165248.17572-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Fix typo in sssx name, there should be three letters 's'. Reviewed-by: Chanwoo Choi Signed-off-by: Kamil Konieczny Acked-by: Rob Herring --- drivers/clk/samsung/clk-exynos5433.c | 2 +- include/dt-bindings/clock/exynos5433.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index ea47f49abc7f..24c3360db65b 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -559,7 +559,7 @@ static const struct samsung_gate_clock top_gate_clks[] __initconst = { /* ENABLE_ACLK_TOP */ GATE(CLK_ACLK_G3D_400, "aclk_g3d_400", "div_aclk_g3d_400", ENABLE_ACLK_TOP, 30, CLK_IS_CRITICAL, 0), - GATE(CLK_ACLK_IMEM_SSX_266, "aclk_imem_ssx_266", + GATE(CLK_ACLK_IMEM_SSSX_266, "aclk_imem_sssx_266", "div_aclk_imem_sssx_266", ENABLE_ACLK_TOP, 29, CLK_IGNORE_UNUSED, 0), GATE(CLK_ACLK_BUS0_400, "aclk_bus0_400", "div_aclk_bus0_400", diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h index 98bd85ce1e45..87bb2b017143 100644 --- a/include/dt-bindings/clock/exynos5433.h +++ b/include/dt-bindings/clock/exynos5433.h @@ -156,7 +156,7 @@ #define CLK_ACLK_G2D_266 220 #define CLK_ACLK_G2D_400 221 #define CLK_ACLK_G3D_400 222 -#define CLK_ACLK_IMEM_SSX_266 223 +#define CLK_ACLK_IMEM_SSSX_266 223 #define CLK_ACLK_BUS0_400 224 #define CLK_ACLK_BUS1_400 225 #define CLK_ACLK_IMEM_200 226 From patchwork Tue Dec 4 16:52:46 2018 Content-Type: text/plain; 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Tue, 4 Dec 2018 16:53:16 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com, linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org, Chanwoo Choi , devicetree@vger.kernel.org, Krzysztof Kozlowski , Kukjin Kim , Mark Rutland , Rob Herring , Sylwester Nawrocki , Bartlomiej Zolnierkiewicz , Marek Szyprowski Subject: [PATCH v3 3/5] dt-bindings: clk: exynos5433: document imem clock Date: Tue, 4 Dec 2018 17:52:46 +0100 Message-Id: <20181204165248.17572-4-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181204165248.17572-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrOKsWRmVeSWpSXmKPExsWy7djP87p/N7DFGBw8YmixccZ6VovrX56z Wsw/co7Vom/ff0aL/sevmS3On9/AbvGx5x6rxYzz+5gs1h65y26x9PpFJovWvUfYLQ6/aWd1 4PFYM28No8emVZ1sHgff7WHy6NuyitHj8ya5ANYoLpuU1JzMstQifbsEroyPvYfZChYLVNxs nsrcwLiet4uRk0NCwERi+d+bbF2MXBxCAisYJZae3csCkhAS+MIo8fmiJETiM6PE/ZlnWWE6 7rxZwghRtJxRYsdsqCKghmtf+sG62QTMJR5tP8MEYosIuEn0TZ4NtoJZoI1Z4unsLrCEsICn xLUZF9lBbBYBVYm/p66BTeUVcJE4sWwnM8Q2eYmGXZvBajgFXCU2TfgHVSMocXLmE7BlzEA1 zVtnM4MskBDYxC6xbdknqGYXib6ld1ggbGGJV8e3sEPYMhL/d85ngrDLJXZvfcYO0dzCKDF3 8iKohLXE4eMXgX7mANqgKbF+lz5E2FFi5rouZpCwhACfxI23ghA38ElM2jYdKswr0dEmBFGt KzHv/xlowElLdP1fB2V7SLzdvottAqPiLCTfzELyzSyEvQsYmVcxiqeWFuempxYb56WW6xUn 5haX5qXrJefnbmIEJqfT/45/3cG470/SIUYBDkYlHl6JKWwxQqyJZcWVuYcYJTiYlUR476gB hXhTEiurUovy44tKc1KLDzFKc7AoifNWMzyIFhJITyxJzU5NLUgtgskycXBKNTCq+hZefng4 5PyjsgmPHjvs6IvavbpUPG1LB6NZD6OL8gaNqX+52lcEsf5i8b8tIcqS8kLl18KFZ9Q7uUJ3 XC+fdtD982TfqA/bWPNm+vQ/cMyY+Tig27W0QC5N7uaJmbefhj3e0Wutm5MTI7I2fm/evCbp B5mf1bwOy8xrenRCzZi3fvYHDUklluKMREMt5qLiRAAF5ukqSgMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrOIsWRmVeSWpSXmKPExsVy+t/xu7p/NrDFGCxtMrDYOGM9q8X1L89Z LeYfOcdq0bfvP6NF/+PXzBbnz29gt/jYc4/VYsb5fUwWa4/cZbdYev0ik0Xr3iPsFofftLM6 8HismbeG0WPTqk42j4Pv9jB59G1ZxejxeZNcAGuUnk1RfmlJqkJGfnGJrVK0oYWRnqGlhZ6R iaWeobF5rJWRqZK+nU1Kak5mWWqRvl2CXsbH3sNsBYsFKm42T2VuYFzP28XIySEhYCJx580S xi5GLg4hgaWMEgu3P2CCSEhLNJ5eDWULS/y51sUGUfSJUeLwsjeMIAk2AXOJR9vPgBWJCHhI zJi4mBWkiFmgj1ni88Hz7CAJYQFPiWszLoLZLAKqEn9PXQNr5hVwkTixbCczxAZ5iYZdm8Fq OAVcJTZN+AdWIwRUM2daLzNEvaDEyZlPWEBsZqD65q2zmScwCsxCkpqFJLWAkWkVo0hqaXFu em6xkV5xYm5xaV66XnJ+7iZGYCRtO/Zzyw7GrnfBhxgFOBiVeHglprDFCLEmlhVX5h5ilOBg VhLhvaMGFOJNSaysSi3Kjy8qzUktPsRoCvTERGYp0eR8YJTnlcQbmhqaW1gamhubG5tZKInz njeojBISSE8sSc1OTS1ILYLpY+LglGpgtFujcWbCgYJIC80djr8T3TIKzpQzXwlQT1jIVG7y Xy+TkS0m1StANl7DL/Jfxqv11b+OG/buXTd3wnH21LfXNvfLLVhvNDf9a4/pvbAHN3xjf4Sw F9g9mtPmPM/bSfp2QFJfz/t3TKvbT19QjD+YfCOkRsfXOevlzLYphhE+ydbXc9febu5QYinO SDTUYi4qTgQAAJABmroCAAA= X-CMS-MailID: 20181204165317eucas1p10bef0207ee57a9420911410ed2a22453 X-Msg-Generator: CA X-RootMTR: 20181204165317eucas1p10bef0207ee57a9420911410ed2a22453 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181204165317eucas1p10bef0207ee57a9420911410ed2a22453 References: <20181204165248.17572-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document DT bindings for imem clock of the Samsung Exynos5433 SSS (Security SubSystem) and SlimSSS IPs. Signed-off-by: Kamil Konieczny Acked-by: Stephen Boyd Reviewed-by: Rob Herring Acked-by: Chanwoo Choi --- .../bindings/clock/exynos5433-clock.txt | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index 50d5897c9849..183c327a7d6b 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -50,6 +50,8 @@ Required Properties: IPs. - "samsung,exynos5433-cmu-cam1" - clock controller compatible for CMU_CAM1 which generates clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs. + - "samsung,exynos5433-cmu-imem" - clock controller compatible for CMU_IMEM + which generates clocks for SSS (Security SubSystem) and SlimSSS IPs. - reg: physical base address of the controller and length of memory mapped region. @@ -168,6 +170,12 @@ Required Properties: - aclk_cam1_400 - aclk_cam1_552 + Input clocks for imem clock controller: + - oscclk + - aclk_imem_sssx_266 + - aclk_imem_266 + - aclk_imem_200 + Optional properties: - power-domains: a phandle to respective power domain node as described by generic PM domain bindings (see power/power_domain.txt for more @@ -469,6 +477,21 @@ Example 2: Examples of clock controller nodes are listed below. power-domains = <&pd_cam1>; }; + cmu_imem: clock-controller@11060000 { + compatible = "samsung,exynos5433-cmu-imem"; + reg = <0x11060000 0x1000>; + #clock-cells = <1>; + + clock-names = "oscclk", + "aclk_imem_sssx_266", + "aclk_imem_266", + "aclk_imem_200"; + clocks = <&xxti>, + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_200>; + }; + Example 3: UART controller node that consumes the clock generated by the clock controller. From patchwork Tue Dec 4 16:52:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamil Konieczny X-Patchwork-Id: 10712245 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0FDC317DB for ; Tue, 4 Dec 2018 16:53:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0236B2A5FD for ; Tue, 4 Dec 2018 16:53:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EA7312AFF4; Tue, 4 Dec 2018 16:53:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 94C9F2AE36 for ; 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Tue, 4 Dec 2018 16:53:16 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com, linux-samsung-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org, Chanwoo Choi , devicetree@vger.kernel.org, Krzysztof Kozlowski , Kukjin Kim , Mark Rutland , Rob Herring , Sylwester Nawrocki , Bartlomiej Zolnierkiewicz , Marek Szyprowski Subject: [PATCH v3 4/5] arm64: dts: exynos: add imem clock Date: Tue, 4 Dec 2018 17:52:47 +0100 Message-Id: <20181204165248.17572-5-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181204165248.17572-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrBKsWRmVeSWpSXmKPExsWy7djPc7r/NrDFGKxbyWexccZ6VovrX56z Wsw/co7Vom/ff0aL/sevmS3On9/AbvGx5x6rxYzz+5gs1h65y26x9PpFJovWvUfYLQ6/aWd1 4PFYM28No8emVZ1sHgff7WHy6NuyitHj8ya5ANYoLpuU1JzMstQifbsErozm9Y9YCn5wVLz+ v4mpgXEzexcjJ4eEgInE7GmXgWwuDiGBFYwSL58tZ4FwvjBKXG19xAjhfGaU6Lh3mBWm5W7/ G6iW5YwSX9tfscO1nO+bBDaYTcBc4tH2M0wgtoiAm0Tf5NlsIEXMAm3MEk9ndwElODiEBawk Dt40B6lhEVCVmN/YA9bLK+Ai8eLKN6gD5SUadkEcyyngKrFpwj9GiBpBiZMzn7CA2MxANc1b ZzODzJcQ2MQuMWFmJyNEs4vErwvzoGxhiVfHt0ANlZE4PbmHBcIul9i99Rk7RHMLo8TcyYuY IBLWEoePX2QFOZRZQFNi/S59iLCjxOPlX5lBwhICfBI33gpC3MAnMWnbdKgwr0RHmxBEta7E vP9noAEnLdH1fx2U7SFxa/9GpgmMirOQfDMLyTezEPYuYGRexSieWlqcm55abJyXWq5XnJhb XJqXrpecn7uJEZieTv87/nUH474/SYcYBTgYlXh4JaawxQixJpYVV+YeYpTgYFYS4b2jBhTi TUmsrEotyo8vKs1JLT7EKM3BoiTOW83wIFpIID2xJDU7NbUgtQgmy8TBKdXAqLjEYpV2QGd3 1/9f25trPnh+uOR29G1BXVdDgVV1iJ5kczhD+OZ9IjkNTF/rLkYIbXijfPWnUeeqGgXhdivB 8uhn3Ruvhf5iSH7h3Lhp/w2h66vPar9WLjDbrNx7e8s9ZpdzMlIdnfv27hWbmDPzc75W/vej ye/sG9u7cw/+mua3IstU+tUhJZbijERDLeai4kQA506JGUsDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrKIsWRmVeSWpSXmKPExsVy+t/xu7p/N7DFGCy6KWqxccZ6VovrX56z Wsw/co7Vom/ff0aL/sevmS3On9/AbvGx5x6rxYzz+5gs1h65y26x9PpFJovWvUfYLQ6/aWd1 4PFYM28No8emVZ1sHgff7WHy6NuyitHj8ya5ANYoPZui/NKSVIWM/OISW6VoQwsjPUNLCz0j E0s9Q2PzWCsjUyV9O5uU1JzMstQifbsEvYzm9Y9YCn5wVLz+v4mpgXEzexcjJ4eEgInE3f43 QDYXh5DAUkaJvbsbmSAS0hKNp1dD2cISf651sYHYQgKfGCU6txiD2GwC5hKPtp8BqxER8JCY MXExK8ggZoE+ZonPB88DTeXgEBawkjh40xykhkVAVWJ+Yw/YYl4BF4kXV75BHSEv0bAL4iBO AVeJTRP+MULscpGYM62XGaJeUOLkzCcsIDYzUH3z1tnMExgFZiFJzUKSWsDItIpRJLW0ODc9 t9hQrzgxt7g0L10vOT93EyMwirYd+7l5B+OljcGHGAU4GJV4eCWnsMUIsSaWFVfmHmKU4GBW EuG9owYU4k1JrKxKLcqPLyrNSS0+xGgK9MREZinR5HxghOeVxBuaGppbWBqaG5sbm1koifOe N6iMEhJITyxJzU5NLUgtgulj4uCUamB071rixP8/6eKGH7ZtmT3m+XkB/zb9P7lwguivnTlB a14yTdjCfF3vj9GdX+XXv/kpfUjZo2bsHfj3bhBD1XyZVQee/fdmuS1r+Nb4ptAuxpMXzj6V OykV1fpke3lrXKzl+WWuWh8rxS52rHcXudIktLVc5Px8nk69BZKcPr+Kaya6RM7g6y9VYinO SDTUYi4qTgQA+7TCG7gCAAA= X-CMS-MailID: 20181204165317eucas1p18cd6168fdefb2aa57259b9ec73438275 X-Msg-Generator: CA X-RootMTR: 20181204165317eucas1p18cd6168fdefb2aa57259b9ec73438275 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181204165317eucas1p18cd6168fdefb2aa57259b9ec73438275 References: <20181204165248.17572-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add description for imem clock in the Samsung Exynos5433. The users can use compatibility "samsung,exynos5433-cmu-imem". Signed-off-by: Kamil Konieczny --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 2131f12364cb..378cd3d87ff0 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -544,6 +544,21 @@ power-domains = <&pd_cam1>; }; + cmu_imem: clock-controller@11060000 { + compatible = "samsung,exynos5433-cmu-imem"; + reg = <0x11060000 0x1000>; + #clock-cells = <1>; + + clock-names = "oscclk", + "aclk_imem_sssx_266", + "aclk_imem_266", + "aclk_imem_200"; + clocks = <&xxti>, + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_200>; + }; + pd_gscl: power-domain@105c4000 { compatible = "samsung,exynos5433-pd"; reg = <0x105c4000 0x20>; From patchwork Tue Dec 4 16:52:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamil Konieczny X-Patchwork-Id: 10712217 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1DD991932 for ; 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Tue, 4 Dec 2018 16:53:17 +0000 (GMT) From: Kamil Konieczny To: k.konieczny@partner.samsung.com, linux-samsung-soc@vger.kernel.org Cc: Chanwoo Choi , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 5/5] clk: samsung: exynos5433: add imem clocks Date: Tue, 4 Dec 2018 17:52:48 +0100 Message-Id: <20181204165248.17572-6-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181204165248.17572-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrEKsWRmVeSWpSXmKPExsWy7djPc7r/NrDFGKw5p2lx/ctzVov5R86x WvTt+89o0f/4NbPF+fMb2C02Pb7GanF51xw2ixnn9zFZLL1+kcmide8RdgcujzXz1jB6bFrV yeaxeUm9x8F3e5g8+rasYvT4vEkugC2KyyYlNSezLLVI3y6BK2PGo11sBc+iKzbsO8nWwNgZ 0MXIySEhYCIxd/9Npi5GLg4hgRWMEiu7vrNBOF8YJR73P2WBcD4zSmzoWc8K0/JpwXFWiMRy RokLzzpZ4FqOzH7JBlLFJmAu8Wj7GSYQW0TATaJv8mywOLPAbCaJC4eFQGxhAUeJVz92gsVZ BFQl/ix+AbaBV8BFYuqxU1Db5CUadm1mB7E5BVwlNk34xwhRIyhxcuYTFoiZ8hLNW2czgxwh IbCOXeJrfz8jRLOLxL6en8wQtrDEq+Nb2CFsGYn/O+czQdjlEru3PmOHaG5hlJg7eRFUwlri 8PGLQFdwAG3QlFi/Sx8i7Chx6PgFJpCwhACfxI23ghA38ElM2jadGSLMK9HRJgRRrSsx7/8Z qFekJbr+r4OyPSQ+zehkncCoOAvJN7OQfDMLYe8CRuZVjOKppcW56anFhnmp5XrFibnFpXnp esn5uZsYgSnp9L/jn3Ywfr2UdIhRgINRiYdXYgpbjBBrYllxZe4hRgkOZiUR3jtqQCHelMTK qtSi/Pii0pzU4kOM0hwsSuK81QwPooUE0hNLUrNTUwtSi2CyTBycUg2MDr9nyu5q2TFrd5pz is5bBr5jN1m0WljO+BuF9z1a9M3p9QHHM1xS60wVbk900agvXhnIIrHv/bynAT9vaxmsjZYS e5HhuZNFbO1/jv/1yZrKHw/FlNbtbRDyUn/pPDNrs6Tn1oojgbN1IsRXcLOm9tSfOd4h2H4s aSmzagsrg2ebmuStdXxKLMUZiYZazEXFiQAJWMsYRQMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrIIsWRmVeSWpSXmKPExsVy+t/xu7p/N7DFGBw5amJx/ctzVov5R86x WvTt+89o0f/4NbPF+fMb2C02Pb7GanF51xw2ixnn9zFZLL1+kcmide8RdgcujzXz1jB6bFrV yeaxeUm9x8F3e5g8+rasYvT4vEkugC1Kz6Yov7QkVSEjv7jEVina0MJIz9DSQs/IxFLP0Ng8 1srIVEnfziYlNSezLLVI3y5BL2PGo11sBc+iKzbsO8nWwNgZ0MXIySEhYCLxacFx1i5GLg4h gaWMEh0NtxkhEtISjadXM0HYwhJ/rnWxQRR9YpTY/O80WBGbgLnEo+1nwIpEBDwkZkxcDDaJ WWAxk8SlN3eYQRLCAo4Sr37sZAOxWQRUJf4sfsEKYvMKuEhMPXaKFWKDvETDrs3sIDangKvE pgn/wBYIAdXMmdbLDFEvKHFy5hMWEJsZqL5562zmCYwCs5CkZiFJLWBkWsUoklpanJueW2yk V5yYW1yal66XnJ+7iREYPduO/dyyg7HrXfAhRgEORiUeXokpbDFCrIllxZW5hxglOJiVRHjv qAGFeFMSK6tSi/Lji0pzUosPMZoCPTGRWUo0OR8Y2Xkl8YamhuYWlobmxubGZhZK4rznDSqj hATSE0tSs1NTC1KLYPqYODilGhhbtxze8G5j9ESJ43qXLp59eOCpgpTXxLuX1zNe2PTt7OET UjM8X371TNqocvrY161sE3awfr6+49GvtL2pd+sqgj7emFmTt0taXa+pn+Ga4COzBuNXs5rf 906y2CZ2p0BbZ16xam5j3aX5SnYH/h+ebMRptDb6ScTH/TffFUhkK671iN4+L/lWjBJLcUai oRZzUXEiAGPxdsW0AgAA X-CMS-MailID: 20181204165318eucas1p2dccd5382ee8b9f4da8c3076fb56607ee X-Msg-Generator: CA X-RootMTR: 20181204165318eucas1p2dccd5382ee8b9f4da8c3076fb56607ee X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181204165318eucas1p2dccd5382ee8b9f4da8c3076fb56607ee References: <20181204165248.17572-1-k.konieczny@partner.samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add imem clocks for exynos5433. This will enable to use crypto Security SubSystem (in short SSS) and SlimSSS IP blocks. Signed-off-by: Kamil Konieczny --- drivers/clk/samsung/clk-exynos5433.c | 193 +++++++++++++++++++++++++ include/dt-bindings/clock/exynos5433.h | 55 +++++++ 2 files changed, 248 insertions(+) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 24c3360db65b..7f557d6f41f0 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -5467,6 +5467,196 @@ static const struct samsung_cmu_info cam1_cmu_info __initconst = { .clk_name = "aclk_cam1_400", }; +/* + * Register offset definitions for CMU_IMEM + */ +#define ENABLE_ACLK_IMEM 0x0800 +#define ENABLE_ACLK_IMEM_INT_MEM 0x0804 +#define ENABLE_ACLK_IMEM_SSS 0x0808 +#define ENABLE_ACLK_IMEM_SLIMSSS 0x080c +#define ENABLE_ACLK_IMEM_RTIC 0x0810 +#define ENABLE_ACLK_IMEM_SMMU_SSS 0x0814 +#define ENABLE_ACLK_IMEM_SMMU_SLIMSSS 0x0818 +#define ENABLE_ACLK_IMEM_SMMU_RTIC 0x081c +#define ENABLE_ACLK_IMEM_ARBG_TX 0x0820 +#define ENABLE_ACLK_IMEM_SMMU_ARBG_TX 0x0824 +#define ENABLE_PCLK_IMEM 0x0900 +#define ENABLE_PCLK_IMEM_SSS 0x0904 +#define ENABLE_PCLK_IMEM_SLIMSSS 0x0908 +#define ENABLE_PCLK_IMEM_RTIC 0x090c +#define ENABLE_PCLK_IMEM_SMMU_SSS 0x0910 +#define ENABLE_PCLK_IMEM_SMMU_SLIMSSS 0x0914 +#define ENABLE_PCLK_IMEM_SMMU_RTIC 0x0918 +#define ENABLE_PCLK_IMEM_SMMU_ARGB_TX 0x091c + +static const unsigned long imem_clk_regs[] __initconst = { + ENABLE_ACLK_IMEM, + ENABLE_ACLK_IMEM_INT_MEM, + ENABLE_ACLK_IMEM_SSS, + ENABLE_ACLK_IMEM_SLIMSSS, + ENABLE_ACLK_IMEM_RTIC, + ENABLE_ACLK_IMEM_SMMU_SSS, + ENABLE_ACLK_IMEM_SMMU_SLIMSSS, + ENABLE_ACLK_IMEM_SMMU_RTIC, + ENABLE_ACLK_IMEM_ARBG_TX, + ENABLE_ACLK_IMEM_SMMU_ARBG_TX, + ENABLE_PCLK_IMEM, + ENABLE_PCLK_IMEM_SSS, + ENABLE_PCLK_IMEM_SLIMSSS, + ENABLE_PCLK_IMEM_RTIC, + ENABLE_PCLK_IMEM_SMMU_SSS, + ENABLE_PCLK_IMEM_SMMU_SLIMSSS, + ENABLE_PCLK_IMEM_SMMU_RTIC, + ENABLE_PCLK_IMEM_SMMU_ARGB_TX, +}; + +static const struct samsung_gate_clock imem_gate_clks[] __initconst = { + /* ENABLE_ACLK_IMEM */ + GATE(CLK_ACLK_AXI2AHB_IMEMH, "aclk_axi2ahb_imemh", "aclk_imem_200", + ENABLE_ACLK_IMEM, 24, 0, 0), + GATE(CLK_ACLK_AXIDS_SROMC, "aclk_axids_sromc", "aclk_imem_200", + ENABLE_ACLK_IMEM, 23, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_SROMC, "aclk_sromc", "aclk_imem_200", + ENABLE_ACLK_IMEM, 22, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_ARBG_TX, "aclk_bts_arbg_tx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 21, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXI_IMEMX, "aclk_asyncaxi_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 20, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIUS_IMEMX, "aclk_axius_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 19, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_IMEMX, "aclk_xiu_imemx", "aclk_imem_266", + ENABLE_ACLK_IMEM, 18, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXI_SSSX, "aclk_asyncaxi_sssx", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SLIMSSS, "aclk_bts_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SSS_DRAM, "aclk_bts_sss_dram", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_BTS_SSS_CCI, "aclk_bts_sss_cci", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 13, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ALB_IMEM, "aclk_alb_imem", "aclk_imem_266", + ENABLE_ACLK_IMEM, 12, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM1P, "aclk_axids_pimemx_imem1p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 11, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_IMEM0P, "aclk_axids_pimemx_imem0p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 10, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXIDS_PIMEMX_GIC, "aclk_axids_pimemx_gic", "aclk_imem_200", + ENABLE_ACLK_IMEM, 9, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAHBM_SSS_ATLAS, "aclk_asyncahbm_sss_atlas", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_ASYNCAXIS_MIF_PIMEMX, "aclk_asyncaxis_mif_pimemx", "aclk_imem_200", + ENABLE_ACLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXI2APB_IMEM1P, "aclk_axi2apb_imem1p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_AXI2APB_IMEM0P, "aclk_axi2apb_imem0p", "aclk_imem_200", + ENABLE_ACLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_SSSX, "aclk_xiu_sssx", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_XIU_PIMEMX, "aclk_xiu_pimemx", "aclk_imem_200", + ENABLE_ACLK_IMEM, 2, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_IMEMND_266, "aclk_imemnd_266", "aclk_imem_266", + ENABLE_ACLK_IMEM, 1, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_GIC, "aclk_gic", "aclk_imem_200", + ENABLE_ACLK_IMEM, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_ACLK_IMEM_INT_MEM */ + GATE(CLK_ACLK_INT_MEM, "aclk_int_mem", "aclk_imem_200", + ENABLE_ACLK_IMEM_INT_MEM, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_ACLK_IMEM_SSS */ + GATE(CLK_ACLK_SSS, "aclk_sss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SSS, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_ACLK_IMEM_SLIMSSS */ + GATE(CLK_ACLK_SLIMSSS, "aclk_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_ACLK_IMEM_RTIC */ + GATE(CLK_ACLK_RTIC, "aclk_rtic", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_RTIC, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_ACLK_SMMU_SSS */ + GATE(CLK_ACLK_SMMU_SSS_DRAM, "aclk_smmu_sss_dram", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_SSS, 1, CLK_IGNORE_UNUSED, 0), + GATE(CLK_ACLK_SMMU_SSS_CCI, "aclk_smmu_sss_cci", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_SSS, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_ACLK_SMMU_SLIMSSS */ + GATE(CLK_ACLK_SMMU_SLIMSSS, "aclk_smmu_slimsss", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_ACLK_SMMU_RTIC */ + GATE(CLK_ACLK_SMMU_RTIC, "aclk_smmu_rtic", "aclk_imem_sssx_266", + ENABLE_ACLK_IMEM_SMMU_RTIC, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_ACLK_IMEM_ARBG_TX */ + GATE(CLK_ACLK_ARBG_TX, "aclk_arbg_tx", "aclk_imem_266", + ENABLE_ACLK_IMEM_ARBG_TX, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_ACLK_IMEM_SMMU_ARBG_TX */ + GATE(CLK_ACLK_SMMU_ARBG_TX, "aclk_smmu_arbg_tx", "aclk_imem_266", + ENABLE_ACLK_IMEM_SMMU_ARBG_TX, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_PCLK_IMEM */ + GATE(CLK_PCLK_GPIO_IMEM, "pclk_gpio_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 17, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ASYNCAXI_IMEMX, "pclk_asyncaxi_imemx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 16, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_ARBG_TX, "pclk_bts_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 15, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ASYNCAPB_ARBG_TX, "pclk_asyncapb_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM, 14, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_SLIMSSS, "pclk_bts_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM, 8, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_SSS_DRAM, "pclk_bts_sss_dram", "aclk_imem_200", + ENABLE_PCLK_IMEM, 7, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_BTS_SSS_CCI, "pclk_bts_sss_cci", "aclk_imem_200", + ENABLE_PCLK_IMEM, 6, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_ALB_IMEM, "pclk_alb_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 5, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_PMU_IMEM, "pclk_pmu_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 4, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_SYSREG_IMEM, "pclk_sysreg_imem", "aclk_imem_200", + ENABLE_PCLK_IMEM, 3, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_PCLK_IMEM_SSS */ + GATE(CLK_PCLK_SSS, "pclk_sss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SSS, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_PCLK_IMEM_SLIMSSS */ + GATE(CLK_PCLK_SLIMSSS, "pclk_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_PCLK_IMEM_RTIC */ + GATE(CLK_PCLK_RTIC, "pclk_rtic", "aclk_imem_200", + ENABLE_PCLK_IMEM_RTIC, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_PCLK_IMEM_SMMU_SSS */ + GATE(CLK_PCLK_SMMU_SSS_DRAM, "pclk_smmu_sss_dram", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_SSS, 1, CLK_IGNORE_UNUSED, 0), + GATE(CLK_PCLK_SMMU_SSS_CCI, "pclk_smmu_sss_cci", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_SSS, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_PCLK_IMEM_SMMU_SLIMSSS */ + GATE(CLK_PCLK_SMMU_SLIMSSS, "pclk_smmu_slimsss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_SLIMSSS, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_PCLK_IMEM_SMMU_RTIC */ + GATE(CLK_PCLK_SMMU_RTIC, "pclk_sss", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_RTIC, 0, CLK_IGNORE_UNUSED, 0), + + /* ENABLE_PCLK_IMEM_SMMU_ARGB_TX */ + GATE(CLK_PCLK_SMMU_ARBG_TX, "pclk_smmu_arbg_tx", "aclk_imem_200", + ENABLE_PCLK_IMEM_SMMU_ARGB_TX, 0, CLK_IGNORE_UNUSED, 0), +}; + +static const struct samsung_cmu_info imem_cmu_info __initconst = { + .gate_clks = imem_gate_clks, + .nr_gate_clks = ARRAY_SIZE(imem_gate_clks), + .nr_clk_ids = IMEM_NR_CLK, + .clk_regs = imem_clk_regs, + .nr_clk_regs = ARRAY_SIZE(imem_clk_regs), +}; struct exynos5433_cmu_data { struct samsung_clk_reg_dump *clk_save; @@ -5654,6 +5844,9 @@ static const struct of_device_id exynos5433_cmu_of_match[] = { }, { .compatible = "samsung,exynos5433-cmu-mscl", .data = &mscl_cmu_info, + }, { + .compatible = "samsung,exynos5433-cmu-imem", + .data = &imem_cmu_info, }, { }, }; diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h index 87bb2b017143..cc6153a0b5f7 100644 --- a/include/dt-bindings/clock/exynos5433.h +++ b/include/dt-bindings/clock/exynos5433.h @@ -1406,4 +1406,59 @@ #define CAM1_NR_CLK 113 +/* CMU_IMEM */ +#define CLK_ACLK_SSS 1 +#define CLK_ACLK_SLIMSSS 2 +#define CLK_ACLK_RTIC 3 +#define CLK_ACLK_XIU_SSSX 4 +#define CLK_ACLK_ASYNCAHBM_SSS_ATLAS 5 +#define CLK_ACLK_ASYNCAXI_SSSX 6 +#define CLK_ACLK_BTS_SSS_CCI 7 +#define CLK_ACLK_BTS_SSS_DRAM 8 +#define CLK_ACLK_BTS_SLIMSSS 9 +#define CLK_ACLK_SMMU_SSS_CCI 10 +#define CLK_ACLK_SMMU_SSS_DRAM 11 +#define CLK_ACLK_SMMU_SLIMSSS 12 +#define CLK_ACLK_SMMU_RTIC 13 +#define CLK_ACLK_IMEMND_266 14 +#define CLK_ACLK_ALB_IMEM 15 +#define CLK_ACLK_XIU_IMEMX 16 +#define CLK_ACLK_AXIUS_IMEMX 17 +#define CLK_ACLK_ASYNCAXI_IMEMX 18 +#define CLK_ACLK_ARBG_TX 19 +#define CLK_ACLK_BTS_ARBG_TX 20 +#define CLK_ACLK_SMMU_ARBG_TX 21 +#define CLK_ACLK_GIC 22 +#define CLK_ACLK_INT_MEM 23 +#define CLK_ACLK_XIU_PIMEMX 24 +#define CLK_ACLK_AXI2APB_IMEM0P 25 +#define CLK_ACLK_AXI2APB_IMEM1P 26 +#define CLK_ACLK_ASYNCAXIS_MIF_PIMEMX 27 +#define CLK_ACLK_AXIDS_PIMEMX_GIC 28 +#define CLK_ACLK_AXIDS_PIMEMX_IMEM0P 29 +#define CLK_ACLK_AXIDS_PIMEMX_IMEM1P 30 +#define CLK_ACLK_SROMC 31 +#define CLK_ACLK_AXIDS_SROMC 32 +#define CLK_ACLK_AXI2AHB_IMEMH 33 +#define CLK_PCLK_SSS 34 +#define CLK_PCLK_SLIMSSS 35 +#define CLK_PCLK_RTIC 36 +#define CLK_PCLK_SYSREG_IMEM 37 +#define CLK_PCLK_PMU_IMEM 38 +#define CLK_PCLK_ALB_IMEM 39 +#define CLK_PCLK_BTS_SSS_CCI 40 +#define CLK_PCLK_BTS_SSS_DRAM 41 +#define CLK_PCLK_BTS_SLIMSSS 42 +#define CLK_PCLK_SMMU_SSS_CCI 43 +#define CLK_PCLK_SMMU_SSS_DRAM 44 +#define CLK_PCLK_SMMU_SLIMSSS 45 +#define CLK_PCLK_SMMU_RTIC 46 +#define CLK_PCLK_ASYNCAPB_ARBG_TX 47 +#define CLK_PCLK_BTS_ARBG_TX 48 +#define CLK_PCLK_SMMU_ARBG_TX 49 +#define CLK_PCLK_ASYNCAXI_IMEMX 50 +#define CLK_PCLK_GPIO_IMEM 51 + +#define IMEM_NR_CLK 52 + #endif /* _DT_BINDINGS_CLOCK_EXYNOS5433_H */