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Thu, 22 Jul 2021 17:42:53 +0000 (GMT) Received: from oc3016276355.ibm.com (unknown [9.145.18.177]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 22 Jul 2021 17:42:53 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v2 1/5] s390x: kvm: topology: Linux header update Date: Thu, 22 Jul 2021 19:42:40 +0200 Message-Id: <1626975764-22131-2-git-send-email-pmorel@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1626975764-22131-1-git-send-email-pmorel@linux.ibm.com> References: <1626975764-22131-1-git-send-email-pmorel@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-GUID: yaUcnGMPX7jALifrOh8sTP0XdjDEtcE0 X-Proofpoint-ORIG-GUID: gpjbLgZd-0bS8Bkm8DmIyMVQLrIRbIGj X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-22_12:2021-07-22, 2021-07-22 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 phishscore=0 mlxlogscore=999 suspectscore=0 clxscore=1015 adultscore=0 bulkscore=0 priorityscore=1501 spamscore=0 malwarescore=0 impostorscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2107220116 Received-SPF: pass client-ip=148.163.158.5; envelope-from=pmorel@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, david@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, pasic@linux.ibm.com, borntraeger@de.ibm.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Just as information, the linux header update patch is inside the Linux patch series. Signed-off-by: Pierre Morel --- linux-headers/linux/kvm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index bcaf66cc4d..38e96ea6f7 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -1112,6 +1112,7 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_BINARY_STATS_FD 203 #define KVM_CAP_EXIT_ON_EMULATION_FAILURE 204 #define KVM_CAP_ARM_MTE 205 +#define KVM_CAP_S390_CPU_TOPOLOGY 206 #ifdef KVM_CAP_IRQ_ROUTING From patchwork Thu Jul 22 17:42:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12394437 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A648C6377D for ; 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Thu, 22 Jul 2021 17:42:54 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4077211C04C; Thu, 22 Jul 2021 17:42:54 +0000 (GMT) Received: from oc3016276355.ibm.com (unknown [9.145.18.177]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 22 Jul 2021 17:42:54 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v2 2/5] s390x: kvm: topology: interception of PTF instruction Date: Thu, 22 Jul 2021 19:42:41 +0200 Message-Id: <1626975764-22131-3-git-send-email-pmorel@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1626975764-22131-1-git-send-email-pmorel@linux.ibm.com> References: <1626975764-22131-1-git-send-email-pmorel@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-GUID: nfdNMYN04SGYGe948neJr6fweHza8bvC X-Proofpoint-ORIG-GUID: ozZAx00h_ejKfU5AXj-psyAfGMhmd8a_ X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-22_09:2021-07-22, 2021-07-22 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 clxscore=1015 phishscore=0 priorityscore=1501 mlxscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 mlxlogscore=999 adultscore=0 malwarescore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2107220116 Received-SPF: pass client-ip=148.163.156.1; envelope-from=pmorel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, david@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, pasic@linux.ibm.com, borntraeger@de.ibm.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Interception of the PTF instruction depending on the new KVM_CAP_S390_CPU_TOPOLOGY KVM extension. Signed-off-by: Pierre Morel --- hw/s390x/s390-virtio-ccw.c | 45 ++++++++++++++++++++++++++++++ include/hw/s390x/s390-virtio-ccw.h | 7 +++++ target/s390x/kvm/kvm.c | 21 ++++++++++++++ 3 files changed, 73 insertions(+) diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index e4b18aef49..500e856974 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -404,6 +404,49 @@ static void s390_pv_prepare_reset(S390CcwMachineState *ms) s390_pv_prep_reset(); } +int s390_handle_ptf(S390CPU *cpu, uint8_t r1, uintptr_t ra) +{ + S390CcwMachineState *ms = S390_CCW_MACHINE(qdev_get_machine()); + CPUS390XState *env = &cpu->env; + uint64_t reg = env->regs[r1]; + uint8_t fc = reg & S390_TOPO_FC_MASK; + + if (!s390_has_feat(S390_FEAT_CONFIGURATION_TOPOLOGY)) { + s390_program_interrupt(env, PGM_OPERAND, ra); + return 0; + } + + if (env->psw.mask & PSW_MASK_PSTATE) { + s390_program_interrupt(env, PGM_PRIVILEGED, ra); + return 0; + } + + if (reg & ~S390_TOPO_FC_MASK) { + s390_program_interrupt(env, PGM_SPECIFICATION, ra); + return 0; + } + + switch (fc) { + case 0: /* Horizontal polarization is already set */ + env->regs[r1] = S390_PTF_REASON_DONE; + return 2; + case 1: /* Vertical polarization is not supported */ + env->regs[r1] = S390_PTF_REASON_NONE; + return 2; + case 2: /* Report if a topology change report is pending */ + if (ms->topology_change_report_pending) { + ms->topology_change_report_pending = false; + return 1; + } + return 0; + default: + s390_program_interrupt(env, PGM_SPECIFICATION, ra); + break; + } + + return 0; +} + static void s390_machine_reset(MachineState *machine) { S390CcwMachineState *ms = S390_CCW_MACHINE(machine); @@ -433,6 +476,8 @@ static void s390_machine_reset(MachineState *machine) run_on_cpu(cs, s390_do_cpu_ipl, RUN_ON_CPU_NULL); break; case S390_RESET_MODIFIED_CLEAR: + /* clear topology_change_report pending condition on subsystem reset */ + ms->topology_change_report_pending = false; /* * Susbsystem reset needs to be done before we unshare memory * and lose access to VIRTIO structures in guest memory. diff --git a/include/hw/s390x/s390-virtio-ccw.h b/include/hw/s390x/s390-virtio-ccw.h index 3331990e02..fbde357332 100644 --- a/include/hw/s390x/s390-virtio-ccw.h +++ b/include/hw/s390x/s390-virtio-ccw.h @@ -27,9 +27,16 @@ struct S390CcwMachineState { bool aes_key_wrap; bool dea_key_wrap; bool pv; + bool topology_change_report_pending; uint8_t loadparm[8]; }; +#define S390_PTF_REASON_NONE (0x00 << 8) +#define S390_PTF_REASON_DONE (0x01 << 8) +#define S390_PTF_REASON_BUSY (0x02 << 8) +#define S390_TOPO_FC_MASK 0xffUL +int s390_handle_ptf(S390CPU *cpu, uint8_t r1, uintptr_t ra); + struct S390CcwMachineClass { /*< private >*/ MachineClass parent_class; diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c index 5b1fdb55c4..9a0c13d4ac 100644 --- a/target/s390x/kvm/kvm.c +++ b/target/s390x/kvm/kvm.c @@ -97,6 +97,7 @@ #define PRIV_B9_EQBS 0x9c #define PRIV_B9_CLP 0xa0 +#define PRIV_B9_PTF 0xa2 #define PRIV_B9_PCISTG 0xd0 #define PRIV_B9_PCILG 0xd2 #define PRIV_B9_RPCIT 0xd3 @@ -1452,6 +1453,16 @@ static int kvm_mpcifc_service_call(S390CPU *cpu, struct kvm_run *run) } } +static int kvm_handle_ptf(S390CPU *cpu, struct kvm_run *run) +{ + uint8_t r1 = (run->s390_sieic.ipb >> 20) & 0x0f; + uint8_t ret; + + ret = s390_handle_ptf(cpu, r1, RA_IGNORED); + setcc(cpu, ret); + return 0; +} + static int handle_b9(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) { int r = 0; @@ -1469,6 +1480,9 @@ static int handle_b9(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) case PRIV_B9_RPCIT: r = kvm_rpcit_service_call(cpu, run); break; + case PRIV_B9_PTF: + r = kvm_handle_ptf(cpu, run); + break; case PRIV_B9_EQBS: /* just inject exception */ r = -1; @@ -2470,6 +2484,13 @@ void kvm_s390_get_host_cpu_model(S390CPUModel *model, Error **errp) set_bit(S390_FEAT_DIAG_318, model->features); } + /* + * Configuration topology is partially handled in KVM + */ + if (kvm_check_extension(kvm_state, KVM_CAP_S390_CPU_TOPOLOGY)) { + set_bit(S390_FEAT_CONFIGURATION_TOPOLOGY, model->features); + } + /* strip of features that are not part of the maximum model */ bitmap_and(model->features, model->features, model->def->full_feat, S390_FEAT_MAX); From patchwork Thu Jul 22 17:42:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12394445 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35A3AC63797 for ; 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Thu, 22 Jul 2021 17:42:55 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B8CE211C04C; Thu, 22 Jul 2021 17:42:54 +0000 (GMT) Received: from oc3016276355.ibm.com (unknown [9.145.18.177]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 22 Jul 2021 17:42:54 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v2 3/5] s390x: topology: CPU topology objects and structures Date: Thu, 22 Jul 2021 19:42:42 +0200 Message-Id: <1626975764-22131-4-git-send-email-pmorel@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1626975764-22131-1-git-send-email-pmorel@linux.ibm.com> References: <1626975764-22131-1-git-send-email-pmorel@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: trVv171iNnGdfuYN0teRvq-OyVSZBE0j X-Proofpoint-GUID: NlR1zlP8H3qfgm4sQC0ioQVq4fUkobcQ X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-22_12:2021-07-22, 2021-07-22 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 spamscore=0 malwarescore=0 suspectscore=0 bulkscore=0 impostorscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 lowpriorityscore=0 priorityscore=1501 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2107220116 Received-SPF: pass client-ip=148.163.156.1; envelope-from=pmorel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, david@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, pasic@linux.ibm.com, borntraeger@de.ibm.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We use new objects to have a dynamic administration of the CPU topology. The highier level object is the S390 book. In a first implementation we will have only a single S390 book. The book is built as a SYSBUS bridge during the CPU initialisation. Every object under this single book will be build dynamically immediately after a CPU has be realized if it is needed. The CPU will fill the sockets once after the other, according to the number of core per socket defined during the smp parsing. Each CPU inside a socket will be represented by a bit in a 64bit unsigned long. Set on plug and clear on unplug of a CPU. Signed-off-by: Pierre Morel --- hw/s390x/cpu-topology.c | 334 ++++++++++++++++++++++++++++++++ hw/s390x/meson.build | 1 + hw/s390x/s390-virtio-ccw.c | 4 + include/hw/s390x/cpu-topology.h | 67 +++++++ 4 files changed, 406 insertions(+) create mode 100644 hw/s390x/cpu-topology.c create mode 100644 include/hw/s390x/cpu-topology.h diff --git a/hw/s390x/cpu-topology.c b/hw/s390x/cpu-topology.c new file mode 100644 index 0000000000..73f91d5334 --- /dev/null +++ b/hw/s390x/cpu-topology.c @@ -0,0 +1,334 @@ +/* + * CPU Topology + * + * Copyright 2021 IBM Corp. + * Author(s): Pierre Morel + + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu/error-report.h" +#include "hw/sysbus.h" +#include "hw/s390x/cpu-topology.h" +#include "hw/qdev-properties.h" +#include "hw/boards.h" +#include "qemu/typedefs.h" +#include "target/s390x/cpu.h" +#include "hw/s390x/s390-virtio-ccw.h" + +static S390TopologyCores *s390_create_cores(S390TopologySocket *socket, + int origin) +{ + DeviceState *dev; + S390TopologyCores *cores; + const MachineState *ms = MACHINE(qdev_get_machine()); + + if (socket->bus->num_children >= ms->smp.cores) { + return NULL; + } + + dev = qdev_new(TYPE_S390_TOPOLOGY_CORES); + qdev_realize_and_unref(dev, socket->bus, &error_fatal); + + cores = S390_TOPOLOGY_CORES(dev); + cores->origin = origin; + socket->cnt += 1; + + return cores; +} + +static S390TopologySocket *s390_create_socket(S390TopologyBook *book, int id) +{ + DeviceState *dev; + S390TopologySocket *socket; + const MachineState *ms = MACHINE(qdev_get_machine()); + + if (book->bus->num_children >= ms->smp.sockets) { + return NULL; + } + + dev = qdev_new(TYPE_S390_TOPOLOGY_SOCKET); + qdev_realize_and_unref(dev, book->bus, &error_fatal); + + socket = S390_TOPOLOGY_SOCKET(dev); + socket->socket_id = id; + book->cnt++; + + return socket; +} + +static S390TopologyCores *s390_get_cores(S390TopologySocket *socket, int origin) +{ + S390TopologyCores *cores; + BusChild *kid; + + QTAILQ_FOREACH(kid, &socket->bus->children, sibling) { + cores = S390_TOPOLOGY_CORES(kid->child); + if (cores->origin == origin) { + return cores; + } + } + return s390_create_cores(socket, origin); +} + +static S390TopologySocket *s390_get_socket(S390TopologyBook *book, + int socket_id) +{ + S390TopologySocket *socket; + BusChild *kid; + + QTAILQ_FOREACH(kid, &book->bus->children, sibling) { + socket = S390_TOPOLOGY_SOCKET(kid->child); + if (socket->socket_id == socket_id) { + return socket; + } + } + return s390_create_socket(book, socket_id); +} + +/* + * s390_topology_new_cpu: + * @core_id: the core ID is machine wide + * + * We have a single book returned by s390_get_topology(), + * then we build the hierarchy on demand. + * Note that we do not destroy the hierarchy on error creating + * an entry in the topology, we just keept it empty. + * We do not need to worry about not finding a topology level + * entry this would have been catched during smp parsing. + */ +void s390_topology_new_cpu(int core_id) +{ + const MachineState *ms = MACHINE(qdev_get_machine()); + S390TopologyBook *book; + S390TopologySocket *socket; + S390TopologyCores *cores; + int cores_per_socket, sock_idx; + int origin, bit; + + book = s390_get_topology(); + + cores_per_socket = ms->smp.max_cpus / ms->smp.sockets; + + sock_idx = (core_id / cores_per_socket); + socket = s390_get_socket(book, sock_idx); + + /* + * We assert that all CPU are identical IFL, shared and + * horizontal topology, the only reason to have several + * S390TopologyCores is to have more than 64 CPUs. + */ + origin = 64 * (core_id / 64); + + cores = s390_get_cores(socket, origin); + + bit = 63 - (core_id - origin); + set_bit(bit, &cores->mask); + cores->origin = origin; +} + +/* + * Setting the first topology: 1 book, 1 socket + * This is enough for 64 cores if the topology is flat (single socket) + */ +void s390_topology_setup(MachineState *ms) +{ + DeviceState *dev; + + /* Create BOOK bridge device */ + dev = qdev_new(TYPE_S390_TOPOLOGY_BOOK); + object_property_add_child(qdev_get_machine(), + TYPE_S390_TOPOLOGY_BOOK, OBJECT(dev)); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); +} + +S390TopologyBook *s390_get_topology(void) +{ + static S390TopologyBook *book; + + if (!book) { + book = S390_TOPOLOGY_BOOK( + object_resolve_path(TYPE_S390_TOPOLOGY_BOOK, NULL)); + assert(book != NULL); + } + + return book; +} + +/* --- CORES Definitions --- */ + +static Property s390_topology_cores_properties[] = { + DEFINE_PROP_BOOL("dedicated", S390TopologyCores, dedicated, false), + DEFINE_PROP_UINT8("polarity", S390TopologyCores, polarity, + S390_TOPOLOGY_POLARITY_H), + DEFINE_PROP_UINT8("cputype", S390TopologyCores, cputype, + S390_TOPOLOGY_CPU_TYPE), + DEFINE_PROP_UINT16("origin", S390TopologyCores, origin, 0), + DEFINE_PROP_UINT64("mask", S390TopologyCores, mask, 0), + DEFINE_PROP_UINT8("id", S390TopologyCores, id, 0), + DEFINE_PROP_END_OF_LIST(), +}; + +static void cpu_cores_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); + + device_class_set_props(dc, s390_topology_cores_properties); + hc->unplug = qdev_simple_device_unplug_cb; + dc->bus_type = TYPE_S390_TOPOLOGY_SOCKET_BUS; + dc->desc = "topology cpu entry"; +} + +static const TypeInfo cpu_cores_info = { + .name = TYPE_S390_TOPOLOGY_CORES, + .parent = TYPE_DEVICE, + .instance_size = sizeof(S390TopologyCores), + .class_init = cpu_cores_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_HOTPLUG_HANDLER }, + { } + } +}; + +/* --- SOCKETS Definitions --- */ +static Property s390_topology_socket_properties[] = { + DEFINE_PROP_UINT8("socket_id", S390TopologySocket, socket_id, 0), + DEFINE_PROP_END_OF_LIST(), +}; + +static char *socket_bus_get_dev_path(DeviceState *dev) +{ + S390TopologySocket *socket = S390_TOPOLOGY_SOCKET(dev); + DeviceState *book = dev->parent_bus->parent; + char *id = qdev_get_dev_path(book); + char *ret; + + if (id) { + ret = g_strdup_printf("%s:%02d", id, socket->socket_id); + g_free(id); + } else { + ret = g_malloc(6); + snprintf(ret, 6, "_:%02d", socket->socket_id); + } + + return ret; +} + +static void socket_bus_class_init(ObjectClass *oc, void *data) +{ + BusClass *k = BUS_CLASS(oc); + + k->get_dev_path = socket_bus_get_dev_path; + k->max_dev = S390_MAX_SOCKETS; +} + +static const TypeInfo socket_bus_info = { + .name = TYPE_S390_TOPOLOGY_SOCKET_BUS, + .parent = TYPE_BUS, + .instance_size = 0, + .class_init = socket_bus_class_init, +}; + +static void s390_socket_device_realize(DeviceState *dev, Error **errp) +{ + S390TopologySocket *socket = S390_TOPOLOGY_SOCKET(dev); + BusState *bus; + + bus = qbus_create(TYPE_S390_TOPOLOGY_SOCKET_BUS, dev, + TYPE_S390_TOPOLOGY_SOCKET_BUS); + qbus_set_hotplug_handler(bus, OBJECT(dev)); + socket->bus = bus; +} + +static void socket_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); + + hc->unplug = qdev_simple_device_unplug_cb; + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + dc->bus_type = TYPE_S390_TOPOLOGY_BOOK_BUS; + dc->realize = s390_socket_device_realize; + device_class_set_props(dc, s390_topology_socket_properties); + dc->desc = "topology socket"; +} + +static const TypeInfo socket_info = { + .name = TYPE_S390_TOPOLOGY_SOCKET, + .parent = TYPE_DEVICE, + .instance_size = sizeof(S390TopologySocket), + .class_init = socket_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_HOTPLUG_HANDLER }, + { } + } +}; + +static char *book_bus_get_dev_path(DeviceState *dev) +{ + return g_strdup_printf("00"); +} + +static void book_bus_class_init(ObjectClass *oc, void *data) +{ + BusClass *k = BUS_CLASS(oc); + + k->get_dev_path = book_bus_get_dev_path; + k->max_dev = S390_MAX_BOOKS; +} + +static const TypeInfo book_bus_info = { + .name = TYPE_S390_TOPOLOGY_BOOK_BUS, + .parent = TYPE_BUS, + .instance_size = 0, + .class_init = book_bus_class_init, +}; + +static void s390_book_device_realize(DeviceState *dev, Error **errp) +{ + S390TopologyBook *book = S390_TOPOLOGY_BOOK(dev); + BusState *bus; + + bus = qbus_create(TYPE_S390_TOPOLOGY_BOOK_BUS, dev, + TYPE_S390_TOPOLOGY_BOOK_BUS); + qbus_set_hotplug_handler(bus, OBJECT(dev)); + book->bus = bus; +} + +static void book_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); + + hc->unplug = qdev_simple_device_unplug_cb; + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + dc->realize = s390_book_device_realize; + dc->desc = "topology book"; +} + +static const TypeInfo book_info = { + .name = TYPE_S390_TOPOLOGY_BOOK, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(S390TopologyBook), + .class_init = book_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_HOTPLUG_HANDLER }, + { } + } +}; + +static void topology_register(void) +{ + type_register_static(&cpu_cores_info); + type_register_static(&socket_bus_info); + type_register_static(&socket_info); + type_register_static(&book_bus_info); + type_register_static(&book_info); +} + +type_init(topology_register); diff --git a/hw/s390x/meson.build b/hw/s390x/meson.build index 28484256ec..74678861cf 100644 --- a/hw/s390x/meson.build +++ b/hw/s390x/meson.build @@ -2,6 +2,7 @@ s390x_ss = ss.source_set() s390x_ss.add(files( 'ap-bridge.c', 'ap-device.c', + 'cpu-topology.c', 'ccw-device.c', 'css-bridge.c', 'css.c', diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index 500e856974..e02b2a8299 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -42,6 +42,7 @@ #include "sysemu/sysemu.h" #include "hw/s390x/pv.h" #include "migration/blocker.h" +#include "hw/s390x/cpu-topology.h" static Error *pv_mig_blocker; @@ -88,6 +89,7 @@ static void s390_init_cpus(MachineState *machine) /* initialize possible_cpus */ mc->possible_cpu_arch_ids(machine); + s390_topology_setup(machine); for (i = 0; i < machine->smp.cpus; i++) { s390x_new_cpu(machine->cpu_type, i, &error_fatal); } @@ -305,6 +307,8 @@ static void s390_cpu_plug(HotplugHandler *hotplug_dev, g_assert(!ms->possible_cpus->cpus[cpu->env.core_id].cpu); ms->possible_cpus->cpus[cpu->env.core_id].cpu = OBJECT(dev); + s390_topology_new_cpu(cpu->env.core_id); + if (dev->hotplugged) { raise_irq_cpu_hotplug(); } diff --git a/include/hw/s390x/cpu-topology.h b/include/hw/s390x/cpu-topology.h new file mode 100644 index 0000000000..f7ccba3725 --- /dev/null +++ b/include/hw/s390x/cpu-topology.h @@ -0,0 +1,67 @@ +/* + * CPU Topology + * + * Copyright 2021 IBM Corp. + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ +#ifndef HW_S390X_CPU_TOPOLOGY_H +#define HW_S390X_CPU_TOPOLOGY_H + +#include "hw/qdev-core.h" +#include "qom/object.h" + +#define S390_TOPOLOGY_CPU_TYPE 0x03 + +#define S390_TOPOLOGY_POLARITY_H 0x00 +#define S390_TOPOLOGY_POLARITY_VL 0x01 +#define S390_TOPOLOGY_POLARITY_VM 0x02 +#define S390_TOPOLOGY_POLARITY_VH 0x03 + +#define TYPE_S390_TOPOLOGY_CORES "topology cores" +struct S390TopologyCores { + DeviceState parent_obj; + uint8_t id; + bool dedicated; + uint8_t polarity; + uint8_t cputype; + uint16_t origin; + uint64_t mask; + int cnt; +}; +typedef struct S390TopologyCores S390TopologyCores; +OBJECT_DECLARE_SIMPLE_TYPE(S390TopologyCores, S390_TOPOLOGY_CORES) + +#define TYPE_S390_TOPOLOGY_SOCKET "topology socket" +#define TYPE_S390_TOPOLOGY_SOCKET_BUS "socket-bus" +struct S390TopologySocket { + DeviceState parent_obj; + BusState *bus; + uint8_t socket_id; + int cnt; +}; +typedef struct S390TopologySocket S390TopologySocket; +OBJECT_DECLARE_SIMPLE_TYPE(S390TopologySocket, S390_TOPOLOGY_SOCKET) +#define S390_MAX_SOCKETS 4 + +#define TYPE_S390_TOPOLOGY_BOOK "topology book" +#define TYPE_S390_TOPOLOGY_BOOK_BUS "book-bus" +struct S390TopologyBook { + SysBusDevice parent_obj; + BusState *bus; + uint8_t book_id; + int cnt; +}; +typedef struct S390TopologyBook S390TopologyBook; +OBJECT_DECLARE_SIMPLE_TYPE(S390TopologyBook, S390_TOPOLOGY_BOOK) +#define S390_MAX_BOOKS 1 + +S390TopologyBook *s390_init_topology(void); + +S390TopologyBook *s390_get_topology(void); +void s390_topology_setup(MachineState *ms); +void s390_topology_new_cpu(int core_id); + +#endif From patchwork Thu Jul 22 17:42:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12394439 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BF4BC63797 for ; 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Thu, 22 Jul 2021 17:42:55 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3C92611C04C; Thu, 22 Jul 2021 17:42:55 +0000 (GMT) Received: from oc3016276355.ibm.com (unknown [9.145.18.177]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 22 Jul 2021 17:42:55 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v2 4/5] s390x: topology: Topology list entries and SYSIB 15.x.x Date: Thu, 22 Jul 2021 19:42:43 +0200 Message-Id: <1626975764-22131-5-git-send-email-pmorel@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1626975764-22131-1-git-send-email-pmorel@linux.ibm.com> References: <1626975764-22131-1-git-send-email-pmorel@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: v7YuVurU-kzusXYU4yO7eN-eS3Mpg6Hb X-Proofpoint-GUID: 3l9IKYAej93h4x8tV0pbv6TuToHecdWV X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-22_12:2021-07-22, 2021-07-22 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 bulkscore=0 priorityscore=1501 mlxlogscore=999 spamscore=0 lowpriorityscore=0 suspectscore=0 malwarescore=0 clxscore=1015 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2107220116 Received-SPF: pass client-ip=148.163.156.1; envelope-from=pmorel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, david@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, pasic@linux.ibm.com, borntraeger@de.ibm.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We define the CPU type Topology List Entry and the Container type Topology List Entry to implement SYSIB 15.1.x This patch will be squatched with the next patch. Signed-off-by: Pierre Morel --- target/s390x/cpu.h | 44 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index b26ae8fff2..d573ba205e 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -564,6 +564,50 @@ typedef union SysIB { } SysIB; QEMU_BUILD_BUG_ON(sizeof(SysIB) != 4096); +/* CPU type Topology List Entry */ +typedef struct SysIBTl_cpu { + uint8_t nl; + uint8_t reserved0[3]; + uint8_t reserved1:5; + uint8_t dedicated:1; + uint8_t polarity:2; + uint8_t type; + uint16_t origin; + uint64_t mask; +} QEMU_PACKED SysIBTl_cpu; + +/* Container type Topology List Entry */ +typedef struct SysIBTl_container { + uint8_t nl; + uint8_t reserved[6]; + uint8_t id; +} QEMU_PACKED SysIBTl_container; + +/* Generic Topology List Entry */ +typedef union SysIBTl_entry { + uint8_t nl; + SysIBTl_container container; + SysIBTl_cpu cpu; +} QEMU_PACKED SysIBTl_entry; + +#define TOPOLOGY_NR_MAG 6 +#define TOPOLOGY_NR_MAG6 0 +#define TOPOLOGY_NR_MAG5 1 +#define TOPOLOGY_NR_MAG4 2 +#define TOPOLOGY_NR_MAG3 3 +#define TOPOLOGY_NR_MAG2 4 +#define TOPOLOGY_NR_MAG1 5 +/* Configuration topology */ +typedef struct SysIB_151x { + uint8_t res0[2]; + uint16_t length; + uint8_t mag[TOPOLOGY_NR_MAG]; + uint8_t res1; + uint8_t mnest; + uint32_t res2; + SysIBTl_entry tle[0]; +} QEMU_PACKED SysIB_151x; + /* MMU defines */ #define ASCE_ORIGIN (~0xfffULL) /* segment table origin */ #define ASCE_SUBSPACE 0x200 /* subspace group control */ From patchwork Thu Jul 22 17:42:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12394435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91BC9C63797 for ; Thu, 22 Jul 2021 17:44:48 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2CB2261249 for ; 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Thu, 22 Jul 2021 13:43:01 -0400 Received: from pps.filterd (ppma03ams.nl.ibm.com [127.0.0.1]) by ppma03ams.nl.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 16MHXkkX017497; Thu, 22 Jul 2021 17:42:59 GMT Received: from b06cxnps3074.portsmouth.uk.ibm.com (d06relay09.portsmouth.uk.ibm.com [9.149.109.194]) by ppma03ams.nl.ibm.com with ESMTP id 39upu8am1p-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 22 Jul 2021 17:42:59 +0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 16MHgus734799892 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 22 Jul 2021 17:42:56 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1753511C058; Thu, 22 Jul 2021 17:42:56 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B37BE11C04C; Thu, 22 Jul 2021 17:42:55 +0000 (GMT) Received: from oc3016276355.ibm.com (unknown [9.145.18.177]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 22 Jul 2021 17:42:55 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v2 5/5] s390x: topology: implementating Store Topology System Information Date: Thu, 22 Jul 2021 19:42:44 +0200 Message-Id: <1626975764-22131-6-git-send-email-pmorel@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1626975764-22131-1-git-send-email-pmorel@linux.ibm.com> References: <1626975764-22131-1-git-send-email-pmorel@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-GUID: BVPrBEUPCHsDDB2CJWzLuiPK_eL2ELzR X-Proofpoint-ORIG-GUID: AfKpuIQ0wMGNJAkIk06sr1TH3MaijCFU X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-22_12:2021-07-22, 2021-07-22 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=0 adultscore=0 mlxlogscore=999 clxscore=1015 malwarescore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2107220116 Received-SPF: pass client-ip=148.163.158.5; envelope-from=pmorel@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, david@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, pasic@linux.ibm.com, borntraeger@de.ibm.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The handling of STSI is enhenced with the interception of the function code 15 for storing CPU topology. Using the objects built during the pluging of CPU, we build the SYSIB 15_1_x structures. With this patch the maximum MNEST level is 2, this is also the only level allowed and only SYSIB 15_1_2 will be built. Signed-off-by: Pierre Morel --- target/s390x/kvm/kvm.c | 101 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 101 insertions(+) diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c index 9a0c13d4ac..0194756e6a 100644 --- a/target/s390x/kvm/kvm.c +++ b/target/s390x/kvm/kvm.c @@ -52,6 +52,7 @@ #include "hw/s390x/s390-virtio-ccw.h" #include "hw/s390x/s390-virtio-hcall.h" #include "hw/s390x/pv.h" +#include "hw/s390x/cpu-topology.h" #ifndef DEBUG_KVM #define DEBUG_KVM 0 @@ -1907,6 +1908,102 @@ static void insert_stsi_3_2_2(S390CPU *cpu, __u64 addr, uint8_t ar) } } +static int stsi_15_container(void *p, int nl, int id) +{ + SysIBTl_container *tle = (SysIBTl_container *)p; + + tle->nl = nl; + tle->id = id; + + return sizeof(*tle); +} + +static int stsi_15_cpus(void *p, S390TopologyCores *cd) +{ + SysIBTl_cpu *tle = (SysIBTl_cpu *)p; + + tle->nl = 0; + tle->dedicated = cd->dedicated; + tle->polarity = cd->polarity; + tle->type = cd->cputype; + tle->origin = cd->origin; + tle->mask = cd->mask; + + return sizeof(*tle); +} + +static int set_socket(const MachineState *ms, void *p, + S390TopologySocket *socket) +{ + BusChild *kid; + int l, len = 0; + + len += stsi_15_container(p, 1, socket->socket_id); + p += len; + + QTAILQ_FOREACH_REVERSE(kid, &socket->bus->children, sibling) { + l = stsi_15_cpus(p, S390_TOPOLOGY_CORES(kid->child)); + p += l; + len += l; + } + return len; +} + +static void insert_stsi_15_1_2(const MachineState *ms, void *p) +{ + S390TopologyBook *book; + SysIB_151x *sysib; + BusChild *kid; + int level = 2; + int len, l; + + sysib = (SysIB_151x *)p; + sysib->mnest = level; + sysib->mag[TOPOLOGY_NR_MAG2] = ms->smp.sockets; + sysib->mag[TOPOLOGY_NR_MAG1] = ms->smp.cores; + + book = s390_get_topology(); + len = sizeof(SysIB_151x); + p += len; + + QTAILQ_FOREACH_REVERSE(kid, &book->bus->children, sibling) { + l = set_socket(ms, p, S390_TOPOLOGY_SOCKET(kid->child)); + p += l; + len += l; + } + + sysib->length = len; +} + +static void insert_stsi_15_1_x(S390CPU *cpu, int sel2, __u64 addr, uint8_t ar) +{ + const MachineState *machine = MACHINE(qdev_get_machine()); + void *p; + int ret, cc; + + /* + * Until the SCLP STSI Facility reporting the MNEST value is used, + * a sel2 value of 2 is the only value allowed in STSI 15.1.x. + */ + if (sel2 != 2) { + setcc(cpu, 3); + return; + } + + p = g_malloc0(4096); + + insert_stsi_15_1_2(machine, p); + + if (s390_is_pv()) { + ret = s390_cpu_pv_mem_write(cpu, 0, p, 4096); + } else { + ret = s390_cpu_virt_mem_write(cpu, addr, ar, p, 4096); + } + cc = ret ? 3 : 0; + setcc(cpu, cc); + g_free(p); +} + static int handle_stsi(S390CPU *cpu) { CPUState *cs = CPU(cpu); @@ -1920,6 +2017,10 @@ static int handle_stsi(S390CPU *cpu) /* Only sysib 3.2.2 needs post-handling for now. */ insert_stsi_3_2_2(cpu, run->s390_stsi.addr, run->s390_stsi.ar); return 0; + case 15: + insert_stsi_15_1_x(cpu, run->s390_stsi.sel2, run->s390_stsi.addr, + run->s390_stsi.ar); + return 0; default: return 0; }