From patchwork Fri Jul 23 08:58:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12395633 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F35CEC43214 for ; Fri, 23 Jul 2021 08:58:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D786760EE2 for ; Fri, 23 Jul 2021 08:58:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231686AbhGWISE (ORCPT ); Fri, 23 Jul 2021 04:18:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229906AbhGWISD (ORCPT ); Fri, 23 Jul 2021 04:18:03 -0400 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8FC5AC061757; Fri, 23 Jul 2021 01:58:36 -0700 (PDT) Received: by mail-wr1-x42d.google.com with SMTP id q3so1597075wrx.0; Fri, 23 Jul 2021 01:58:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TFqPeTJizFnfUZM7Q40k9J0nA9MRhn5b8J6dQsSbkSU=; b=JAWByEhHAkQv/lzD0WR5ne7Ev6FCgoRB56jWgTLjSI69EbqeUFU9vQnE19CibgPPn/ ZGny8yVpbkvdZ1wnPwhJ1VDzU6GXogq+6jh2h9UJa57Juv5Tu5GiiALFh4gyWt+VS50W 1GstGAvF5HGx4y2hhT5dqQSE8q+qMgmhvcGawTC82D33q/4/kUW2wx2kGKp7BaLqTvKn UyecvklcVBjKQx1IolI6IPRK9TpkCCpShsP7HcWm+nmpyU4A0+az4b85qfNKGuavN/CS 1nRCwIbNmBpq6eJJR/4JwGh5dAj9DKzS1VEb3N4cCk+ZR6UTVvoVUB/4XxKXh6nEVMDo HjJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TFqPeTJizFnfUZM7Q40k9J0nA9MRhn5b8J6dQsSbkSU=; b=BNUAnuApGZ3mlvjZLSrw8e8JJO6De/4CPe0qfY1PeRgEbmBR6LqgNpXyhuvgFB23xo 6SOZ70MhKCSan6xkwFE2wQlWqk9EkmcR9QvQ+mfk9bEiLibnsEX6BfyAs+BCW3oXCTVC 3fpF7YeWqj8b8DGith92xOPR//wVjg0LBoFPiZg1Szat69uZRLia1OYunx9ZGy5xf0dq t2ZgihChsoXsHosWZQ0CXD19hVH9vcEryfMHu7BhIAmDTht3Nky9SbncKaZp6AggNMa3 8Al7d4YjJDgsoQcMY8EIjWJtAK5Ghjm4dgHLrN2GDzH73UMjNtk3fcI1GbS/u8Pk1Iw+ gz0Q== X-Gm-Message-State: AOAM530dKZ+Rc9Zi2gtDmKdflX/9RXfh3lRsjHgRUsBxpXGhgfXAYIuM j6uPLZ5TP6lDpsSp4wsgLkOt1MQyD+/cmyKs X-Google-Smtp-Source: ABdhPJyyNG10iIo8RxseG38jkYxRJLgxywxuij/wB6xqXeJqlercNgez8+i2a+Umjon2bD7TyTFtEQ== X-Received: by 2002:a5d:434e:: with SMTP id u14mr4013143wrr.378.1627030715116; Fri, 23 Jul 2021 01:58:35 -0700 (PDT) Received: from monk.home (astrasbourg-157-1-7-84.w90-40.abo.wanadoo.fr. [90.40.218.84]) by smtp.gmail.com with ESMTPSA id l23sm17503607wme.22.2021.07.23.01.58.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Jul 2021 01:58:34 -0700 (PDT) From: Christophe Branchereau To: paul@crapouillou.net Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, Christophe Branchereau Subject: [PATCH V2 1/5] iio/adc: ingenic: rename has_aux2 to has_aux_md Date: Fri, 23 Jul 2021 10:58:09 +0200 Message-Id: <20210723085813.1523934-2-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210723085813.1523934-1-cbranchereau@gmail.com> References: <893d6165-0f12-d0da-44be-449a4ae96ac2@roeck-us.net> <20210723085813.1523934-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The jz4760(b) socs have 3 aux channels. The purpose of has_aux2 is to set the MD bits used to select the AUX channel to be sampled, not to describe the hardware. Rename it to a more appropriate name. Signed-off-by: Christophe Branchereau --- drivers/iio/adc/ingenic-adc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index 34c03a264f74..40f2d8c2cf72 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -92,7 +92,7 @@ struct ingenic_adc_soc_data { const int *battery_scale_avail; size_t battery_scale_avail_size; unsigned int battery_vref_mode: 1; - unsigned int has_aux2: 1; + unsigned int has_aux_md: 1; const struct iio_chan_spec *channels; unsigned int num_channels; int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc); @@ -506,7 +506,7 @@ static const struct ingenic_adc_soc_data jz4725b_adc_soc_data = { .battery_scale_avail = jz4725b_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4725b_adc_battery_scale_avail), .battery_vref_mode = true, - .has_aux2 = false, + .has_aux_md = false, .channels = jz4740_channels, .num_channels = ARRAY_SIZE(jz4740_channels), .init_clk_div = jz4725b_adc_init_clk_div, @@ -520,7 +520,7 @@ static const struct ingenic_adc_soc_data jz4740_adc_soc_data = { .battery_scale_avail = jz4740_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4740_adc_battery_scale_avail), .battery_vref_mode = true, - .has_aux2 = false, + .has_aux_md = false, .channels = jz4740_channels, .num_channels = ARRAY_SIZE(jz4740_channels), .init_clk_div = NULL, /* no ADCLK register on JZ4740 */ @@ -534,7 +534,7 @@ static const struct ingenic_adc_soc_data jz4770_adc_soc_data = { .battery_scale_avail = jz4770_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4770_adc_battery_scale_avail), .battery_vref_mode = false, - .has_aux2 = true, + .has_aux_md = true, .channels = jz4770_channels, .num_channels = ARRAY_SIZE(jz4770_channels), .init_clk_div = jz4770_adc_init_clk_div, @@ -581,7 +581,7 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev, /* We cannot sample AUX/AUX2 in parallel. */ mutex_lock(&adc->aux_lock); - if (adc->soc_data->has_aux2 && engine == 0) { + if (adc->soc_data->has_aux_md && engine == 0) { bit = BIT(chan->channel == INGENIC_ADC_AUX2); ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, bit); } From patchwork Fri Jul 23 08:58:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12395635 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13956C41537 for ; Fri, 23 Jul 2021 08:58:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F144260E78 for ; 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[90.40.218.84]) by smtp.gmail.com with ESMTPSA id l23sm17503607wme.22.2021.07.23.01.58.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Jul 2021 01:58:35 -0700 (PDT) From: Christophe Branchereau To: paul@crapouillou.net Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, Christophe Branchereau Subject: [PATCH V2 2/5] dt-bindings: iio/adc: add an INGENIC_ADC_AUX0 entry Date: Fri, 23 Jul 2021 10:58:10 +0200 Message-Id: <20210723085813.1523934-3-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210723085813.1523934-1-cbranchereau@gmail.com> References: <893d6165-0f12-d0da-44be-449a4ae96ac2@roeck-us.net> <20210723085813.1523934-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The JZ4760(B) socs have 3 AUX inputs, add an entry to prepare including the one named AUX in the sadc driver. Leaving the rest untouched as it's ABI. Signed-off-by: Christophe Branchereau --- include/dt-bindings/iio/adc/ingenic,adc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/iio/adc/ingenic,adc.h b/include/dt-bindings/iio/adc/ingenic,adc.h index 4627a00e369e..a6ccc031635b 100644 --- a/include/dt-bindings/iio/adc/ingenic,adc.h +++ b/include/dt-bindings/iio/adc/ingenic,adc.h @@ -13,5 +13,6 @@ #define INGENIC_ADC_TOUCH_YN 6 #define INGENIC_ADC_TOUCH_XD 7 #define INGENIC_ADC_TOUCH_YD 8 +#define INGENIC_ADC_AUX0 9 #endif From patchwork Fri Jul 23 08:58:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12395637 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D98CBC19F2E for ; Fri, 23 Jul 2021 08:58:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CF7A160E78 for ; Fri, 23 Jul 2021 08:58:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234533AbhGWISH (ORCPT ); Fri, 23 Jul 2021 04:18:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234131AbhGWISF (ORCPT ); Fri, 23 Jul 2021 04:18:05 -0400 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 676A3C061757; Fri, 23 Jul 2021 01:58:38 -0700 (PDT) Received: by mail-wr1-x42a.google.com with SMTP id g15so1546242wrd.3; Fri, 23 Jul 2021 01:58:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=r4l4X9Ml9axxQp0KFzsTd5BH2EID20QmHeunm7jfaaI=; b=a8YRaUsKSrMVnFI9RwtmhzG0tKDoOHlq0DlrcjiZkXl1SZOvra5fw0C8qar2A280US 6KwLwiJR/4Hf75rHBsR/6T5ZES2zUnWj0EfXRnasOazhAppPWmE1gQUNVc6S7J6q1uC5 jaLH209rvhwjgAYTl5nAING2MRkPjuEJbEjPWvDAbs+SBXI0Vib3KoE3W+l4pMcUSco+ uDuEYA5u1YeOEmtNygw7/INp69l5P3y0qjIfKkdzsQBiqVXWtoM+Z/YrY4x7Z+NBXMry FYV5Q5zPrE1fPILvIauOxCB1tB2ghoqrg6lYPaYrviERPjk3pk67gFe4KbBoaxCwVOXL ZXEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=r4l4X9Ml9axxQp0KFzsTd5BH2EID20QmHeunm7jfaaI=; b=mV0BkZaG4QH1XV/6h8ncT3fOQW/2uq5NOzaNdUzdAKqG85qjuIdHv2pGy/C7fEyZ+z balQpmUd0SrA7a30BdwkvMDP2KVPWOZgF78JQXDvw5qgJQokXLV8bS07E91HF4UgDoJR UFtkmNXRW99N0Mop6U9zoI6iue9C4wMxXOe+NULM60I4135FeY/PnykK5a8Y1CcUMOYU kAgMQHrrK7C9/i54FwK+L7tN9Wt/oa8abcIDuMx2EZNsApKsiW+hxl5kr3jVuBsHaODO qMQZPQwfZLqX6zdaCHATlHgddlsmXqAsHJBHPEZmqelrPAhd8/9jVQL18TQP7Mmayg73 Td8Q== X-Gm-Message-State: AOAM533wJjfH5tZCh8p7PtfWU7Ogq56U72JWeCEmWT8fCWx5dPyItnfx K19F/G01ItHexsAmn21GqT0= X-Google-Smtp-Source: ABdhPJzJLzYPQjc6yiVQeUzjzST7X2KhRFq8p2A98DI5WrTYowlmW4+D3ICQEpyXqok0Om0vd8lx4w== X-Received: by 2002:adf:ee45:: with SMTP id w5mr4112573wro.281.1627030716899; Fri, 23 Jul 2021 01:58:36 -0700 (PDT) Received: from monk.home (astrasbourg-157-1-7-84.w90-40.abo.wanadoo.fr. [90.40.218.84]) by smtp.gmail.com with ESMTPSA id l23sm17503607wme.22.2021.07.23.01.58.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Jul 2021 01:58:36 -0700 (PDT) From: Christophe Branchereau To: paul@crapouillou.net Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, Christophe Branchereau Subject: [PATCH V2 3/5] iio/adc: ingenic: add JZ4760 support to the sadc driver Date: Fri, 23 Jul 2021 10:58:11 +0200 Message-Id: <20210723085813.1523934-4-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210723085813.1523934-1-cbranchereau@gmail.com> References: <893d6165-0f12-d0da-44be-449a4ae96ac2@roeck-us.net> <20210723085813.1523934-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The jz4760 sadc is very similar to the jz4770 one, but has a VREF of 2.5V and 3 aux channels. modify ingenic_adc_read_chan_info_raw() needs a change to account for it. Signed-off-by: Christophe Branchereau --- drivers/iio/adc/ingenic-adc.c | 82 +++++++++++++++++++++++++++++++++-- 1 file changed, 78 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index 40f2d8c2cf72..6b9af0530590 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -71,6 +71,7 @@ #define JZ4725B_ADC_BATTERY_HIGH_VREF_BITS 10 #define JZ4740_ADC_BATTERY_HIGH_VREF (7500 * 0.986) #define JZ4740_ADC_BATTERY_HIGH_VREF_BITS 12 +#define JZ4760_ADC_BATTERY_VREF 2500 #define JZ4770_ADC_BATTERY_VREF 1200 #define JZ4770_ADC_BATTERY_VREF_BITS 12 @@ -295,6 +296,10 @@ static const int jz4740_adc_battery_scale_avail[] = { JZ_ADC_BATTERY_LOW_VREF, JZ_ADC_BATTERY_LOW_VREF_BITS, }; +static const int jz4760_adc_battery_scale_avail[] = { + JZ4760_ADC_BATTERY_VREF, JZ4770_ADC_BATTERY_VREF_BITS, +}; + static const int jz4770_adc_battery_raw_avail[] = { 0, 1, (1 << JZ4770_ADC_BATTERY_VREF_BITS) - 1, }; @@ -400,6 +405,47 @@ static const struct iio_chan_spec jz4740_channels[] = { }, }; +static const struct iio_chan_spec jz4760_channels[] = { + { + .extend_name = "aux", + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .indexed = 1, + .channel = INGENIC_ADC_AUX0, + .scan_index = -1, + }, + { + .extend_name = "aux1", + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .indexed = 1, + .channel = INGENIC_ADC_AUX, + .scan_index = -1, + }, + { + .extend_name = "aux2", + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .indexed = 1, + .channel = INGENIC_ADC_AUX2, + .scan_index = -1, + }, + { + .extend_name = "battery", + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .indexed = 1, + .channel = INGENIC_ADC_BATTERY, + .scan_index = -1, + }, +}; + static const struct iio_chan_spec jz4770_channels[] = { { .type = IIO_VOLTAGE, @@ -526,6 +572,20 @@ static const struct ingenic_adc_soc_data jz4740_adc_soc_data = { .init_clk_div = NULL, /* no ADCLK register on JZ4740 */ }; +static const struct ingenic_adc_soc_data jz4760_adc_soc_data = { + .battery_high_vref = JZ4760_ADC_BATTERY_VREF, + .battery_high_vref_bits = JZ4770_ADC_BATTERY_VREF_BITS, + .battery_raw_avail = jz4770_adc_battery_raw_avail, + .battery_raw_avail_size = ARRAY_SIZE(jz4770_adc_battery_raw_avail), + .battery_scale_avail = jz4760_adc_battery_scale_avail, + .battery_scale_avail_size = ARRAY_SIZE(jz4760_adc_battery_scale_avail), + .battery_vref_mode = false, + .has_aux_md = true, + .channels = jz4760_channels, + .num_channels = ARRAY_SIZE(jz4760_channels), + .init_clk_div = jz4770_adc_init_clk_div, +}; + static const struct ingenic_adc_soc_data jz4770_adc_soc_data = { .battery_high_vref = JZ4770_ADC_BATTERY_VREF, .battery_high_vref_bits = JZ4770_ADC_BATTERY_VREF_BITS, @@ -569,7 +629,7 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev, struct iio_chan_spec const *chan, int *val) { - int bit, ret, engine = (chan->channel == INGENIC_ADC_BATTERY); + int cmd, ret, engine = (chan->channel == INGENIC_ADC_BATTERY); struct ingenic_adc *adc = iio_priv(iio_dev); ret = clk_enable(adc->clk); @@ -579,11 +639,22 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev, return ret; } - /* We cannot sample AUX/AUX2 in parallel. */ + /* We cannot sample the aux channels in parallel. */ mutex_lock(&adc->aux_lock); if (adc->soc_data->has_aux_md && engine == 0) { - bit = BIT(chan->channel == INGENIC_ADC_AUX2); - ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, bit); + switch (chan->channel) { + case INGENIC_ADC_AUX0: + cmd = 0; + break; + case INGENIC_ADC_AUX: + cmd = 1; + break; + case INGENIC_ADC_AUX2: + cmd = 2; + break; + } + + ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, cmd); } ret = ingenic_adc_capture(adc, engine); @@ -591,6 +662,7 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev, goto out; switch (chan->channel) { + case INGENIC_ADC_AUX0: case INGENIC_ADC_AUX: case INGENIC_ADC_AUX2: *val = readw(adc->base + JZ_ADC_REG_ADSDAT); @@ -621,6 +693,7 @@ static int ingenic_adc_read_raw(struct iio_dev *iio_dev, return ingenic_adc_read_chan_info_raw(iio_dev, chan, val); case IIO_CHAN_INFO_SCALE: switch (chan->channel) { + case INGENIC_ADC_AUX0: case INGENIC_ADC_AUX: case INGENIC_ADC_AUX2: *val = JZ_ADC_AUX_VREF; @@ -832,6 +905,7 @@ static int ingenic_adc_probe(struct platform_device *pdev) static const struct of_device_id ingenic_adc_of_match[] = { { .compatible = "ingenic,jz4725b-adc", .data = &jz4725b_adc_soc_data, }, { .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, }, + { .compatible = "ingenic,jz4760-adc", .data = &jz4760_adc_soc_data, }, { .compatible = "ingenic,jz4770-adc", .data = &jz4770_adc_soc_data, }, { }, }; From patchwork Fri Jul 23 08:58:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12395639 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AFD3AC43216 for ; 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[90.40.218.84]) by smtp.gmail.com with ESMTPSA id l23sm17503607wme.22.2021.07.23.01.58.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Jul 2021 01:58:37 -0700 (PDT) From: Christophe Branchereau To: paul@crapouillou.net Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, Christophe Branchereau Subject: [PATCH V2 4/5] iio/adc: ingenic: add JZ4760B support to the sadc driver Date: Fri, 23 Jul 2021 10:58:12 +0200 Message-Id: <20210723085813.1523934-5-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210723085813.1523934-1-cbranchereau@gmail.com> References: <893d6165-0f12-d0da-44be-449a4ae96ac2@roeck-us.net> <20210723085813.1523934-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The JZ4760B variant differs slightly from the JZ4760: it has a bit called VBAT_SEL in the CFG register. In order to correctly sample the battery voltage on existing handhelds using this SOC, the bit must be cleared. We leave the possibility to set the bit, by adding the "ingenic,use-internal-divider" property to a devicetree. Signed-off-by: Christophe Branchereau --- drivers/iio/adc/ingenic-adc.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index 6b9af0530590..09937c05d2af 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -37,6 +37,7 @@ #define JZ_ADC_REG_CFG_SAMPLE_NUM(n) ((n) << 10) #define JZ_ADC_REG_CFG_PULL_UP(n) ((n) << 16) #define JZ_ADC_REG_CFG_CMD_SEL BIT(22) +#define JZ_ADC_REG_CFG_VBAT_SEL BIT(30) #define JZ_ADC_REG_CFG_TOUCH_OPS_MASK (BIT(31) | GENMASK(23, 10)) #define JZ_ADC_REG_ADCLK_CLKDIV_LSB 0 #define JZ4725B_ADC_REG_ADCLK_CLKDIV10US_LSB 16 @@ -879,6 +880,12 @@ static int ingenic_adc_probe(struct platform_device *pdev) /* Put hardware in a known passive state. */ writeb(0x00, adc->base + JZ_ADC_REG_ENABLE); writeb(0xff, adc->base + JZ_ADC_REG_CTRL); + + if (device_property_present(dev, "ingenic,use-internal-divider")) /* JZ4760B specific */ + ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL, JZ_ADC_REG_CFG_VBAT_SEL); + else + ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL, 0); + usleep_range(2000, 3000); /* Must wait at least 2ms. */ clk_disable(adc->clk); @@ -906,6 +913,7 @@ static const struct of_device_id ingenic_adc_of_match[] = { { .compatible = "ingenic,jz4725b-adc", .data = &jz4725b_adc_soc_data, }, { .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, }, { .compatible = "ingenic,jz4760-adc", .data = &jz4760_adc_soc_data, }, + { .compatible = "ingenic,jz4760b-adc", .data = &jz4760_adc_soc_data, }, { .compatible = "ingenic,jz4770-adc", .data = &jz4770_adc_soc_data, }, { }, }; From patchwork Fri Jul 23 08:58:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12395641 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7836DC4320A for ; Fri, 23 Jul 2021 08:58:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 60A8C60EBD for ; Fri, 23 Jul 2021 08:58:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234624AbhGWISJ (ORCPT ); Fri, 23 Jul 2021 04:18:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43674 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234393AbhGWISG (ORCPT ); Fri, 23 Jul 2021 04:18:06 -0400 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF143C06175F; Fri, 23 Jul 2021 01:58:39 -0700 (PDT) Received: by mail-wm1-x329.google.com with SMTP id j34-20020a05600c1c22b029024e75084404so211404wms.1; Fri, 23 Jul 2021 01:58:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2XETmwuPuczOkgqS4dTvF+SPhEzUC1DL4T7X6rHN5Vw=; b=d+qXlQISGDqV5tlBOLexsQ/1TPhQNMV2cXETQvCnrqgoTOzPfEDey/nXKC56lwYtLI M5dvWFlbSS3kKyA4DwW+DeH6QLzxFxde6MTQG+P9Bpfx1eJbUJLJZuQJSvXf6YZOA5u0 If+p9m6fGbFBNP3HPz/AAihBKbWklWuCAVff/lza1MzNHmkNVqVEGV9LPh79dySuAAA+ Fqcw2uEKZHDnY5y55dypqzdc8uH2j6EDCMpRiCbtfqw/JUorzz+nT7uhWn2nS/l+2UPH BN9C+11se/Wj5/mQ9Pwt+N3XlY87kOcqwkCYIhQOsuL5I0T9gHg9KQ7C6q5qE1bHe3Ym M4qg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2XETmwuPuczOkgqS4dTvF+SPhEzUC1DL4T7X6rHN5Vw=; b=aky/OlBbjZB7QO5V6IZ3czjGO0Qom037NwNuft+n9N3QgHpj5NbM/VjZe11BhH27Wb 6O0o1mv+76ZGOcuavGO8ZVhoBQnglyX38YK19gnvd5ljakAVrg9YWCVcGxeTXrpBOZ/3 ZV5bYS1EXZaSpLWY/+rpgKHMDdSjq3fyU1SPG1YoMW5hGLnG9n6N66UFrRw/a25oNjum vZxO0gW88osqmnCg0puVxPYqRk5AK0wnkV4g5u9G535Myi1jIgY0zFtvf9xuDbfGek5r wX3OUiYUIta5d/w+5KSLUk0ZMQzZmtrc8neVd5+jaEbMtzkUIOOveZYZOF/9nNVpA/wr GU4A== X-Gm-Message-State: AOAM532NqasjDBNMSyET5QReA+dIIzERuA19Zu6YRFgGk5lkLlbGoDCC 7CbWluWMm0eTScGYO/IHmiE= X-Google-Smtp-Source: ABdhPJxy0Z9lOr7dGqdcCV7FrKtSSSEkdkzK2BCZxllZVgGqRfxWDHkvj/0VmzZQZqgj4cEKZyzA+A== X-Received: by 2002:a05:600c:3644:: with SMTP id y4mr13394625wmq.85.1627030718502; Fri, 23 Jul 2021 01:58:38 -0700 (PDT) Received: from monk.home (astrasbourg-157-1-7-84.w90-40.abo.wanadoo.fr. [90.40.218.84]) by smtp.gmail.com with ESMTPSA id l23sm17503607wme.22.2021.07.23.01.58.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Jul 2021 01:58:38 -0700 (PDT) From: Christophe Branchereau To: paul@crapouillou.net Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, Christophe Branchereau Subject: [PATCH V2 5/5] dt-bindings: iio/adc: ingenic: add the JZ4760(B) socs to the sadc Documentation Date: Fri, 23 Jul 2021 10:58:13 +0200 Message-Id: <20210723085813.1523934-6-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210723085813.1523934-1-cbranchereau@gmail.com> References: <893d6165-0f12-d0da-44be-449a4ae96ac2@roeck-us.net> <20210723085813.1523934-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The jz4760b variant differs slightly from the jz4760, add a property to let users sample the internal divider if needed and document it. Signed-off-by: Christophe Branchereau --- .../devicetree/bindings/iio/adc/ingenic,adc.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml b/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml index 433a3fb55a2e..0dc42959a64f 100644 --- a/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml @@ -23,6 +23,8 @@ properties: enum: - ingenic,jz4725b-adc - ingenic,jz4740-adc + - ingenic,jz4760-adc + - ingenic,jz4760b-adc - ingenic,jz4770-adc '#io-channel-cells': @@ -43,6 +45,13 @@ properties: interrupts: maxItems: 1 + ingenic,use-internal-divider: + description: + This property can be used to set VBAT_SEL in the JZ4760B CFG register + to sample the battery voltage from the internal divider. If absent, it + will sample the external divider. + type: boolean + required: - compatible - '#io-channel-cells'