From patchwork Mon Jul 26 08:20:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12398851 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.5 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78C86C4320E for ; Mon, 26 Jul 2021 08:20:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 68A6360F23 for ; Mon, 26 Jul 2021 08:20:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232730AbhGZHkN (ORCPT ); Mon, 26 Jul 2021 03:40:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233125AbhGZHkL (ORCPT ); Mon, 26 Jul 2021 03:40:11 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA273C061760; Mon, 26 Jul 2021 01:20:39 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id o5-20020a1c4d050000b02901fc3a62af78so7575063wmh.3; Mon, 26 Jul 2021 01:20:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RnAVrRuSO8xn5HvUZpk7kDzVOfbRU41FvjhfmnuD5zk=; b=cqgXH7se9cr4LyNFyzgkgtfvzHXcNSowKUMrO6zCMpYq9bv8IL1k0MJMPdN+9qBqRd WG1juJab5DxxO1TvIJXihSY9Umi0lg5njusD1853eJkSZLVPaExdZORNhwkPWfgskLvG 854quh3hAe3bSd/nbEiBYkoTF49wSskIgmI8z/QONTTNR641qOKgHveqQrSmPSq3/EFY EMVTZyynB8xz70pYKUbK5iIEm78iC86x3B8Pw3ok95M+qTHCK7oININ+Wst8m7ygmDFg dlkS284DKvRAYYNT6CKN75BlGMDgkVsoTOkQD73LhVK13o02f/5Qc1Lpjrz+jE88y4hQ 9cpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RnAVrRuSO8xn5HvUZpk7kDzVOfbRU41FvjhfmnuD5zk=; b=KEWsIE8szeC/pHpR3Hc+4wc1z54M+dRC54yx+xYed/tP5Kuf5M4Wn/YJKUiHkJgYMU dFF+g/ufrNLxoSU3YLUXyaQHJ+1q+F9dWs+xcrV/yyUfshAjRdDsh50YrDOAUrAp02oO 5RuinKgkf9rG9P4lxEYbnjczp5N0SrAA6p3oaHUSknTglrNjC9+amEnz8lklQnqDHGcd bdX7CVCy7qWeg4cuMzJBO1CUgrfJ3v7iejeg5CKFzYq+wKQdi+6ZVevnJs1OhCBwy0B0 l/P+VCfDHDUoSdGsC9WS3pyq1Kt6L4/16hwqMIGt4VEd/CZ8W9W1tAOg/N/dGJJtqB12 AIbw== X-Gm-Message-State: AOAM531xK/wmFUksbbPD8Rdl/9QeXSdhncCAKv0mH3iKRHawaFIFxKCB fsD/+CkjbclBwar4d0VH+OA= X-Google-Smtp-Source: ABdhPJwQvzOe/zun1pWS30iHTeU4FjezqsO+0P9tYp0BivA1Ljhfvo9jHzaH+fjHwzAhUp39sBx70Q== X-Received: by 2002:a1c:a4c1:: with SMTP id n184mr4158796wme.8.1627287638170; Mon, 26 Jul 2021 01:20:38 -0700 (PDT) Received: from monk.home (astrasbourg-157-1-7-84.w90-40.abo.wanadoo.fr. [90.40.218.84]) by smtp.gmail.com with ESMTPSA id w13sm4799464wru.72.2021.07.26.01.20.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jul 2021 01:20:37 -0700 (PDT) From: Christophe Branchereau Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, paul@crapouillou.net, Christophe Branchereau Subject: [PATCH v4 1/5] iio/adc: ingenic: rename has_aux2 to has_aux_md Date: Mon, 26 Jul 2021 10:20:29 +0200 Message-Id: <20210726082033.351533-2-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210726082033.351533-1-cbranchereau@gmail.com> References: <20210726082033.351533-1-cbranchereau@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The jz4760(b) socs have 3 aux channels. The purpose of has_aux2 is to set the MD bits used to select the AUX channel to be sampled, not to describe the hardware. Rename it to a more appropriate name. Signed-off-by: Christophe Branchereau Reviewed-by: Paul Cercueil --- drivers/iio/adc/ingenic-adc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index 34c03a264f74..40f2d8c2cf72 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -92,7 +92,7 @@ struct ingenic_adc_soc_data { const int *battery_scale_avail; size_t battery_scale_avail_size; unsigned int battery_vref_mode: 1; - unsigned int has_aux2: 1; + unsigned int has_aux_md: 1; const struct iio_chan_spec *channels; unsigned int num_channels; int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc); @@ -506,7 +506,7 @@ static const struct ingenic_adc_soc_data jz4725b_adc_soc_data = { .battery_scale_avail = jz4725b_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4725b_adc_battery_scale_avail), .battery_vref_mode = true, - .has_aux2 = false, + .has_aux_md = false, .channels = jz4740_channels, .num_channels = ARRAY_SIZE(jz4740_channels), .init_clk_div = jz4725b_adc_init_clk_div, @@ -520,7 +520,7 @@ static const struct ingenic_adc_soc_data jz4740_adc_soc_data = { .battery_scale_avail = jz4740_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4740_adc_battery_scale_avail), .battery_vref_mode = true, - .has_aux2 = false, + .has_aux_md = false, .channels = jz4740_channels, .num_channels = ARRAY_SIZE(jz4740_channels), .init_clk_div = NULL, /* no ADCLK register on JZ4740 */ @@ -534,7 +534,7 @@ static const struct ingenic_adc_soc_data jz4770_adc_soc_data = { .battery_scale_avail = jz4770_adc_battery_scale_avail, .battery_scale_avail_size = ARRAY_SIZE(jz4770_adc_battery_scale_avail), .battery_vref_mode = false, - .has_aux2 = true, + .has_aux_md = true, .channels = jz4770_channels, .num_channels = ARRAY_SIZE(jz4770_channels), .init_clk_div = jz4770_adc_init_clk_div, @@ -581,7 +581,7 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev, /* We cannot sample AUX/AUX2 in parallel. */ mutex_lock(&adc->aux_lock); - if (adc->soc_data->has_aux2 && engine == 0) { + if (adc->soc_data->has_aux_md && engine == 0) { bit = BIT(chan->channel == INGENIC_ADC_AUX2); ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, bit); } From patchwork Mon Jul 26 08:20:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12398853 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.5 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2759C04FE3 for ; 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[90.40.218.84]) by smtp.gmail.com with ESMTPSA id w13sm4799464wru.72.2021.07.26.01.20.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jul 2021 01:20:38 -0700 (PDT) From: Christophe Branchereau Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, paul@crapouillou.net, Christophe Branchereau Subject: [PATCH v4 2/5] dt-bindings: iio/adc: add an INGENIC_ADC_AUX0 entry Date: Mon, 26 Jul 2021 10:20:30 +0200 Message-Id: <20210726082033.351533-3-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210726082033.351533-1-cbranchereau@gmail.com> References: <20210726082033.351533-1-cbranchereau@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The JZ4760(B) socs have 3 AUX inputs, add an entry to prepare including the one named AUX in the sadc driver. Leaving the rest untouched as it's ABI. Signed-off-by: Christophe Branchereau Reviewed-by: Paul Cercueil Acked-by: Rob Herring --- include/dt-bindings/iio/adc/ingenic,adc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/iio/adc/ingenic,adc.h b/include/dt-bindings/iio/adc/ingenic,adc.h index 4627a00e369e..a6ccc031635b 100644 --- a/include/dt-bindings/iio/adc/ingenic,adc.h +++ b/include/dt-bindings/iio/adc/ingenic,adc.h @@ -13,5 +13,6 @@ #define INGENIC_ADC_TOUCH_YN 6 #define INGENIC_ADC_TOUCH_XD 7 #define INGENIC_ADC_TOUCH_YD 8 +#define INGENIC_ADC_AUX0 9 #endif From patchwork Mon Jul 26 08:20:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12398855 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.5 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51F3AC3F6A3 for ; Mon, 26 Jul 2021 08:20:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3F52C60F55 for ; Mon, 26 Jul 2021 08:20:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233269AbhGZHkP (ORCPT ); Mon, 26 Jul 2021 03:40:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233175AbhGZHkM (ORCPT ); Mon, 26 Jul 2021 03:40:12 -0400 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5AA56C061757; Mon, 26 Jul 2021 01:20:41 -0700 (PDT) Received: by mail-wr1-x42d.google.com with SMTP id j2so9967301wrx.9; Mon, 26 Jul 2021 01:20:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XxDmsHfj67NCzf6dLeWTql1O3Ja9txcQv/HFjj1gt5A=; b=RPDDm3/vx/HKd6ktjpdc7BQVkU3/ZR9PJQSeW7UsaZO+h2oW1WElm5x4OIQm0Lrt2q IdBsiKhrFavIpmASGxK+Zn0YCH/Ij4x357iDXd8DzZm7KsRgx6PXcbXygRDe0lnnFtSm xYDXc6cP14FFseAIKZ8QZJgTfhU0k5ZPq5yk1EqkNKzhzTlKhlSR11Ms6cQYxyq4m9Ht y8sTgdyvjNpFiMgqOsj27sFQNzkLPPDtBg57R2QG/uvShVpAUdblYUeAYIrlJe6eE7UX hjuQ6Adp//cGUE97RovSrlhgYXhxYHP5on/kvqhIZGnJsTZFXlMGJbydJSP5bzZY4+zZ NPww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XxDmsHfj67NCzf6dLeWTql1O3Ja9txcQv/HFjj1gt5A=; b=kpfy1Eg3a3svzFbTfoy6qd/a9DYl8uKGOlc0ugVFUKjyAAXk/utyjmOKP5yyddiJs1 O/NVxdffqxGH7ns7i74X1NA0SjaL/lNiKqapMfMmQa/2EZh1uTNAr/AxIGegSdb/I8fG gAgnoWhWWNs+9A7Pkrn+eBHxX3oJII9iWlg+uKvORSb809+ThFMnurC/NFzKv+eqv6a4 02wvPajfp8lMO4exKiJR+BnkrLxdzyPPF5058eOKZIVpHJ6QIVKVJB54QGFxNoJksV2X xSJaJ2qiWp8yCukzfcg6965kr7ZFDMz11pvpA0jtGBuR6h4JdrvPRhz/k5ZpCKrYAQe6 9feA== X-Gm-Message-State: AOAM533zhgDAMmmyVdZDvp6Icd6yO8rCCFo4V8oYr4sqvKD+ROk15UvK uUANY1yFxZMp1Wx8/YHxCn8= X-Google-Smtp-Source: ABdhPJxQUM3eFL4Q+ytRpT2iqyXZihfZ+oK81GxUtpbXcE9UmsxzUi/2eACzN7r6MQEp7JUha130Cw== X-Received: by 2002:adf:f411:: with SMTP id g17mr17671595wro.160.1627287639855; Mon, 26 Jul 2021 01:20:39 -0700 (PDT) Received: from monk.home (astrasbourg-157-1-7-84.w90-40.abo.wanadoo.fr. [90.40.218.84]) by smtp.gmail.com with ESMTPSA id w13sm4799464wru.72.2021.07.26.01.20.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jul 2021 01:20:39 -0700 (PDT) From: Christophe Branchereau Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, paul@crapouillou.net, Christophe Branchereau Subject: [PATCH v4 3/5] iio/adc: ingenic: add JZ4760 support to the sadc driver Date: Mon, 26 Jul 2021 10:20:31 +0200 Message-Id: <20210726082033.351533-4-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210726082033.351533-1-cbranchereau@gmail.com> References: <20210726082033.351533-1-cbranchereau@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The jz4760 sadc is very similar to the jz4770 one, but has a VREF of 2.5V and 3 aux channels. modify ingenic_adc_read_chan_info_raw() needs a change to account for it. Signed-off-by: Christophe Branchereau Reviewed-by: Paul Cercueil --- drivers/iio/adc/ingenic-adc.c | 82 +++++++++++++++++++++++++++++++++-- 1 file changed, 78 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index 40f2d8c2cf72..6b9af0530590 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -71,6 +71,7 @@ #define JZ4725B_ADC_BATTERY_HIGH_VREF_BITS 10 #define JZ4740_ADC_BATTERY_HIGH_VREF (7500 * 0.986) #define JZ4740_ADC_BATTERY_HIGH_VREF_BITS 12 +#define JZ4760_ADC_BATTERY_VREF 2500 #define JZ4770_ADC_BATTERY_VREF 1200 #define JZ4770_ADC_BATTERY_VREF_BITS 12 @@ -295,6 +296,10 @@ static const int jz4740_adc_battery_scale_avail[] = { JZ_ADC_BATTERY_LOW_VREF, JZ_ADC_BATTERY_LOW_VREF_BITS, }; +static const int jz4760_adc_battery_scale_avail[] = { + JZ4760_ADC_BATTERY_VREF, JZ4770_ADC_BATTERY_VREF_BITS, +}; + static const int jz4770_adc_battery_raw_avail[] = { 0, 1, (1 << JZ4770_ADC_BATTERY_VREF_BITS) - 1, }; @@ -400,6 +405,47 @@ static const struct iio_chan_spec jz4740_channels[] = { }, }; +static const struct iio_chan_spec jz4760_channels[] = { + { + .extend_name = "aux", + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .indexed = 1, + .channel = INGENIC_ADC_AUX0, + .scan_index = -1, + }, + { + .extend_name = "aux1", + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .indexed = 1, + .channel = INGENIC_ADC_AUX, + .scan_index = -1, + }, + { + .extend_name = "aux2", + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .indexed = 1, + .channel = INGENIC_ADC_AUX2, + .scan_index = -1, + }, + { + .extend_name = "battery", + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), + .indexed = 1, + .channel = INGENIC_ADC_BATTERY, + .scan_index = -1, + }, +}; + static const struct iio_chan_spec jz4770_channels[] = { { .type = IIO_VOLTAGE, @@ -526,6 +572,20 @@ static const struct ingenic_adc_soc_data jz4740_adc_soc_data = { .init_clk_div = NULL, /* no ADCLK register on JZ4740 */ }; +static const struct ingenic_adc_soc_data jz4760_adc_soc_data = { + .battery_high_vref = JZ4760_ADC_BATTERY_VREF, + .battery_high_vref_bits = JZ4770_ADC_BATTERY_VREF_BITS, + .battery_raw_avail = jz4770_adc_battery_raw_avail, + .battery_raw_avail_size = ARRAY_SIZE(jz4770_adc_battery_raw_avail), + .battery_scale_avail = jz4760_adc_battery_scale_avail, + .battery_scale_avail_size = ARRAY_SIZE(jz4760_adc_battery_scale_avail), + .battery_vref_mode = false, + .has_aux_md = true, + .channels = jz4760_channels, + .num_channels = ARRAY_SIZE(jz4760_channels), + .init_clk_div = jz4770_adc_init_clk_div, +}; + static const struct ingenic_adc_soc_data jz4770_adc_soc_data = { .battery_high_vref = JZ4770_ADC_BATTERY_VREF, .battery_high_vref_bits = JZ4770_ADC_BATTERY_VREF_BITS, @@ -569,7 +629,7 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev, struct iio_chan_spec const *chan, int *val) { - int bit, ret, engine = (chan->channel == INGENIC_ADC_BATTERY); + int cmd, ret, engine = (chan->channel == INGENIC_ADC_BATTERY); struct ingenic_adc *adc = iio_priv(iio_dev); ret = clk_enable(adc->clk); @@ -579,11 +639,22 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev, return ret; } - /* We cannot sample AUX/AUX2 in parallel. */ + /* We cannot sample the aux channels in parallel. */ mutex_lock(&adc->aux_lock); if (adc->soc_data->has_aux_md && engine == 0) { - bit = BIT(chan->channel == INGENIC_ADC_AUX2); - ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, bit); + switch (chan->channel) { + case INGENIC_ADC_AUX0: + cmd = 0; + break; + case INGENIC_ADC_AUX: + cmd = 1; + break; + case INGENIC_ADC_AUX2: + cmd = 2; + break; + } + + ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, cmd); } ret = ingenic_adc_capture(adc, engine); @@ -591,6 +662,7 @@ static int ingenic_adc_read_chan_info_raw(struct iio_dev *iio_dev, goto out; switch (chan->channel) { + case INGENIC_ADC_AUX0: case INGENIC_ADC_AUX: case INGENIC_ADC_AUX2: *val = readw(adc->base + JZ_ADC_REG_ADSDAT); @@ -621,6 +693,7 @@ static int ingenic_adc_read_raw(struct iio_dev *iio_dev, return ingenic_adc_read_chan_info_raw(iio_dev, chan, val); case IIO_CHAN_INFO_SCALE: switch (chan->channel) { + case INGENIC_ADC_AUX0: case INGENIC_ADC_AUX: case INGENIC_ADC_AUX2: *val = JZ_ADC_AUX_VREF; @@ -832,6 +905,7 @@ static int ingenic_adc_probe(struct platform_device *pdev) static const struct of_device_id ingenic_adc_of_match[] = { { .compatible = "ingenic,jz4725b-adc", .data = &jz4725b_adc_soc_data, }, { .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, }, + { .compatible = "ingenic,jz4760-adc", .data = &jz4760_adc_soc_data, }, { .compatible = "ingenic,jz4770-adc", .data = &jz4770_adc_soc_data, }, { }, }; From patchwork Mon Jul 26 08:20:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12398857 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.5 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE29DC19F38 for ; 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[90.40.218.84]) by smtp.gmail.com with ESMTPSA id w13sm4799464wru.72.2021.07.26.01.20.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jul 2021 01:20:40 -0700 (PDT) From: Christophe Branchereau Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, paul@crapouillou.net, Christophe Branchereau Subject: [PATCH v4 4/5] iio/adc: ingenic: add JZ4760B support to the sadc driver Date: Mon, 26 Jul 2021 10:20:32 +0200 Message-Id: <20210726082033.351533-5-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210726082033.351533-1-cbranchereau@gmail.com> References: <20210726082033.351533-1-cbranchereau@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The JZ4760B variant differs slightly from the JZ4760: it has a bit called VBAT_SEL in the CFG register. In order to correctly sample the battery voltage on existing handhelds using this SOC, the bit must be cleared. We leave the possibility to set the bit, by using the "ingenic,use-internal-divider" in the devicetree. Signed-off-by: Christophe Branchereau --- drivers/iio/adc/ingenic-adc.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index 6b9af0530590..2b3912c6ca6b 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -37,6 +37,7 @@ #define JZ_ADC_REG_CFG_SAMPLE_NUM(n) ((n) << 10) #define JZ_ADC_REG_CFG_PULL_UP(n) ((n) << 16) #define JZ_ADC_REG_CFG_CMD_SEL BIT(22) +#define JZ_ADC_REG_CFG_VBAT_SEL BIT(30) #define JZ_ADC_REG_CFG_TOUCH_OPS_MASK (BIT(31) | GENMASK(23, 10)) #define JZ_ADC_REG_ADCLK_CLKDIV_LSB 0 #define JZ4725B_ADC_REG_ADCLK_CLKDIV10US_LSB 16 @@ -879,6 +880,14 @@ static int ingenic_adc_probe(struct platform_device *pdev) /* Put hardware in a known passive state. */ writeb(0x00, adc->base + JZ_ADC_REG_ENABLE); writeb(0xff, adc->base + JZ_ADC_REG_CTRL); + + /* JZ4760B specific */ + if (device_property_present(dev, "ingenic,use-internal-divider")) + ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL, + JZ_ADC_REG_CFG_VBAT_SEL); + else + ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL, 0); + usleep_range(2000, 3000); /* Must wait at least 2ms. */ clk_disable(adc->clk); @@ -906,6 +915,7 @@ static const struct of_device_id ingenic_adc_of_match[] = { { .compatible = "ingenic,jz4725b-adc", .data = &jz4725b_adc_soc_data, }, { .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, }, { .compatible = "ingenic,jz4760-adc", .data = &jz4760_adc_soc_data, }, + { .compatible = "ingenic,jz4760b-adc", .data = &jz4760_adc_soc_data, }, { .compatible = "ingenic,jz4770-adc", .data = &jz4770_adc_soc_data, }, { }, }; From patchwork Mon Jul 26 08:20:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Branchereau X-Patchwork-Id: 12398859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.5 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F371C19F3B for ; Mon, 26 Jul 2021 08:20:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1BBAE60F53 for ; Mon, 26 Jul 2021 08:20:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233382AbhGZHkS (ORCPT ); Mon, 26 Jul 2021 03:40:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233331AbhGZHkP (ORCPT ); Mon, 26 Jul 2021 03:40:15 -0400 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0F452C061760; Mon, 26 Jul 2021 01:20:43 -0700 (PDT) Received: by mail-wr1-x42a.google.com with SMTP id b7so10000523wri.8; Mon, 26 Jul 2021 01:20:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=L6mgIBbDERHrkCfdLTeeBkkROy6MNNlPhpbr+IZWCG0=; b=rFmY6NC/1ICciysyH0pOMcEiVPE+jVNnPU0Ong/hacrndKCuwYdK8/8Q0GHjEvFvZP EANSRw4pK/MMv34L+iFt6u2IZVtJnmragV4fbi2JXqWKCP+x4oRTM0uVZBYGbvd6ITio 6c3MiLl1Su8B/Qp9rHwFTBvQES6M/Hz259xoyOYo6qluF5tmUP1FSxPrY6JFiz5e26Gj oq20zSD3+h5dEhKeEAd9lMuwRpwzonFZ6JeOJsUexWcdu85M4iT+wQBW5hshujFYJV8k +cCMQEbOFSawuSL37YyzkSGznA8or24geKJDWneLg2BorDJvMW3vBM2GgZ1TJtQ7s4I5 ozdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=L6mgIBbDERHrkCfdLTeeBkkROy6MNNlPhpbr+IZWCG0=; b=RqNDCWJQFvw91xIr3S0QTn3c0wwtO+fa6x8efPvSaUp3oEYaR8LwPTXcUycmrqd3D2 7NGL88kryOG5sEj1dnQsod1D21OMMbV8z967uFOIiuPY6/5b9+o3G3whDxM9vlyK9cJ7 qXwbwb2UPAivZrwJJ8Mr8S6FlLnOvH0GTNmxR4FTLWLytudu0aDXaBk2Xxs1l9pHcuav evu5QZLShpkG/226YFrO6LfV+lridbqgFgv9VOVmPsHxV6O+XT3ioblTRLUPdWpuuwvd Sya6M+Nx/H5nCzfol1edfyS5FlXtABjVIPkzorMYzXIlzJ0pfJSV5AOAOiVWngbJmjXB Qaww== X-Gm-Message-State: AOAM533v0uW02y71afW55934fDApw8mIA/gIE6cZIzZlFDAD3XKH51jI 17NEd11qGxLcz6bPp26WQ0Q= X-Google-Smtp-Source: ABdhPJzCb5A+95ai6uFrnajvvwODvgN5KCENUy8i2k2pFjC30niNPp3EMMLi0xvye5leRvuI6BY/gA== X-Received: by 2002:a05:6000:1248:: with SMTP id j8mr17770943wrx.391.1627287641520; Mon, 26 Jul 2021 01:20:41 -0700 (PDT) Received: from monk.home (astrasbourg-157-1-7-84.w90-40.abo.wanadoo.fr. [90.40.218.84]) by smtp.gmail.com with ESMTPSA id w13sm4799464wru.72.2021.07.26.01.20.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Jul 2021 01:20:41 -0700 (PDT) From: Christophe Branchereau Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, paul@crapouillou.net, Christophe Branchereau Subject: [PATCH v4 5/5] dt-bindings: iio/adc: ingenic: add the JZ4760(B) socs to the sadc Documentation Date: Mon, 26 Jul 2021 10:20:33 +0200 Message-Id: <20210726082033.351533-6-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210726082033.351533-1-cbranchereau@gmail.com> References: <20210726082033.351533-1-cbranchereau@gmail.com> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Add both the jz4760 and jz4760b, plus a property to use the internal divider on the b variant and document it. Signed-off-by: Christophe Branchereau Reviewed-by: Rob Herring --- .../bindings/iio/adc/ingenic,adc.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml b/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml index 433a3fb55a2e..3eb7aa8822c3 100644 --- a/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml @@ -23,6 +23,8 @@ properties: enum: - ingenic,jz4725b-adc - ingenic,jz4740-adc + - ingenic,jz4760-adc + - ingenic,jz4760b-adc - ingenic,jz4770-adc '#io-channel-cells': @@ -43,6 +45,23 @@ properties: interrupts: maxItems: 1 + ingenic,use-internal-divider: + description: + If present, battery voltage is read from the VBAT_IR pin, which has an + internal 1/4 divider. If absent, it is read through the VBAT_ER pin, + which does not have such a divider. + type: boolean + +if: + not: + properties: + compatible: + contains: + const: ingenic,jz4760b-adc +then: + properties: + ingenic,use-internal-divider: false + required: - compatible - '#io-channel-cells'