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Tue, 27 Jul 2021 22:26:49 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan Subject: [PATCH 01/11] mm: Introduce a function to check for virtualization protection features Date: Tue, 27 Jul 2021 17:26:04 -0500 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SN7PR04CA0187.namprd04.prod.outlook.com (2603:10b6:806:126::12) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SN7PR04CA0187.namprd04.prod.outlook.com (2603:10b6:806:126::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4352.26 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: /PxRIthfUgjSvOzOXFVDfetP3FE+cMWPbcDgoqdodIwAFD2ob5hvbVOx+p7UGodRCOoEAypKQlcTEXj4nDUYsUQUyVceFkfzyCSZiDyCyyVbO9vyKRChEUakVje+poSD35i+VB+IIlDXzqIaa2k2R1GgNEtjqAXm8ApVTXTIGCFxHRSglGkaMk2P1QMka5F9dxvWsDxCsXXh5I6XdoGlONEDNjqcRMENWKtBb7k/31zaaU+8CFjVLIRmFBty7j3lZBQ3NmMmbcXoD2ZsJUCfVy1J99mB8DtN6hJWaVdK/sdPd0WfS+FggVs+1aZrY28fpxF1LMtVCEOZK7JLOtgUudji5y7YfzAbJWjCD+Bi08SI7OOFCzvMsxVGEyoupsIJGCLQ4Kic2W9Z/kXZYu5JcHPWKD3HHdLW1MS8nhYE1mTQuMbqWfHDrFB+stZfD9iQwy7OnYNrZN/4b48/ZobEmrNMsnz6xzCrrtV03rquzdDacDywnjREO2dg61X9+ljzOKG3lojbpQqh7vGgDD5AiWAHsJJ78sZsJvSKkD2HnzqGX/mL915cMocrAIZkzS4HbRPITBHpC9k42r3yGMUlWIyiDeU+soKlXDakAzITsFTn2ddN3llWzbMazDwI908yE4Escazz8y9knSjJSi+3D3VlkgWasR2rJDWAX5kWQcVDuM0vu0n4e7KLb6eL9hpMkRTaTr31j8xRevP6hwD4O1uhoAMyuaPnjmEXerRozpP+/KuVsNgnLHDsCzI1A0Zpe+fwduX8CGfVfXKeIxrEfAG7sgClLwyV8HVTt4oId035LtyR1XH73EZSK8SbGdu56nQLL9K+Qe2eRkoQx7ShwNjLpuacHxVCXndXguia1T8yQ1hhtHu5Gm8gVT1YIE81GvxHPxFmWFcxmH+mPn2UliCeD6mLcRc3XfTqvjTwiEsdrFyvuheGxc0abf4jgPoq1rmvOCXTQucovzVuNnk18cF9LPBXZgeDkBKPtoSpunWipLP5VzYnTIGRglZgKWUSoyHxBhqtS3YT89beN8wYlzprbW+QmPmwJ1wls6ih/0lgjjdomED4MEE/dU1bF44pbLDV9RHW94GAiVzINOtGVnwqrnUrUSNz/SHo8v1RpadyW46sUJ1CmHR2zPDAmyiXwQaaptwEh5LUhfx3HbYz/OLjkNaFAaaLVUgRPSacd/kcfz64MjCQuzYRG8qPlJ5BKR/Je3rMlOgmKR1gNfNK+v2Y9oUeyeIR/ulGtUsUqthOCNUIdaMHX2a3U1cOFtFNzqy+qMwbkXiSMF9E7dhuGl7EMXTsDR/4jqla+2XtV9nQ1yMMceQNr0lMKl++Z/wt X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 717f060a-ce09-4bfd-6ed3-08d9514da04b X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2021 22:26:49.5535 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ZAqqFm7MIdcu88eQAlOLDfwrloJneekLcMxN0JUEE1djlRNIG90oeAP9CYDEi2s/1Mvut8ee/ZKd0eCSw5uEow== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM8PR12MB5462 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org In prep for other protected virtualization technologies, introduce a generic helper function, prot_guest_has(), that can be used to check for specific protection attributes, like memory encryption. This is intended to eliminate having to add multiple technology-specific checks to the code (e.g. if (sev_active() || tdx_active())). Co-developed-by: Andi Kleen Signed-off-by: Andi Kleen Co-developed-by: Kuppuswamy Sathyanarayanan Signed-off-by: Kuppuswamy Sathyanarayanan Signed-off-by: Tom Lendacky Reviewed-by: Joerg Roedel --- arch/Kconfig | 3 +++ include/linux/protected_guest.h | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) create mode 100644 include/linux/protected_guest.h diff --git a/arch/Kconfig b/arch/Kconfig index 129df498a8e1..a47cf283f2ff 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1231,6 +1231,9 @@ config RELR config ARCH_HAS_MEM_ENCRYPT bool +config ARCH_HAS_PROTECTED_GUEST + bool + config HAVE_SPARSE_SYSCALL_NR bool help diff --git a/include/linux/protected_guest.h b/include/linux/protected_guest.h new file mode 100644 index 000000000000..f8ed7b72967b --- /dev/null +++ b/include/linux/protected_guest.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Protected Guest (and Host) Capability checks + * + * Copyright (C) 2021 Advanced Micro Devices, Inc. + * + * Author: Tom Lendacky + */ + +#ifndef _PROTECTED_GUEST_H +#define _PROTECTED_GUEST_H + +#ifndef __ASSEMBLY__ + +#define PATTR_MEM_ENCRYPT 0 /* Encrypted memory */ +#define PATTR_HOST_MEM_ENCRYPT 1 /* Host encrypted memory */ +#define PATTR_GUEST_MEM_ENCRYPT 2 /* Guest encrypted memory */ +#define PATTR_GUEST_PROT_STATE 3 /* Guest encrypted state */ + +#ifdef CONFIG_ARCH_HAS_PROTECTED_GUEST + +#include + +#else /* !CONFIG_ARCH_HAS_PROTECTED_GUEST */ + +static inline bool prot_guest_has(unsigned int attr) { return false; } + +#endif /* CONFIG_ARCH_HAS_PROTECTED_GUEST */ + +#endif /* __ASSEMBLY__ */ + +#endif /* _PROTECTED_GUEST_H */ From patchwork Tue Jul 27 22:26:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12404413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2532CC4320E for ; Tue, 27 Jul 2021 22:27:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0B2FF60F6E for ; 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dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) by DM8PR12MB5416.namprd12.prod.outlook.com (2603:10b6:8:28::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4352.25; Tue, 27 Jul 2021 22:26:59 +0000 Received: from DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208]) by DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208%3]) with mapi id 15.20.4352.031; Tue, 27 Jul 2021 22:26:59 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Thomas Gleixner , Ingo Molnar , Dave Hansen , Andy Lutomirski , Peter Zijlstra Subject: [PATCH 02/11] x86/sev: Add an x86 version of prot_guest_has() Date: Tue, 27 Jul 2021 17:26:05 -0500 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SA9PR03CA0027.namprd03.prod.outlook.com (2603:10b6:806:20::32) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SA9PR03CA0027.namprd03.prod.outlook.com (2603:10b6:806:20::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.18 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Itl0ACVwnZlfNjsEvbpnsL5N4uPkvGHtCEwiKSKVMUTT85ghSYraLXLHsdWaJlLli57vKh90wqWUPVqSo4KyQV2Pi15XeqWsSblydsfkcxtdyUwz13cXmnEXDP6oO7ZSagXJwS2X7qRKt5t68q4el10SV8uXvnmVvdketJRALmCtuhWsQnoIZDpdzXF3b+KpnFpqfeVdhXbcg4Zya6ii9tkfiXPtfbm5Z3rzQwKgVUu+CiEhlS/R+L3PVt7vaANNkoQuwfenuftItqoZDMmNI4GrCde0Ggs578eIIVS+7mvHN+3UzCC+9CVZN2vngkWFx4vrfe/3yFNABhYtRTOF6d8Flg0E/JImyB0+vycQKavQSS3/qKrygz2aPmBJUNk1qkOsbui1AfQFMuylSZQGeQy+uq7LM8HNoPe9+RQd/L/33BryNrJDHRnrf2HfF8VDG8N9MjsyS0h/x0p/JCQQJNtnOOGSfNfUq64JfhLWVyYuf+Rp9sxnqORu6bHG2o4ppAZmtd5vGyBp1TbGG4JIIbsrQtZlDhVOvNV2moCAoP7OrOSK+gKRz/J+xwVOVcghaiYiO+E+jcRzIu5EcZhjS+7bdnrtgqGDmeFtfl0+pavUMbw0IT8ZhYOxW9s7WUQNle/au1cbHkombJqUF5c6ahWKNQrohwPGmW7a7mzypPDK/P2PntnCXBvpu/tpL60eoJoL+00qnQJwUC7F+J5yqd7bp0j2eNAmTosXE5hvebmv7KHEKHRG50M7Z7Sb5nRbjmkr3NJE+2H8WKsDm+atPhkIj/SAh7bOvhou4ozA34OAL7n4JZsUcNaJrNO52HKkRvt0NPAGor1ZbmQ6zJcqhykiCC8rq8xNSsg5+c3x+E+B8HXgLr9w5H+ScNl4B8MAUKh6+SBsQQXXk4qRbwM5lbzvpDmv75fU5kXYmw6Yyu4VLdrn8tlM4eQvT3mJKer/dnZQ0fT0X5aBK8IEl8kpetGFKMbJc9aOXHidm5GlB341pqU/tUfuH1LfEazD7tzrhUPbl4peyoneAIXbYbK3HQDzeuNBhEOrWRxdUvyg/psZq/CjtDjmOEcIU4WYSlmDNtaFL+RAhY7SgnwoaDbjaljobVhoBQRp7MfOmZpouh6sJauHRbnR7XPLQCTppt3Mz4SZKvjQji3ghIo++JeyN/MRfthvejtX8UxT92GNR3tGqfPuETIH34w+nK07t1L064YeNplnLMNQ8VLoBgwB2qwPkRybc7Stqn9y//vhTi738V1Qod1q21+VzVM6GR/KQrqalZDUG/mmOb8aTzJiVTqM3Bq+zhAbAIAMMmrABYdaWr/8P+suSv1T2QCbCo/n X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9aba2817-c7a1-4d37-85cf-08d9514da650 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2021 22:26:59.5984 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: vjNjgKJHyJ+bu48aW6JzyGZJoNqbbs7iH1NNjXVAYABtQMOEmpXyMrS/5hzZ2DrBrba410jUbAC5Z0nKavXbfw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM8PR12MB5416 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Introduce an x86 version of the prot_guest_has() function. This will be used in the more generic x86 code to replace vendor specific calls like sev_active(), etc. While the name suggests this is intended mainly for guests, it will also be used for host memory encryption checks in place of sme_active(). The amd_prot_guest_has() function does not use EXPORT_SYMBOL_GPL for the same reasons previously stated when changing sme_active(), sev_active and sme_me_mask to EXPORT_SYBMOL: commit 87df26175e67 ("x86/mm: Unbreak modules that rely on external PAGE_KERNEL availability") commit 9d5f38ba6c82 ("x86/mm: Unbreak modules that use the DMA API") Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: Andy Lutomirski Cc: Peter Zijlstra Co-developed-by: Andi Kleen Signed-off-by: Andi Kleen Co-developed-by: Kuppuswamy Sathyanarayanan Signed-off-by: Kuppuswamy Sathyanarayanan Signed-off-by: Tom Lendacky Reviewed-by: Joerg Roedel --- arch/x86/Kconfig | 1 + arch/x86/include/asm/mem_encrypt.h | 2 ++ arch/x86/include/asm/protected_guest.h | 27 ++++++++++++++++++++++++++ arch/x86/mm/mem_encrypt.c | 25 ++++++++++++++++++++++++ include/linux/protected_guest.h | 5 +++++ 5 files changed, 60 insertions(+) create mode 100644 arch/x86/include/asm/protected_guest.h diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 49270655e827..e47213cbfc55 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1514,6 +1514,7 @@ config AMD_MEM_ENCRYPT select ARCH_HAS_FORCE_DMA_UNENCRYPTED select INSTRUCTION_DECODER select ARCH_HAS_RESTRICTED_VIRTIO_MEMORY_ACCESS + select ARCH_HAS_PROTECTED_GUEST help Say yes to enable support for the encryption of system memory. This requires an AMD processor that supports Secure Memory diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index 9c80c68d75b5..a46d47662772 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -53,6 +53,7 @@ void __init sev_es_init_vc_handling(void); bool sme_active(void); bool sev_active(void); bool sev_es_active(void); +bool amd_prot_guest_has(unsigned int attr); #define __bss_decrypted __section(".bss..decrypted") @@ -78,6 +79,7 @@ static inline void sev_es_init_vc_handling(void) { } static inline bool sme_active(void) { return false; } static inline bool sev_active(void) { return false; } static inline bool sev_es_active(void) { return false; } +static inline bool amd_prot_guest_has(unsigned int attr) { return false; } static inline int __init early_set_memory_decrypted(unsigned long vaddr, unsigned long size) { return 0; } diff --git a/arch/x86/include/asm/protected_guest.h b/arch/x86/include/asm/protected_guest.h new file mode 100644 index 000000000000..b4a267dddf93 --- /dev/null +++ b/arch/x86/include/asm/protected_guest.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Protected Guest (and Host) Capability checks + * + * Copyright (C) 2021 Advanced Micro Devices, Inc. + * + * Author: Tom Lendacky + */ + +#ifndef _X86_PROTECTED_GUEST_H +#define _X86_PROTECTED_GUEST_H + +#include + +#ifndef __ASSEMBLY__ + +static inline bool prot_guest_has(unsigned int attr) +{ + if (sme_me_mask) + return amd_prot_guest_has(attr); + + return false; +} + +#endif /* __ASSEMBLY__ */ + +#endif /* _X86_PROTECTED_GUEST_H */ diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index ff08dc463634..7d3b2c6f5f88 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -389,6 +390,30 @@ bool noinstr sev_es_active(void) return sev_status & MSR_AMD64_SEV_ES_ENABLED; } +bool amd_prot_guest_has(unsigned int attr) +{ + switch (attr) { + case PATTR_MEM_ENCRYPT: + return sme_me_mask != 0; + + case PATTR_SME: + case PATTR_HOST_MEM_ENCRYPT: + return sme_active(); + + case PATTR_SEV: + case PATTR_GUEST_MEM_ENCRYPT: + return sev_active(); + + case PATTR_SEV_ES: + case PATTR_GUEST_PROT_STATE: + return sev_es_active(); + + default: + return false; + } +} +EXPORT_SYMBOL(amd_prot_guest_has); + /* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */ bool force_dma_unencrypted(struct device *dev) { diff --git a/include/linux/protected_guest.h b/include/linux/protected_guest.h index f8ed7b72967b..7a7120abbb62 100644 --- a/include/linux/protected_guest.h +++ b/include/linux/protected_guest.h @@ -17,6 +17,11 @@ #define PATTR_GUEST_MEM_ENCRYPT 2 /* Guest encrypted memory */ #define PATTR_GUEST_PROT_STATE 3 /* Guest encrypted state */ +/* 0x800 - 0x8ff reserved for AMD */ +#define PATTR_SME 0x800 +#define PATTR_SEV 0x801 +#define PATTR_SEV_ES 0x802 + #ifdef CONFIG_ARCH_HAS_PROTECTED_GUEST #include From patchwork Tue Jul 27 22:26:06 2021 Content-Type: text/plain; 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Tue, 27 Jul 2021 22:27:09 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras Subject: [PATCH 03/11] powerpc/pseries/svm: Add a powerpc version of prot_guest_has() Date: Tue, 27 Jul 2021 17:26:06 -0500 Message-Id: <19f7eefdc98e091fbfae9db0db575422f18f0543.1627424774.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SA9PR13CA0001.namprd13.prod.outlook.com (2603:10b6:806:21::6) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SA9PR13CA0001.namprd13.prod.outlook.com (2603:10b6:806:21::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.7 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: kc7iz37gigN3u+7RGOhMMt7PioywRpKQ+A+3saV+wOhLSSKgZDhPLONaxLer+tbc4SMj4dV6uHS6XyQwSM1Lh7VzGU3j6YnLCVUeqSqdREewhTgUyIsjaGVa7IZskbey1kKo81/fw4bKE5fDpGUnqw/1Ryodw2FHScckh0cajaepUI518bHjFJiH8Nh5GR8QOEQYzGwdeyHbfscZEqvG0rbSmmUTzOocsZxNRkfWzu0Td9ELiu8lTRZaYclf8NAd9/XJctPbxW2niGR8/tJf6ca8+QIw9Wr41E42VrddgyZ37mVPyELznu+YVPH65U7E1LhAcq9Ag9feNiqYxYRWnrXc+DnLMUPnzI2Ac4EC1QkzKEe9CKg9/0XKT2BIPINlqaUq1MNadW7U5MqobXx9JrkccwyAl2nR7ReEM5gOK9G8KBltrwNXLbQOQbdsVuLtU01dvC6/INfwHk7dNk74E2EyjcPuUJ8KbedVun5IqVFAxZaVrVCYEBGgeM/3TyqO6lUapt2ZB6Nx37HEbhgw6kPrCGpx8rXdk4KVD36lx231hPbzzebz3JU3FM7z+y75QRV2xImlBb0QMWJcw6oGMueZ5oUXCJGtDwhCKuMfjB3/Pulbp3xZYvwdxRX+7XeMcQE5vwhEYxjjGEITuORZqMzs/f1sYn4rdcsltu0iQQwRuTsw1SUJVixwluMUzsyicwxIprUbhKerbjQEL4gm3V+PLDHVl1dBGeC3wLu0UlxjNq4hXWvZCQFNCGWztVGRiW+iL4CDEOCXyoKY8d2R5wU6EHcQBQgegb7itpVKY0dClL8oKNlS5w7OonkK35K2smdue+uAKO1mSVyXBroN51AAWADf4WS46pQgBrx0fcTY+hXhEJZ/CkpwMO3PgkpTalCVjL16H8hUiceiOLyGDdNcZ/b3B9yg+YjhmCX9Wk5ZMetfAOIlf4cMHYmzJ2Vg51hWnGOq3NzwMxf2pHlgr745Gut+mb8E+sFo7OdOZ94KvcZ4xS0gNsUR2xfyWSOni8FRE5Bp9WP/KGlKrb7LhE8C+nD6lZom3hxiOeUMKnP9z8Do0MBSdKdJKkwYdfZP/hP1bf55Mkxiyf0HgKa5oiU0RhH9SXrh79Fic+ouRc+0iOpq2K1w+iELD1u/KH2zBTsGpgR84ATwMfXVS/wm6KNMDr6y3AeyrvS2KfGPJXla0QZrme6/D8OTm3NQDy5qYX/ps5t/4xwjcGEAORb9oSKU4J0ULDIsiMIFj8Okkh+RozTDg5pqkMGcq7Mr81kqAxKQFcZwzVXbO1CwaWHLG+r+RshD+d0suNgfuqYXpX1x7N+gKLc0jz+QVTd0376Z X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9f293814-4a4b-4e53-7f3f-08d9514dac4c X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2021 22:27:09.6792 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: j3g9RhCcbhfP0KRAR+GITdr3ah14k0zwHJB6A4wX1eUIvHbQ1wBo7wlIiqoOaJZqZEByf2FPZxawQyr3ZydedA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5357 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Introduce a powerpc version of the prot_guest_has() function. This will be used to replace the powerpc mem_encrypt_active() implementation, so the implementation will initially only support the PATTR_MEM_ENCRYPT attribute. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Signed-off-by: Tom Lendacky --- arch/powerpc/include/asm/protected_guest.h | 30 ++++++++++++++++++++++ arch/powerpc/platforms/pseries/Kconfig | 1 + 2 files changed, 31 insertions(+) create mode 100644 arch/powerpc/include/asm/protected_guest.h diff --git a/arch/powerpc/include/asm/protected_guest.h b/arch/powerpc/include/asm/protected_guest.h new file mode 100644 index 000000000000..ce55c2c7e534 --- /dev/null +++ b/arch/powerpc/include/asm/protected_guest.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Protected Guest (and Host) Capability checks + * + * Copyright (C) 2021 Advanced Micro Devices, Inc. + * + * Author: Tom Lendacky + */ + +#ifndef _POWERPC_PROTECTED_GUEST_H +#define _POWERPC_PROTECTED_GUEST_H + +#include + +#ifndef __ASSEMBLY__ + +static inline bool prot_guest_has(unsigned int attr) +{ + switch (attr) { + case PATTR_MEM_ENCRYPT: + return is_secure_guest(); + + default: + return false; + } +} + +#endif /* __ASSEMBLY__ */ + +#endif /* _POWERPC_PROTECTED_GUEST_H */ diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig index 5e037df2a3a1..8ce5417d6feb 100644 --- a/arch/powerpc/platforms/pseries/Kconfig +++ b/arch/powerpc/platforms/pseries/Kconfig @@ -159,6 +159,7 @@ config PPC_SVM select SWIOTLB select ARCH_HAS_MEM_ENCRYPT select ARCH_HAS_FORCE_DMA_UNENCRYPTED + select ARCH_HAS_PROTECTED_GUEST help There are certain POWER platforms which support secure guests using the Protected Execution Facility, with the help of an Ultravisor From patchwork Tue Jul 27 22:26:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12404417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 053A5C432BE for ; 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dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) by DM4PR12MB5357.namprd12.prod.outlook.com (2603:10b6:5:39b::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.18; Tue, 27 Jul 2021 22:27:20 +0000 Received: from DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208]) by DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208%3]) with mapi id 15.20.4352.031; Tue, 27 Jul 2021 22:27:20 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Thomas Gleixner , Ingo Molnar , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Will Deacon Subject: [PATCH 04/11] x86/sme: Replace occurrences of sme_active() with prot_guest_has() Date: Tue, 27 Jul 2021 17:26:07 -0500 Message-Id: <1a5604f8fb84702f4ae0787428356d7e3e1d3a99.1627424774.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SA0PR13CA0029.namprd13.prod.outlook.com (2603:10b6:806:130::34) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SA0PR13CA0029.namprd13.prod.outlook.com (2603:10b6:806:130::34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.14 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: pifZO7Buy5dvZM/7Yjt9FnS0e6PuLA3LAzHzk7tRlPQ/LnSlVzAmBqH0HlyyFvJhgpHtv7fgEvUrDH5vItMh2SZTDaQgIFQ0rg/rs+P8WRc69dIf1A95Sy7xag/A0PUtIP2UE4Agl2HROqXwgBMc9mHUUMb5Y5ym2pcTmEFwR/D5rrQ5tVgxG6gVVpa7iJsNJzXM6tV24PAkOed1cvE/8rCG0WYt2XIe79sN1e3pKPfGxX8nM4woMLveQ8e+8YQrQBd5lmuqYgypGuoBCL4IrDgBGvHlEA7AfTI6W2ELQK1VB8Z2cwsMLXox9nHUSZGq8uFBNM8wUNriJacbIS79ojVYE4TVm121ddOmy+zDAA25Q2zdNQjcOBtMmrYER/qYzDDYBJLxu7lvFZilGv+bN/MVB0eDoCrTew0EWyavjPfB+gbFh73z2D9GyI6Jlsxj7JYAJJzILxDnj4+wRtnQvdBECKos2jr3V0mHbk+EFkxORW8hTXR8ygemiOolBRijTYLEVQXT8+KLoh8TqanUbJCipDLP9LCAzETCPeDlnATzvLEPipSydIf/KTXU5yQxKv22LWtZzdc9A2c2Dj+8iWhO63TK4wEEg+pRV6J5avfJvHD3RG9Dm6IuRePburxwFHwnwjSeOAKMnUSaJ9lJrNaSIGjceW+IhpGntiKohuJ+b+Vx4TnRvhCJD/SW76NLz2JB5bEWQKRx9PttCazkLB5c/qWZyXb6MSWPG/2i7MyTneE0iYoTmeUT0ptLgh3tX4FxC5ejg7RV36KwGtqo2A+ebosS4/JLQ0NyR8pxP3G1F+WLjCl1GutsMR/bumuND+7NhQ+4+kZ0BfSrbaUCrnkYFg9pnFX4SAjFpX1jl+sWjLKISHWyqr3aaWFXN2RRLuEZrtngURLuzevJHOZCPuDZlyQPXnQfFXoHrAsGPzyVo7Ei6rdf1YQfmQ/q3tBPGoWikO5OYA2mx9dtbSCuA87VEplyaii2OzOxtfW/bLpJy0luQyDnOFhx9lvdY0DuclZ1eT49poXjfjM9oSzUShxnnDLo/T8eu0vZzyAJa5BHwXSLMd1mRCtkLRg6W5fDfIuxCLMHjwp4Z6F+OgAXQvzTi5yE+OwzN9wd7aHCj4pUCirsa6mmwq7gFFbnf6pmH/l6SYhN7TlLh4CiA2eU9eAlJqd5e38uuRaRqyMrnOtgpw3QhfP3KsbOTaZsAPhIPCkx+rMelvMb3Oa++hnCPhj6mREH/8qaDDYF/04Gse/cUdDhhixbZJjqJxH7yvVuDItwhFO7Tg7G73coFHaUsKkpTUB2ABciq710F5n8Mofu17hQKSeOstQ++3QVYBRF X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9c876891-08b6-416c-f597-08d9514db276 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2021 22:27:20.0527 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: MhbKVcjf8PvM6dQsnZpCnMXmWcx9bUgfcFCng7ESD0wbJY14/IKqsuJOGkOcEmDrVgx/DhkJ9+AZj60TYtNZvA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5357 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Replace occurrences of sme_active() with the more generic prot_guest_has() using PATTR_HOST_MEM_ENCRYPT, except for in arch/x86/mm/mem_encrypt*.c where PATTR_SME will be used. If future support is added for other memory encryption technologies, the use of PATTR_HOST_MEM_ENCRYPT can be updated, as required, to use PATTR_SME. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: Andy Lutomirski Cc: Peter Zijlstra Cc: Joerg Roedel Cc: Will Deacon Signed-off-by: Tom Lendacky Reviewed-by: Joerg Roedel --- arch/x86/include/asm/kexec.h | 2 +- arch/x86/include/asm/mem_encrypt.h | 2 -- arch/x86/kernel/machine_kexec_64.c | 3 ++- arch/x86/kernel/pci-swiotlb.c | 9 ++++----- arch/x86/kernel/relocate_kernel_64.S | 2 +- arch/x86/mm/ioremap.c | 6 +++--- arch/x86/mm/mem_encrypt.c | 10 +++++----- arch/x86/mm/mem_encrypt_identity.c | 3 ++- arch/x86/realmode/init.c | 5 +++-- drivers/iommu/amd/init.c | 7 ++++--- 10 files changed, 25 insertions(+), 24 deletions(-) diff --git a/arch/x86/include/asm/kexec.h b/arch/x86/include/asm/kexec.h index 0a6e34b07017..11b7c06e2828 100644 --- a/arch/x86/include/asm/kexec.h +++ b/arch/x86/include/asm/kexec.h @@ -129,7 +129,7 @@ relocate_kernel(unsigned long indirection_page, unsigned long page_list, unsigned long start_address, unsigned int preserve_context, - unsigned int sme_active); + unsigned int host_mem_enc_active); #endif #define ARCH_HAS_KIMAGE_ARCH diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index a46d47662772..956338406cec 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -50,7 +50,6 @@ void __init mem_encrypt_free_decrypted_mem(void); void __init mem_encrypt_init(void); void __init sev_es_init_vc_handling(void); -bool sme_active(void); bool sev_active(void); bool sev_es_active(void); bool amd_prot_guest_has(unsigned int attr); @@ -76,7 +75,6 @@ static inline void __init sme_encrypt_kernel(struct boot_params *bp) { } static inline void __init sme_enable(struct boot_params *bp) { } static inline void sev_es_init_vc_handling(void) { } -static inline bool sme_active(void) { return false; } static inline bool sev_active(void) { return false; } static inline bool sev_es_active(void) { return false; } static inline bool amd_prot_guest_has(unsigned int attr) { return false; } diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c index 131f30fdcfbd..8e7b517ad738 100644 --- a/arch/x86/kernel/machine_kexec_64.c +++ b/arch/x86/kernel/machine_kexec_64.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -358,7 +359,7 @@ void machine_kexec(struct kimage *image) (unsigned long)page_list, image->start, image->preserve_context, - sme_active()); + prot_guest_has(PATTR_HOST_MEM_ENCRYPT)); #ifdef CONFIG_KEXEC_JUMP if (image->preserve_context) diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c index c2cfa5e7c152..bd9a9cfbc9a2 100644 --- a/arch/x86/kernel/pci-swiotlb.c +++ b/arch/x86/kernel/pci-swiotlb.c @@ -6,7 +6,7 @@ #include #include #include -#include +#include #include #include @@ -45,11 +45,10 @@ int __init pci_swiotlb_detect_4gb(void) swiotlb = 1; /* - * If SME is active then swiotlb will be set to 1 so that bounce - * buffers are allocated and used for devices that do not support - * the addressing range required for the encryption mask. + * Set swiotlb to 1 so that bounce buffers are allocated and used for + * devices that can't support DMA to encrypted memory. */ - if (sme_active()) + if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) swiotlb = 1; return swiotlb; diff --git a/arch/x86/kernel/relocate_kernel_64.S b/arch/x86/kernel/relocate_kernel_64.S index c53271aebb64..c8fe74a28143 100644 --- a/arch/x86/kernel/relocate_kernel_64.S +++ b/arch/x86/kernel/relocate_kernel_64.S @@ -47,7 +47,7 @@ SYM_CODE_START_NOALIGN(relocate_kernel) * %rsi page_list * %rdx start address * %rcx preserve_context - * %r8 sme_active + * %r8 host_mem_enc_active */ /* Save the CPU context, used for jumping back */ diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c index 60ade7dd71bd..f899f02c0241 100644 --- a/arch/x86/mm/ioremap.c +++ b/arch/x86/mm/ioremap.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include @@ -702,7 +702,7 @@ bool arch_memremap_can_ram_remap(resource_size_t phys_addr, unsigned long size, if (flags & MEMREMAP_DEC) return false; - if (sme_active()) { + if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) { if (memremap_is_setup_data(phys_addr, size) || memremap_is_efi_data(phys_addr, size)) return false; @@ -728,7 +728,7 @@ pgprot_t __init early_memremap_pgprot_adjust(resource_size_t phys_addr, encrypted_prot = true; - if (sme_active()) { + if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) { if (early_memremap_is_setup_data(phys_addr, size) || memremap_is_efi_data(phys_addr, size)) encrypted_prot = false; diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index 7d3b2c6f5f88..d246a630feb9 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -144,7 +144,7 @@ void __init sme_unmap_bootdata(char *real_mode_data) struct boot_params *boot_data; unsigned long cmdline_paddr; - if (!sme_active()) + if (!amd_prot_guest_has(PATTR_SME)) return; /* Get the command line address before unmapping the real_mode_data */ @@ -164,7 +164,7 @@ void __init sme_map_bootdata(char *real_mode_data) struct boot_params *boot_data; unsigned long cmdline_paddr; - if (!sme_active()) + if (!amd_prot_guest_has(PATTR_SME)) return; __sme_early_map_unmap_mem(real_mode_data, sizeof(boot_params), true); @@ -378,7 +378,7 @@ bool sev_active(void) return sev_status & MSR_AMD64_SEV_ENABLED; } -bool sme_active(void) +static bool sme_active(void) { return sme_me_mask && !sev_active(); } @@ -428,7 +428,7 @@ bool force_dma_unencrypted(struct device *dev) * device does not support DMA to addresses that include the * encryption mask. */ - if (sme_active()) { + if (amd_prot_guest_has(PATTR_SME)) { u64 dma_enc_mask = DMA_BIT_MASK(__ffs64(sme_me_mask)); u64 dma_dev_mask = min_not_zero(dev->coherent_dma_mask, dev->bus_dma_limit); @@ -469,7 +469,7 @@ static void print_mem_encrypt_feature_info(void) pr_info("AMD Memory Encryption Features active:"); /* Secure Memory Encryption */ - if (sme_active()) { + if (amd_prot_guest_has(PATTR_SME)) { /* * SME is mutually exclusive with any of the SEV * features below. diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c index 470b20208430..088c8ab7dcc1 100644 --- a/arch/x86/mm/mem_encrypt_identity.c +++ b/arch/x86/mm/mem_encrypt_identity.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include @@ -287,7 +288,7 @@ void __init sme_encrypt_kernel(struct boot_params *bp) unsigned long pgtable_area_len; unsigned long decrypted_base; - if (!sme_active()) + if (!prot_guest_has(PATTR_SME)) return; /* diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c index 6534c92d0f83..2109ae569c67 100644 --- a/arch/x86/realmode/init.c +++ b/arch/x86/realmode/init.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include @@ -44,7 +45,7 @@ void __init reserve_real_mode(void) static void sme_sev_setup_real_mode(struct trampoline_header *th) { #ifdef CONFIG_AMD_MEM_ENCRYPT - if (sme_active()) + if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) th->flags |= TH_FLAGS_SME_ACTIVE; if (sev_es_active()) { @@ -81,7 +82,7 @@ static void __init setup_real_mode(void) * decrypted memory in order to bring up other processors * successfully. This is not needed for SEV. */ - if (sme_active()) + if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) set_memory_decrypted((unsigned long)base, size >> PAGE_SHIFT); memcpy(base, real_mode_blob, size); diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c index 46280e6e1535..05e770e3e631 100644 --- a/drivers/iommu/amd/init.c +++ b/drivers/iommu/amd/init.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include @@ -965,7 +965,7 @@ static bool copy_device_table(void) pr_err("The address of old device table is above 4G, not trustworthy!\n"); return false; } - old_devtb = (sme_active() && is_kdump_kernel()) + old_devtb = (prot_guest_has(PATTR_HOST_MEM_ENCRYPT) && is_kdump_kernel()) ? (__force void *)ioremap_encrypted(old_devtb_phys, dev_table_size) : memremap(old_devtb_phys, dev_table_size, MEMREMAP_WB); @@ -3022,7 +3022,8 @@ static int __init amd_iommu_init(void) static bool amd_iommu_sme_check(void) { - if (!sme_active() || (boot_cpu_data.x86 != 0x17)) + if (!prot_guest_has(PATTR_HOST_MEM_ENCRYPT) || + (boot_cpu_data.x86 != 0x17)) return true; /* For Fam17h, a specific level of support is required */ From patchwork Tue Jul 27 22:26:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12404419 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B96F6C43214 for ; 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dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) by DM4PR12MB5357.namprd12.prod.outlook.com (2603:10b6:5:39b::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.18; Tue, 27 Jul 2021 22:27:30 +0000 Received: from DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208]) by DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208%3]) with mapi id 15.20.4352.031; Tue, 27 Jul 2021 22:27:30 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Thomas Gleixner , Ingo Molnar , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Ard Biesheuvel Subject: [PATCH 05/11] x86/sev: Replace occurrences of sev_active() with prot_guest_has() Date: Tue, 27 Jul 2021 17:26:08 -0500 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SA9PR13CA0122.namprd13.prod.outlook.com (2603:10b6:806:27::7) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SA9PR13CA0122.namprd13.prod.outlook.com (2603:10b6:806:27::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.7 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: nuQUfJ0oDlGQ8A7GxUPpr3iuNSwaT5V0nkz3PLynMRaiA/pibu2IG9C0MvjOJcVypIaD5mB6ur+za4lY0uPqPhyDZgqhFo5B6z67b7Q4OMHK7OuFFW8vxImKtCOdcJe7Vhhsb4N29zlBs3012Nw3xyLw5mJlhhAE4Cwte/CfCvvmasJpai6HW3EAcAqgcSYdeTKKQzf/ByDW++r2TBDllqyUJDvtwb/cDx20QsqWafvf6oAVevKNtgq87eORx5bz+MJfDhx1k4qlBnXZ3A1Mc+ouUBPx22Ec2QUM7A0J/OiQ/wUllaoO4RdSMIUTKU+1vzILbo+MMXHWwlRQ0ZkSHgwevsgv7PjmIQgdoQIFozLKv7I+4n9t0Rld063Mu9oxuR8lH1zLWStQSyBRjvig4RMM8sjRNmHL5d0byTcGaQJRhKcy8sEgDaUSZub8X5bx8peR3MdG3ah54puw0f+SCo8CcR3D/l62oZ+AM8/u5B6pOFX3EdF9hnOddB9XmgDsVpFM6i/7dvQaRcpH+Vlqat9FgwRbAJsbrnAR4gJtCXOi6k39jzams7bYcmwvOwW4GP9fgp+7QqgL0PiqAQdL3maXAew3Y73rdUI/vdoch2mXm3+T0+0IRSEmCgCfkbjHzghH7+PCn5bu7imOUc542BX8AG00BemY/bXE0m5cuu8skI9vJmUD00SNv0kcO93AMGfCMy/CndaFAyxNHZrXt1Ar8ZAG757ymm82WWrpsMtApzgyDFNGEaG/c4+mLLxs2jEfQeoK+OJ31CNa4JYDoMtZlfsRrvEUyG8Bhr9kxk01NyzntOBNoizyJXbddyd0pJ5v2jjjMouFR6DSMZBBpu8czTDIcWmgS+VsvNKjZgNfIPR8qEahBv/MUAS+yc2K0te/Z3ejHcPo03yfZNVVv5+uVQXEwL/Rku7CShBzSotuf0+nC+i80R0l4yoLFtbJANMWMyH3FrZC6nJgINU/0LzxQiQZzBhC7HVVVbzBUYSEQzVJVxRbcz7dhV2caN4s/7Prd12B5FxNSlgm/HTVlYkXkSiIW9GpRmV0lG7LVHlsKPQ4m0EDgqcds/mfDICsadbGpe6ehokX8Af7+Sa4vhYjKrJqHyjOLTjT9zNNMkW0nKsMkHQ9GStJiIp2ALBRxJjPzSU64Qf/ks/XcCmpNFBtgilsWrykYiUvHiIreQgL2ObJURoI+Usi9b0RiuGa8VN/f5DJd52gzS9fHz6hdqquT1B8zR+ViVOxW936CFxYxVZ1sHvOmTDqQfR9wFnPwBowtdVjhzEDoeq0rnw7BQZJX2+Oep7mLEg6hjGzlwYfjf+ISyUC54tcqvVzrYHP X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 69bef4ba-7f7c-4c1f-e2b0-08d9514db882 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2021 22:27:30.3067 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: mFlhdAfNgZz13TM5KewlG9iVq4ZoLyz31DgoIvkvxKgI7xR9rgN/2Tbg1dVtBDG41d5qGcKGHLOV+MWZ3v8jtw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5357 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Replace occurrences of sev_active() with the more generic prot_guest_has() using PATTR_GUEST_MEM_ENCRYPT, except for in arch/x86/mm/mem_encrypt*.c where PATTR_SEV will be used. If future support is added for other memory encryption technologies, the use of PATTR_GUEST_MEM_ENCRYPT can be updated, as required, to use PATTR_SEV. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: Andy Lutomirski Cc: Peter Zijlstra Cc: Ard Biesheuvel Signed-off-by: Tom Lendacky Reviewed-by: Joerg Roedel --- arch/x86/include/asm/mem_encrypt.h | 2 -- arch/x86/kernel/crash_dump_64.c | 4 +++- arch/x86/kernel/kvm.c | 3 ++- arch/x86/kernel/kvmclock.c | 4 ++-- arch/x86/kernel/machine_kexec_64.c | 16 ++++++++-------- arch/x86/kvm/svm/svm.c | 3 ++- arch/x86/mm/ioremap.c | 6 +++--- arch/x86/mm/mem_encrypt.c | 15 +++++++-------- arch/x86/platform/efi/efi_64.c | 9 +++++---- 9 files changed, 32 insertions(+), 30 deletions(-) diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index 956338406cec..7e25de37c148 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -50,7 +50,6 @@ void __init mem_encrypt_free_decrypted_mem(void); void __init mem_encrypt_init(void); void __init sev_es_init_vc_handling(void); -bool sev_active(void); bool sev_es_active(void); bool amd_prot_guest_has(unsigned int attr); @@ -75,7 +74,6 @@ static inline void __init sme_encrypt_kernel(struct boot_params *bp) { } static inline void __init sme_enable(struct boot_params *bp) { } static inline void sev_es_init_vc_handling(void) { } -static inline bool sev_active(void) { return false; } static inline bool sev_es_active(void) { return false; } static inline bool amd_prot_guest_has(unsigned int attr) { return false; } diff --git a/arch/x86/kernel/crash_dump_64.c b/arch/x86/kernel/crash_dump_64.c index 045e82e8945b..0cfe35f03e67 100644 --- a/arch/x86/kernel/crash_dump_64.c +++ b/arch/x86/kernel/crash_dump_64.c @@ -10,6 +10,7 @@ #include #include #include +#include static ssize_t __copy_oldmem_page(unsigned long pfn, char *buf, size_t csize, unsigned long offset, int userbuf, @@ -73,5 +74,6 @@ ssize_t copy_oldmem_page_encrypted(unsigned long pfn, char *buf, size_t csize, ssize_t elfcorehdr_read(char *buf, size_t count, u64 *ppos) { - return read_from_oldmem(buf, count, ppos, 0, sev_active()); + return read_from_oldmem(buf, count, ppos, 0, + prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)); } diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index a26643dc6bd6..9d08ad2f3faa 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -418,7 +419,7 @@ static void __init sev_map_percpu_data(void) { int cpu; - if (!sev_active()) + if (!prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) return; for_each_possible_cpu(cpu) { diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index ad273e5861c1..f7ba78a23dcd 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -16,9 +16,9 @@ #include #include #include +#include #include -#include #include #include @@ -232,7 +232,7 @@ static void __init kvmclock_init_mem(void) * hvclock is shared between the guest and the hypervisor, must * be mapped decrypted. */ - if (sev_active()) { + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) { r = set_memory_decrypted((unsigned long) hvclock_mem, 1UL << order); if (r) { diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c index 8e7b517ad738..66ff788b79c9 100644 --- a/arch/x86/kernel/machine_kexec_64.c +++ b/arch/x86/kernel/machine_kexec_64.c @@ -167,7 +167,7 @@ static int init_transition_pgtable(struct kimage *image, pgd_t *pgd) } pte = pte_offset_kernel(pmd, vaddr); - if (sev_active()) + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) prot = PAGE_KERNEL_EXEC; set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, prot)); @@ -207,7 +207,7 @@ static int init_pgtable(struct kimage *image, unsigned long start_pgtable) level4p = (pgd_t *)__va(start_pgtable); clear_page(level4p); - if (sev_active()) { + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) { info.page_flag |= _PAGE_ENC; info.kernpg_flag |= _PAGE_ENC; } @@ -570,12 +570,12 @@ void arch_kexec_unprotect_crashkres(void) */ int arch_kexec_post_alloc_pages(void *vaddr, unsigned int pages, gfp_t gfp) { - if (sev_active()) + if (!prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) return 0; /* - * If SME is active we need to be sure that kexec pages are - * not encrypted because when we boot to the new kernel the + * If host memory encryption is active we need to be sure that kexec + * pages are not encrypted because when we boot to the new kernel the * pages won't be accessed encrypted (initially). */ return set_memory_decrypted((unsigned long)vaddr, pages); @@ -583,12 +583,12 @@ int arch_kexec_post_alloc_pages(void *vaddr, unsigned int pages, gfp_t gfp) void arch_kexec_pre_free_pages(void *vaddr, unsigned int pages) { - if (sev_active()) + if (!prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) return; /* - * If SME is active we need to reset the pages back to being - * an encrypted mapping before freeing them. + * If host memory encryption is active we need to reset the pages back + * to being an encrypted mapping before freeing them. */ set_memory_encrypted((unsigned long)vaddr, pages); } diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 664d20f0689c..48c906f6593a 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -457,7 +458,7 @@ static int has_svm(void) return 0; } - if (sev_active()) { + if (prot_guest_has(PATTR_SEV)) { pr_info("KVM is unsupported when running as an SEV guest\n"); return 0; } diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c index f899f02c0241..0f2d5ace5986 100644 --- a/arch/x86/mm/ioremap.c +++ b/arch/x86/mm/ioremap.c @@ -92,7 +92,7 @@ static unsigned int __ioremap_check_ram(struct resource *res) */ static unsigned int __ioremap_check_encrypted(struct resource *res) { - if (!sev_active()) + if (!prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) return 0; switch (res->desc) { @@ -112,7 +112,7 @@ static unsigned int __ioremap_check_encrypted(struct resource *res) */ static void __ioremap_check_other(resource_size_t addr, struct ioremap_desc *desc) { - if (!sev_active()) + if (!prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) return; if (!IS_ENABLED(CONFIG_EFI)) @@ -555,7 +555,7 @@ static bool memremap_should_map_decrypted(resource_size_t phys_addr, case E820_TYPE_NVS: case E820_TYPE_UNUSABLE: /* For SEV, these areas are encrypted */ - if (sev_active()) + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) break; fallthrough; diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index d246a630feb9..eb5cae93b238 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -194,7 +194,7 @@ void __init sme_early_init(void) for (i = 0; i < ARRAY_SIZE(protection_map); i++) protection_map[i] = pgprot_encrypted(protection_map[i]); - if (sev_active()) + if (amd_prot_guest_has(PATTR_SEV)) swiotlb_force = SWIOTLB_FORCE; } @@ -203,7 +203,7 @@ void __init sev_setup_arch(void) phys_addr_t total_mem = memblock_phys_mem_size(); unsigned long size; - if (!sev_active()) + if (!amd_prot_guest_has(PATTR_SEV)) return; /* @@ -373,7 +373,7 @@ int __init early_set_memory_encrypted(unsigned long vaddr, unsigned long size) * up under SME the trampoline area cannot be encrypted, whereas under SEV * the trampoline area must be encrypted. */ -bool sev_active(void) +static bool sev_active(void) { return sev_status & MSR_AMD64_SEV_ENABLED; } @@ -382,7 +382,6 @@ static bool sme_active(void) { return sme_me_mask && !sev_active(); } -EXPORT_SYMBOL_GPL(sev_active); /* Needs to be called from non-instrumentable code */ bool noinstr sev_es_active(void) @@ -420,7 +419,7 @@ bool force_dma_unencrypted(struct device *dev) /* * For SEV, all DMA must be to unencrypted addresses. */ - if (sev_active()) + if (amd_prot_guest_has(PATTR_SEV)) return true; /* @@ -479,7 +478,7 @@ static void print_mem_encrypt_feature_info(void) } /* Secure Encrypted Virtualization */ - if (sev_active()) + if (amd_prot_guest_has(PATTR_SEV)) pr_cont(" SEV"); /* Encrypted Register State */ @@ -502,7 +501,7 @@ void __init mem_encrypt_init(void) * With SEV, we need to unroll the rep string I/O instructions, * but SEV-ES supports them through the #VC handler. */ - if (sev_active() && !sev_es_active()) + if (amd_prot_guest_has(PATTR_SEV) && !sev_es_active()) static_branch_enable(&sev_enable_key); print_mem_encrypt_feature_info(); @@ -510,6 +509,6 @@ void __init mem_encrypt_init(void) int arch_has_restricted_virtio_memory_access(void) { - return sev_active(); + return amd_prot_guest_has(PATTR_SEV); } EXPORT_SYMBOL_GPL(arch_has_restricted_virtio_memory_access); diff --git a/arch/x86/platform/efi/efi_64.c b/arch/x86/platform/efi/efi_64.c index 7515e78ef898..94737fcc1e21 100644 --- a/arch/x86/platform/efi/efi_64.c +++ b/arch/x86/platform/efi/efi_64.c @@ -33,7 +33,7 @@ #include #include #include -#include +#include #include #include @@ -284,7 +284,8 @@ static void __init __map_region(efi_memory_desc_t *md, u64 va) if (!(md->attribute & EFI_MEMORY_WB)) flags |= _PAGE_PCD; - if (sev_active() && md->type != EFI_MEMORY_MAPPED_IO) + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT) && + md->type != EFI_MEMORY_MAPPED_IO) flags |= _PAGE_ENC; pfn = md->phys_addr >> PAGE_SHIFT; @@ -390,7 +391,7 @@ static int __init efi_update_mem_attr(struct mm_struct *mm, efi_memory_desc_t *m if (!(md->attribute & EFI_MEMORY_RO)) pf |= _PAGE_RW; - if (sev_active()) + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) pf |= _PAGE_ENC; return efi_update_mappings(md, pf); @@ -438,7 +439,7 @@ void __init efi_runtime_update_mappings(void) (md->type != EFI_RUNTIME_SERVICES_CODE)) pf |= _PAGE_RW; - if (sev_active()) + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) pf |= _PAGE_ENC; efi_update_mappings(md, pf); From patchwork Tue Jul 27 22:26:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12404421 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2BEAC43214 for ; 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dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) by DM4PR12MB5357.namprd12.prod.outlook.com (2603:10b6:5:39b::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.18; Tue, 27 Jul 2021 22:27:40 +0000 Received: from DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208]) by DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208%3]) with mapi id 15.20.4352.031; Tue, 27 Jul 2021 22:27:40 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Thomas Gleixner , Ingo Molnar Subject: [PATCH 06/11] x86/sev: Replace occurrences of sev_es_active() with prot_guest_has() Date: Tue, 27 Jul 2021 17:26:09 -0500 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SN7PR04CA0109.namprd04.prod.outlook.com (2603:10b6:806:122::24) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SN7PR04CA0109.namprd04.prod.outlook.com (2603:10b6:806:122::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.18 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 4733/4SnnaH3hIDMl+IP9BB/Ydbysg/Wt82S2jred9GxdDMz6lGdacjD/bW3UgfxZF13xlSFAII7KpC7Tt0DP009eAvpMeScFpGnpM8ZRgAsHdd6BDIufxSqTtiF79EVoRrT7ca29hecwFS8w2qtR6KnhwHY1VdNC++cW4ofWCLIIuBCJG9OaYKjkuUnnDqX7Cc3Yuh/Yxdcfrn0tlykBOq4oY1kbb32GNhqGcXcyJK7QEvjvsHK1HkUoCIdN1EqCnFzoRH0xLIXsf53iz13Kwiymb4kWiD/10vTO4Y+qOdrJ31rfWG+KauKrMpURIDjROgB2Sndz6IMdFt7aWZ7kVDEgeyy4uVkH0SnV2QOOeYhfkcf1w5FRFJOvogW1/OEwgLP2P65FZiqCfyxhT6a6+iTLZUoy1/7qyvmK2jtymgYceyk758hYXDEJL9lfASzBQxWuG7OAaODkBGd9HJElQStiGnDD8aix8potUs4hERxJfAbUxMzkzmmMVWmxhJs7LnTjuyUL5/mNEsMPyC9Ax2YtOuSR0CZAzO8opsiaOPTiQRTkuP0z06Sec7RrskjhVwytvAUUVxYg+GkX2RMSErCwwEkufhXgWXQph6jb6qNCP3PmZenlVMyRKjGjGOag7bLrl7/inIKRIF93ev7wWZfTLjoJFY3wS8hM55knBhc9Ul9kDeQEjAzvvHS+kJbIqTjPnJHvUEaiIos6SSUikL7s9Ger0GVBv4bVmXQxEfR5B1ybZqwRR3dXWyP5uIVs3ie69HdDKoUpy1J8g81ZAbeZMrhWmbYxHvr4qTxYt+B1VDCk6yAtSErEd1y1bJsNRujnq+fXV4BNwH+PEuyaY1PIp00xz/b3Rfix01NneWPfy+1YfuwbyD7N9Qm5pGbxygG5AOeSWJ9xZUVnk2dML4Jz9/kd5Ny8Sgx6k1zvgwLVjljShsyzEpG7di0AdgwswXVqFawcIqB2iMnsyRJ6xmy2SxNUmtRB6+2Hg/abfshH1alDfJk/BQ6B3jyHHDeexHvwe7XaS/zF/t0p0j0bCu/cYw7D56f7fibLg3trvN34QDyc5bLO1Ub8N/8Vd9wVzPbUBOqo3QyTFBg1YV2MgW80WNU0jH6VLWU74aTs66VzUcLWhLvcaMuX2p+xQ4rOcCtLu7nviCR6dDi1al33zYwVY14bwt0z8Wl32PlRiP2SkORM8inlxZrBcsJtgXxcKii2MvTTYXbqug6GuF32jggOPlCAgj0ESMlJpz4k5QHnHKuf+mkxy0Vz1SZPGpM2zEj/mgIHUoMNRqigD+R0opR1zDLrDILj/6rbyG46zlsYOkHHh96TOQxEXBgRnvG X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5fbe3e98-2c64-4712-feaa-08d9514dbe61 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2021 22:27:40.1326 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: dPPtQwjc6dQFRISYxOJdnZkEwUSi0pyffUeV6q4sEF9GRIUHvOXYsoRtTt4Up0BmlSjOx8M1RDWTY8I0okpBaA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5357 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Replace occurrences of sev_es_active() with the more generic prot_guest_has() using PATTR_GUEST_PROT_STATE, except for in arch/x86/kernel/sev*.c and arch/x86/mm/mem_encrypt*.c where PATTR_SEV_ES will be used. If future support is added for other memory encyrption techonologies, the use of PATTR_GUEST_PROT_STATE can be updated, as required, to specifically use PATTR_SEV_ES. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Signed-off-by: Tom Lendacky --- arch/x86/include/asm/mem_encrypt.h | 2 -- arch/x86/kernel/sev.c | 6 +++--- arch/x86/mm/mem_encrypt.c | 7 +++---- arch/x86/realmode/init.c | 3 +-- 4 files changed, 7 insertions(+), 11 deletions(-) diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index 7e25de37c148..797146e0cd6b 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -50,7 +50,6 @@ void __init mem_encrypt_free_decrypted_mem(void); void __init mem_encrypt_init(void); void __init sev_es_init_vc_handling(void); -bool sev_es_active(void); bool amd_prot_guest_has(unsigned int attr); #define __bss_decrypted __section(".bss..decrypted") @@ -74,7 +73,6 @@ static inline void __init sme_encrypt_kernel(struct boot_params *bp) { } static inline void __init sme_enable(struct boot_params *bp) { } static inline void sev_es_init_vc_handling(void) { } -static inline bool sev_es_active(void) { return false; } static inline bool amd_prot_guest_has(unsigned int attr) { return false; } static inline int __init diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c index a6895e440bc3..66a4ab9d95d7 100644 --- a/arch/x86/kernel/sev.c +++ b/arch/x86/kernel/sev.c @@ -11,7 +11,7 @@ #include /* For show_regs() */ #include -#include +#include #include #include #include @@ -615,7 +615,7 @@ int __init sev_es_efi_map_ghcbs(pgd_t *pgd) int cpu; u64 pfn; - if (!sev_es_active()) + if (!prot_guest_has(PATTR_SEV_ES)) return 0; pflags = _PAGE_NX | _PAGE_RW; @@ -774,7 +774,7 @@ void __init sev_es_init_vc_handling(void) BUILD_BUG_ON(offsetof(struct sev_es_runtime_data, ghcb_page) % PAGE_SIZE); - if (!sev_es_active()) + if (!prot_guest_has(PATTR_SEV_ES)) return; if (!sev_es_check_cpu_features()) diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index eb5cae93b238..451de8e84fce 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -383,8 +383,7 @@ static bool sme_active(void) return sme_me_mask && !sev_active(); } -/* Needs to be called from non-instrumentable code */ -bool noinstr sev_es_active(void) +static bool sev_es_active(void) { return sev_status & MSR_AMD64_SEV_ES_ENABLED; } @@ -482,7 +481,7 @@ static void print_mem_encrypt_feature_info(void) pr_cont(" SEV"); /* Encrypted Register State */ - if (sev_es_active()) + if (amd_prot_guest_has(PATTR_SEV_ES)) pr_cont(" SEV-ES"); pr_cont("\n"); @@ -501,7 +500,7 @@ void __init mem_encrypt_init(void) * With SEV, we need to unroll the rep string I/O instructions, * but SEV-ES supports them through the #VC handler. */ - if (amd_prot_guest_has(PATTR_SEV) && !sev_es_active()) + if (amd_prot_guest_has(PATTR_SEV) && !amd_prot_guest_has(PATTR_SEV_ES)) static_branch_enable(&sev_enable_key); print_mem_encrypt_feature_info(); diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c index 2109ae569c67..7711d0071f41 100644 --- a/arch/x86/realmode/init.c +++ b/arch/x86/realmode/init.c @@ -2,7 +2,6 @@ #include #include #include -#include #include #include @@ -48,7 +47,7 @@ static void sme_sev_setup_real_mode(struct trampoline_header *th) if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) th->flags |= TH_FLAGS_SME_ACTIVE; - if (sev_es_active()) { + if (prot_guest_has(PATTR_GUEST_PROT_STATE)) { /* * Skip the call to verify_cpu() in secondary_startup_64 as it * will cause #VC exceptions when the AP can't handle them yet. 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Tue, 27 Jul 2021 22:27:50 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Thomas Gleixner , Ingo Molnar , Dave Hansen , Andy Lutomirski , Peter Zijlstra , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Will Deacon , Dave Young , Baoquan He Subject: [PATCH 07/11] treewide: Replace the use of mem_encrypt_active() with prot_guest_has() Date: Tue, 27 Jul 2021 17:26:10 -0500 Message-Id: <029791b24c6412f9427cfe6ec598156c64395964.1627424774.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SA0PR11CA0067.namprd11.prod.outlook.com (2603:10b6:806:d2::12) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SA0PR11CA0067.namprd11.prod.outlook.com (2603:10b6:806:d2::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4352.25 via Frontend Transport; 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Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: Andy Lutomirski Cc: Peter Zijlstra Cc: David Airlie Cc: Daniel Vetter Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Thomas Zimmermann Cc: VMware Graphics Cc: Joerg Roedel Cc: Will Deacon Cc: Dave Young Cc: Baoquan He Signed-off-by: Tom Lendacky --- arch/x86/kernel/head64.c | 4 ++-- arch/x86/mm/ioremap.c | 4 ++-- arch/x86/mm/mem_encrypt.c | 5 ++--- arch/x86/mm/pat/set_memory.c | 3 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +++- drivers/gpu/drm/drm_cache.c | 4 ++-- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 4 ++-- drivers/gpu/drm/vmwgfx/vmwgfx_msg.c | 6 +++--- drivers/iommu/amd/iommu.c | 3 ++- drivers/iommu/amd/iommu_v2.c | 3 ++- drivers/iommu/iommu.c | 3 ++- fs/proc/vmcore.c | 6 +++--- kernel/dma/swiotlb.c | 4 ++-- 13 files changed, 29 insertions(+), 24 deletions(-) diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index de01903c3735..cafed6456d45 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include @@ -285,7 +285,7 @@ unsigned long __head __startup_64(unsigned long physaddr, * there is no need to zero it after changing the memory encryption * attribute. */ - if (mem_encrypt_active()) { + if (prot_guest_has(PATTR_MEM_ENCRYPT)) { vaddr = (unsigned long)__start_bss_decrypted; vaddr_end = (unsigned long)__end_bss_decrypted; for (; vaddr < vaddr_end; vaddr += PMD_SIZE) { diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c index 0f2d5ace5986..5e1c1f5cbbe8 100644 --- a/arch/x86/mm/ioremap.c +++ b/arch/x86/mm/ioremap.c @@ -693,7 +693,7 @@ static bool __init early_memremap_is_setup_data(resource_size_t phys_addr, bool arch_memremap_can_ram_remap(resource_size_t phys_addr, unsigned long size, unsigned long flags) { - if (!mem_encrypt_active()) + if (!prot_guest_has(PATTR_MEM_ENCRYPT)) return true; if (flags & MEMREMAP_ENC) @@ -723,7 +723,7 @@ pgprot_t __init early_memremap_pgprot_adjust(resource_size_t phys_addr, { bool encrypted_prot; - if (!mem_encrypt_active()) + if (!prot_guest_has(PATTR_MEM_ENCRYPT)) return prot; encrypted_prot = true; diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index 451de8e84fce..0f1533dbe81c 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -364,8 +364,7 @@ int __init early_set_memory_encrypted(unsigned long vaddr, unsigned long size) /* * SME and SEV are very similar but they are not the same, so there are * times that the kernel will need to distinguish between SME and SEV. The - * sme_active() and sev_active() functions are used for this. When a - * distinction isn't needed, the mem_encrypt_active() function can be used. + * sme_active() and sev_active() functions are used for this. * * The trampoline code is a good example for this requirement. Before * paging is activated, SME will access all memory as decrypted, but SEV @@ -451,7 +450,7 @@ void __init mem_encrypt_free_decrypted_mem(void) * The unused memory range was mapped decrypted, change the encryption * attribute from decrypted to encrypted before freeing it. */ - if (mem_encrypt_active()) { + if (sme_me_mask) { r = set_memory_encrypted(vaddr, npages); if (r) { pr_warn("failed to free unused decrypted pages\n"); diff --git a/arch/x86/mm/pat/set_memory.c b/arch/x86/mm/pat/set_memory.c index ad8a5c586a35..6925f2bb4be1 100644 --- a/arch/x86/mm/pat/set_memory.c +++ b/arch/x86/mm/pat/set_memory.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -1986,7 +1987,7 @@ static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc) int ret; /* Nothing to do if memory encryption is not active */ - if (!mem_encrypt_active()) + if (!prot_guest_has(PATTR_MEM_ENCRYPT)) return 0; /* Should not be working on unaligned addresses */ diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index abb928894eac..8407224717df 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -38,6 +38,7 @@ #include #include #include +#include #include "amdgpu.h" #include "amdgpu_irq.h" @@ -1239,7 +1240,8 @@ static int amdgpu_pci_probe(struct pci_dev *pdev, * however, SME requires an indirect IOMMU mapping because the encryption * bit is beyond the DMA mask of the chip. */ - if (mem_encrypt_active() && ((flags & AMD_ASIC_MASK) == CHIP_RAVEN)) { + if (prot_guest_has(PATTR_MEM_ENCRYPT) && + ((flags & AMD_ASIC_MASK) == CHIP_RAVEN)) { dev_info(&pdev->dev, "SME is not compatible with RAVEN\n"); return -ENOTSUPP; diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c index 546599f19a93..4d01d44012fd 100644 --- a/drivers/gpu/drm/drm_cache.c +++ b/drivers/gpu/drm/drm_cache.c @@ -31,7 +31,7 @@ #include #include #include -#include +#include #include #include @@ -204,7 +204,7 @@ bool drm_need_swiotlb(int dma_bits) * Enforce dma_alloc_coherent when memory encryption is active as well * for the same reasons as for Xen paravirtual hosts. */ - if (mem_encrypt_active()) + if (prot_guest_has(PATTR_MEM_ENCRYPT)) return true; for (tmp = iomem_resource.child; tmp; tmp = tmp->sibling) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index dde8b35bb950..06ec95a650ba 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c @@ -29,7 +29,7 @@ #include #include #include -#include +#include #include #include @@ -634,7 +634,7 @@ static int vmw_dma_select_mode(struct vmw_private *dev_priv) [vmw_dma_map_bind] = "Giving up DMA mappings early."}; /* TTM currently doesn't fully support SEV encryption. */ - if (mem_encrypt_active()) + if (prot_guest_has(PATTR_MEM_ENCRYPT)) return -EINVAL; if (vmw_force_coherent) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c b/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c index 3d08f5700bdb..0c70573d3dce 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include @@ -153,7 +153,7 @@ static unsigned long vmw_port_hb_out(struct rpc_channel *channel, unsigned long msg_len = strlen(msg); /* HB port can't access encrypted memory. */ - if (hb && !mem_encrypt_active()) { + if (hb && !prot_guest_has(PATTR_MEM_ENCRYPT)) { unsigned long bp = channel->cookie_high; si = (uintptr_t) msg; @@ -208,7 +208,7 @@ static unsigned long vmw_port_hb_in(struct rpc_channel *channel, char *reply, unsigned long si, di, eax, ebx, ecx, edx; /* HB port can't access encrypted memory */ - if (hb && !mem_encrypt_active()) { + if (hb && !prot_guest_has(PATTR_MEM_ENCRYPT)) { unsigned long bp = channel->cookie_low; si = channel->cookie_high; diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 811a49a95d04..def63a8deab4 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include @@ -2178,7 +2179,7 @@ static int amd_iommu_def_domain_type(struct device *dev) * active, because some of those devices (AMD GPUs) don't have the * encryption bit in their DMA-mask and require remapping. */ - if (!mem_encrypt_active() && dev_data->iommu_v2) + if (!prot_guest_has(PATTR_MEM_ENCRYPT) && dev_data->iommu_v2) return IOMMU_DOMAIN_IDENTITY; return 0; diff --git a/drivers/iommu/amd/iommu_v2.c b/drivers/iommu/amd/iommu_v2.c index f8d4ad421e07..ac359bc98523 100644 --- a/drivers/iommu/amd/iommu_v2.c +++ b/drivers/iommu/amd/iommu_v2.c @@ -16,6 +16,7 @@ #include #include #include +#include #include "amd_iommu.h" @@ -741,7 +742,7 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids) * When memory encryption is active the device is likely not in a * direct-mapped domain. Forbid using IOMMUv2 functionality for now. */ - if (mem_encrypt_active()) + if (prot_guest_has(PATTR_MEM_ENCRYPT)) return -ENODEV; if (!amd_iommu_v2_supported()) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 5419c4b9f27a..ddbedb1b5b6b 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -23,6 +23,7 @@ #include #include #include +#include #include static struct kset *iommu_group_kset; @@ -127,7 +128,7 @@ static int __init iommu_subsys_init(void) else iommu_set_default_translated(false); - if (iommu_default_passthrough() && mem_encrypt_active()) { + if (iommu_default_passthrough() && prot_guest_has(PATTR_MEM_ENCRYPT)) { pr_info("Memory encryption detected - Disabling default IOMMU Passthrough\n"); iommu_set_default_translated(false); } diff --git a/fs/proc/vmcore.c b/fs/proc/vmcore.c index 9a15334da208..b466f543dc00 100644 --- a/fs/proc/vmcore.c +++ b/fs/proc/vmcore.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include #include "internal.h" @@ -177,7 +177,7 @@ ssize_t __weak elfcorehdr_read(char *buf, size_t count, u64 *ppos) */ ssize_t __weak elfcorehdr_read_notes(char *buf, size_t count, u64 *ppos) { - return read_from_oldmem(buf, count, ppos, 0, mem_encrypt_active()); + return read_from_oldmem(buf, count, ppos, 0, prot_guest_has(PATTR_MEM_ENCRYPT)); } /* @@ -378,7 +378,7 @@ static ssize_t __read_vmcore(char *buffer, size_t buflen, loff_t *fpos, buflen); start = m->paddr + *fpos - m->offset; tmp = read_from_oldmem(buffer, tsz, &start, - userbuf, mem_encrypt_active()); + userbuf, prot_guest_has(PATTR_MEM_ENCRYPT)); if (tmp < 0) return tmp; buflen -= tsz; diff --git a/kernel/dma/swiotlb.c b/kernel/dma/swiotlb.c index e50df8d8f87e..2e8dee23a624 100644 --- a/kernel/dma/swiotlb.c +++ b/kernel/dma/swiotlb.c @@ -34,7 +34,7 @@ #include #include #include -#include +#include #include #ifdef CONFIG_DEBUG_FS #include @@ -515,7 +515,7 @@ phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr, if (!mem) panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer"); - if (mem_encrypt_active()) + if (prot_guest_has(PATTR_MEM_ENCRYPT)) pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n"); 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Tue, 27 Jul 2021 22:28:00 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan Subject: [PATCH 08/11] mm: Remove the now unused mem_encrypt_active() function Date: Tue, 27 Jul 2021 17:26:11 -0500 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SN6PR2101CA0019.namprd21.prod.outlook.com (2603:10b6:805:106::29) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SN6PR2101CA0019.namprd21.prod.outlook.com (2603:10b6:805:106::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4394.2 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3NbPnPP9I7JALLiYBRw1I6VwYZMsnOeGvhd3dHNamDc8Q128muqLW4AtRjRTs0u0hox8FU+K8vIjCiADtpTNBjdLMkFT/Fx176iOkmi4NYRMxJkoe2o3sbRP/0HWn8T4JtpJ73af9s4TJaz0fjVMqV/zoQ8UhVGxK4myd1RmU8y07bLfR+aCPyIvy81ufP8SK429pJwlQFp3dDnoxYKHw7Gln89vlmZLblh8n6wE/mPHX4g2F+GhoUNF0Lhnl61o8f9vXHdy3z5f9y6SkEYD2wbZeg+G1jgUfT1/FOMfW8XTL+N1flZaBi6epEy+Kd5D0Gc8mSXMXdhDCkp8i+gPThOtaU/YgA9QhQISLUe8gzbClFdcvou+TNq3yC3omtZMYn6u4f/0HLvJAMvtmO11rWDH0Ul0lkToVas0vOQkX+BJgtaPjs/wDwR6C+7Xt5KHX9OQd8MdDl/j8O8gyUb4Lw/sgi5V4FrWpvBud468/GU4J7hy1hL51R2YqRV51vWRrj/pQHUWPm+EWHwHVXEtBHC2sZLfkQ3gMeEb0UKg0iCgzi4c2N+J3KSpJAH7gt92MINz3iNRmZCstgxIe3lxwaUKO4jFRI/paFZNcEanJojZZ4QM6yiguf82XwFjnehC2FMmgJ1vcq8TQbzVJWkr2YNTOOAueOSTKYtCiVaz8ERHj9kFtP3148B1j0zmr+xw2x267rf2IDbWST9MUlQYwyJ4sxwBRwJyfXY1NXuNlIvGgjq01i1vHXo0LrWzlMVYWtu/LBKUwLqr1b6Ibvpa2u1lbEVXVLQn2zHqqn2hGyQ2evmVJpRxiRBw4+WeddmOWOf/+K7l8vXcR3PSvIJpItN5k6xB6wmMFFZUL6Sru9izXYuTyIiRxQM0pnFo3hNSkbrEYnvG+tIntVOHRrHv1+EKdnPi1u8oRb7ERD3t2aFPbVzxz9LmcSz5QAargMg6QZdb1QCu7ZxgY5NE9e3AEL+6mj304LXZ/7jFzu2Qd1qYJxVhd8XfhgZppqqgDHyvLl9HpId8GFZtPBVqYekUuP5ZADVpJWuMHBAjxrQs+sHjkpt8XyAL0VRPfClM4Da48RyRECLACfw/BNIVWfHJQFp133DJ06JRYXiuD5RC/jf3g16W7/DB7TUVBWHs5Pre55sgGijTt5E2Am+b9OAU5AztiUp879kFkGXCFN8IU2sP8MgBvUOGwNamfacv1tzadFc4NoHDsDUWJP0ffVrPrk/rCtYU70PVhlqgJMr/bQ40Qu5r4UXKCZ/HxTLkdiqCqIsopqkrhp5n1y6E3KAHNdktS8L31aops3p6st9IvsAh09dlQdt2IopxlnuPaYg8 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 440c7b55-25c3-4298-6cdb-08d9514dcab3 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2021 22:28:00.6157 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: QnbSSh5hLkL+L4otK3IGb1kwigDVAt3HlEhpSUKc4PZsjvryPBHKnkWfUfAnG50w0GbnFJ8QvAAho+XaiLF3eA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB5520 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org The mem_encrypt_active() function has been replaced by prot_guest_has(), so remove the implementation. Signed-off-by: Tom Lendacky Reviewed-by: Joerg Roedel --- include/linux/mem_encrypt.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/include/linux/mem_encrypt.h b/include/linux/mem_encrypt.h index 5c4a18a91f89..ae4526389261 100644 --- a/include/linux/mem_encrypt.h +++ b/include/linux/mem_encrypt.h @@ -16,10 +16,6 @@ #include -#else /* !CONFIG_ARCH_HAS_MEM_ENCRYPT */ - -static inline bool mem_encrypt_active(void) { return false; } - #endif /* CONFIG_ARCH_HAS_MEM_ENCRYPT */ #ifdef CONFIG_AMD_MEM_ENCRYPT From patchwork Tue Jul 27 22:26:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12404427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01E0AC4320A for ; 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dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) by DM6PR12MB5520.namprd12.prod.outlook.com (2603:10b6:5:208::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.18; Tue, 27 Jul 2021 22:28:10 +0000 Received: from DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208]) by DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208%3]) with mapi id 15.20.4352.031; Tue, 27 Jul 2021 22:28:10 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Thomas Gleixner , Ingo Molnar Subject: [PATCH 09/11] x86/sev: Remove the now unused mem_encrypt_active() function Date: Tue, 27 Jul 2021 17:26:12 -0500 Message-Id: <2e6fb78b7b18437f0e754513bf6312dcba3d1565.1627424774.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SN4PR0501CA0065.namprd05.prod.outlook.com (2603:10b6:803:41::42) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SN4PR0501CA0065.namprd05.prod.outlook.com (2603:10b6:803:41::42) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.12 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: BciGXQlnIeOx5rkJCKv83CMBYwzmZ62spmW5pyKr4uFHG7B1b+N5HPefFk/BkvweRS1jAuUrqRtp0r2/z2mguV5R0h2GiTHMJKaAplo8PnUa2OvH6q2bbl9Gmhp8EjsXkN5D/S2kZN8oeStGgfd15n7kg1tnjrGM6px+nbkm5Xl94sAh3iekmMY7R+KLJm89V70WfB0J3xJXlXxhiVAWrOGD0PIK3BvV+KTvLaGRXiboYBvrydOTlDz29CKbsVTHzIu6GW1YA/wzUjXY/GPBKwY2ylJfD3HRP1sDZLGi6Meo4wwfmoTqoCKxRDqWRaZMWSD1pluJZw96UiEN1xcBuMq5qcqcEHKcxUj57FcSVKFXDr4YdO1fuPwwUuXSzwxtDAFvoSUWc++wSsOuDpBjjTCK5GodGfQqwUI9pIUhFqfEq540t2MFiLl8A3G1mH/VlmPTFVV7XVRXdWCmT40hOc/1VNZiklWA3iHKVO3DPxJbsj8L7+Dlme0vVZxMSakDatDVqTcYU+qe1p+bGpmbDg1zYVdEc4mloPOOtlEmpRRp+acFYyGGuiCuJJ7xNOrTpDz0U7TBYqGh9sjga4Juw9aZudxw4f1viibGnEgtUPk7KPCbVqGxrPPItcN9Y5K6SO2lUrziBt5BNara8Em8fvwva/6BVkcrv0z/lk7+RqVe4W5Ip0BuHjAJBFUlM+5o+j86nMhKtsrvjblxDbfgcBaXZbMysizvP4firBns88yUNpYqnFn08hWZblQZ+RvwD9CZw54OMUjNea+nLD6ePkwXoWjvPbKl/y4S5kYH5RMOeM3w7iqdVNc6Di91AUMzQVMeiLffa+JZxPQgAl5k4WSwqFsH19fQREs6ApWRjPn0kRMsLnOSw01mmWyheHzLZngdJvNwdkZSGdNszDmU2RKsC25cAk1SYEzKisIl/G3EIKQnKofWX6Jsb+hahc8evVm7oYk2WMDkgUWy8KAlDIORmjKu4IzblpQ0bsUK3GNQ+9kV2XOmA7WWC7cauqHXOwY+X+WGGbpwL2SU9yBFMqQZLhv5xZYXsnf7tVzS392RZxxMPU3fhKoPNWy7XXtOLjAmMunfAQMUlplVemmjoWtwutYpY9Stbjvlx4Jb9cb8nBlIcG5uWkRnfzbAAqUS4Z7bkadtgJOsdz5KqFldipFBXsJTKO0Bl2NTJtPhPtXxYGk+OJfziSz6qYly5+/b5SSanAgs3KbeDPZzhnlue/AK+UkejdvCKbo8DIYy4Sadh+kouLwvicLBqA1UO8dcy0+uBj7OHKKFyrWBwxOibpCR5y8kziY6RKV67DT3FqTuUUKelzCETVLw1bDw+FQ2 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: e1210c41-0710-4a44-4dd0-08d9514dd080 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2021 22:28:10.4516 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: IFLvGqgt15SZua3H3/Ow+sfZ51XMCL/axZ8PA9JCScELh+vGxAhBcZExN0voS08kwOfFOAJH6nAfu7AkuMJq+g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB5520 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org The mem_encrypt_active() function has been replaced by prot_guest_has(), so remove the implementation. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Signed-off-by: Tom Lendacky Reviewed-by: Joerg Roedel --- arch/x86/include/asm/mem_encrypt.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index 797146e0cd6b..94c089e9ea69 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -97,11 +97,6 @@ static inline void mem_encrypt_free_decrypted_mem(void) { } extern char __start_bss_decrypted[], __end_bss_decrypted[], __start_bss_decrypted_unused[]; -static inline bool mem_encrypt_active(void) -{ - return sme_me_mask; -} - static inline u64 sme_get_me_mask(void) { return sme_me_mask; From patchwork Tue Jul 27 22:26:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12404429 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A84EC4338F for ; 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dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) by DM6PR12MB5520.namprd12.prod.outlook.com (2603:10b6:5:208::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.18; Tue, 27 Jul 2021 22:28:20 +0000 Received: from DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208]) by DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208%3]) with mapi id 15.20.4352.031; Tue, 27 Jul 2021 22:28:20 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras Subject: [PATCH 10/11] powerpc/pseries/svm: Remove the now unused mem_encrypt_active() function Date: Tue, 27 Jul 2021 17:26:13 -0500 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SA9PR11CA0010.namprd11.prod.outlook.com (2603:10b6:806:6e::15) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SA9PR11CA0010.namprd11.prod.outlook.com (2603:10b6:806:6e::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4352.26 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 33XF5xyV6fSMw3mBCWiOHJrlKtNzKeJ6/jRgmcl8RZYEr1Vi6JiElIyMpiOC9+zwKk2nCv/fQvEkn4PQsdV59SWL4lyHFU5QopsGnK0eh00aIpOkFKGWY2Fu8aXmURCD9kstB8NClzK3Rk2gjyQUbEdGjco6x3g3zuy8WMSDVSwL2xY/K+xt6XG74Jys1erg/n5OHktqH4mIetUzRpDp9/6VfJo214rBIA35S4WhOn5XmSfJjDIHNxja59sr1O2x16/gfH8vh5qqbz/+oXD5HEYKqaBhXxzn6ZlkQJ3Zq0RHdFJR4MB5Jn3c1mAa/D56lHvqzr7KvaLe4QFCjaUOx9cPzGRLts1lBQ9eb9Ak1zSh2aioycePqhFntOln3Kamhc1W+eBKk6+nI4BJXBbvuRr5eANOeA7C6SwZBAR4g5BpZiC5UZ9dx9+YLBSyVNM/FpxahsiRvrVfKViw9wQnonQEhWQAaFJBBQxUHB3Jmt/mCq57S20Z9a6tM/9e4UModS5iimgQx0SDYmv6RiZS0CHzM598B/D/ro0+S2kn/Tw6NRu1YfYbTi5sl+YpYU00362j9JVxM6XYDmkY0gRusWaZCcvSb3OqbJ7sUotrVhyvlVpTSgsDDWqlRN2NLtDUhp0L+XnLzerAxyP1bGFnwJdbHZza1l6u7s7XqMrnibPaGVJH9yuCUYRyezByek4A8hXZeNpv3d6aO3RzteIxHnnpVfWBcfEGWfMHyucA8Entxxx+uQrEuVho9ucBJCLywWZ4MXRU2LEngWZtdnc7FSraxU3HqTTgsM1mCLyZls4SimBB7udd+bX4jBtbDmV95K++ZjkDD6XHykJK04u/s1gtiMkSbvR473nC0jltyuQEx0LpKe3Am7bt87avHd2W8+td6djBJH5VP5x3W5+60NLgGPlwvKtm/0MAeY1hNse87F4HXXrA7Scj47I/5zZ1pn8gitU04mTXFyQ4sRGVEDMUZ71h5L6HUezkXig+OJN0ZnMmwalqI4i+qRatKDJq38cFj/dIPINUBWJhoN5SUi0srC3i5DaFKGNMPY9jdMmEperBEZBYpmxYXnLxmN0N3WxAWQhC7x10qRzyDskphfFkwWVGrHkV/IfG0IZy0P5sSaNfxKVQ+DRbQP8igDrWZCLvhqEN6x67EYVOpPFE6dXkCdHhBs8FXP4JK07Avj4QZc4ePzU/X8mn73iqAIQN5uur85oHQp8/HF88gRNK6jAotV1wrEz8wBdjid2U5O8YWY11jD/9JLM1FOl7FgrYgVDv5ysBItsvT/kTDdiotQ4l+27sx+YIdGXA8IGnaecQt1f94b714YykypFf8I3U X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: a2ff93a6-8c75-4220-83a9-08d9514dd6b2 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2021 22:28:20.7713 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: sK+QPL1UQy1x9YBjf2wLCNl6K8ELA+qcyL1NCrg8TKafLNREDqaRZrt8bwe+VFZXfpQiQOVdt50NIH1p+iGXeQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB5520 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org The mem_encrypt_active() function has been replaced by prot_guest_has(), so remove the implementation. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Signed-off-by: Tom Lendacky --- arch/powerpc/include/asm/mem_encrypt.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/powerpc/include/asm/mem_encrypt.h b/arch/powerpc/include/asm/mem_encrypt.h index ba9dab07c1be..2f26b8fc8d29 100644 --- a/arch/powerpc/include/asm/mem_encrypt.h +++ b/arch/powerpc/include/asm/mem_encrypt.h @@ -10,11 +10,6 @@ #include -static inline bool mem_encrypt_active(void) -{ - return is_secure_guest(); -} - static inline bool force_dma_unencrypted(struct device *dev) { return is_secure_guest(); From patchwork Tue Jul 27 22:26:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12404431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3438C43216 for ; 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dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) by DM6PR12MB5520.namprd12.prod.outlook.com (2603:10b6:5:208::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.18; Tue, 27 Jul 2021 22:28:30 +0000 Received: from DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208]) by DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::73:2581:970b:3208%3]) with mapi id 15.20.4352.031; Tue, 27 Jul 2021 22:28:30 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Heiko Carstens , Vasily Gorbik , Christian Borntraeger Subject: [PATCH 11/11] s390/mm: Remove the now unused mem_encrypt_active() function Date: Tue, 27 Jul 2021 17:26:14 -0500 Message-Id: <161de897babd0db0f6a10f081fb17e4a93f2f2b6.1627424774.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SN7PR04CA0097.namprd04.prod.outlook.com (2603:10b6:806:122::12) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SN7PR04CA0097.namprd04.prod.outlook.com (2603:10b6:806:122::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4352.25 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 8dKYWFVJqel5abi/uq6H5mISnd8oZUULAJ9D1dJ05rpNyewpha/oQoxngXZF7AnxOPR9J8h4l16pmsy+cNQjABpR0LkK7ZjucjWDUj62+000RKq8EVh9cG3zuPdZDod38e02lx3UzZOzvdyOQxLsBAMGb8JWU/8VXZBko7tSe+HCat/eb6lf1ib165vfazY4jbWO2h1VThIP+9ocUJb7YhvhqbDASwRRc0sBcb/Ti2Pmqhp68Kc8jzV2CRt6DuEjjVa6xHQxDmIXbKOW3C6sKbFVhlMYBbEh8e4lGauNBr7hbhaEvjXFWss3gnE/UDzg0sPuaGph0EBaWC5ReB5+yqa8FDkzw6YEikvuWlcbqpnQ0I44181XJofhEVlctl7rqI49uOQcRm+8Li2ZFcT6xghNcJSI5xvF0fv8pEBWGY6XuR6TgyeV6Ts0ovQHHQYvi18RyhsQpVzaeD1UG5Zy8nWqWhzYDf3UKkkOP6xXRiAxw6gEiWyCGZ5Sd+37X7CqpDmN0rCZg2XTOrt7U9/xr6gwlET8b71I6jKHjtELQeTpbdDQsbmrHL9vzU8HePN9rNYbupPK44VNvjIB5jA2lvZRxJsw3zsxLBvi4U3HfvEA77Vn7kh7+wyg6I7YWdfcL0g86+06bRtEmE9mFlAnhBhCiYRRgTPrS/qN+9jGyuuqsLkPl9/uzMPFlj3APBr3Nuyhf1noAq6TTVXkp2jybgBiuW5ItzuRIHm6lGmalF0Znu4Myx/BmLhTVCgSXX7XN696J23HN/WB7BqIuNGFtVEcbp8kEbv01wKWOwWGUbgLl3i6hCXyCwDvAFLKx2PxQEbC4guPngE9wpg+dUjcsBI/6G438ouJonry87lIFchcYYUrVQAAoRBZohgKro1NxpOLUdcedr56fM/mVx793ZNMnZ3zT/LJK4uv6kNPEin5ZEZPP9CWBXQjJCVOloBgZelaDZbcqJ/hbyebDRPAEVXm4na388pFzaNWb2cqCSTzWRt6RoeGzZxjkFLc5so+CdQvoZA96NYiEChZhCsh84lP4rvJJgCQM5mx97wme6C6gacDSoyoVUUw2TQo1XGCEZ7pqLta63Ohxushqc6KTLP2AbwlobC1uXCqH7x6rrU4Scvn3NcoyVrqPNgFwRO23AikDwDNGr5EOvSo5rfG0mgkwhplLdMEFOdKz2sjT7HaemSZ8ZwQLWraBT0OobUaKRG76OyqW3LQi4iX20ATTJIKawbbayO3hhUdBvh6CtZz7Hgn0hJBXopvTFRRv+VBdRUCm1GCrZ5/yzgo3BJ8is/635pniKEk/7s1csgaq4sGDo7O8IyecvQ4arVgQYxD X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 08d9b086-de40-4fb6-7255-08d9514ddc93 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2021 22:28:30.6459 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 5jb6mfJuOci7WkLLKlz+2k6H3V0iGL32kUjdMnaDEMajHeJaLyZjE0dyUIzKU+hPhB7pEUZYJh37I9zi6kg0+g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB5520 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org The mem_encrypt_active() function has been replaced by prot_guest_has(), so remove the implementation. Since the default implementation of the prot_guest_has() matches the s390 implementation of mem_encrypt_active(), prot_guest_has() does not need to be implemented in s390 (the config option ARCH_HAS_PROTECTED_GUEST is not set). Cc: Heiko Carstens Cc: Vasily Gorbik Cc: Christian Borntraeger Signed-off-by: Tom Lendacky --- arch/s390/include/asm/mem_encrypt.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/s390/include/asm/mem_encrypt.h b/arch/s390/include/asm/mem_encrypt.h index 2542cbf7e2d1..08a8b96606d7 100644 --- a/arch/s390/include/asm/mem_encrypt.h +++ b/arch/s390/include/asm/mem_encrypt.h @@ -4,8 +4,6 @@ #ifndef __ASSEMBLY__ -static inline bool mem_encrypt_active(void) { return false; } - int set_memory_encrypted(unsigned long addr, int numpages); int set_memory_decrypted(unsigned long addr, int numpages);