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dkim=none (message not signed) header.d=none;google.com; dmarc=none action=none header.from=oss.nxp.com; Received: from DU2PR04MB8726.eurprd04.prod.outlook.com (2603:10a6:10:2dd::9) by DU2PR04MB8648.eurprd04.prod.outlook.com (2603:10a6:10:2df::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.21; Thu, 29 Jul 2021 12:18:09 +0000 Received: from DU2PR04MB8726.eurprd04.prod.outlook.com ([fe80::e50a:234a:7fb7:11d4]) by DU2PR04MB8726.eurprd04.prod.outlook.com ([fe80::e50a:234a:7fb7:11d4%9]) with mapi id 15.20.4373.021; Thu, 29 Jul 2021 12:18:09 +0000 From: Wasim Khan To: bhelgaas@google.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Cc: V.Sethi@nxp.com, Wasim Khan Subject: [PATCH] PCI: Add ACS quirk for NXP LX2160A and LX2162A Date: Thu, 29 Jul 2021 14:17:47 +0200 Message-Id: <20210729121747.1823086-1-wasim.khan@oss.nxp.com> X-Mailer: git-send-email 2.25.1 X-ClientProxiedBy: AM0PR10CA0060.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:20b:150::40) To DU2PR04MB8726.eurprd04.prod.outlook.com (2603:10a6:10:2dd::9) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from lsv05369.swis.nl-cdc01.nxp.com (92.121.36.4) by AM0PR10CA0060.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:20b:150::40) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4373.18 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: fCe0kUE6qi1pBZadi2e+nAreQ/vSs/EVwaCDBaAijUZCyQpT0aQMxFIjo2GY2Ek50uvgpeDT/D5uwasrPj6uirUU6EWmnbN3cACnyPrro2YInCHSRmp6bFGUVzwQ6FaysXHgJfJguxHdHSCKHJX93Cw8fM7AJPJeRqZv4Ohze/PoAfqXsEHuBAIQtHD6OEoCKgXcvad+AwcPzZ1wnF4uPWjm/dmVoPcHIqCevt1Vh8mof/1cQrkBCEOlB3DGjUEDF4uQjly5UgbHZs0acfzZ65BThdD44KoBr7bhFPcs4IZ/Os0wPAXnhJcjWJpIMz34B1IHzOUIh19StRlw++YmtQooPaW+ls4QHU2s46vULmF5w40HycAQcHpxAtla5VYCeAFg8AuKxhUXawHj5HbuYnI4aa4b+1evFT7Z8tBqiCIIu1JjfUYDtvHl76I9vt7SryKC8T7RQkvvDN61QCFybz0s42ubnwCKloH2yCZijfzKnI5Y2ATcvSI9isJJ1OwkA3GBJY/b2Z4kIq+06cp5BQOU5ylD84T/wyrzSa1fuTOV8hsc1K73wZ8l0bVh6Bf6eJAF3IoxSDlf8Jd5Bj13H1SJGGZ3L6JRE5VGohnMnl/F9xG+4uaDdhsemvTEg4riFQGQWti79qZU2JE+5yd9g4Q+zl6Yh+FRmv2YySrGpum+g5nMaSTfsSl2m05mROZ3o8B6XWMN6Qm+YzSR/W4zHQ3WZPcuXuJ3mSMigcTUibWh4AjVLfSxY57CjnENHOoGDsZF6YGWCAGEXnrU9EEB/Hwodva2OK9FD2s2uwmhaWIGzyyXGJQkM5VcxNLWrMEjYZ7IJXLAC/5kQhjUnbSEb2+xzB1HHhSF9oX/RfuWEOuRO5WcQAjExlr5MdnIq3AunbTmwrYjU6z/m8tBTEJIvNjT+dXptgq4ktNybT/XNSv/11FQUL0VvUy2rvFPFJ+6v6Wix/yvJ/UhSNAevqeIjKp5uZg9AQ/MQTsaX8EBhcadoSOhrX+4tNXFIW9bI8sFHSUXx/lCbrnc60jo8cUP8Io4byDRtoAW9eun0zjzBNsvA6fblq1TSGxDVyXX5DL3qTrWdOhc82t4GSxPjJRy0v2GURwFGqRbGc8Mg/6sFHdJQOZS4VS3pId2jkOI9tC+zEqZT6YhMBpEo2qwaEOYzjB164gQhIE1zKM5orhj+qhdcRzv5ce7G+CobH6oiQJShPNXmnExUMavHQVNTFP11XoIF4MzoCpi0xWTN3zqkKzEUrtQz0CIyXAghcCncnDtAgdsJhOuPOnbDQtD7HmpyAj1GPlcPAlBBdAlzDLMlVRNtQ6QlOxJQ+KH8QyasrtO X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: fc4861d0-c98f-40cf-6028-08d9528aeda5 X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB8726.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jul 2021 12:18:09.7151 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 4Mc7XlqHXKckqJe1x/+RqgunxQNLaFyqEbFuuMWclc8US8O2sKmub/189bI+gN0OC+P5wacPok31iGt3wMjIvQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR04MB8648 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Wasim Khan Root Ports in NXP LX2160A and LX2162A where each Root Port is a Root Complex with unique segment numbers do provide isolation features to disable peer transactions and validate bus numbers in requests, but do not provide an actual PCIe ACS capability. Add ACS quirk for NXP LX2160A and LX2162A Signed-off-by: Wasim Khan --- drivers/pci/quirks.c | 16 ++++++++++++++++ include/linux/pci_ids.h | 1 + 2 files changed, 17 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 653660e3ba9e..24343a76c034 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4527,6 +4527,18 @@ static int pci_quirk_qcom_rp_acs(struct pci_dev *dev, u16 acs_flags) PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF); } +/* + * These NXP Root Ports with each Root Port is a Root Complex + * with unique segment numbers do provide isolation features + * to disable peer transactions and validate bus numbers in + * requests, but do not provide an actual PCIe ACS capability. + */ +static int pci_quirk_nxp_rp_acs(struct pci_dev *dev, u16 acs_flags) +{ + return pci_acs_ctrl_enabled(acs_flags, + PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF); +} + static int pci_quirk_al_acs(struct pci_dev *dev, u16 acs_flags) { if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) @@ -4771,6 +4783,10 @@ static const struct pci_dev_acs_enabled { { PCI_VENDOR_ID_ZHAOXIN, 0x3038, pci_quirk_mf_endpoint_acs }, { PCI_VENDOR_ID_ZHAOXIN, 0x3104, pci_quirk_mf_endpoint_acs }, { PCI_VENDOR_ID_ZHAOXIN, 0x9083, pci_quirk_mf_endpoint_acs }, + /* NXP root ports */ + { PCI_VENDOR_ID_NXP, 0x8d80, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8d88, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8d89, pci_quirk_nxp_rp_acs }, /* Zhaoxin Root/Downstream Ports */ { PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs }, { 0 } diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index d8156a5dbee8..9eabf77d043a 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2537,6 +2537,7 @@ #define PCI_DEVICE_ID_MPC8641 0x7010 #define PCI_DEVICE_ID_MPC8641D 0x7011 #define PCI_DEVICE_ID_MPC8610 0x7018 +#define PCI_VENDOR_ID_NXP 0x1957 #define PCI_VENDOR_ID_PASEMI 0x1959