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Fri, 13 Aug 2021 16:59:56 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Thomas Gleixner , Ingo Molnar , Dave Hansen , Andy Lutomirski , Peter Zijlstra Subject: [PATCH v2 01/12] x86/ioremap: Selectively build arch override encryption functions Date: Fri, 13 Aug 2021 11:59:20 -0500 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SN4PR0801CA0017.namprd08.prod.outlook.com (2603:10b6:803:29::27) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SN4PR0801CA0017.namprd08.prod.outlook.com (2603:10b6:803:29::27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.16 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: k2uuyrFNe794i9ZdcxzXMnabqnIA3Q49tsutonfhvqTHsXiHHXoPOvBVfkxhNYn/E26ALsENT1KX3eTFKB8gTErrnqCshkYd+KQDL2a5O5s0t8WbpoZ2arbSZn9ST09FaWtH8HH9in7UVoorySmCYHdIeNmrpK5pi2O/sbpcta7tGul1Q3gG8u0VDTfK6JLTBz1LYBVQ0pPQxKS+cFzXiH2ZLZzTqFmgfw+6TNNAlXUajcJ6N3mYcwt1refTvd9492Kn9SMg/CH6L8r0SHHjmYKa+8O/oxTs2qwQh4b0JB5PwBj/X1KrDQBFo/ABLSyyonIMCfW/+Psbvv1+DKwp+UY9EFRj4EZiwkx1xsnUCdSMRADfqbTqWHlJZZme/4IYLCepNAkKgmI2ttCZWxxnL/lQ7PMYAh4yqa0251lstnffzSHtabkvQCI7MPdQZsAc/EYagxX+i+QGeMWKmh5rOjcz8nSVboXU52tSRKVUdVYZnqO8fW1Yt1+lM1WbZqYvhVYZY05EIt57TQKR0Nzx2inn4ARSGNwlektUBGExYyVP4dg2+fgHl/P3Oazx2g6R199y3djMDizzP1YG/tx8zOMbEllOPnWC3mc2iBm6FyLoDPmfjMbeIKManNzku+hCMUQyyf8GnFj/azoP3ynwCcPG/zZYbtCqNgoWte9dNXwI3V83pxBQ6AHry44R3Fsa+hC1/ByA2CmjH7rAqcbfUYh6K6BeVMO258ZnteuCGEi+x5q+TVIjIImMi03XTXD1Ek9cbk2rVjgWGNBFq4+biPEK70v1/+h5Dh7dco/AXttUQFa8v/OaH7s7ItdNn9N7G/iS6guwiShhsQ2r0fsVIXaBNudCs4qk4tILFmunZLaOWtCigzWH2XF5+amjKJFMULM1fx3r8DENksp3E7OuUzKfT7jI+gY9rDqhRYwWiRUWTWArQzZDVPddveNI0UptyLdle3rDYW0q2kKr8LxYpbKXk4N5YpD3+t4LqdZa90hPjZknS1JdTrY+4tYoCvvGO+X3nppKhzIGhvTT+eJAk15w84e+MmcPrhLHhVLa3HYY93JmHGquqck32ifypPw3iPHb8BAMXDga1RhqQSOGFeh2IzvtHQxe3B4ecO00NMxbtCuY/Ff7bSCaFXKz8XnZOYcfvweZWmQ2oXWgGY8/GzB2JSVD2+hhqNLY/yAKyIFNfuut4aco6xe8bgIAsU7ZeY5sDyz+xw2iw1Jh1tZ+TT5vswFHQmuupOryLlZAtZ97+1TWugC5Behm/wEBSXob3k9crZc4/E03YHEp4xGvnKX1DkizSA7jNY+m28sd9upG9TkMiEJXCLjdl07kd5mT X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: f6594ab2-8c4e-4483-e4aa-08d95e7bc6dd X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Aug 2021 16:59:56.0771 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: T9NlcWMTlrVaBAyUizVvPvLOMQQ0pIyEWQVdbL8QkKK29ZIS24x7X1mfitpwkh5+PzcCMhzqmp4EtNAM5lbopA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB5518 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org In prep for other uses of the prot_guest_has() function besides AMD's memory encryption support, selectively build the AMD memory encryption architecture override functions only when CONFIG_AMD_MEM_ENCRYPT=y. These functions are: - early_memremap_pgprot_adjust() - arch_memremap_can_ram_remap() Additionally, routines that are only invoked by these architecture override functions can also be conditionally built. These functions are: - memremap_should_map_decrypted() - memremap_is_efi_data() - memremap_is_setup_data() - early_memremap_is_setup_data() And finally, phys_mem_access_encrypted() is conditionally built as well, but requires a static inline version of it when CONFIG_AMD_MEM_ENCRYPT is not set. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: Andy Lutomirski Cc: Peter Zijlstra Signed-off-by: Tom Lendacky --- arch/x86/include/asm/io.h | 8 ++++++++ arch/x86/mm/ioremap.c | 2 +- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index 841a5d104afa..5c6a4af0b911 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -391,6 +391,7 @@ extern void arch_io_free_memtype_wc(resource_size_t start, resource_size_t size) #define arch_io_reserve_memtype_wc arch_io_reserve_memtype_wc #endif +#ifdef CONFIG_AMD_MEM_ENCRYPT extern bool arch_memremap_can_ram_remap(resource_size_t offset, unsigned long size, unsigned long flags); @@ -398,6 +399,13 @@ extern bool arch_memremap_can_ram_remap(resource_size_t offset, extern bool phys_mem_access_encrypted(unsigned long phys_addr, unsigned long size); +#else +static inline bool phys_mem_access_encrypted(unsigned long phys_addr, + unsigned long size) +{ + return true; +} +#endif /** * iosubmit_cmds512 - copy data to single MMIO location, in 512-bit units diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c index 60ade7dd71bd..ccff76cedd8f 100644 --- a/arch/x86/mm/ioremap.c +++ b/arch/x86/mm/ioremap.c @@ -508,6 +508,7 @@ void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr) memunmap((void *)((unsigned long)addr & PAGE_MASK)); } +#ifdef CONFIG_AMD_MEM_ENCRYPT /* * Examine the physical address to determine if it is an area of memory * that should be mapped decrypted. If the memory is not part of the @@ -746,7 +747,6 @@ bool phys_mem_access_encrypted(unsigned long phys_addr, unsigned long size) return arch_memremap_can_ram_remap(phys_addr, size, 0); } -#ifdef CONFIG_AMD_MEM_ENCRYPT /* Remap memory with encryption */ void __init *early_memremap_encrypted(resource_size_t phys_addr, unsigned long size) From patchwork Fri Aug 13 16:59:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12435901 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C9F3C43216 for ; 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dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) by DM6PR12MB5518.namprd12.prod.outlook.com (2603:10b6:5:1b9::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.14; Fri, 13 Aug 2021 17:00:04 +0000 Received: from DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::d560:d21:cd59:9418]) by DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::d560:d21:cd59:9418%6]) with mapi id 15.20.4415.019; Fri, 13 Aug 2021 17:00:04 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Joerg Roedel Subject: [PATCH v2 02/12] mm: Introduce a function to check for virtualization protection features Date: Fri, 13 Aug 2021 11:59:21 -0500 Message-Id: <482fe51f1671c1cd081039801b03db7ec0036332.1628873970.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SN4PR0201CA0071.namprd02.prod.outlook.com (2603:10b6:803:20::33) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SN4PR0201CA0071.namprd02.prod.outlook.com (2603:10b6:803:20::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.14 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: QSiiEMt0H/c7gMmp/6TvvoJgJwt3VKzqTO+Sz1e0KiqUiNoozOTK9rG7xuRKxFlSR5DkfcvRWFQawNUCx1/lNi1GHwvbMQV2K+CwRgBMTwcJAiFwjvqAPu1Y9ff/dd/zgpN36ofslpUgImr08FB+QreRwQV/PXZQTw01uiZoWTwEjRgBFZBlLCv4QujCe4KQ+YFV86eEPA9hJ8o6h3cfBRATclBxdZr5dNZJxE2lE/MXFpPhs4LAbymOJPf2k+GAIwmZhKhkTqZgOOKO+v0G4wk5BHUrESd+nUqjuoDMveLjUNWwUxoZSLKOf8Hombp9Rv0jABl5r3v1iUG8TCW7b8s/DV3FdojviDzvUgmatDwrLZa5jQswXL5kyML98K4SItsbDQBL3OupK0u+43lCiyIjcU2ow9CerddYHv5IfF+LceImHmQHS73rvxfxK5wu3agoynhFMMAWdfBCOr2qgEldxPVCyAYI4Fk32bGmf6mMYlB0edf/RuDB1adgU3hlefKWimIo4XOClRcmLTUuM8YYrJRYTBZLqBRBoErFlFAdVroDEEgVB5WGjgLJiMPT7GhJZcXKmBZRNk5vSgHUiYXTQlx53xg2SV5FCd+NJaN46uhiw+iPdFHsVcQiHvIGfAjltexx5rq4pV9zS/WqUrZfrI6vJnUY2UmZoBkrxLUNqZtWHE+9Swsi0yIj+BDGX2K7D988g8zAbDym5qhbVcS7biJDV6ubKATPI3UdGaHHVPMhaaBbpjElfa8ntfyApYplAw7MwD319uG8ccY5d3YcmG7qz5wB/utxaY7KSpz6tsbMeFt+wlTPF+wHx8BqIK1P7x53tQHil/0aQFlPxJrRgSTBVg0STIO184nXeoArV2IzM0uiNeh+L8VnKWibBIMZOa//mwRwbhu4+fT2E5jK3Tzulo80aLTaYwxGYRc7ws90mSOnFwW8z1f0+urKDovQ6cf81XIaPSmiZRoBDw6AqO62nrWH8OizyMnQaUMwo7Dy99R/XO77xQJZm0CIZyDwZ72+i6E466R3Xy0rtf9ualnc1qgdhtmW95dwoKMGLc+VuHvWKv655M3liKMdAusWgUkL5DO/vvn36riUhZIJxXDR9tjIV5ZEoG8lnvlJxEaEAymBdH7xHjW0F6jBHBPY7kfi/8gyIzo9xlozRgUuPyGvONR6eWI2jO5P60fm6vM1UysOLEbw9rYADNWZVGUanIzio0sSAItSNYsMo1uxwqxw0dF4I9WmOefnGh5IxDni5Wf0Oq0H0oSc5V1wMxI12M9swR73c7/ulxqx4EuA6Tl3SSvlAMRvbHvL0HLI2et/HTZX8Puq44lCicL9 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: b2fa8f5f-8482-4797-61f9-08d95e7bcbbe X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Aug 2021 17:00:04.2762 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Txupxb2+5R9WAVgwG22f1MQTDZ0epN+V2Tn5+tv+USGJFMK/9UpQr/RBjl1dyp3WoYm44TWBlTZbZGAbsLUokg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB5518 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org In prep for other protected virtualization technologies, introduce a generic helper function, prot_guest_has(), that can be used to check for specific protection attributes, like memory encryption. This is intended to eliminate having to add multiple technology-specific checks to the code (e.g. if (sev_active() || tdx_active())). Reviewed-by: Joerg Roedel Co-developed-by: Andi Kleen Signed-off-by: Andi Kleen Co-developed-by: Kuppuswamy Sathyanarayanan Signed-off-by: Kuppuswamy Sathyanarayanan Signed-off-by: Tom Lendacky Reviewed-by: Kuppuswamy Sathyanarayanan --- arch/Kconfig | 3 +++ include/linux/protected_guest.h | 35 +++++++++++++++++++++++++++++++++ 2 files changed, 38 insertions(+) create mode 100644 include/linux/protected_guest.h diff --git a/arch/Kconfig b/arch/Kconfig index 98db63496bab..bd4f60c581f1 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1231,6 +1231,9 @@ config RELR config ARCH_HAS_MEM_ENCRYPT bool +config ARCH_HAS_PROTECTED_GUEST + bool + config HAVE_SPARSE_SYSCALL_NR bool help diff --git a/include/linux/protected_guest.h b/include/linux/protected_guest.h new file mode 100644 index 000000000000..43d4dde94793 --- /dev/null +++ b/include/linux/protected_guest.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Protected Guest (and Host) Capability checks + * + * Copyright (C) 2021 Advanced Micro Devices, Inc. + * + * Author: Tom Lendacky + */ + +#ifndef _PROTECTED_GUEST_H +#define _PROTECTED_GUEST_H + +#ifndef __ASSEMBLY__ + +#include +#include + +#define PATTR_MEM_ENCRYPT 0 /* Encrypted memory */ +#define PATTR_HOST_MEM_ENCRYPT 1 /* Host encrypted memory */ +#define PATTR_GUEST_MEM_ENCRYPT 2 /* Guest encrypted memory */ +#define PATTR_GUEST_PROT_STATE 3 /* Guest encrypted state */ + +#ifdef CONFIG_ARCH_HAS_PROTECTED_GUEST + +#include + +#else /* !CONFIG_ARCH_HAS_PROTECTED_GUEST */ + +static inline bool prot_guest_has(unsigned int attr) { return false; } + +#endif /* CONFIG_ARCH_HAS_PROTECTED_GUEST */ + +#endif /* __ASSEMBLY__ */ + +#endif /* _PROTECTED_GUEST_H */ From patchwork Fri Aug 13 16:59:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12435903 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AFAA9C4338F for ; Fri, 13 Aug 2021 17:00:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9669960F51 for ; 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dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) by DM6PR12MB5518.namprd12.prod.outlook.com (2603:10b6:5:1b9::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.14; Fri, 13 Aug 2021 17:00:13 +0000 Received: from DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::d560:d21:cd59:9418]) by DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::d560:d21:cd59:9418%6]) with mapi id 15.20.4415.019; Fri, 13 Aug 2021 17:00:12 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Thomas Gleixner , Ingo Molnar , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Joerg Roedel Subject: [PATCH v2 03/12] x86/sev: Add an x86 version of prot_guest_has() Date: Fri, 13 Aug 2021 11:59:22 -0500 Message-Id: <7d55bac0cf2e73f53816bce3a3097877ed9663f3.1628873970.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SN7PR04CA0057.namprd04.prod.outlook.com (2603:10b6:806:120::32) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SN7PR04CA0057.namprd04.prod.outlook.com (2603:10b6:806:120::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.14 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: KxFT9aBqUdOzsjtqL3L6GpbGsQF1fa1ZZn+lzWo0PKEIfs0BfMV0QiHItHPZ8P5lGuGGM8DiVTZ2CnvwumPXgag6Y1yYTevBrBwcEe0lansLUVNnnydIj7BNdgf3huF3VaL4bQ6+E7U0/o7lcNTVvR8Yqdw6J3VJjfv4arXmnfoHtQSl/dWq3TLWQopKu007OmFFtq984BEG28+4IiMFbNGy01p5QMwsA9XY9Xb3DInKHwPvMlo8SWN4kD1a97WlbOFbUVxGjNFXEgI7EENGrMsVlxSJTEBlOJ64/tyNRr+wU+z9ZMYcVaVOzHUYsGL5XUNUeqqu3eyGQbG/7vc0T4g7Zp5DQ1Zw7IQx6LlzqGjyTGVx1bFD9Ak+DJ46docHjkjafJif40JL+c0dbOZ+srTY42xRi+c6h250IwqJWco53Cc+WSs15BdzJuw2rFOEAwjA/D6wwfstOq2dczZRg8/vO1513gXyv4FVtvFSs25L6bLXNgEnghp5f3oRVB9qz6k/Djv+JTlMgDZr6uncrYjqxFKkl4rwihCF4hsKNY8dXTC0qeanFK2CGH+Gwc5Sbzf+EVUeXjI0vZ9VV6AiIM+ZI34ZN4IFr+DCNTOIwKcUaaKPOcM/svQKOBi7dOleHBj2ApkyqTxjW1q3sAppE1cuyZdON/yqGWPczZ3+8Hj7hXlKl+bCoNRwkpH015SNhMeYSuvOw6uvdtPHO8jPMN1fJKHbgyNAWZGdmdvsr3+b1JnwGbRpBMElfuN6phyniCod0TUcbbAUf540Ni9NsDPUheILUaQCXh0bxni4NZJpCR9lfyOVf5rV3MXYUOPdCV3BRZo+fRhPpzVvRFetXGiO7nkIdymSNmmrN1GpzTicVXryHqJtTbk0+IyhEdOdtQVyW8lWSNfh5MsJS5qwzEn28M9VcOQ5gdjPk7SkpiHWneEYb78zrB5EIzlqaE4eQc9MgO0fb1Xwsl716ojivbCjSe9olaHRfHWrXge66CSqOdxO7dm23qp1FrPH3xCqrVRaQwtnAOyx4zbgxjh3PTL+K4pph/Y6xWV11GBq8m6j0HsvudCTOqigrvGenZbIEXvV2ytn6xfHtvtpMlx9E5HttWdhvaqKhKkTwGEIS3T4yPC0moLgFGRyTmYMpELfpxq+4dNQH8Gv/65v4fqEenhZpKivDecLVIuvRg372Rmt1KrRsyptJ6/djbeaVOiT3JHgs9GHH5bp5dlGqLBy6tDwjDX4mOxfgmcqZZyDJfNUEBTE1r2OF6bc1+KP1RiK4SgpStrPvJkobuSbhRvPgXsrGWy9bK+1bT7uS+S77rx/tRAHEPJAC8JPNUX5KnUj X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: b5f97b9c-957b-4214-04ff-08d95e7bd0d6 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Aug 2021 17:00:12.8296 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: mgJH5nvaD3AfbaqDT83Kpjzld6tRalsn09ncBpTYhmmh66wJ4mCI4bJ3NWpLx/lLSYTIc0J0vq6YzFW8Jv5GOg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB5518 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Introduce an x86 version of the prot_guest_has() function. This will be used in the more generic x86 code to replace vendor specific calls like sev_active(), etc. While the name suggests this is intended mainly for guests, it will also be used for host memory encryption checks in place of sme_active(). Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: Andy Lutomirski Cc: Peter Zijlstra Reviewed-by: Joerg Roedel Co-developed-by: Andi Kleen Signed-off-by: Andi Kleen Co-developed-by: Kuppuswamy Sathyanarayanan Signed-off-by: Kuppuswamy Sathyanarayanan Signed-off-by: Tom Lendacky --- arch/x86/Kconfig | 1 + arch/x86/include/asm/mem_encrypt.h | 2 ++ arch/x86/include/asm/protected_guest.h | 29 ++++++++++++++++++++++++++ arch/x86/mm/mem_encrypt.c | 25 ++++++++++++++++++++++ include/linux/protected_guest.h | 5 +++++ 5 files changed, 62 insertions(+) create mode 100644 arch/x86/include/asm/protected_guest.h diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 421fa9e38c60..82e5fb713261 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1514,6 +1514,7 @@ config AMD_MEM_ENCRYPT select ARCH_HAS_FORCE_DMA_UNENCRYPTED select INSTRUCTION_DECODER select ARCH_HAS_RESTRICTED_VIRTIO_MEMORY_ACCESS + select ARCH_HAS_PROTECTED_GUEST help Say yes to enable support for the encryption of system memory. This requires an AMD processor that supports Secure Memory diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index 9c80c68d75b5..a46d47662772 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -53,6 +53,7 @@ void __init sev_es_init_vc_handling(void); bool sme_active(void); bool sev_active(void); bool sev_es_active(void); +bool amd_prot_guest_has(unsigned int attr); #define __bss_decrypted __section(".bss..decrypted") @@ -78,6 +79,7 @@ static inline void sev_es_init_vc_handling(void) { } static inline bool sme_active(void) { return false; } static inline bool sev_active(void) { return false; } static inline bool sev_es_active(void) { return false; } +static inline bool amd_prot_guest_has(unsigned int attr) { return false; } static inline int __init early_set_memory_decrypted(unsigned long vaddr, unsigned long size) { return 0; } diff --git a/arch/x86/include/asm/protected_guest.h b/arch/x86/include/asm/protected_guest.h new file mode 100644 index 000000000000..51e4eefd9542 --- /dev/null +++ b/arch/x86/include/asm/protected_guest.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Protected Guest (and Host) Capability checks + * + * Copyright (C) 2021 Advanced Micro Devices, Inc. + * + * Author: Tom Lendacky + */ + +#ifndef _X86_PROTECTED_GUEST_H +#define _X86_PROTECTED_GUEST_H + +#include + +#ifndef __ASSEMBLY__ + +static inline bool prot_guest_has(unsigned int attr) +{ +#ifdef CONFIG_AMD_MEM_ENCRYPT + if (sme_me_mask) + return amd_prot_guest_has(attr); +#endif + + return false; +} + +#endif /* __ASSEMBLY__ */ + +#endif /* _X86_PROTECTED_GUEST_H */ diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index ff08dc463634..edc67ddf065d 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -389,6 +390,30 @@ bool noinstr sev_es_active(void) return sev_status & MSR_AMD64_SEV_ES_ENABLED; } +bool amd_prot_guest_has(unsigned int attr) +{ + switch (attr) { + case PATTR_MEM_ENCRYPT: + return sme_me_mask != 0; + + case PATTR_SME: + case PATTR_HOST_MEM_ENCRYPT: + return sme_active(); + + case PATTR_SEV: + case PATTR_GUEST_MEM_ENCRYPT: + return sev_active(); + + case PATTR_SEV_ES: + case PATTR_GUEST_PROT_STATE: + return sev_es_active(); + + default: + return false; + } +} +EXPORT_SYMBOL_GPL(amd_prot_guest_has); + /* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */ bool force_dma_unencrypted(struct device *dev) { diff --git a/include/linux/protected_guest.h b/include/linux/protected_guest.h index 43d4dde94793..5ddef1b6a2ea 100644 --- a/include/linux/protected_guest.h +++ b/include/linux/protected_guest.h @@ -20,6 +20,11 @@ #define PATTR_GUEST_MEM_ENCRYPT 2 /* Guest encrypted memory */ #define PATTR_GUEST_PROT_STATE 3 /* Guest encrypted state */ +/* 0x800 - 0x8ff reserved for AMD */ +#define PATTR_SME 0x800 +#define PATTR_SEV 0x801 +#define PATTR_SEV_ES 0x802 + #ifdef CONFIG_ARCH_HAS_PROTECTED_GUEST #include From patchwork Fri Aug 13 16:59:23 2021 Content-Type: text/plain; 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Fri, 13 Aug 2021 17:00:21 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras Subject: [PATCH v2 04/12] powerpc/pseries/svm: Add a powerpc version of prot_guest_has() Date: Fri, 13 Aug 2021 11:59:23 -0500 Message-Id: <000f627ce20c6504dd8d118d85bd69e7717b752f.1628873970.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SA0PR11CA0100.namprd11.prod.outlook.com (2603:10b6:806:d1::15) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SA0PR11CA0100.namprd11.prod.outlook.com (2603:10b6:806:d1::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.17 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: co/jy0FU9OZZPjQPiXPlHdwTIioZtB+0e7VWEGI9UYLUnE+4eh4wtxWPA1mGUXQIMesbYMFDDWCSgdc3l0pXWhKMTSrG4ocP9WWIFufkSnGNCJzZ/k9WYEG5PM04wTK7rPo0aqOuSJLZn/A5gSJcR1AO6gte755ENRmi6bn+NoTgDAntoVf1Y0O+xK1UT5sD8HQnKwq0BICObSKjcThZ1xnNHy5mZQUaqlL1XMkZ6aI8FJBz+of5XGXGWxmrV2MKxat4ySeKdyhNe4d/qJRJlLGaOElGmN5jiaF4JRcT2kusGpjbwfFaxMzz9akJxIbia4KdIC8MH3XTwny1g48OTmN0THOwxHiP1eyUx0yqcN+Z+xgsWKmeVoe96PzPvR6ez0V6vNJiFWVmdrzTmDKRMRATAaTDxGNfLBGPatac91jE6ux1wt9b/BE32r3y1KVnf2zi1F4DnJG4Is4AbXM8L0itrplb8fVBVamWiG0Re6LD9OpOdnC2fLAo6cU8BdN72xQY0V/bxKtK6EdW6fKXY3gGrBSccbJWizA/tB/JlZKH4LT1LZsf6Qu1OP15MKDdRihy8jpfdAwY4/ZA9yZBZ2uKi1HvEt2TlXpWWAs2EMaPJASFsHQme9KPDDw7l4vWE5D8EAEwxmGSkpjnXFWdCErEggUaB67A8z+PFbrfD7VjZr76R7nTdQESla+MiW+4yG2Feca/oQi4IyZ+vW17Q/6fVXKmPSunLfPvA3TnUn55UKZGHhn0iXqweP6y1dkSG8eK0ca533bxz90vtx8x7mrrD2MSpxvHVm8Kr4bN7v/tgQ1ECbZJ+y8wJVYy4QlHefwcFaTOJ4Kw2TFuCj3vBUVZ6CfxRXlFoJHXYzmkYm7qyU2sqmtpeVZKlwyK/hZnV9jr6q8IRlSxM4UKhhNL/1Y3JJOAwK6BInMInBGDc2/UwThZVWLj6UrCQpP19LuDkfP3PSapX2SqoffFbtTneOopIBtW5vp6oBd8OdyNxFW4c1PKG37t+5q10ZiUOm4572FByc77RCbdnyQUGWjrT8g6I7WFmORWQxfDiOHMiS+E8DDFm4nh8hLVGuiSruQ83IJj9XEHd6nWQaklUvnsPTWTcdaH0Bl48UTzwzOOCfJitN8sKAYqUZbF1IeETSLVbOdRHdts6Q8AzDJxg6fVFs1DsMeHWUoj/ErnXF5B7nHqZhNfwB/BEG16+r/GGDm5UabMJ8TNEcr0mpLl8xX6GYABOhNUSZ8SLnBnaFPkHRKRJUlm5KWezfEJanVgyLCRZKPIsQIOLPpLSw3uAns76i+NOhAiwKfoks2jj8yNePnJb5peZWngkO+Bm1KiuiXj X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6bce5eff-be55-45d7-dbbb-08d95e7bd5e9 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Aug 2021 17:00:21.3463 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: WqOAYCkbdSu6ytyOLP1tIRY5qvQs3lxBTGCT65o9ueikarKZb5dV+FsMz+OhuldzCP+naJUQwedpRL3RGpKHHQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB5535 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Introduce a powerpc version of the prot_guest_has() function. This will be used to replace the powerpc mem_encrypt_active() implementation, so the implementation will initially only support the PATTR_MEM_ENCRYPT attribute. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Signed-off-by: Tom Lendacky Acked-by: Michael Ellerman --- arch/powerpc/include/asm/protected_guest.h | 30 ++++++++++++++++++++++ arch/powerpc/platforms/pseries/Kconfig | 1 + 2 files changed, 31 insertions(+) create mode 100644 arch/powerpc/include/asm/protected_guest.h diff --git a/arch/powerpc/include/asm/protected_guest.h b/arch/powerpc/include/asm/protected_guest.h new file mode 100644 index 000000000000..ce55c2c7e534 --- /dev/null +++ b/arch/powerpc/include/asm/protected_guest.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Protected Guest (and Host) Capability checks + * + * Copyright (C) 2021 Advanced Micro Devices, Inc. + * + * Author: Tom Lendacky + */ + +#ifndef _POWERPC_PROTECTED_GUEST_H +#define _POWERPC_PROTECTED_GUEST_H + +#include + +#ifndef __ASSEMBLY__ + +static inline bool prot_guest_has(unsigned int attr) +{ + switch (attr) { + case PATTR_MEM_ENCRYPT: + return is_secure_guest(); + + default: + return false; + } +} + +#endif /* __ASSEMBLY__ */ + +#endif /* _POWERPC_PROTECTED_GUEST_H */ diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig index 5e037df2a3a1..8ce5417d6feb 100644 --- a/arch/powerpc/platforms/pseries/Kconfig +++ b/arch/powerpc/platforms/pseries/Kconfig @@ -159,6 +159,7 @@ config PPC_SVM select SWIOTLB select ARCH_HAS_MEM_ENCRYPT select ARCH_HAS_FORCE_DMA_UNENCRYPTED + select ARCH_HAS_PROTECTED_GUEST help There are certain POWER platforms which support secure guests using the Protected Execution Facility, with the help of an Ultravisor From patchwork Fri Aug 13 16:59:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12435905 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE2D0C4338F for ; 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If future support is added for other memory encryption technologies, the use of PATTR_HOST_MEM_ENCRYPT can be updated, as required, to use PATTR_SME. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: Andy Lutomirski Cc: Peter Zijlstra Cc: Joerg Roedel Cc: Will Deacon Reviewed-by: Joerg Roedel Signed-off-by: Tom Lendacky --- arch/x86/include/asm/kexec.h | 2 +- arch/x86/include/asm/mem_encrypt.h | 2 -- arch/x86/kernel/machine_kexec_64.c | 3 ++- arch/x86/kernel/pci-swiotlb.c | 9 ++++----- arch/x86/kernel/relocate_kernel_64.S | 2 +- arch/x86/mm/ioremap.c | 6 +++--- arch/x86/mm/mem_encrypt.c | 10 +++++----- arch/x86/mm/mem_encrypt_identity.c | 3 ++- arch/x86/realmode/init.c | 5 +++-- drivers/iommu/amd/init.c | 7 ++++--- 10 files changed, 25 insertions(+), 24 deletions(-) diff --git a/arch/x86/include/asm/kexec.h b/arch/x86/include/asm/kexec.h index 0a6e34b07017..11b7c06e2828 100644 --- a/arch/x86/include/asm/kexec.h +++ b/arch/x86/include/asm/kexec.h @@ -129,7 +129,7 @@ relocate_kernel(unsigned long indirection_page, unsigned long page_list, unsigned long start_address, unsigned int preserve_context, - unsigned int sme_active); + unsigned int host_mem_enc_active); #endif #define ARCH_HAS_KIMAGE_ARCH diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index a46d47662772..956338406cec 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -50,7 +50,6 @@ void __init mem_encrypt_free_decrypted_mem(void); void __init mem_encrypt_init(void); void __init sev_es_init_vc_handling(void); -bool sme_active(void); bool sev_active(void); bool sev_es_active(void); bool amd_prot_guest_has(unsigned int attr); @@ -76,7 +75,6 @@ static inline void __init sme_encrypt_kernel(struct boot_params *bp) { } static inline void __init sme_enable(struct boot_params *bp) { } static inline void sev_es_init_vc_handling(void) { } -static inline bool sme_active(void) { return false; } static inline bool sev_active(void) { return false; } static inline bool sev_es_active(void) { return false; } static inline bool amd_prot_guest_has(unsigned int attr) { return false; } diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c index 131f30fdcfbd..8e7b517ad738 100644 --- a/arch/x86/kernel/machine_kexec_64.c +++ b/arch/x86/kernel/machine_kexec_64.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -358,7 +359,7 @@ void machine_kexec(struct kimage *image) (unsigned long)page_list, image->start, image->preserve_context, - sme_active()); + prot_guest_has(PATTR_HOST_MEM_ENCRYPT)); #ifdef CONFIG_KEXEC_JUMP if (image->preserve_context) diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c index c2cfa5e7c152..bd9a9cfbc9a2 100644 --- a/arch/x86/kernel/pci-swiotlb.c +++ b/arch/x86/kernel/pci-swiotlb.c @@ -6,7 +6,7 @@ #include #include #include -#include +#include #include #include @@ -45,11 +45,10 @@ int __init pci_swiotlb_detect_4gb(void) swiotlb = 1; /* - * If SME is active then swiotlb will be set to 1 so that bounce - * buffers are allocated and used for devices that do not support - * the addressing range required for the encryption mask. + * Set swiotlb to 1 so that bounce buffers are allocated and used for + * devices that can't support DMA to encrypted memory. */ - if (sme_active()) + if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) swiotlb = 1; return swiotlb; diff --git a/arch/x86/kernel/relocate_kernel_64.S b/arch/x86/kernel/relocate_kernel_64.S index c53271aebb64..c8fe74a28143 100644 --- a/arch/x86/kernel/relocate_kernel_64.S +++ b/arch/x86/kernel/relocate_kernel_64.S @@ -47,7 +47,7 @@ SYM_CODE_START_NOALIGN(relocate_kernel) * %rsi page_list * %rdx start address * %rcx preserve_context - * %r8 sme_active + * %r8 host_mem_enc_active */ /* Save the CPU context, used for jumping back */ diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c index ccff76cedd8f..583afd54c7e1 100644 --- a/arch/x86/mm/ioremap.c +++ b/arch/x86/mm/ioremap.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include @@ -703,7 +703,7 @@ bool arch_memremap_can_ram_remap(resource_size_t phys_addr, unsigned long size, if (flags & MEMREMAP_DEC) return false; - if (sme_active()) { + if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) { if (memremap_is_setup_data(phys_addr, size) || memremap_is_efi_data(phys_addr, size)) return false; @@ -729,7 +729,7 @@ pgprot_t __init early_memremap_pgprot_adjust(resource_size_t phys_addr, encrypted_prot = true; - if (sme_active()) { + if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) { if (early_memremap_is_setup_data(phys_addr, size) || memremap_is_efi_data(phys_addr, size)) encrypted_prot = false; diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index edc67ddf065d..5635ca9a1fbe 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -144,7 +144,7 @@ void __init sme_unmap_bootdata(char *real_mode_data) struct boot_params *boot_data; unsigned long cmdline_paddr; - if (!sme_active()) + if (!amd_prot_guest_has(PATTR_SME)) return; /* Get the command line address before unmapping the real_mode_data */ @@ -164,7 +164,7 @@ void __init sme_map_bootdata(char *real_mode_data) struct boot_params *boot_data; unsigned long cmdline_paddr; - if (!sme_active()) + if (!amd_prot_guest_has(PATTR_SME)) return; __sme_early_map_unmap_mem(real_mode_data, sizeof(boot_params), true); @@ -378,7 +378,7 @@ bool sev_active(void) return sev_status & MSR_AMD64_SEV_ENABLED; } -bool sme_active(void) +static bool sme_active(void) { return sme_me_mask && !sev_active(); } @@ -428,7 +428,7 @@ bool force_dma_unencrypted(struct device *dev) * device does not support DMA to addresses that include the * encryption mask. */ - if (sme_active()) { + if (amd_prot_guest_has(PATTR_SME)) { u64 dma_enc_mask = DMA_BIT_MASK(__ffs64(sme_me_mask)); u64 dma_dev_mask = min_not_zero(dev->coherent_dma_mask, dev->bus_dma_limit); @@ -469,7 +469,7 @@ static void print_mem_encrypt_feature_info(void) pr_info("AMD Memory Encryption Features active:"); /* Secure Memory Encryption */ - if (sme_active()) { + if (amd_prot_guest_has(PATTR_SME)) { /* * SME is mutually exclusive with any of the SEV * features below. diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c index 470b20208430..088c8ab7dcc1 100644 --- a/arch/x86/mm/mem_encrypt_identity.c +++ b/arch/x86/mm/mem_encrypt_identity.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include @@ -287,7 +288,7 @@ void __init sme_encrypt_kernel(struct boot_params *bp) unsigned long pgtable_area_len; unsigned long decrypted_base; - if (!sme_active()) + if (!prot_guest_has(PATTR_SME)) return; /* diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c index 6534c92d0f83..2109ae569c67 100644 --- a/arch/x86/realmode/init.c +++ b/arch/x86/realmode/init.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include @@ -44,7 +45,7 @@ void __init reserve_real_mode(void) static void sme_sev_setup_real_mode(struct trampoline_header *th) { #ifdef CONFIG_AMD_MEM_ENCRYPT - if (sme_active()) + if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) th->flags |= TH_FLAGS_SME_ACTIVE; if (sev_es_active()) { @@ -81,7 +82,7 @@ static void __init setup_real_mode(void) * decrypted memory in order to bring up other processors * successfully. This is not needed for SEV. */ - if (sme_active()) + if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) set_memory_decrypted((unsigned long)base, size >> PAGE_SHIFT); memcpy(base, real_mode_blob, size); diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c index 46280e6e1535..05e770e3e631 100644 --- a/drivers/iommu/amd/init.c +++ b/drivers/iommu/amd/init.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include @@ -965,7 +965,7 @@ static bool copy_device_table(void) pr_err("The address of old device table is above 4G, not trustworthy!\n"); return false; } - old_devtb = (sme_active() && is_kdump_kernel()) + old_devtb = (prot_guest_has(PATTR_HOST_MEM_ENCRYPT) && is_kdump_kernel()) ? (__force void *)ioremap_encrypted(old_devtb_phys, dev_table_size) : memremap(old_devtb_phys, dev_table_size, MEMREMAP_WB); @@ -3022,7 +3022,8 @@ static int __init amd_iommu_init(void) static bool amd_iommu_sme_check(void) { - if (!sme_active() || (boot_cpu_data.x86 != 0x17)) + if (!prot_guest_has(PATTR_HOST_MEM_ENCRYPT) || + (boot_cpu_data.x86 != 0x17)) return true; /* For Fam17h, a specific level of support is required */ From patchwork Fri Aug 13 16:59:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12435909 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C9E7C43216 for ; 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dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) by DM4PR12MB5341.namprd12.prod.outlook.com (2603:10b6:5:39e::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.16; Fri, 13 Aug 2021 17:00:38 +0000 Received: from DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::d560:d21:cd59:9418]) by DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::d560:d21:cd59:9418%6]) with mapi id 15.20.4415.019; Fri, 13 Aug 2021 17:00:38 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Thomas Gleixner , Ingo Molnar , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Ard Biesheuvel , Joerg Roedel Subject: [PATCH v2 06/12] x86/sev: Replace occurrences of sev_active() with prot_guest_has() Date: Fri, 13 Aug 2021 11:59:25 -0500 Message-Id: <2b3a8fc4659f2e7617399cecdcca549e0fa1dcb7.1628873970.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SA9PR13CA0177.namprd13.prod.outlook.com (2603:10b6:806:28::32) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SA9PR13CA0177.namprd13.prod.outlook.com (2603:10b6:806:28::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4436.11 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: nkPUED4PQem939rIfYt9QKmg4GV8cGqwY5gzWD5abGADfoMkQxGaxMH2AJK1T5vnNIvm5FgXQyMhlvYAth35o4VkIlL1+AfJm42jlctnBquLfJjJw3DwMgt4gvND+frYIg99cxJJxanSXhKG2s/REaOOhT/LbZjTaLemy68fHhQXv0A+BXRRAYdPdjnsc/gJTXQFKITSi6YZ+BGdGPhliGSPT3LuWMQE7Y9lO+he0yrVPUQZkZch8PLRJW+Env7BQspt2xwWpdynwPIQvOo6RWKu5RxaqiyvkwC8RQYbOJzNzXbzJ7a35i+q5rg3honOLgndUuEdMtF79dqRNmwpbkEv8o6aYqYoOMpo2nj36N3HkCHXU7eyhfErxP0hw6nMFee5eA8PHyUoiCEm5PligJnkDUaGnPHQdO0kcAlJAOVONSG5EVsMLDOC4AyoLZcnDrxsasXRKKkthGYliZ++w2k68I4kM0xSwiFJ56dSBdrVRVkSpfYSH4Daa0gFbAmoa6f3jWu9fzHQR5tIM48wpNFEnNNRuah4aB+HrstekQuDABXHri6SnLUbQQFxunIxSYPzPllbZUEoqe+LlZES0VhCFNaFcp1YMmjInWU0DD+6y937eJ6AEBspeQtssAl24q5TDx4zr72xP7xv+ezK9IP75DL/3hVTm91P4yffkzlV0r+VPNQJh0MvA0dC+gdrz7vrqy8yrt+n0SYpE4FOFC0nwCfOQN9HuYp+az7YDzjtgC93u8pQ5TCHK94wdhhj6ISRm9vN39cxiRmQvJdHp3DtV4aC9Pqh3Sf4DmCkduTGPC1+DZb1dV/N4kRnh798U1SlaLcOKSKEprK9AVapdesLkxkRLGZCBv6dtf9K3emig1h/s56j9Y5lZNsl07rsQxlOrXFIO43Y4MZmdA0zn0AIOGRduxovyooLmpGNeFepE1NshD/rpoZGY6FKw3ISrnuZSz/U2AdGW0jT22Zda3gZzAiwNh+rcdhlJzSnuYGF29ONxP44Ps7Itu9Tk9PN2ePRJjPyoJixxn1v4NwASm83GhebeaIPP9OwbgncMPZye/Jex25PeaCgL71t+tikHwcGeKgwD/k3eQavvijPQwp8HFqDJY2EBWjbAqxWROlui/lKOFKCc7p1xmQhez5Xkb5IhhJEDBxajMIvU4a05LHj+YStMHHYCpivhaEK9oefRdsyiRLup7EWgS4XiowywGLoUzBrlPrJ1O/mwj5VZVFm8UrByQSFOjRKDfeQyqgmdUVDoSsr0f9rnGov8UWN1+iynuOn7jZthotvgBg9ItNTuBqkupMjNW1b7r34cIcBRLCjQYebMStExVBxA4F3 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4058df91-3bab-4a75-feca-08d95e7be029 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Aug 2021 17:00:38.5538 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: FdLd9GZpSesJTAsGb59ka5bBnNQvB8c5gDpYx7d34y1FtOJWswZLuEFvcZun+AhxjPtS4aVxBQlM5hfTAxywZw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5341 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Replace occurrences of sev_active() with the more generic prot_guest_has() using PATTR_GUEST_MEM_ENCRYPT, except for in arch/x86/mm/mem_encrypt*.c where PATTR_SEV will be used. If future support is added for other memory encryption technologies, the use of PATTR_GUEST_MEM_ENCRYPT can be updated, as required, to use PATTR_SEV. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: Andy Lutomirski Cc: Peter Zijlstra Cc: Ard Biesheuvel Reviewed-by: Joerg Roedel Signed-off-by: Tom Lendacky --- arch/x86/include/asm/mem_encrypt.h | 2 -- arch/x86/kernel/crash_dump_64.c | 4 +++- arch/x86/kernel/kvm.c | 3 ++- arch/x86/kernel/kvmclock.c | 4 ++-- arch/x86/kernel/machine_kexec_64.c | 16 ++++++++-------- arch/x86/kvm/svm/svm.c | 3 ++- arch/x86/mm/ioremap.c | 6 +++--- arch/x86/mm/mem_encrypt.c | 15 +++++++-------- arch/x86/platform/efi/efi_64.c | 9 +++++---- 9 files changed, 32 insertions(+), 30 deletions(-) diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index 956338406cec..7e25de37c148 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -50,7 +50,6 @@ void __init mem_encrypt_free_decrypted_mem(void); void __init mem_encrypt_init(void); void __init sev_es_init_vc_handling(void); -bool sev_active(void); bool sev_es_active(void); bool amd_prot_guest_has(unsigned int attr); @@ -75,7 +74,6 @@ static inline void __init sme_encrypt_kernel(struct boot_params *bp) { } static inline void __init sme_enable(struct boot_params *bp) { } static inline void sev_es_init_vc_handling(void) { } -static inline bool sev_active(void) { return false; } static inline bool sev_es_active(void) { return false; } static inline bool amd_prot_guest_has(unsigned int attr) { return false; } diff --git a/arch/x86/kernel/crash_dump_64.c b/arch/x86/kernel/crash_dump_64.c index 045e82e8945b..0cfe35f03e67 100644 --- a/arch/x86/kernel/crash_dump_64.c +++ b/arch/x86/kernel/crash_dump_64.c @@ -10,6 +10,7 @@ #include #include #include +#include static ssize_t __copy_oldmem_page(unsigned long pfn, char *buf, size_t csize, unsigned long offset, int userbuf, @@ -73,5 +74,6 @@ ssize_t copy_oldmem_page_encrypted(unsigned long pfn, char *buf, size_t csize, ssize_t elfcorehdr_read(char *buf, size_t count, u64 *ppos) { - return read_from_oldmem(buf, count, ppos, 0, sev_active()); + return read_from_oldmem(buf, count, ppos, 0, + prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)); } diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index a26643dc6bd6..9d08ad2f3faa 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -418,7 +419,7 @@ static void __init sev_map_percpu_data(void) { int cpu; - if (!sev_active()) + if (!prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) return; for_each_possible_cpu(cpu) { diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index ad273e5861c1..f7ba78a23dcd 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -16,9 +16,9 @@ #include #include #include +#include #include -#include #include #include @@ -232,7 +232,7 @@ static void __init kvmclock_init_mem(void) * hvclock is shared between the guest and the hypervisor, must * be mapped decrypted. */ - if (sev_active()) { + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) { r = set_memory_decrypted((unsigned long) hvclock_mem, 1UL << order); if (r) { diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c index 8e7b517ad738..66ff788b79c9 100644 --- a/arch/x86/kernel/machine_kexec_64.c +++ b/arch/x86/kernel/machine_kexec_64.c @@ -167,7 +167,7 @@ static int init_transition_pgtable(struct kimage *image, pgd_t *pgd) } pte = pte_offset_kernel(pmd, vaddr); - if (sev_active()) + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) prot = PAGE_KERNEL_EXEC; set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, prot)); @@ -207,7 +207,7 @@ static int init_pgtable(struct kimage *image, unsigned long start_pgtable) level4p = (pgd_t *)__va(start_pgtable); clear_page(level4p); - if (sev_active()) { + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) { info.page_flag |= _PAGE_ENC; info.kernpg_flag |= _PAGE_ENC; } @@ -570,12 +570,12 @@ void arch_kexec_unprotect_crashkres(void) */ int arch_kexec_post_alloc_pages(void *vaddr, unsigned int pages, gfp_t gfp) { - if (sev_active()) + if (!prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) return 0; /* - * If SME is active we need to be sure that kexec pages are - * not encrypted because when we boot to the new kernel the + * If host memory encryption is active we need to be sure that kexec + * pages are not encrypted because when we boot to the new kernel the * pages won't be accessed encrypted (initially). */ return set_memory_decrypted((unsigned long)vaddr, pages); @@ -583,12 +583,12 @@ int arch_kexec_post_alloc_pages(void *vaddr, unsigned int pages, gfp_t gfp) void arch_kexec_pre_free_pages(void *vaddr, unsigned int pages) { - if (sev_active()) + if (!prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) return; /* - * If SME is active we need to reset the pages back to being - * an encrypted mapping before freeing them. + * If host memory encryption is active we need to reset the pages back + * to being an encrypted mapping before freeing them. */ set_memory_encrypted((unsigned long)vaddr, pages); } diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index e8ccab50ebf6..b69f5ac622d5 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -457,7 +458,7 @@ static int has_svm(void) return 0; } - if (sev_active()) { + if (prot_guest_has(PATTR_SEV)) { pr_info("KVM is unsupported when running as an SEV guest\n"); return 0; } diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c index 583afd54c7e1..3ed0f28f12af 100644 --- a/arch/x86/mm/ioremap.c +++ b/arch/x86/mm/ioremap.c @@ -92,7 +92,7 @@ static unsigned int __ioremap_check_ram(struct resource *res) */ static unsigned int __ioremap_check_encrypted(struct resource *res) { - if (!sev_active()) + if (!prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) return 0; switch (res->desc) { @@ -112,7 +112,7 @@ static unsigned int __ioremap_check_encrypted(struct resource *res) */ static void __ioremap_check_other(resource_size_t addr, struct ioremap_desc *desc) { - if (!sev_active()) + if (!prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) return; if (!IS_ENABLED(CONFIG_EFI)) @@ -556,7 +556,7 @@ static bool memremap_should_map_decrypted(resource_size_t phys_addr, case E820_TYPE_NVS: case E820_TYPE_UNUSABLE: /* For SEV, these areas are encrypted */ - if (sev_active()) + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) break; fallthrough; diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index 5635ca9a1fbe..83bc928f529e 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -194,7 +194,7 @@ void __init sme_early_init(void) for (i = 0; i < ARRAY_SIZE(protection_map); i++) protection_map[i] = pgprot_encrypted(protection_map[i]); - if (sev_active()) + if (amd_prot_guest_has(PATTR_SEV)) swiotlb_force = SWIOTLB_FORCE; } @@ -203,7 +203,7 @@ void __init sev_setup_arch(void) phys_addr_t total_mem = memblock_phys_mem_size(); unsigned long size; - if (!sev_active()) + if (!amd_prot_guest_has(PATTR_SEV)) return; /* @@ -373,7 +373,7 @@ int __init early_set_memory_encrypted(unsigned long vaddr, unsigned long size) * up under SME the trampoline area cannot be encrypted, whereas under SEV * the trampoline area must be encrypted. */ -bool sev_active(void) +static bool sev_active(void) { return sev_status & MSR_AMD64_SEV_ENABLED; } @@ -382,7 +382,6 @@ static bool sme_active(void) { return sme_me_mask && !sev_active(); } -EXPORT_SYMBOL_GPL(sev_active); /* Needs to be called from non-instrumentable code */ bool noinstr sev_es_active(void) @@ -420,7 +419,7 @@ bool force_dma_unencrypted(struct device *dev) /* * For SEV, all DMA must be to unencrypted addresses. */ - if (sev_active()) + if (amd_prot_guest_has(PATTR_SEV)) return true; /* @@ -479,7 +478,7 @@ static void print_mem_encrypt_feature_info(void) } /* Secure Encrypted Virtualization */ - if (sev_active()) + if (amd_prot_guest_has(PATTR_SEV)) pr_cont(" SEV"); /* Encrypted Register State */ @@ -502,7 +501,7 @@ void __init mem_encrypt_init(void) * With SEV, we need to unroll the rep string I/O instructions, * but SEV-ES supports them through the #VC handler. */ - if (sev_active() && !sev_es_active()) + if (amd_prot_guest_has(PATTR_SEV) && !sev_es_active()) static_branch_enable(&sev_enable_key); print_mem_encrypt_feature_info(); @@ -510,6 +509,6 @@ void __init mem_encrypt_init(void) int arch_has_restricted_virtio_memory_access(void) { - return sev_active(); + return amd_prot_guest_has(PATTR_SEV); } EXPORT_SYMBOL_GPL(arch_has_restricted_virtio_memory_access); diff --git a/arch/x86/platform/efi/efi_64.c b/arch/x86/platform/efi/efi_64.c index 7515e78ef898..94737fcc1e21 100644 --- a/arch/x86/platform/efi/efi_64.c +++ b/arch/x86/platform/efi/efi_64.c @@ -33,7 +33,7 @@ #include #include #include -#include +#include #include #include @@ -284,7 +284,8 @@ static void __init __map_region(efi_memory_desc_t *md, u64 va) if (!(md->attribute & EFI_MEMORY_WB)) flags |= _PAGE_PCD; - if (sev_active() && md->type != EFI_MEMORY_MAPPED_IO) + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT) && + md->type != EFI_MEMORY_MAPPED_IO) flags |= _PAGE_ENC; pfn = md->phys_addr >> PAGE_SHIFT; @@ -390,7 +391,7 @@ static int __init efi_update_mem_attr(struct mm_struct *mm, efi_memory_desc_t *m if (!(md->attribute & EFI_MEMORY_RO)) pf |= _PAGE_RW; - if (sev_active()) + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) pf |= _PAGE_ENC; return efi_update_mappings(md, pf); @@ -438,7 +439,7 @@ void __init efi_runtime_update_mappings(void) (md->type != EFI_RUNTIME_SERVICES_CODE)) pf |= _PAGE_RW; - if (sev_active()) + if (prot_guest_has(PATTR_GUEST_MEM_ENCRYPT)) pf |= _PAGE_ENC; efi_update_mappings(md, pf); From patchwork Fri Aug 13 16:59:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12435911 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B13CC4338F for ; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: O+z6sArCNkmvuq1B8GmeZZr94DJ+LJ41tbhZAERdadQxupH31EuD4Qw0NcxMf41uuLLRNdm23pC9twbl0FzDQkM/52zSJ89gHE8DwsvNtLhKMtNciBRJDpIpOhnZqr/Ja15XUJIq3624p/s1V8T0tddBKPpEpngANdYpQQPhD0VLO/62pohC59ONDapb/AZ+2c3dlehrt6XhT3gzGxUG2GteUrXPEn4u5y5rXa+w36Y256AJRHWkWwv1XgF5cS0J6ZyB3l+EW7bTUEj+XT4MfUQiAyQciSglMNmNrFgOk4YN/2I12b+fX1YGeqa0tDTgZ3P4rJ4wb3TXJDrWZSc9EL/P+3mi+ByEOf0qJvZhmG9TWSULY8J34qV5bE8mjmQd1eyndvnhAsnZTm8v8J4Ds6EML1t7/bXyAAitqJLqlYm3awE736BFgDEMFtIXtwnuzGGantMx2kFUIrNvAVXUXSgvj/4huUT4SAcnE/1eu0U8FrGWn+mpvPBkwY2puaB6E986aBBWVQuC3J+M6hDPar9ooEcRvvy70Lw2nTbCmtLO8HBGLepNnxH/B48rQb8QrpiWmNiXD1ic1Nw1x2ACqRK7FRDQ+2e0R4xMm7sh8iJiFC0MfstsV3HGiOXVGG7fL6gdDifXsuQw6FhfLGlJDsyexsRW9GLfs8DfqLWGppeuXeoCUPUecZLPbVbi0NG1i3FavxBR1mdia+i0XerePxdjkpGHQF3P7NIc61l4DWOIr721x48FKj0v87g7jua+1xbgNCyg4ZFj2cSr8TN0ANymsH3c3QkPKtxsFHm2I3cPKozsSKkSjRiR9qc+P9Q+X9LjyIMehKy63Ag/oQ9vvLP+Js5Mo4aQ2TEMWHBIAvu4NPxutF3mNv0bPcDntnH35VPxrSlacgeuT0jW5C3VbrG2IxC6KvnQy9Hpt+fVQMreeXPv1mdtHPxFZ6Z3yQe9a+YDcRsKFqbW88JoJSTAWpqK7CBoiDR54/dQlc2v05AxwzI73vfjrV8FB1Ecm+qrKTOmpvQR9CNh0IWA2giXvA63MPXwDuqgqQEhklvMFx+NhBiQyjeanfgaexOFuRbrKKhWbVuyH6xTJaFu8wWeeOwiuHNkZVay19cu3YQVLBIMtH5DoiBkAjFL1mSJfqqr2Ng7/0cs9FRfpqYv0xFikyABEyD0SI59C0QghH104z4hQR4bUR6jWGQH+ZiP/O/EQrU/JaLoDW2EmEm7NUKKERadZEOGypnGwd3gzVtFa6A7aycki5k+fzoMKbF7b+WMV1WHpgWsDlVCCAYszgtlnF+gQKm7o9U6yFL57028PIrKe9pikYs1HYTcBZXNYy7h X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 11ba6adf-8653-42e6-4d33-08d95e7be537 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Aug 2021 17:00:47.0047 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: cNF5CDhDN7Y+Sj5vN0RvJOmG7fDWjeYVucQO7vg8NlZeRenoV0bfdWtVZsmtXeCxON9n5suSvwdSdnc9Tsrhjw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5341 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org Replace occurrences of sev_es_active() with the more generic prot_guest_has() using PATTR_GUEST_PROT_STATE, except for in arch/x86/kernel/sev*.c and arch/x86/mm/mem_encrypt*.c where PATTR_SEV_ES will be used. If future support is added for other memory encyrption techonologies, the use of PATTR_GUEST_PROT_STATE can be updated, as required, to specifically use PATTR_SEV_ES. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Signed-off-by: Tom Lendacky --- arch/x86/include/asm/mem_encrypt.h | 2 -- arch/x86/kernel/sev.c | 6 +++--- arch/x86/mm/mem_encrypt.c | 7 +++---- arch/x86/realmode/init.c | 3 +-- 4 files changed, 7 insertions(+), 11 deletions(-) diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index 7e25de37c148..797146e0cd6b 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -50,7 +50,6 @@ void __init mem_encrypt_free_decrypted_mem(void); void __init mem_encrypt_init(void); void __init sev_es_init_vc_handling(void); -bool sev_es_active(void); bool amd_prot_guest_has(unsigned int attr); #define __bss_decrypted __section(".bss..decrypted") @@ -74,7 +73,6 @@ static inline void __init sme_encrypt_kernel(struct boot_params *bp) { } static inline void __init sme_enable(struct boot_params *bp) { } static inline void sev_es_init_vc_handling(void) { } -static inline bool sev_es_active(void) { return false; } static inline bool amd_prot_guest_has(unsigned int attr) { return false; } static inline int __init diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c index a6895e440bc3..66a4ab9d95d7 100644 --- a/arch/x86/kernel/sev.c +++ b/arch/x86/kernel/sev.c @@ -11,7 +11,7 @@ #include /* For show_regs() */ #include -#include +#include #include #include #include @@ -615,7 +615,7 @@ int __init sev_es_efi_map_ghcbs(pgd_t *pgd) int cpu; u64 pfn; - if (!sev_es_active()) + if (!prot_guest_has(PATTR_SEV_ES)) return 0; pflags = _PAGE_NX | _PAGE_RW; @@ -774,7 +774,7 @@ void __init sev_es_init_vc_handling(void) BUILD_BUG_ON(offsetof(struct sev_es_runtime_data, ghcb_page) % PAGE_SIZE); - if (!sev_es_active()) + if (!prot_guest_has(PATTR_SEV_ES)) return; if (!sev_es_check_cpu_features()) diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index 83bc928f529e..38dfa84b77a1 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -383,8 +383,7 @@ static bool sme_active(void) return sme_me_mask && !sev_active(); } -/* Needs to be called from non-instrumentable code */ -bool noinstr sev_es_active(void) +static bool sev_es_active(void) { return sev_status & MSR_AMD64_SEV_ES_ENABLED; } @@ -482,7 +481,7 @@ static void print_mem_encrypt_feature_info(void) pr_cont(" SEV"); /* Encrypted Register State */ - if (sev_es_active()) + if (amd_prot_guest_has(PATTR_SEV_ES)) pr_cont(" SEV-ES"); pr_cont("\n"); @@ -501,7 +500,7 @@ void __init mem_encrypt_init(void) * With SEV, we need to unroll the rep string I/O instructions, * but SEV-ES supports them through the #VC handler. */ - if (amd_prot_guest_has(PATTR_SEV) && !sev_es_active()) + if (amd_prot_guest_has(PATTR_SEV) && !amd_prot_guest_has(PATTR_SEV_ES)) static_branch_enable(&sev_enable_key); print_mem_encrypt_feature_info(); diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c index 2109ae569c67..7711d0071f41 100644 --- a/arch/x86/realmode/init.c +++ b/arch/x86/realmode/init.c @@ -2,7 +2,6 @@ #include #include #include -#include #include #include @@ -48,7 +47,7 @@ static void sme_sev_setup_real_mode(struct trampoline_header *th) if (prot_guest_has(PATTR_HOST_MEM_ENCRYPT)) th->flags |= TH_FLAGS_SME_ACTIVE; - if (sev_es_active()) { + if (prot_guest_has(PATTR_GUEST_PROT_STATE)) { /* * Skip the call to verify_cpu() in secondary_startup_64 as it * will cause #VC exceptions when the AP can't handle them yet. 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Fri, 13 Aug 2021 17:00:56 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Thomas Gleixner , Ingo Molnar , Dave Hansen , Andy Lutomirski , Peter Zijlstra , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Will Deacon , Dave Young , Baoquan He Subject: [PATCH v2 08/12] treewide: Replace the use of mem_encrypt_active() with prot_guest_has() Date: Fri, 13 Aug 2021 11:59:27 -0500 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SA9PR13CA0084.namprd13.prod.outlook.com (2603:10b6:806:23::29) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SA9PR13CA0084.namprd13.prod.outlook.com (2603:10b6:806:23::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4436.9 via Frontend Transport; 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Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: Andy Lutomirski Cc: Peter Zijlstra Cc: David Airlie Cc: Daniel Vetter Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Thomas Zimmermann Cc: VMware Graphics Cc: Joerg Roedel Cc: Will Deacon Cc: Dave Young Cc: Baoquan He Signed-off-by: Tom Lendacky --- arch/x86/kernel/head64.c | 4 ++-- arch/x86/mm/ioremap.c | 4 ++-- arch/x86/mm/mem_encrypt.c | 5 ++--- arch/x86/mm/pat/set_memory.c | 3 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 +++- drivers/gpu/drm/drm_cache.c | 4 ++-- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 4 ++-- drivers/gpu/drm/vmwgfx/vmwgfx_msg.c | 6 +++--- drivers/iommu/amd/iommu.c | 3 ++- drivers/iommu/amd/iommu_v2.c | 3 ++- drivers/iommu/iommu.c | 3 ++- fs/proc/vmcore.c | 6 +++--- kernel/dma/swiotlb.c | 4 ++-- 13 files changed, 29 insertions(+), 24 deletions(-) diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index de01903c3735..cafed6456d45 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include @@ -285,7 +285,7 @@ unsigned long __head __startup_64(unsigned long physaddr, * there is no need to zero it after changing the memory encryption * attribute. */ - if (mem_encrypt_active()) { + if (prot_guest_has(PATTR_MEM_ENCRYPT)) { vaddr = (unsigned long)__start_bss_decrypted; vaddr_end = (unsigned long)__end_bss_decrypted; for (; vaddr < vaddr_end; vaddr += PMD_SIZE) { diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c index 3ed0f28f12af..7f012fc1b600 100644 --- a/arch/x86/mm/ioremap.c +++ b/arch/x86/mm/ioremap.c @@ -694,7 +694,7 @@ static bool __init early_memremap_is_setup_data(resource_size_t phys_addr, bool arch_memremap_can_ram_remap(resource_size_t phys_addr, unsigned long size, unsigned long flags) { - if (!mem_encrypt_active()) + if (!prot_guest_has(PATTR_MEM_ENCRYPT)) return true; if (flags & MEMREMAP_ENC) @@ -724,7 +724,7 @@ pgprot_t __init early_memremap_pgprot_adjust(resource_size_t phys_addr, { bool encrypted_prot; - if (!mem_encrypt_active()) + if (!prot_guest_has(PATTR_MEM_ENCRYPT)) return prot; encrypted_prot = true; diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index 38dfa84b77a1..69aed9935b5e 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -364,8 +364,7 @@ int __init early_set_memory_encrypted(unsigned long vaddr, unsigned long size) /* * SME and SEV are very similar but they are not the same, so there are * times that the kernel will need to distinguish between SME and SEV. The - * sme_active() and sev_active() functions are used for this. When a - * distinction isn't needed, the mem_encrypt_active() function can be used. + * sme_active() and sev_active() functions are used for this. * * The trampoline code is a good example for this requirement. Before * paging is activated, SME will access all memory as decrypted, but SEV @@ -451,7 +450,7 @@ void __init mem_encrypt_free_decrypted_mem(void) * The unused memory range was mapped decrypted, change the encryption * attribute from decrypted to encrypted before freeing it. */ - if (mem_encrypt_active()) { + if (amd_prot_guest_has(PATTR_MEM_ENCRYPT)) { r = set_memory_encrypted(vaddr, npages); if (r) { pr_warn("failed to free unused decrypted pages\n"); diff --git a/arch/x86/mm/pat/set_memory.c b/arch/x86/mm/pat/set_memory.c index ad8a5c586a35..6925f2bb4be1 100644 --- a/arch/x86/mm/pat/set_memory.c +++ b/arch/x86/mm/pat/set_memory.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -1986,7 +1987,7 @@ static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc) int ret; /* Nothing to do if memory encryption is not active */ - if (!mem_encrypt_active()) + if (!prot_guest_has(PATTR_MEM_ENCRYPT)) return 0; /* Should not be working on unaligned addresses */ diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 971c5b8e75dc..21c1e3056070 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -38,6 +38,7 @@ #include #include #include +#include #include "amdgpu.h" #include "amdgpu_irq.h" @@ -1250,7 +1251,8 @@ static int amdgpu_pci_probe(struct pci_dev *pdev, * however, SME requires an indirect IOMMU mapping because the encryption * bit is beyond the DMA mask of the chip. */ - if (mem_encrypt_active() && ((flags & AMD_ASIC_MASK) == CHIP_RAVEN)) { + if (prot_guest_has(PATTR_MEM_ENCRYPT) && + ((flags & AMD_ASIC_MASK) == CHIP_RAVEN)) { dev_info(&pdev->dev, "SME is not compatible with RAVEN\n"); return -ENOTSUPP; diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c index 546599f19a93..4d01d44012fd 100644 --- a/drivers/gpu/drm/drm_cache.c +++ b/drivers/gpu/drm/drm_cache.c @@ -31,7 +31,7 @@ #include #include #include -#include +#include #include #include @@ -204,7 +204,7 @@ bool drm_need_swiotlb(int dma_bits) * Enforce dma_alloc_coherent when memory encryption is active as well * for the same reasons as for Xen paravirtual hosts. */ - if (mem_encrypt_active()) + if (prot_guest_has(PATTR_MEM_ENCRYPT)) return true; for (tmp = iomem_resource.child; tmp; tmp = tmp->sibling) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index 45aeeca9b8f6..498f52ba08ea 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c @@ -29,7 +29,7 @@ #include #include #include -#include +#include #include #include @@ -633,7 +633,7 @@ static int vmw_dma_select_mode(struct vmw_private *dev_priv) [vmw_dma_map_bind] = "Giving up DMA mappings early."}; /* TTM currently doesn't fully support SEV encryption. */ - if (mem_encrypt_active()) + if (prot_guest_has(PATTR_MEM_ENCRYPT)) return -EINVAL; if (vmw_force_coherent) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c b/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c index 3d08f5700bdb..0c70573d3dce 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include @@ -153,7 +153,7 @@ static unsigned long vmw_port_hb_out(struct rpc_channel *channel, unsigned long msg_len = strlen(msg); /* HB port can't access encrypted memory. */ - if (hb && !mem_encrypt_active()) { + if (hb && !prot_guest_has(PATTR_MEM_ENCRYPT)) { unsigned long bp = channel->cookie_high; si = (uintptr_t) msg; @@ -208,7 +208,7 @@ static unsigned long vmw_port_hb_in(struct rpc_channel *channel, char *reply, unsigned long si, di, eax, ebx, ecx, edx; /* HB port can't access encrypted memory */ - if (hb && !mem_encrypt_active()) { + if (hb && !prot_guest_has(PATTR_MEM_ENCRYPT)) { unsigned long bp = channel->cookie_low; si = channel->cookie_high; diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 811a49a95d04..def63a8deab4 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include @@ -2178,7 +2179,7 @@ static int amd_iommu_def_domain_type(struct device *dev) * active, because some of those devices (AMD GPUs) don't have the * encryption bit in their DMA-mask and require remapping. */ - if (!mem_encrypt_active() && dev_data->iommu_v2) + if (!prot_guest_has(PATTR_MEM_ENCRYPT) && dev_data->iommu_v2) return IOMMU_DOMAIN_IDENTITY; return 0; diff --git a/drivers/iommu/amd/iommu_v2.c b/drivers/iommu/amd/iommu_v2.c index f8d4ad421e07..ac359bc98523 100644 --- a/drivers/iommu/amd/iommu_v2.c +++ b/drivers/iommu/amd/iommu_v2.c @@ -16,6 +16,7 @@ #include #include #include +#include #include "amd_iommu.h" @@ -741,7 +742,7 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids) * When memory encryption is active the device is likely not in a * direct-mapped domain. Forbid using IOMMUv2 functionality for now. */ - if (mem_encrypt_active()) + if (prot_guest_has(PATTR_MEM_ENCRYPT)) return -ENODEV; if (!amd_iommu_v2_supported()) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 5419c4b9f27a..ddbedb1b5b6b 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -23,6 +23,7 @@ #include #include #include +#include #include static struct kset *iommu_group_kset; @@ -127,7 +128,7 @@ static int __init iommu_subsys_init(void) else iommu_set_default_translated(false); - if (iommu_default_passthrough() && mem_encrypt_active()) { + if (iommu_default_passthrough() && prot_guest_has(PATTR_MEM_ENCRYPT)) { pr_info("Memory encryption detected - Disabling default IOMMU Passthrough\n"); iommu_set_default_translated(false); } diff --git a/fs/proc/vmcore.c b/fs/proc/vmcore.c index 9a15334da208..b466f543dc00 100644 --- a/fs/proc/vmcore.c +++ b/fs/proc/vmcore.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include #include "internal.h" @@ -177,7 +177,7 @@ ssize_t __weak elfcorehdr_read(char *buf, size_t count, u64 *ppos) */ ssize_t __weak elfcorehdr_read_notes(char *buf, size_t count, u64 *ppos) { - return read_from_oldmem(buf, count, ppos, 0, mem_encrypt_active()); + return read_from_oldmem(buf, count, ppos, 0, prot_guest_has(PATTR_MEM_ENCRYPT)); } /* @@ -378,7 +378,7 @@ static ssize_t __read_vmcore(char *buffer, size_t buflen, loff_t *fpos, buflen); start = m->paddr + *fpos - m->offset; tmp = read_from_oldmem(buffer, tsz, &start, - userbuf, mem_encrypt_active()); + userbuf, prot_guest_has(PATTR_MEM_ENCRYPT)); if (tmp < 0) return tmp; buflen -= tsz; diff --git a/kernel/dma/swiotlb.c b/kernel/dma/swiotlb.c index e50df8d8f87e..2e8dee23a624 100644 --- a/kernel/dma/swiotlb.c +++ b/kernel/dma/swiotlb.c @@ -34,7 +34,7 @@ #include #include #include -#include +#include #include #ifdef CONFIG_DEBUG_FS #include @@ -515,7 +515,7 @@ phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr, if (!mem) panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer"); - if (mem_encrypt_active()) + if (prot_guest_has(PATTR_MEM_ENCRYPT)) pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n"); 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Fri, 13 Aug 2021 17:01:05 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Joerg Roedel Subject: [PATCH v2 09/12] mm: Remove the now unused mem_encrypt_active() function Date: Fri, 13 Aug 2021 11:59:28 -0500 Message-Id: <83e4a62108eec470ac0b3f2510b982794d2b7989.1628873970.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SA9PR13CA0145.namprd13.prod.outlook.com (2603:10b6:806:27::30) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SA9PR13CA0145.namprd13.prod.outlook.com (2603:10b6:806:27::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4436.9 via Frontend Transport; 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Reviewed-by: Joerg Roedel Signed-off-by: Tom Lendacky --- include/linux/mem_encrypt.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/include/linux/mem_encrypt.h b/include/linux/mem_encrypt.h index 5c4a18a91f89..ae4526389261 100644 --- a/include/linux/mem_encrypt.h +++ b/include/linux/mem_encrypt.h @@ -16,10 +16,6 @@ #include -#else /* !CONFIG_ARCH_HAS_MEM_ENCRYPT */ - -static inline bool mem_encrypt_active(void) { return false; } - #endif /* CONFIG_ARCH_HAS_MEM_ENCRYPT */ #ifdef CONFIG_AMD_MEM_ENCRYPT From patchwork Fri Aug 13 16:59:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12435917 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 486C0C00144 for ; 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dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) by DM4PR12MB5247.namprd12.prod.outlook.com (2603:10b6:5:39b::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.15; Fri, 13 Aug 2021 17:01:13 +0000 Received: from DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::d560:d21:cd59:9418]) by DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::d560:d21:cd59:9418%6]) with mapi id 15.20.4415.019; Fri, 13 Aug 2021 17:01:13 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Thomas Gleixner , Ingo Molnar , Joerg Roedel Subject: [PATCH v2 10/12] x86/sev: Remove the now unused mem_encrypt_active() function Date: Fri, 13 Aug 2021 11:59:29 -0500 Message-Id: <974f50588528f046b98963f6978a13ba4d98b157.1628873970.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SA9PR13CA0117.namprd13.prod.outlook.com (2603:10b6:806:24::32) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SA9PR13CA0117.namprd13.prod.outlook.com (2603:10b6:806:24::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4436.11 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: /kIBO3AdsHeL5PmWHLKHGIlWc4XMAXAaqUD28ol4+cj9slrT8RrWdPYagro4mKZ5Is3Ov4P2nGQnhqBTmI33LUy4nHsN17/9di401gEx8zcnBgZ/zRW2m5U3IdHLDpxF52PKUAHQpTAPvZgq3NqkQ4djT3BuX3cbdvLH/w5mDuA/SqgGD31XtSZ31U8rB7BSv0c8hSK/GaUvegdPV+pkXFgjc/MrRjOC/aPHoesVFF0OmtZn+NgC2JS2lN9SsiYcBqyB5gxMxURL4rp3xboJ9XoPrrzKhvYX61O1CuXUbllbMUJQJHDS8p2d9F7QRNEndT47eGfZgwLRapXTShmcDy2f2A103KFFdZDsCgI2T2QE9yevNcgg9WbkK9Dh7yb2nC0c/r6MULE1uK8S6cz2E/eNfIToT/rJa80eR3jHQGWhJD1omIOHLcW+afeJsmx8EgpOKIGM/SLoYIxVqIM9NvWFJ+XydGoZ2dhvuYaGWH1t5i7qqWa3w06Lp5fUs/y0LGOwVtiYS7nvtLSA8ByTNZsgZnq8UDxlu746t0IKnk3qVC7NFNQnu+hx8Endx8kgFdboqcZH7Gc5uNoiixUuRIW8jS9sx9F8um5+8TuXd+HpdbXc19cU3Odiz0Zyv/yDUV2jShTk9oNlH2JLxPzADd7xU0/AkN1l5twwYSe5GupbfXg03dhhF9+Fcy/xyfaaBt/ehXNpRp6c4FDMf87GvH5OIv0JgAQLhUSnCCc7hHdKqE2W/D2BMwxDbttYAJ6H5zcMGmiIQ2AAt8+37or6NCjOR5bOhYYzKAb0+p++1KjNZ6Y33bbW0qzMjf415XhZh/7mC1qBYPWZ2p/lQOoTtD5gizYAYBiseWwl1xA7P1rStyhvsLSMZRvCQPAi5dYbYzJHBr486TRbXL5JdOfRl+UQVyFuCvlFy+z1a9zY6OzrrsOchPgu5o90qf4hjQY/cm92UALU/+X2i8AdDJsju5JNUJOBTECdqUjmz/MQNLWYAgMYTFWcBK+xzjiBuaM2aobv7N/Tnag8evizyzcESTuEtoOkMV08kP1VoXKX3CKPuZmxvJwLh1+wBscCHtHOIfCPteSdUw41+sp16ndvZToJDe6e75f4A7Eob5oCNJQkRsX7E3XYE86L/fBHA2t3uEto9usn9d5gt00UiO3TSnNhkJvMLp0Bp6G/jl6jDzvqF4OCMMEr3Sgxy28ZnncMTB1GddjGXsUbOTrn5jkjugXVC2AhQMFweg5Bk/wxXtfv4YrrKJU9Jv9U2U29XWkvAGBgRzEXyeP9j4jia4DKTsn3MMQ41XKSTNR9b/h/d8sI5uHG0uhRV9m9MQGkhV4J X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 188bd990-3eab-428e-6915-08d95e7bf50c X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Aug 2021 17:01:13.6319 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: PTzgG9RxmIifR+f4OJlJeU+tWLiwP7ME3scsXw9ZyFKn+HbF1xNxXM8CnfIyE/OwbbbtUxCiEirtYUwpFyeApg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5247 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org The mem_encrypt_active() function has been replaced by prot_guest_has(), so remove the implementation. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Reviewed-by: Joerg Roedel Signed-off-by: Tom Lendacky --- arch/x86/include/asm/mem_encrypt.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index 797146e0cd6b..94c089e9ea69 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -97,11 +97,6 @@ static inline void mem_encrypt_free_decrypted_mem(void) { } extern char __start_bss_decrypted[], __end_bss_decrypted[], __start_bss_decrypted_unused[]; -static inline bool mem_encrypt_active(void) -{ - return sme_me_mask; -} - static inline u64 sme_get_me_mask(void) { return sme_me_mask; From patchwork Fri Aug 13 16:59:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12435919 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8E0EC432BE for ; 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dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) by DM4PR12MB5341.namprd12.prod.outlook.com (2603:10b6:5:39e::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.16; Fri, 13 Aug 2021 17:01:22 +0000 Received: from DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::d560:d21:cd59:9418]) by DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::d560:d21:cd59:9418%6]) with mapi id 15.20.4415.019; Fri, 13 Aug 2021 17:01:22 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras Subject: [PATCH v2 11/12] powerpc/pseries/svm: Remove the now unused mem_encrypt_active() function Date: Fri, 13 Aug 2021 11:59:30 -0500 Message-Id: X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SN2PR01CA0037.prod.exchangelabs.com (2603:10b6:804:2::47) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SN2PR01CA0037.prod.exchangelabs.com (2603:10b6:804:2::47) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.13 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 9KSpmt7KuqAqjBh6FIgEkPVMCXquJf/axsKW5Sg0lTVdmWMuz1mE/GXXxQEBPNgq0aWpySMhXB8PIFMt/W2ir0O7+yZzi+56gv8+uENqoja1328krfkIIJo1rCGO7Qbe69SQqFmb2cUI4ZvprplW9bvMqrnAw2rpf83u2plZvMad0oTe7x1gK1PFEvmhRoJA1iiSTZhn1gQzh6hlcZ9HYKG1wNSYYWf05SmZsUKDunea+iKhB0569e4fiyoe/qXfQTmTGMyizU3yK2H5v3BORqbftFGfV/UI/lne+m4vqs8Or/nAJTA74DywSNqW11kgKHL4cXSMeCuQSj0cAcbGwn95+jxRFpnJMGnVDVhqWNUX0luuia7EenEj+f3xsMBhUSyKQiQalhuT6ehyxId/o2zz2MGydn4+Ry34+PSjXQl7psbk75e4gsaU/8Ox9NNorTWscpg8fFAUJUPnOZc4GhsLZfdfo+2Th36Vost6K7puVy4QwHcaml7UAZKxvA2yww7Ur6xJ52HzXJ9kNqUY/L/+W38G5NmrbU7fbeK85uVULjvxsb1kEYc7AVg6UZrTnFqqBuNe3do+ftXOx2hoVftqX4QpTDX1btt1VygvGvtogeS6K+IOKCXbgrreho3oWoY8mNRptT8/HO1TtZtaX6l7nlEggs+phEXP42hCvJ27+8r53xdzGeeG/3hOWiuM9RRKRi9akqpx4kvizR3qMaX1hcW1aFw8Ry0FBJ3Aq/negCEV8N/ZWEyrcBXy2kZ43EWp2IkcOFfqE2ZLRQSwuJqNUfwLNiYAxVpXoG2IoSuz/SF4jQ15naKyBUaMOO8VIjrYpgEp3YxS4FX/l14tWrLJwmyPsiHlORg8AgjzVKYqxF5QlFNEC4cfn0FK7E17xLG7mFFCYprGKY0eouy9xq/xkQjF4OUAuzW/cbs14TyzqtqVM38fhTV3AM2R8SPAtIMjgbvKZ2BKJB8hc6MD+VvrFswpdzlstIuz8eppMT+d8DKBST7EgIWfIHNURFkIAzfqk7tLWrzFEIolFKdCEq/gAPAMyF1OFXBfG7wZKFH3hYgqERW/SYHSurXH4TGPPekDyJJlMOFvXpIkl0XieMwLbw0k/8MV7cwzIQR48SjHCUZ+wt8khTzV7wl+8A789wYQxQatp3S2hhOGJ8yYS9Sy5DSe+lfl/JUwsbaSTSP0NAnEx0OtLw+g2GJrEhAaMiVHJzuuOobpPF2qDLC3coBB92htkNbeC8PnE2acDxpDZLj+2Pn6MxKMRSfT//Me5h5ny+Yj5zfuBSJ8OWzG+wH9Shued3ngS4pHlIhiN/QgXH2Cfu/n6UhqDKjS+ORs X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8b9bb524-aaee-4f58-5cdb-08d95e7bfa1d X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Aug 2021 17:01:22.1196 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: m+ogCzMTYNLgQ4o9KAbSyEHE8vZrzb7gCZwcuD0mjlH/WaB6UG8mIJeT61Kbtsf6ypxim47iVZrkUTV6eNqrWw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5341 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org The mem_encrypt_active() function has been replaced by prot_guest_has(), so remove the implementation. Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Signed-off-by: Tom Lendacky --- arch/powerpc/include/asm/mem_encrypt.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/powerpc/include/asm/mem_encrypt.h b/arch/powerpc/include/asm/mem_encrypt.h index ba9dab07c1be..2f26b8fc8d29 100644 --- a/arch/powerpc/include/asm/mem_encrypt.h +++ b/arch/powerpc/include/asm/mem_encrypt.h @@ -10,11 +10,6 @@ #include -static inline bool mem_encrypt_active(void) -{ - return is_secure_guest(); -} - static inline bool force_dma_unencrypted(struct device *dev) { return is_secure_guest(); From patchwork Fri Aug 13 16:59:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Lendacky X-Patchwork-Id: 12435921 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MSGID_FROM_MTA_HEADER,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD5E8C4320A for ; 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dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=amd.com; Received: from DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) by DM4PR12MB5247.namprd12.prod.outlook.com (2603:10b6:5:39b::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.15; Fri, 13 Aug 2021 17:01:30 +0000 Received: from DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::d560:d21:cd59:9418]) by DM4PR12MB5229.namprd12.prod.outlook.com ([fe80::d560:d21:cd59:9418%6]) with mapi id 15.20.4415.019; Fri, 13 Aug 2021 17:01:30 +0000 From: Tom Lendacky To: linux-kernel@vger.kernel.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, iommu@lists.linux-foundation.org, kvm@vger.kernel.org, linux-efi@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-graphics-maintainer@vmware.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kexec@lists.infradead.org, linux-fsdevel@vger.kernel.org Cc: Borislav Petkov , Brijesh Singh , Joerg Roedel , Andi Kleen , Sathyanarayanan Kuppuswamy , Tianyu Lan , Heiko Carstens , Vasily Gorbik , Christian Borntraeger Subject: [PATCH v2 12/12] s390/mm: Remove the now unused mem_encrypt_active() function Date: Fri, 13 Aug 2021 11:59:31 -0500 Message-Id: <15e98b235f285fcf742cc3bb199998024b1ebba9.1628873970.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: X-ClientProxiedBy: SA0PR11CA0045.namprd11.prod.outlook.com (2603:10b6:806:d0::20) To DM4PR12MB5229.namprd12.prod.outlook.com (2603:10b6:5:398::12) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from tlendack-t1.amd.com (165.204.77.1) by SA0PR11CA0045.namprd11.prod.outlook.com (2603:10b6:806:d0::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4415.14 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: o07gkAnIE43NvcO0FJBHn22MvQrb8WljlkApAv1s2zfw+4T+XTu6qOLRIfSwh0m2LmuQy4b2/Q3qTygnNJYb9EGj9M+Rzfk16FAAba7OqbZMBsbMR5TpwrRhKpvklpD+c9ZOcsdUp9Y0+lEuDM3VieJRJVKYsiEsw19BDtaxcMlalMXl7Lms+J2gfvs8m+xDcZY1VpmEYOJV0fsOolpsvC0IQaB6/BsbxoG7GjuiKgOkUK3+3YZAislMOo6B3w99zpaGezZotkq+3JssLa4kTeckuIvEa0fWbY+UKS07X0Qsz1eyW1UqdONWU/YhWtDDtmu7sATAOwetxbZoeXXj08wUP60Z8PkInSGK8UBIyW5yNy7ypu471tBVP1agH0Iw8EHPtVcr2khNzqPvghwr0f9slfpzvJfYOpdpIzBFZ6yGaZi1lUM/ZrCwroZ3cT9v5vKxKshH7obAxfL1K3Br8e3Vj6RtMP5V6/j2DmIqOqsTnYpp8sUdR0ca4QYZ0HyAPEEIz5ij1YtsiVemdxXl6UHirC5k2bQjJ+LRDjAf2AitnUeCFPkO00TY0rNLV8Le5ONtVJrA6oKCaLUbvIDhjVRhMliktis+/AR8LKfhr545kU4395zB9xlLklbMAxKchKLS0CAW8ydKxoBAizI0JJ+AUWu4IeaDvb2Nr77zTHGw/T108zjf9n3kVF6gSjjJqpOZ46te9os3OEVq8wyO720UVrFEtLCYZ8LzPxOtuGXIxqKNEJmm4ObGT7h8wSyzmgHm+2Qd2+d1OC3mq8u0aI783SuTTSMKX1PHhjG5SUMevCDYo7TI+cWUnFqUocWTsi2is1EEyAm+Uewt8BAp0oBloGdCxSaYV4P5wqmcvVQF2rDotQrXHam+umDGH45a9VbW0pV02EcN6potM8nv3GZDEOoQghjOShct7c/Fw2oQngVO6pFo85UGt12gD+8heC5xv58XaqP6JQP27nfIDiP3ObCAJdqRxb5YvbEUXF5bxG5n35BTez8sIhFR9D6ZLI6wcparNW5GuTNc9k2OZvjfrWA/12vN+WtZscryfU1x+7s/UqzOfsOz14l9WXVaT0Pdd5j7OXBQtPE2qZT5i8lrL5WFUwt7/8WmM1Uq8H/GV9Kl8vehwU8QKmJafa2flnjkJJxg1eiRTPznIHuaYlyr0JMQSPJrkE2xeFxAl/EuWoF6KUgGgsBpnuuy6Tovfovsu3ilaRbvx4Hl2lHTaXnquOAvOr0doMuuWIw/Cm4T/DROkKg+Hl9CIpwHjyC27ckboP16F7fqCoWfqdr+QuenYC7RRZtSpQqTVwNjenl9lZexnUsPuDPIUGdmBXjJ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: f97db68b-fe93-411b-80f0-08d95e7bff25 X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5229.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Aug 2021 17:01:30.5705 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 79QSgY8tSfMuDR3NEHC0s2qy2S0QX6r8krTSJFSNV1bOxqb3KTdHiH9Cm0DkGtrz7IxXDhV1Sx3sY7Eog5Wrrg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5247 Precedence: bulk List-ID: X-Mailing-List: platform-driver-x86@vger.kernel.org The mem_encrypt_active() function has been replaced by prot_guest_has(), so remove the implementation. Since the default implementation of the prot_guest_has() matches the s390 implementation of mem_encrypt_active(), prot_guest_has() does not need to be implemented in s390 (the config option ARCH_HAS_PROTECTED_GUEST is not set). Cc: Heiko Carstens Cc: Vasily Gorbik Cc: Christian Borntraeger Signed-off-by: Tom Lendacky --- arch/s390/include/asm/mem_encrypt.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/s390/include/asm/mem_encrypt.h b/arch/s390/include/asm/mem_encrypt.h index 2542cbf7e2d1..08a8b96606d7 100644 --- a/arch/s390/include/asm/mem_encrypt.h +++ b/arch/s390/include/asm/mem_encrypt.h @@ -4,8 +4,6 @@ #ifndef __ASSEMBLY__ -static inline bool mem_encrypt_active(void) { return false; } - int set_memory_encrypted(unsigned long addr, int numpages); int set_memory_decrypted(unsigned long addr, int numpages);