From patchwork Fri Aug 27 13:11:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 12462055 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E326AC43216 for ; Fri, 27 Aug 2021 13:12:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C82F660F91 for ; Fri, 27 Aug 2021 13:12:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245178AbhH0NNA (ORCPT ); Fri, 27 Aug 2021 09:13:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59250 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245175AbhH0NNA (ORCPT ); Fri, 27 Aug 2021 09:13:00 -0400 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 462E7C061757 for ; Fri, 27 Aug 2021 06:12:11 -0700 (PDT) Received: by mail-wr1-x433.google.com with SMTP id x6so2113631wrv.13 for ; Fri, 27 Aug 2021 06:12:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bx8Arm/Vs5CpHd4yeLjhHeHRFARmgA3I8g7M84xbgA4=; b=JllIXhxfnezKGwuaTcszEytlK5AJM5uR/+wrElrDGPM2GtP0TuSGBQMilstNMoMBu/ BjX2N8zJvxkAmiohzRtkeU/hc9kzcllX7C/IfsyNcAwXdPOo/h3l/n0o78RxAjfqlHNr Mwv7DMg57f3uFxyzEOKwcs0bNlmqFi1xnvCQBgfhiJ0dFAc2U9mkRbcaDBCm4uvYnXvV 1H9ZaIV5MX3bHr3z8qF+k+MiqsxTS4rtpM/tO+ggb2/+qWTpDis1LY+h+JLHTCLgyNus gVcRnI9Ttc9wK8sEh1GsCsmrGyre3vtRpdXK5VdRV+v7UWWfDCWpWakylREUJ7dopb+P uumQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bx8Arm/Vs5CpHd4yeLjhHeHRFARmgA3I8g7M84xbgA4=; b=VIR5LG/cixnfOlEZHf74FwIJvmdEECk8rttM6CZCtIF26qea34iN97KTPWnGVVUbSo FEOwFHSa6RR4rl72+Dwrhx8PkIXJgiCslcqwOvDkd78dCgnoz+xe7wPTMZZC5gFyb/qH 8BQjWn2t5opMjiyraLE0EoxqJqQgtpBXa8pl8HqFPzznqdfFkvBlWln1YeVPg2ceUVOl ezSNH3LDD9StcyqxzXVk45gJgUqJoEFzcnghvORQjVJO8IuZcgyW0HFfEqKypBtRtw5b fDSWZKu7TvhJIVpZ0xmoQMeVDf2tG40ZWhP4ml9kv/kj+KG8fjScdeHNPPGNKZ5+awXZ 4C3g== X-Gm-Message-State: AOAM532REwhoT5wxzmn8U8RhKoYRjmcJZVoZqcEPpVY9wpffFdSILq59 aV+eEopKpHgojkZkHN2NbRQIrw== X-Google-Smtp-Source: ABdhPJwSSdL67Ad7dMYB1qgx0DcFPZNKl5vfByBPAJUxzPT6leWQhgIT543tIpB73KLujpmnMGz/aQ== X-Received: by 2002:a5d:634f:: with SMTP id b15mr10095883wrw.220.1630069929823; Fri, 27 Aug 2021 06:12:09 -0700 (PDT) Received: from arch-thunder.local (a109-49-46-234.cpe.netcabo.pt. [109.49.46.234]) by smtp.gmail.com with ESMTPSA id c7sm5279349wmq.13.2021.08.27.06.12.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 06:12:09 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v2 1/5] usb: isp1760: fix memory pool initialization Date: Fri, 27 Aug 2021 14:11:50 +0100 Message-Id: <20210827131154.4151862-2-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827131154.4151862-1-rui.silva@linaro.org> References: <20210827131154.4151862-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The loops to setup the memory pool were skipping some blocks, that was not visible on the ISP1763 because it has fewer blocks than the ISP1761. But won testing on that IP from the family that would be an issue. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva Tested-by: Dietmar Eggemann --- drivers/usb/isp1760/isp1760-hcd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/isp1760/isp1760-hcd.c b/drivers/usb/isp1760/isp1760-hcd.c index bf8ab3fe2e5a..b3a55c5d2155 100644 --- a/drivers/usb/isp1760/isp1760-hcd.c +++ b/drivers/usb/isp1760/isp1760-hcd.c @@ -588,8 +588,8 @@ static void init_memory(struct isp1760_hcd *priv) payload_addr = PAYLOAD_OFFSET; - for (i = 0, curr = 0; i < ARRAY_SIZE(mem->blocks); i++) { - for (j = 0; j < mem->blocks[i]; j++, curr++) { + for (i = 0, curr = 0; i < ARRAY_SIZE(mem->blocks); i++, curr += j) { + for (j = 0; j < mem->blocks[i]; j++) { priv->memory_pool[curr + j].start = payload_addr; priv->memory_pool[curr + j].size = mem->blocks_size[i]; priv->memory_pool[curr + j].free = 1; From patchwork Fri Aug 27 13:11:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 12462057 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57E48C432BE for ; Fri, 27 Aug 2021 13:12:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 32DDB60F92 for ; Fri, 27 Aug 2021 13:12:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245182AbhH0NNE (ORCPT ); Fri, 27 Aug 2021 09:13:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245181AbhH0NND (ORCPT ); Fri, 27 Aug 2021 09:13:03 -0400 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5C5D2C061757 for ; Fri, 27 Aug 2021 06:12:14 -0700 (PDT) Received: by mail-wr1-x431.google.com with SMTP id i6so10375133wrv.2 for ; Fri, 27 Aug 2021 06:12:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Y607GohRHj140++t/bVDBujNiOGNimlRlENuyUmlv6A=; b=C7nHbTlLc3gN7Gb40cRm587VXiYRlYZ658KbJSCQKnUt2qaC+wZj2VuXMXwZitUvWR ds0YTO69ytKcQ+VgvECBLfaS0z/0kK6iuRZR5ciXJgYIiGrehm5b5RDl/UD/luN0o152 Zcx8ReLeowxhaFd3SzlLgcg4joVUIPOz0cDZHo5ksnkL2kTJWg3j9BVIRrzm78B5Ya/G UH6Yz70jO8MjyXZmssK2eiWpxoJSkfmbJQmv55rCZdDPoUopVwyUxoGgEAr7hArIKtdN CcuUX8AaSmYYkEFy6gJLg4WlA3TI9umdMNXysQJtlHad9SzFOFUnyxbtIH2zKmnnCi6n gmKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Y607GohRHj140++t/bVDBujNiOGNimlRlENuyUmlv6A=; b=s8alcoSHc+XeR2Tksg2NED7SwfSyv2kACF5+eo4cjJI/SwnFnGfLpzgokcnRZlf2MF 7AhDots65QDZ3blVbHoERyORGvF96AvZk7MQbfAq5x3+daRbxRds3hCdGRxoIoxlbamo 0KozF/s7mhM2KRHqoD4f8rkRxlbCbYROwCqk/kl8W9KBzNklQNef4YBjCTd22J/9cd8U LAmzegkHvHg1brd4ZM4s1Ka9tbdIusYxTfCIp7RzvSVwwesxCih9gcb7Obq4B2wUZD1l 3AkxTfw0KcClZJ+RE4d53Vg22qIbSiaYdsM6EKf0w3sx+wOOOzjuUwCBDA0zdW7SiCCd lGXg== X-Gm-Message-State: AOAM5310a4hP8BNt85RFGt+7dGkkmkvm6rJ7hnfEBliv7COzP2s/JlSb BumU3Uv/2YMH7HcLpC1nVbLJbA== X-Google-Smtp-Source: ABdhPJwuQ5Lrm61jHa42oQ5QVtvrE853g6AoAP4z2i2mSMvAZrhOnrvy9h2oSn3Dp6NRw0RlsuzTng== X-Received: by 2002:adf:9f51:: with SMTP id f17mr8469983wrg.301.1630069933001; Fri, 27 Aug 2021 06:12:13 -0700 (PDT) Received: from arch-thunder.local (a109-49-46-234.cpe.netcabo.pt. [109.49.46.234]) by smtp.gmail.com with ESMTPSA id c7sm5279349wmq.13.2021.08.27.06.12.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 06:12:12 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v2 2/5] usb: isp1760: fix qtd fill length Date: Fri, 27 Aug 2021 14:11:51 +0100 Message-Id: <20210827131154.4151862-3-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827131154.4151862-1-rui.silva@linaro.org> References: <20210827131154.4151862-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org When trying to send bulks bigger than the biggest block size we need to split them over several qtd. Fix this limiting the maximum qtd size to largest block size. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva Tested-by: Dietmar Eggemann --- drivers/usb/isp1760/isp1760-hcd.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/usb/isp1760/isp1760-hcd.c b/drivers/usb/isp1760/isp1760-hcd.c index b3a55c5d2155..fba21122bb00 100644 --- a/drivers/usb/isp1760/isp1760-hcd.c +++ b/drivers/usb/isp1760/isp1760-hcd.c @@ -1829,9 +1829,11 @@ static void packetize_urb(struct usb_hcd *hcd, goto cleanup; if (len > mem->blocks_size[ISP176x_BLOCK_NUM - 1]) - len = mem->blocks_size[ISP176x_BLOCK_NUM - 1]; + this_qtd_len = mem->blocks_size[ISP176x_BLOCK_NUM - 1]; + else + this_qtd_len = len; - this_qtd_len = qtd_fill(qtd, buf, len); + this_qtd_len = qtd_fill(qtd, buf, this_qtd_len); list_add_tail(&qtd->qtd_list, head); len -= this_qtd_len; From patchwork Fri Aug 27 13:11:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 12462059 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FA80C4320A for ; Fri, 27 Aug 2021 13:12:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 59D6360F92 for ; Fri, 27 Aug 2021 13:12:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245184AbhH0NNF (ORCPT ); Fri, 27 Aug 2021 09:13:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245175AbhH0NNF (ORCPT ); Fri, 27 Aug 2021 09:13:05 -0400 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 20004C061757 for ; Fri, 27 Aug 2021 06:12:16 -0700 (PDT) Received: by mail-wr1-x429.google.com with SMTP id i6so10375249wrv.2 for ; Fri, 27 Aug 2021 06:12:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=V0J3NHw/qq4gMRkEFJJLpm8VQ/DzEM7Z7FaIoqZdQD4=; b=pJySKRulcv5lUPYaZoaC3c3+3Z2rLhxSTgN/cMgDUZP+2Yg06k8wc4dtl6h75fZS45 cUnKoX9PM03lXNJFHTBXB5IMUOlSXSPS/yu8fq3JoEz94i7/bNuJF6TyYrgD0pteGFM3 sttCDcMbDd4mC+/9Lg3KplYNRQ/DliozBikRFQMUdmU0Vuiqxn9+TSUFC/y2vAKiQhMC Bqidm7Y0ZhZRauifSQ+ngRj30Dn29D1MLGNu4UEqws1vgMtJvnMspAxZd6OGf/+uVp/k 2rgDy1tguv9jMGE8cD6KQgUDKl1C672jrN4aenMXakHGQjSEygBdGxZwNp8BJJRcCs5u 0iQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=V0J3NHw/qq4gMRkEFJJLpm8VQ/DzEM7Z7FaIoqZdQD4=; b=M977sX5SDpaFyDNnQ4nug1DRy8gitX0AJhKyDwKzPTvtdlatScTGX+pCrmKSokuS02 YZk1JXhq435t86rSWfydSByYoneZkES1ALenUtxc3qKq0rddZI1M+x1PJ1mVnbE1liz+ n/rpoypzQRDT3gUJR67J3HTZF33OfWPhO4jdhSWIryuuMS8AM1Yeeeafs2AlMmLFPIgn Q6tDmvbpoEYw+XXpG8VPD674V+qhckEvtGTxVUC3ryPLYNf291Fh8x6Q7Nr2Wk4rDLoR CWJAslx+cWPgDVd+TfaHjXSL4RurfVOXew7EMGFPbzqW2frDTSHS4lkBOk6lKRIwfreO lPtg== X-Gm-Message-State: AOAM531j8KbW92BPP+kHLW+NI13thnaUByHYfyNKid2WTsXwgP7AJluQ 3DG6UcB5lL+31xxRoaUg0YhAeMr3yH5Cag== X-Google-Smtp-Source: ABdhPJys6trwbMQO795pFCRhjCojobJ97adECkTTbAxZRihQuSHc6qBMnrrcx+cuTPb+R3o/eqH0ig== X-Received: by 2002:adf:c40d:: with SMTP id v13mr7975652wrf.388.1630069934721; Fri, 27 Aug 2021 06:12:14 -0700 (PDT) Received: from arch-thunder.local (a109-49-46-234.cpe.netcabo.pt. [109.49.46.234]) by smtp.gmail.com with ESMTPSA id c7sm5279349wmq.13.2021.08.27.06.12.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 06:12:14 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v2 3/5] usb: isp1760: write to status and address register Date: Fri, 27 Aug 2021 14:11:52 +0100 Message-Id: <20210827131154.4151862-4-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827131154.4151862-1-rui.silva@linaro.org> References: <20210827131154.4151862-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org We were already writing directly the port status register to trigger changes in isp1763. The same is needed in other IP from the family, including also to setup the read address before reading from device. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva Tested-by: Dietmar Eggemann --- drivers/usb/isp1760/isp1760-hcd.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/drivers/usb/isp1760/isp1760-hcd.c b/drivers/usb/isp1760/isp1760-hcd.c index fba21122bb00..79d571f1429b 100644 --- a/drivers/usb/isp1760/isp1760-hcd.c +++ b/drivers/usb/isp1760/isp1760-hcd.c @@ -182,7 +182,7 @@ struct urb_listitem { struct urb *urb; }; -static const u32 isp1763_hc_portsc1_fields[] = { +static const u32 isp176x_hc_portsc1_fields[] = { [PORT_OWNER] = BIT(13), [PORT_POWER] = BIT(12), [PORT_LSTATUS] = BIT(10), @@ -205,27 +205,28 @@ static u32 isp1760_hcd_read(struct usb_hcd *hcd, u32 field) } /* - * We need, in isp1763, to write directly the values to the portsc1 + * We need, in isp176x, to write directly the values to the portsc1 * register so it will make the other values to trigger. */ static void isp1760_hcd_portsc1_set_clear(struct isp1760_hcd *priv, u32 field, u32 val) { - u32 bit = isp1763_hc_portsc1_fields[field]; - u32 port_status = readl(priv->base + ISP1763_HC_PORTSC1); + u32 bit = isp176x_hc_portsc1_fields[field]; + u16 portsc1_reg = priv->is_isp1763 ? ISP1763_HC_PORTSC1 : + ISP176x_HC_PORTSC1; + u32 port_status = readl(priv->base + portsc1_reg); if (val) - writel(port_status | bit, priv->base + ISP1763_HC_PORTSC1); + writel(port_status | bit, priv->base + portsc1_reg); else - writel(port_status & ~bit, priv->base + ISP1763_HC_PORTSC1); + writel(port_status & ~bit, priv->base + portsc1_reg); } static void isp1760_hcd_write(struct usb_hcd *hcd, u32 field, u32 val) { struct isp1760_hcd *priv = hcd_to_priv(hcd); - if (unlikely(priv->is_isp1763 && - (field >= PORT_OWNER && field <= PORT_CONNECT))) + if (unlikely((field >= PORT_OWNER && field <= PORT_CONNECT))) return isp1760_hcd_portsc1_set_clear(priv, field, val); isp1760_field_write(priv->fields, field, val); @@ -367,8 +368,7 @@ static void isp1760_mem_read(struct usb_hcd *hcd, u32 src_offset, void *dst, { struct isp1760_hcd *priv = hcd_to_priv(hcd); - isp1760_hcd_write(hcd, MEM_BANK_SEL, ISP_BANK_0); - isp1760_hcd_write(hcd, MEM_START_ADDR, src_offset); + isp1760_reg_write(priv->regs, ISP176x_HC_MEMORY, src_offset); ndelay(100); bank_reads8(priv->base, src_offset, ISP_BANK_0, dst, bytes); @@ -496,8 +496,7 @@ static void isp1760_ptd_read(struct usb_hcd *hcd, u32 ptd_offset, u32 slot, u16 src_offset = ptd_offset + slot * sizeof(*ptd); struct isp1760_hcd *priv = hcd_to_priv(hcd); - isp1760_hcd_write(hcd, MEM_BANK_SEL, ISP_BANK_0); - isp1760_hcd_write(hcd, MEM_START_ADDR, src_offset); + isp1760_reg_write(priv->regs, ISP176x_HC_MEMORY, src_offset); ndelay(90); bank_reads8(priv->base, src_offset, ISP_BANK_0, (void *)ptd, From patchwork Fri Aug 27 13:11:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 12462061 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F913C432BE for ; Fri, 27 Aug 2021 13:12:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 27C9A60F92 for ; Fri, 27 Aug 2021 13:12:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245191AbhH0NNH (ORCPT ); Fri, 27 Aug 2021 09:13:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59280 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245185AbhH0NNG (ORCPT ); Fri, 27 Aug 2021 09:13:06 -0400 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81B20C061757 for ; Fri, 27 Aug 2021 06:12:17 -0700 (PDT) Received: by mail-wr1-x433.google.com with SMTP id z4so10335216wrr.6 for ; Fri, 27 Aug 2021 06:12:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JhkbsWN6yF+zzjQkKyGIO7BRErUtHsxjPq+kPs7GZWc=; b=Jh73rVA7zjjGYpLd3WOSV802Ynj4ee73Uo9HOq5s/r766nuO+ctX9wPghw2TvGsCQY fFUUZrojPXQrl1usTmLNx7BNF+hv1OpVubPRpHtuSxMDB4dYDTUcPoNVVsxUo1ryJshT 7IIaSmFLckx9ZvPObWoE3S7CAlXs+muU5d9khtLIrio3ONY1O8PudtKIeKsY9aDnMRsO B2gICeIzSj6x+YoQRY73WOva1KR4gv8InNIl9jU8F3EF1bxamAY4FQ5VsAbVpr3gXYNX yANCQtXV+IKPDRWICDbt2PD6iV8zWTi4UC4KYxwJLDuNV8/vfXguMsbQdhBf0zjdM++5 xN5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JhkbsWN6yF+zzjQkKyGIO7BRErUtHsxjPq+kPs7GZWc=; b=BkVuPNprjgJkmlIMAHS7d9bm8nkvrxziuqSD5apTKZajFkRwT9ReaSjTULRH3fCXCV aSmqaoXIYTfAdGAycXQ06FdYjYss3vmriLOKo/4kxbpC8GI4VBUrESqPrbpLfqM0d+ot mdJYDEbwcQ6Zsc68+nuNp/ZvJjmTPCcKvK2EDUJSqX9P0QA6CP9kZL6j/Nvmwb0t1MMd u/kPKUv2lHhZ5edZ8BNNbPAgI9ePcv1yMWLYrB+HPgd0qTbZEo3mOMQFHzBOlgFjme67 FWNX47mys/nHhPPiA2tSZK7BJr7rhhgMwjg7yLqbskUfJsJ/babtpPmBl5pXM9ffPSQD 5pJA== X-Gm-Message-State: AOAM533xNhaA4nfOMGX7uZvFME5BrvNoIWPU/Lqp6IMHIaSMKKRGkL05 Sk3ueUxvBng4Z3h96vH4QwBQv7J5CWTTsw== X-Google-Smtp-Source: ABdhPJwsIgO6J+eVXzR6av3RvCjJCHHn/KTn9pbO/gZzydz2xzbqgHdT3QhuaWK1Gm1tsWyOv0DGyQ== X-Received: by 2002:a5d:4c50:: with SMTP id n16mr10089098wrt.265.1630069936141; Fri, 27 Aug 2021 06:12:16 -0700 (PDT) Received: from arch-thunder.local (a109-49-46-234.cpe.netcabo.pt. [109.49.46.234]) by smtp.gmail.com with ESMTPSA id c7sm5279349wmq.13.2021.08.27.06.12.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 06:12:15 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v2 4/5] usb: isp1760: use the right irq status bit Date: Fri, 27 Aug 2021 14:11:53 +0100 Message-Id: <20210827131154.4151862-5-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827131154.4151862-1-rui.silva@linaro.org> References: <20210827131154.4151862-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Instead of using the fields enum values to check interrupts trigged, use the correct bit values. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva Tested-by: Dietmar Eggemann --- drivers/usb/isp1760/isp1760-udc.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/usb/isp1760/isp1760-udc.c b/drivers/usb/isp1760/isp1760-udc.c index a78da59d6417..5cafd23345ca 100644 --- a/drivers/usb/isp1760/isp1760-udc.c +++ b/drivers/usb/isp1760/isp1760-udc.c @@ -1363,7 +1363,7 @@ static irqreturn_t isp1760_udc_irq(int irq, void *dev) status = isp1760_udc_irq_get_status(udc); - if (status & DC_IEVBUS) { + if (status & ISP176x_DC_IEVBUS) { dev_dbg(udc->isp->dev, "%s(VBUS)\n", __func__); /* The VBUS interrupt is only triggered when VBUS appears. */ spin_lock(&udc->lock); @@ -1371,7 +1371,7 @@ static irqreturn_t isp1760_udc_irq(int irq, void *dev) spin_unlock(&udc->lock); } - if (status & DC_IEBRST) { + if (status & ISP176x_DC_IEBRST) { dev_dbg(udc->isp->dev, "%s(BRST)\n", __func__); isp1760_udc_reset(udc); @@ -1391,18 +1391,18 @@ static irqreturn_t isp1760_udc_irq(int irq, void *dev) } } - if (status & DC_IEP0SETUP) { + if (status & ISP176x_DC_IEP0SETUP) { dev_dbg(udc->isp->dev, "%s(EP0SETUP)\n", __func__); isp1760_ep0_setup(udc); } - if (status & DC_IERESM) { + if (status & ISP176x_DC_IERESM) { dev_dbg(udc->isp->dev, "%s(RESM)\n", __func__); isp1760_udc_resume(udc); } - if (status & DC_IESUSP) { + if (status & ISP176x_DC_IESUSP) { dev_dbg(udc->isp->dev, "%s(SUSP)\n", __func__); spin_lock(&udc->lock); @@ -1413,7 +1413,7 @@ static irqreturn_t isp1760_udc_irq(int irq, void *dev) spin_unlock(&udc->lock); } - if (status & DC_IEHS_STA) { + if (status & ISP176x_DC_IEHS_STA) { dev_dbg(udc->isp->dev, "%s(HS_STA)\n", __func__); udc->gadget.speed = USB_SPEED_HIGH; } From patchwork Fri Aug 27 13:11:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 12462063 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57B85C432BE for ; Fri, 27 Aug 2021 13:12:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 40E1760F91 for ; Fri, 27 Aug 2021 13:12:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245195AbhH0NNJ (ORCPT ); Fri, 27 Aug 2021 09:13:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59292 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245175AbhH0NNI (ORCPT ); Fri, 27 Aug 2021 09:13:08 -0400 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [IPv6:2a00:1450:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 14ACAC061757 for ; Fri, 27 Aug 2021 06:12:19 -0700 (PDT) Received: by mail-wm1-x335.google.com with SMTP id d22-20020a1c1d16000000b002e7777970f0so9176385wmd.3 for ; Fri, 27 Aug 2021 06:12:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WdG/2gxKlzZkSfzKRSXQY6YVvjSC5elE9cuFSMD1cWs=; b=SL3WLYw1kai8PtwgQfmyc3Ls/8zLYgoRd2FB9kyV2Mh3czlcYMFsjrdsW47IcmXbEP S8kVdEND0cV0ZkgPj1vFNSWh7Me5CE+ffH8+9hybVFpSY9ykvamsYw+T1PY2IZFxVtpn mosLKSNgby4wz/2YXEXZhUsBiVbXBF/kQv0SfrDO3ztJ6Z+MeN6WGy8LptOGPWNMZL2D I1HI77BRU5yb9cXWU1c2b2lYd7OYY3xfCGTTTDwhWqbHhGP0H6a8vN9dwkHiDT08F9g0 SdA0d8cnfbWtXWw4CUpLnmWgQqCJaIXNzwI7YXjhvOSJmPhuwdE4DVfadOU34MTK+I5j TtHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WdG/2gxKlzZkSfzKRSXQY6YVvjSC5elE9cuFSMD1cWs=; b=DUmKZJASfF40zmOB2j7MkLIrYsQHASxd3k1xxvnjpjPljZyyYD8ZgQCOT2wWR/svgu qvNkh5jKnKDTaRBnAINFnyB2CDuy66g5d/OsuWVpQ6xiifUEttEGM8QiA12oUamDKLO4 IP5EPFP6Cur4+xfjR6QS0Ij8bTCKouIqA/B8E/SdP/85T6r+EVqkw5IxCg0lwVFijeOM dMUTlAg9FM1f7CSg1W7JLfh3ne/6PRgaEGC9YOFGCkURrrZQnbukLv2PfvFhsZCaZsYO mNxghbmwHiJuRok1pHtdHU2FPnLU9Ndxukqs54S2M7IRXlDnnOXtQSGSDqOujBNcNJaw 3nqw== X-Gm-Message-State: AOAM531xkmU3IyJ3nrO/fBsGop0pQ4dU54/sm+csc/Z0BIK1X+iCbAUa fXfzdcNd7pvwXckm2xbQw3z7HQ== X-Google-Smtp-Source: ABdhPJxibX4FUraXHwZB8cV5CnMU4EXKrNMcBFKdIwD16NzllfiNzS5aaXGtTUZsc3oq0jPQvM3Pbw== X-Received: by 2002:a1c:1d84:: with SMTP id d126mr8797772wmd.160.1630069937672; Fri, 27 Aug 2021 06:12:17 -0700 (PDT) Received: from arch-thunder.local (a109-49-46-234.cpe.netcabo.pt. [109.49.46.234]) by smtp.gmail.com with ESMTPSA id c7sm5279349wmq.13.2021.08.27.06.12.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 06:12:17 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH v2 5/5] usb: isp1760: otg control register access Date: Fri, 27 Aug 2021 14:11:54 +0100 Message-Id: <20210827131154.4151862-6-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827131154.4151862-1-rui.silva@linaro.org> References: <20210827131154.4151862-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The set/clear of the otg control values is done writing to two different 16bit registers, however we setup the regmap width for isp1760/61 to 32bit value bits. So, just access the clear register address (0x376)as the high part of the otg control register set (0x374), and write the values in one go to make sure they get clear/set. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva Tested-by: Dietmar Eggemann --- drivers/usb/isp1760/isp1760-core.c | 50 ++++++++++++++++-------------- drivers/usb/isp1760/isp1760-regs.h | 16 ++++++++++ 2 files changed, 42 insertions(+), 24 deletions(-) diff --git a/drivers/usb/isp1760/isp1760-core.c b/drivers/usb/isp1760/isp1760-core.c index cb70f9d63cdd..d1d9a7d5da17 100644 --- a/drivers/usb/isp1760/isp1760-core.c +++ b/drivers/usb/isp1760/isp1760-core.c @@ -30,6 +30,7 @@ static int isp1760_init_core(struct isp1760_device *isp) { struct isp1760_hcd *hcd = &isp->hcd; struct isp1760_udc *udc = &isp->udc; + u32 otg_ctrl; /* Low-level chip reset */ if (isp->rst_gpio) { @@ -83,16 +84,17 @@ static int isp1760_init_core(struct isp1760_device *isp) * * TODO: Really support OTG. For now we configure port 1 in device mode */ - if (((isp->devflags & ISP1760_FLAG_ISP1761) || - (isp->devflags & ISP1760_FLAG_ISP1763)) && - (isp->devflags & ISP1760_FLAG_PERIPHERAL_EN)) { - isp1760_field_set(hcd->fields, HW_DM_PULLDOWN); - isp1760_field_set(hcd->fields, HW_DP_PULLDOWN); - isp1760_field_set(hcd->fields, HW_OTG_DISABLE); - } else { - isp1760_field_set(hcd->fields, HW_SW_SEL_HC_DC); - isp1760_field_set(hcd->fields, HW_VBUS_DRV); - isp1760_field_set(hcd->fields, HW_SEL_CP_EXT); + if (isp->devflags & ISP1760_FLAG_ISP1761) { + if (isp->devflags & ISP1760_FLAG_PERIPHERAL_EN) { + otg_ctrl = (ISP176x_HW_DM_PULLDOWN_CLEAR | + ISP176x_HW_DP_PULLDOWN_CLEAR | + ISP176x_HW_OTG_DISABLE); + } else { + otg_ctrl = (ISP176x_HW_SW_SEL_HC_DC_CLEAR | + ISP176x_HW_VBUS_DRV | + ISP176x_HW_SEL_CP_EXT); + } + isp1760_reg_write(hcd->regs, ISP176x_HC_OTG_CTRL, otg_ctrl); } dev_info(isp->dev, "%s bus width: %u, oc: %s\n", @@ -235,20 +237,20 @@ static const struct reg_field isp1760_hc_reg_fields[] = { [HC_ISO_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_ISO_IRQ_MASK_AND, 0, 31), [HC_INT_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_INT_IRQ_MASK_AND, 0, 31), [HC_ATL_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_ATL_IRQ_MASK_AND, 0, 31), - [HW_OTG_DISABLE] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 10, 10), - [HW_SW_SEL_HC_DC] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 7, 7), - [HW_VBUS_DRV] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 4, 4), - [HW_SEL_CP_EXT] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 3, 3), - [HW_DM_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 2, 2), - [HW_DP_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 1, 1), - [HW_DP_PULLUP] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 0, 0), - [HW_OTG_DISABLE_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 10, 10), - [HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 7, 7), - [HW_VBUS_DRV_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 4, 4), - [HW_SEL_CP_EXT_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 3, 3), - [HW_DM_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 2, 2), - [HW_DP_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 1, 1), - [HW_DP_PULLUP_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 0, 0), + [HW_OTG_DISABLE_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 26, 26), + [HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 23, 23), + [HW_VBUS_DRV_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 20, 20), + [HW_SEL_CP_EXT_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 19, 19), + [HW_DM_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 18, 18), + [HW_DP_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 17, 17), + [HW_DP_PULLUP_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 16, 16), + [HW_OTG_DISABLE] = REG_FIELD(ISP176x_HC_OTG_CTRL, 10, 10), + [HW_SW_SEL_HC_DC] = REG_FIELD(ISP176x_HC_OTG_CTRL, 7, 7), + [HW_VBUS_DRV] = REG_FIELD(ISP176x_HC_OTG_CTRL, 4, 4), + [HW_SEL_CP_EXT] = REG_FIELD(ISP176x_HC_OTG_CTRL, 3, 3), + [HW_DM_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL, 2, 2), + [HW_DP_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL, 1, 1), + [HW_DP_PULLUP] = REG_FIELD(ISP176x_HC_OTG_CTRL, 0, 0), }; static const struct reg_field isp1763_hc_reg_fields[] = { diff --git a/drivers/usb/isp1760/isp1760-regs.h b/drivers/usb/isp1760/isp1760-regs.h index 94ea60c20b2a..3a6751197e97 100644 --- a/drivers/usb/isp1760/isp1760-regs.h +++ b/drivers/usb/isp1760/isp1760-regs.h @@ -61,6 +61,7 @@ #define ISP176x_HC_INT_IRQ_MASK_AND 0x328 #define ISP176x_HC_ATL_IRQ_MASK_AND 0x32c +#define ISP176x_HC_OTG_CTRL 0x374 #define ISP176x_HC_OTG_CTRL_SET 0x374 #define ISP176x_HC_OTG_CTRL_CLEAR 0x376 @@ -179,6 +180,21 @@ enum isp176x_host_controller_fields { #define ISP176x_DC_IESUSP BIT(3) #define ISP176x_DC_IEBRST BIT(0) +#define ISP176x_HW_OTG_DISABLE_CLEAR BIT(26) +#define ISP176x_HW_SW_SEL_HC_DC_CLEAR BIT(23) +#define ISP176x_HW_VBUS_DRV_CLEAR BIT(20) +#define ISP176x_HW_SEL_CP_EXT_CLEAR BIT(19) +#define ISP176x_HW_DM_PULLDOWN_CLEAR BIT(18) +#define ISP176x_HW_DP_PULLDOWN_CLEAR BIT(17) +#define ISP176x_HW_DP_PULLUP_CLEAR BIT(16) +#define ISP176x_HW_OTG_DISABLE BIT(10) +#define ISP176x_HW_SW_SEL_HC_DC BIT(7) +#define ISP176x_HW_VBUS_DRV BIT(4) +#define ISP176x_HW_SEL_CP_EXT BIT(3) +#define ISP176x_HW_DM_PULLDOWN BIT(2) +#define ISP176x_HW_DP_PULLDOWN BIT(1) +#define ISP176x_HW_DP_PULLUP BIT(0) + #define ISP176x_DC_ENDPTYP_ISOC 0x01 #define ISP176x_DC_ENDPTYP_BULK 0x02 #define ISP176x_DC_ENDPTYP_INTERRUPT 0x03