From patchwork Wed Sep 1 23:49:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kieran Bingham X-Patchwork-Id: 12470543 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D090DC4320E for ; Wed, 1 Sep 2021 23:49:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B9EEA6023E for ; Wed, 1 Sep 2021 23:49:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232429AbhIAXuK (ORCPT ); Wed, 1 Sep 2021 19:50:10 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:53732 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230097AbhIAXuK (ORCPT ); Wed, 1 Sep 2021 19:50:10 -0400 Received: from Monstersaurus.local (cpc89244-aztw30-2-0-cust3082.18-1.cable.virginm.net [86.31.172.11]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 6B87C1516; Thu, 2 Sep 2021 01:49:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1630540151; bh=7X4qZVyk2k7iUjP1MSpsD7QXZUHFl6neQV8CbcJNCeg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=D3uQGGVrQHs7OUopz27O+Rz6y4z6KhBGHBTv4JLGOqlLxmJ28EK1fXkObz4Dpi40s zk5EmuvV90qc5maIVExKr1Mfw1Y7xr31ml5Yez0VIyOCZnmlk2jrIc2aOFD5O3SD5i Tq0KmDUgTY7jLRxjhOW+s7a4QJ3Nz1L+4dIsCRMw= From: Kieran Bingham To: linux-renesas-soc@vger.kernel.org, Laurent Pinchart Cc: Kieran Bingham , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org (open list:DRM DRIVERS FOR RENESAS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 1/5] drm: rcar-du: Sort the DU outputs Date: Thu, 2 Sep 2021 00:49:03 +0100 Message-Id: <20210901234907.1608896-2-kieran.bingham@ideasonboard.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210901234907.1608896-1-kieran.bingham@ideasonboard.com> References: <20210901234907.1608896-1-kieran.bingham@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Kieran Bingham Sort the DU outputs alphabetically, with the exception of the final entry which is there as a sentinal. Reviewed-by: Laurent Pinchart Signed-off-by: Kieran Bingham --- v2: - Collect tag drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h index 5f2940c42225..440e6b4fbb58 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h @@ -96,10 +96,10 @@ struct rcar_du_crtc_state { enum rcar_du_output { RCAR_DU_OUTPUT_DPAD0, RCAR_DU_OUTPUT_DPAD1, - RCAR_DU_OUTPUT_LVDS0, - RCAR_DU_OUTPUT_LVDS1, RCAR_DU_OUTPUT_HDMI0, RCAR_DU_OUTPUT_HDMI1, + RCAR_DU_OUTPUT_LVDS0, + RCAR_DU_OUTPUT_LVDS1, RCAR_DU_OUTPUT_TCON, RCAR_DU_OUTPUT_MAX, }; From patchwork Wed Sep 1 23:49:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kieran Bingham X-Patchwork-Id: 12470545 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5952C43214 for ; Wed, 1 Sep 2021 23:49:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D40EA61026 for ; Wed, 1 Sep 2021 23:49:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232632AbhIAXuL (ORCPT ); Wed, 1 Sep 2021 19:50:11 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:53740 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229829AbhIAXuL (ORCPT ); Wed, 1 Sep 2021 19:50:11 -0400 Received: from Monstersaurus.local (cpc89244-aztw30-2-0-cust3082.18-1.cable.virginm.net [86.31.172.11]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id E92071544; Thu, 2 Sep 2021 01:49:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1630540152; bh=CJER95kuqVQg+IWr5D3fMe8U43dXHsjjYXDswSJYd88=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FZz53nQPXGnH/9qLPbX1GHBgqxGrEXrGgtxjOcvdqXYDqv/ogPfHjKhWBMTrOi2sS y63IjiUt4toNqhgAxdVkdRnviO2inCVKrMs/DZp59DqWtTn06FocQrv7At+lrZeNEG 4nsyOwEh6k1oFLHY83U6upV+D7b6nENYW8oy0qmM= From: Kieran Bingham To: linux-renesas-soc@vger.kernel.org, Laurent Pinchart Cc: Kieran Bingham , Kieran Bingham , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org (open list:DRM DRIVERS FOR RENESAS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 2/5] drm: rcar-du: Only initialise TVM_TVSYNC mode when supported Date: Thu, 2 Sep 2021 00:49:04 +0100 Message-Id: <20210901234907.1608896-3-kieran.bingham@ideasonboard.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210901234907.1608896-1-kieran.bingham@ideasonboard.com> References: <20210901234907.1608896-1-kieran.bingham@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The R-Car DU as found on the D3, E3, and V3U do not have support for an external synchronisation method. In these cases, the dsysr cached register should not be initialised in DSYSR_TVM_TVSYNC, but instead should be left clear to configure as DSYSR_TVM_MASTER by default. Reviewed-by: Laurent Pinchart Signed-off-by: Kieran Bingham --- v2: - Remove parenthesis drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index ea7e39d03545..a0f837e8243a 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -1243,7 +1243,10 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex, rcrtc->group = rgrp; rcrtc->mmio_offset = mmio_offsets[hwindex]; rcrtc->index = hwindex; - rcrtc->dsysr = (rcrtc->index % 2 ? 0 : DSYSR_DRES) | DSYSR_TVM_TVSYNC; + rcrtc->dsysr = rcrtc->index % 2 ? 0 : DSYSR_DRES; + + if (rcar_du_has(rcdu, RCAR_DU_FEATURE_TVM_SYNC)) + rcrtc->dsysr |= DSYSR_TVM_TVSYNC; if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) primary = &rcrtc->vsp->planes[rcrtc->vsp_pipe].plane; From patchwork Wed Sep 1 23:49:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kieran Bingham X-Patchwork-Id: 12470547 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B9D1DC43216 for ; Wed, 1 Sep 2021 23:49:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9CA6661075 for ; Wed, 1 Sep 2021 23:49:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233755AbhIAXuM (ORCPT ); Wed, 1 Sep 2021 19:50:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47094 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233571AbhIAXuL (ORCPT ); Wed, 1 Sep 2021 19:50:11 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72913C061575; Wed, 1 Sep 2021 16:49:14 -0700 (PDT) Received: from Monstersaurus.local (cpc89244-aztw30-2-0-cust3082.18-1.cable.virginm.net [86.31.172.11]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 8280918F9; Thu, 2 Sep 2021 01:49:12 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1630540152; bh=qC2f8x3s8tYxsf6YSEwSgW69e/jJGentOvVXxQGH1oQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BMqBLTxfS+AZavfzp9IaPI0GKDJrC4TrKP9qHuPSMYanS5ev/gCwh/ru+4Y/eLZEs I5FbN+N7k/9b0j0b59ouSDA+IExQJwsmxobcnlBy6j42TSU34FJKfqLAXjetMg5yAV nX7VMs8zh4JWBVNnnqwEFaEHhlmtcCZZdP1mx5fE= From: Kieran Bingham To: linux-renesas-soc@vger.kernel.org, Laurent Pinchart Cc: Kieran Bingham , Kieran Bingham , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org (open list:DRM DRIVERS FOR RENESAS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 3/5] drm: rcar-du: Fix DIDSR field name Date: Thu, 2 Sep 2021 00:49:05 +0100 Message-Id: <20210901234907.1608896-4-kieran.bingham@ideasonboard.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210901234907.1608896-1-kieran.bingham@ideasonboard.com> References: <20210901234907.1608896-1-kieran.bingham@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org The DIDSR fields named LDCS were incorrectly defined as LCDS. Both the Gen2 and Gen3 documentation refer to the fields as the "LVDS Dot Clock Select". Correct the definitions. Signed-off-by: Kieran Bingham Reviewed-by: Laurent Pinchart --- v2: - New patch drivers/gpu/drm/rcar-du/rcar_du_group.c | 4 ++-- drivers/gpu/drm/rcar-du/rcar_du_regs.h | 8 ++++---- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c index 88a783ceb3e9..a984eef265d2 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_group.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c @@ -122,10 +122,10 @@ static void rcar_du_group_setup_didsr(struct rcar_du_group *rgrp) didsr = DIDSR_CODE; for (i = 0; i < num_crtcs; ++i, ++rcrtc) { if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index)) - didsr |= DIDSR_LCDS_LVDS0(i) + didsr |= DIDSR_LDCS_LVDS0(i) | DIDSR_PDCS_CLK(i, 0); else - didsr |= DIDSR_LCDS_DCLKIN(i) + didsr |= DIDSR_LDCS_DCLKIN(i) | DIDSR_PDCS_CLK(i, 0); } diff --git a/drivers/gpu/drm/rcar-du/rcar_du_regs.h b/drivers/gpu/drm/rcar-du/rcar_du_regs.h index fb9964949368..fb7c467aa484 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_regs.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_regs.h @@ -257,10 +257,10 @@ #define DIDSR 0x20028 #define DIDSR_CODE (0x7790 << 16) -#define DIDSR_LCDS_DCLKIN(n) (0 << (8 + (n) * 2)) -#define DIDSR_LCDS_LVDS0(n) (2 << (8 + (n) * 2)) -#define DIDSR_LCDS_LVDS1(n) (3 << (8 + (n) * 2)) -#define DIDSR_LCDS_MASK(n) (3 << (8 + (n) * 2)) +#define DIDSR_LDCS_DCLKIN(n) (0 << (8 + (n) * 2)) +#define DIDSR_LDCS_LVDS0(n) (2 << (8 + (n) * 2)) +#define DIDSR_LDCS_LVDS1(n) (3 << (8 + (n) * 2)) +#define DIDSR_LDCS_MASK(n) (3 << (8 + (n) * 2)) #define DIDSR_PDCS_CLK(n, clk) (clk << ((n) * 2)) #define DIDSR_PDCS_MASK(n) (3 << ((n) * 2)) From patchwork Wed Sep 1 23:49:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kieran Bingham X-Patchwork-Id: 12470549 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 581BBC4320E for ; Wed, 1 Sep 2021 23:49:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 39B016023E for ; Wed, 1 Sep 2021 23:49:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236573AbhIAXuM (ORCPT ); Wed, 1 Sep 2021 19:50:12 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:53740 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232620AbhIAXuM (ORCPT ); Wed, 1 Sep 2021 19:50:12 -0400 Received: from Monstersaurus.local (cpc89244-aztw30-2-0-cust3082.18-1.cable.virginm.net [86.31.172.11]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 27915340; Thu, 2 Sep 2021 01:49:13 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1630540153; bh=yiZf7hKsFwfAJPraNOdemkX+KRO3P5FxkSgTRiLb3lQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nMTXNk/MSp5TornyyDPpYdzNSibwRr2FNcO4EH4CDSCI9+ku0IseB6xPZKAXlIJKR q2NoXGaOHx2y+yBiiPwjxpsWhcM/Mn6wWI4JFeldPfDk30QFO4mBShtzCnwVbiR/7O OBUiSHKbpFG0GmdmeVYmIxipQ+aziLa4R1+aL8j4= From: Kieran Bingham To: linux-renesas-soc@vger.kernel.org, Laurent Pinchart Cc: Kieran Bingham , Kieran Bingham , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org (open list:DRM DRIVERS FOR RENESAS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 4/5] drm: rcar-du: Split CRTC IRQ and Clock features Date: Thu, 2 Sep 2021 00:49:06 +0100 Message-Id: <20210901234907.1608896-5-kieran.bingham@ideasonboard.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210901234907.1608896-1-kieran.bingham@ideasonboard.com> References: <20210901234907.1608896-1-kieran.bingham@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org Not all platforms require both per-crtc IRQ and per-crtc clock management. In preparation for suppporting such platforms, split the feature macro to be able to specify both features independently. The other features are incremented accordingly, to keep the two crtc features adjacent. Signed-off-by: Kieran Bingham Reviewed-by: Laurent Pinchart --- v2: - New patch drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 4 +-- drivers/gpu/drm/rcar-du/rcar_du_drv.c | 48 +++++++++++++++++--------- drivers/gpu/drm/rcar-du/rcar_du_drv.h | 9 ++--- 3 files changed, 39 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index a0f837e8243a..5672830ca184 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -1206,7 +1206,7 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex, int ret; /* Get the CRTC clock and the optional external clock. */ - if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CRTC_IRQ_CLOCK)) { + if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CRTC_CLOCK)) { sprintf(clk_name, "du.%u", hwindex); name = clk_name; } else { @@ -1272,7 +1272,7 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex, drm_crtc_helper_add(crtc, &crtc_helper_funcs); /* Register the interrupt handler. */ - if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CRTC_IRQ_CLOCK)) { + if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CRTC_IRQ)) { /* The IRQ's are associated with the CRTC (sw)index. */ irq = platform_get_irq(pdev, swindex); irqflags = 0; diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c index 4ac26d08ebb4..8a094d5b9c77 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c @@ -36,7 +36,8 @@ static const struct rcar_du_device_info rzg1_du_r8a7743_info = { .gen = 2, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, .channels_mask = BIT(1) | BIT(0), @@ -58,7 +59,8 @@ static const struct rcar_du_device_info rzg1_du_r8a7743_info = { static const struct rcar_du_device_info rzg1_du_r8a7745_info = { .gen = 2, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, .channels_mask = BIT(1) | BIT(0), @@ -79,7 +81,8 @@ static const struct rcar_du_device_info rzg1_du_r8a7745_info = { static const struct rcar_du_device_info rzg1_du_r8a77470_info = { .gen = 2, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, .channels_mask = BIT(1) | BIT(0), @@ -105,7 +108,8 @@ static const struct rcar_du_device_info rzg1_du_r8a77470_info = { static const struct rcar_du_device_info rcar_du_r8a774a1_info = { .gen = 3, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_VSP1_SOURCE | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, @@ -134,7 +138,8 @@ static const struct rcar_du_device_info rcar_du_r8a774a1_info = { static const struct rcar_du_device_info rcar_du_r8a774b1_info = { .gen = 3, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_VSP1_SOURCE | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, @@ -163,7 +168,8 @@ static const struct rcar_du_device_info rcar_du_r8a774b1_info = { static const struct rcar_du_device_info rcar_du_r8a774c0_info = { .gen = 3, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_VSP1_SOURCE, .channels_mask = BIT(1) | BIT(0), .routes = { @@ -189,7 +195,8 @@ static const struct rcar_du_device_info rcar_du_r8a774c0_info = { static const struct rcar_du_device_info rcar_du_r8a774e1_info = { .gen = 3, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_VSP1_SOURCE | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, @@ -239,7 +246,8 @@ static const struct rcar_du_device_info rcar_du_r8a7779_info = { static const struct rcar_du_device_info rcar_du_r8a7790_info = { .gen = 2, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, .quirks = RCAR_DU_QUIRK_ALIGN_128B, @@ -269,7 +277,8 @@ static const struct rcar_du_device_info rcar_du_r8a7790_info = { /* M2-W (r8a7791) and M2-N (r8a7793) are identical */ static const struct rcar_du_device_info rcar_du_r8a7791_info = { .gen = 2, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, .channels_mask = BIT(1) | BIT(0), @@ -292,7 +301,8 @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = { static const struct rcar_du_device_info rcar_du_r8a7792_info = { .gen = 2, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, .channels_mask = BIT(1) | BIT(0), @@ -311,7 +321,8 @@ static const struct rcar_du_device_info rcar_du_r8a7792_info = { static const struct rcar_du_device_info rcar_du_r8a7794_info = { .gen = 2, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, .channels_mask = BIT(1) | BIT(0), @@ -333,7 +344,8 @@ static const struct rcar_du_device_info rcar_du_r8a7794_info = { static const struct rcar_du_device_info rcar_du_r8a7795_info = { .gen = 3, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_VSP1_SOURCE | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, @@ -366,7 +378,8 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = { static const struct rcar_du_device_info rcar_du_r8a7796_info = { .gen = 3, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_VSP1_SOURCE | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, @@ -395,7 +408,8 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = { static const struct rcar_du_device_info rcar_du_r8a77965_info = { .gen = 3, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_VSP1_SOURCE | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, @@ -424,7 +438,8 @@ static const struct rcar_du_device_info rcar_du_r8a77965_info = { static const struct rcar_du_device_info rcar_du_r8a77970_info = { .gen = 3, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_VSP1_SOURCE | RCAR_DU_FEATURE_INTERLACED | RCAR_DU_FEATURE_TVM_SYNC, @@ -448,7 +463,8 @@ static const struct rcar_du_device_info rcar_du_r8a77970_info = { static const struct rcar_du_device_info rcar_du_r8a7799x_info = { .gen = 3, - .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK | RCAR_DU_FEATURE_VSP1_SOURCE, .channels_mask = BIT(1) | BIT(0), .routes = { diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h index 02ca2d0e1b55..5fe9152454ff 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h @@ -26,10 +26,11 @@ struct drm_bridge; struct drm_property; struct rcar_du_device; -#define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK BIT(0) /* Per-CRTC IRQ and clock */ -#define RCAR_DU_FEATURE_VSP1_SOURCE BIT(1) /* Has inputs from VSP1 */ -#define RCAR_DU_FEATURE_INTERLACED BIT(2) /* HW supports interlaced */ -#define RCAR_DU_FEATURE_TVM_SYNC BIT(3) /* Has TV switch/sync modes */ +#define RCAR_DU_FEATURE_CRTC_IRQ BIT(0) /* Per-CRTC IRQ */ +#define RCAR_DU_FEATURE_CRTC_CLOCK BIT(1) /* Per-CRTC clock */ +#define RCAR_DU_FEATURE_VSP1_SOURCE BIT(2) /* Has inputs from VSP1 */ +#define RCAR_DU_FEATURE_INTERLACED BIT(3) /* HW supports interlaced */ +#define RCAR_DU_FEATURE_TVM_SYNC BIT(4) /* Has TV switch/sync modes */ #define RCAR_DU_QUIRK_ALIGN_128B BIT(0) /* Align pitches to 128 bytes */ From patchwork Wed Sep 1 23:49:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kieran Bingham X-Patchwork-Id: 12470551 X-Patchwork-Delegate: kieran@bingham.xyz Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0420C432BE for ; Wed, 1 Sep 2021 23:49:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CAE876023E for ; Wed, 1 Sep 2021 23:49:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239077AbhIAXuO (ORCPT ); Wed, 1 Sep 2021 19:50:14 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:53766 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235391AbhIAXuN (ORCPT ); Wed, 1 Sep 2021 19:50:13 -0400 Received: from Monstersaurus.local (cpc89244-aztw30-2-0-cust3082.18-1.cable.virginm.net [86.31.172.11]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id C4EDF1909; Thu, 2 Sep 2021 01:49:13 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1630540154; bh=KR+5ekX2d7jbFxpRvg5s+HRzyRMzZ198XHNPIp2ghgg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OxpYBnfqPpr3kLhTcfrGIHXxISWsGQrRVUXPdf2fTkLEIlh/g4zSeCYDQaABBqzrx TCnMJMALK3epIW7VS+BC7lve8DikMiMS1tu7mLLGvUEBaUKYwR3tEpAAQ7u709KXd3 khBme0lOeUXzrespriNV+YKTbNp/gTa72mKuD350= From: Kieran Bingham To: linux-renesas-soc@vger.kernel.org, Laurent Pinchart Cc: Kieran Bingham , David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org (open list:DRM DRIVERS FOR RENESAS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 5/5] drm: rcar-du: Add r8a779a0 device support Date: Thu, 2 Sep 2021 00:49:07 +0100 Message-Id: <20210901234907.1608896-6-kieran.bingham@ideasonboard.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210901234907.1608896-1-kieran.bingham@ideasonboard.com> References: <20210901234907.1608896-1-kieran.bingham@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Kieran Bingham Extend the rcar_du_device_info structure and rcar_du_output enum to support DSI outputs and utilise these additions to provide support for the R8A779A0 V3U platform. While the DIDSR register field is now named "DSI/CSI-2-TX-IF0 Dot Clock Select" the existing define LVDS0 is used, and is directly compatible from other DU variants. Signed-off-by: Kieran Bingham --- I can add a macro named DIDSR_LDCS_DSI0 duplicating DIDSR_LDCS_LVDS0 if it's deemed better. v2: - No longer requires a direct interface with the DSI encoder - Use correct field naming (LDCS) - Remove per-crtc clock feature. drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 2 ++ drivers/gpu/drm/rcar-du/rcar_du_drv.c | 20 ++++++++++++++++++++ drivers/gpu/drm/rcar-du/rcar_du_drv.h | 2 ++ drivers/gpu/drm/rcar-du/rcar_du_group.c | 2 ++ 4 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h index 440e6b4fbb58..26e79b74898c 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h @@ -96,6 +96,8 @@ struct rcar_du_crtc_state { enum rcar_du_output { RCAR_DU_OUTPUT_DPAD0, RCAR_DU_OUTPUT_DPAD1, + RCAR_DU_OUTPUT_DSI0, + RCAR_DU_OUTPUT_DSI1, RCAR_DU_OUTPUT_HDMI0, RCAR_DU_OUTPUT_HDMI1, RCAR_DU_OUTPUT_LVDS0, diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c index 8a094d5b9c77..8b4c8851b6bc 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c @@ -489,6 +489,25 @@ static const struct rcar_du_device_info rcar_du_r8a7799x_info = { .lvds_clk_mask = BIT(1) | BIT(0), }; +static const struct rcar_du_device_info rcar_du_r8a779a0_info = { + .gen = 3, + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_VSP1_SOURCE, + .channels_mask = BIT(1) | BIT(0), + .routes = { + /* R8A779A0 has two MIPI DSI outputs. */ + [RCAR_DU_OUTPUT_DSI0] = { + .possible_crtcs = BIT(0), + .port = 0, + }, + [RCAR_DU_OUTPUT_DSI1] = { + .possible_crtcs = BIT(1), + .port = 1, + }, + }, + .dsi_clk_mask = BIT(1) | BIT(0), +}; + static const struct of_device_id rcar_du_of_table[] = { { .compatible = "renesas,du-r8a7742", .data = &rcar_du_r8a7790_info }, { .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info }, @@ -513,6 +532,7 @@ static const struct of_device_id rcar_du_of_table[] = { { .compatible = "renesas,du-r8a77980", .data = &rcar_du_r8a77970_info }, { .compatible = "renesas,du-r8a77990", .data = &rcar_du_r8a7799x_info }, { .compatible = "renesas,du-r8a77995", .data = &rcar_du_r8a7799x_info }, + { .compatible = "renesas,du-r8a779a0", .data = &rcar_du_r8a779a0_info }, { } }; diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h index 5fe9152454ff..cf98d43d72d0 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h @@ -57,6 +57,7 @@ struct rcar_du_output_routing { * @routes: array of CRTC to output routes, indexed by output (RCAR_DU_OUTPUT_*) * @num_lvds: number of internal LVDS encoders * @dpll_mask: bit mask of DU channels equipped with a DPLL + * @dsi_clk_mask: bitmask of channels that can use the DSI clock as dot clock * @lvds_clk_mask: bitmask of channels that can use the LVDS clock as dot clock */ struct rcar_du_device_info { @@ -67,6 +68,7 @@ struct rcar_du_device_info { struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX]; unsigned int num_lvds; unsigned int dpll_mask; + unsigned int dsi_clk_mask; unsigned int lvds_clk_mask; }; diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c index a984eef265d2..27c912bab76e 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_group.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c @@ -124,6 +124,8 @@ static void rcar_du_group_setup_didsr(struct rcar_du_group *rgrp) if (rcdu->info->lvds_clk_mask & BIT(rcrtc->index)) didsr |= DIDSR_LDCS_LVDS0(i) | DIDSR_PDCS_CLK(i, 0); + else if (rcdu->info->dsi_clk_mask & BIT(rcrtc->index)) + didsr |= DIDSR_LDCS_LVDS0(i); else didsr |= DIDSR_LDCS_DCLKIN(i) | DIDSR_PDCS_CLK(i, 0);