From patchwork Fri Sep 10 16:38:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Birsan X-Patchwork-Id: 12485605 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC0ECC433FE for ; Fri, 10 Sep 2021 16:39:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 93966611CE for ; Fri, 10 Sep 2021 16:39:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230020AbhIJQkQ (ORCPT ); Fri, 10 Sep 2021 12:40:16 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:29242 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229972AbhIJQkP (ORCPT ); Fri, 10 Sep 2021 12:40:15 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1631291944; x=1662827944; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jbQHrCnbrHZDMHkoDO6acIBG7KqyxGyyCwJQT7ukBw8=; b=nTJdUOVN7US5FZeRGKSTYlQSt4Zangqy3NMfZ8hYcdcetKn2J8KCLnMx 7Kw8vLO9YkNgepoQAXvXAsDJTX2vK32/bsK0F9ONcQFPsOEqZbfr1kLOh DbfEBScZnPecoMCEt3gBLE8gfjDaILKG+fejhu/mgfbxlhcZAa72N8JPQ GjDcY1lSwxPZt0SWqDJ8GCfquHXnWU1BsJK7DOVVaZoVl03C4xIScFP88 0PaF+poo3BGyTw+OUj6J1NXieTTf/4Y+wpVkjJjOWRhsL/0ln/jWG+I+Z gYIXFJpL+mztoekBUCk1utTKzfXuUTd8EUWTVVAfCRHvIJiGNhrUMzcje g==; IronPort-SDR: KOOWm0v9t6LlQZWvkOeXO59HhJQ8h5wfsDpkATe8v30OJsq4WWq1yGXA0XFX3G3lPAqTfZ1ydV ro8mLli7e4sW4zjbVD8M3Ejg4C6I0UG+F9tMExjCDAyi5xq4FAh4Mvv5sVZpuyVJFzeV1xU/5u Ho2QJT8Z1IDd6ximzOaLkAc3ZgIxe2HM9dOIosSENePbsaERUcts9U4omTBvEdh25dmsWQrCgE ZtGiqE23epp5+y0Bgw4s+smDbbbgsfub+pG+Dhla1Kax1Bwflo7Y1Rv8DZ64vmlkeKClJIFizn 9E3r1Y0GmffSnRPo9E54DC7f X-IronPort-AV: E=Sophos;i="5.85,283,1624345200"; d="scan'208";a="128921683" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 10 Sep 2021 09:39:03 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Fri, 10 Sep 2021 09:39:03 -0700 Received: from plexus-g.actel.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Fri, 10 Sep 2021 09:39:00 -0700 From: To: , , , , , CC: , , , Cristian Birsan Subject: [PATCH 1/2] dt-bindings: usb: atmel: add USB PHY type property Date: Fri, 10 Sep 2021 19:38:41 +0300 Message-ID: <20210910163842.1596407-2-cristian.birsan@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210910163842.1596407-1-cristian.birsan@microchip.com> References: <20210910163842.1596407-1-cristian.birsan@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Cristian Birsan Add USB PHY type property for controllers with HSIC support. Signed-off-by: Cristian Birsan --- Documentation/devicetree/bindings/usb/atmel-usb.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/atmel-usb.txt b/Documentation/devicetree/bindings/usb/atmel-usb.txt index a4002624ba14..f512f0290728 100644 --- a/Documentation/devicetree/bindings/usb/atmel-usb.txt +++ b/Documentation/devicetree/bindings/usb/atmel-usb.txt @@ -39,6 +39,10 @@ Required properties: "ehci_clk" for the peripheral clock "usb_clk" for the UTMI clock +Optional properties: + - phy_type : For multi port host USB controllers, should be one of + "utmi", or "hsic". + usb1: ehci@800000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00800000 0x100000>; From patchwork Fri Sep 10 16:38:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Birsan X-Patchwork-Id: 12485607 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE954C433F5 for ; Fri, 10 Sep 2021 16:39:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B6FD7611CC for ; Fri, 10 Sep 2021 16:39:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230265AbhIJQkW (ORCPT ); Fri, 10 Sep 2021 12:40:22 -0400 Received: from esa.microchip.iphmx.com ([68.232.154.123]:29242 "EHLO esa.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229972AbhIJQkS (ORCPT ); Fri, 10 Sep 2021 12:40:18 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1631291947; x=1662827947; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=j3/W4EVBQOz9yH/HC2QsqbHvKVE/H182DHHZWWu1UyY=; b=jfzkFq0GNThvjZggI1uphjeOs+v1r7kJU5I8pUR7z2Lu6kYwFd2nW6nd 8im4xRjocBal/NWgH6J4U6xuH7GNQ9lsMtWB37Q8kcRoeo80b620yNgx8 TVrhk6YZWL+Swxhd4elEf7sKPnARyp0WAQxZlCuZyyL5i/KXex9ldAY5t fe3s+tJPoO8RMHalTY/gYsBUVoP4HhLwYTGrlaqLiuLjMYUrfQKtDlAgl G3GShlHDWSd47wkmGB8JUvpUuAPyBOLwk4Xg4NZQCTS3og5z+FvUlMInC LHJvwA+rB3Pk9IAP7d6EjnpkahRTTGAaqa4r+XXi8Uw3ELA97Vm/1Tr5t A==; IronPort-SDR: /Z6pG8TEJkhA6tlDKFyAAC8ZuEQdHh4tI8jwvWJiG2D8RLvZn5k6CAmRhQr3TXQnThyePZlAIR G3EhUndK5ivhI2UqqbjSkq7HcMFt5Oiy91F8nMHYyN+uglu1W98gMGxVy1fhH+2EyH+aIta8iK ATqopXeLcNNquXhcmiHFFE/zamMF7DmYypAHpsV4V36wQ+99/a6fJndH+B/VsyOhv7zAmH7648 3v5SGkc77lioTj6KBDq3isEJE/N39UDTrxP5EqhOZXqMmzCcpfvhPuzyaSFhGPGD7H7Sk9FA7+ obwAGh2txsTDsF8caim4IF7/ X-IronPort-AV: E=Sophos;i="5.85,283,1624345200"; d="scan'208";a="128921696" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 10 Sep 2021 09:39:06 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Fri, 10 Sep 2021 09:39:06 -0700 Received: from plexus-g.actel.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Fri, 10 Sep 2021 09:39:04 -0700 From: To: , , , , , CC: , , , Cristian Birsan Subject: [PATCH 2/2] USB: host: ehci-atmel: Add support for HSIC phy Date: Fri, 10 Sep 2021 19:38:42 +0300 Message-ID: <20210910163842.1596407-3-cristian.birsan@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210910163842.1596407-1-cristian.birsan@microchip.com> References: <20210910163842.1596407-1-cristian.birsan@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Cristian Birsan Add support for USB Host High Speed Port HSIC phy. Signed-off-by: Cristian Birsan Acked-by: Alan Stern Tested-by: Alexander Dahl --- drivers/usb/host/ehci-atmel.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c index e893467d659c..05d41fd65f25 100644 --- a/drivers/usb/host/ehci-atmel.c +++ b/drivers/usb/host/ehci-atmel.c @@ -18,6 +18,8 @@ #include #include #include +#include +#include #include "ehci.h" @@ -25,6 +27,9 @@ static const char hcd_name[] = "ehci-atmel"; +#define EHCI_INSNREG(index) ((index) * 4 + 0x90) +#define EHCI_INSNREG08_HSIC_EN BIT(2) + /* interface and function clocks */ #define hcd_to_atmel_ehci_priv(h) \ ((struct atmel_ehci_priv *)hcd_to_ehci(h)->priv) @@ -154,6 +159,9 @@ static int ehci_atmel_drv_probe(struct platform_device *pdev) goto fail_add_hcd; device_wakeup_enable(hcd->self.controller); + if (of_usb_get_phy_mode(pdev->dev.of_node) == USBPHY_INTERFACE_MODE_HSIC) + writel(EHCI_INSNREG08_HSIC_EN, hcd->regs + EHCI_INSNREG(8)); + return retval; fail_add_hcd: