From patchwork Fri Sep 10 19:55:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesper Nilsson X-Patchwork-Id: 12485927 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E753FC433EF for ; Fri, 10 Sep 2021 19:57:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A479A611BD for ; Fri, 10 Sep 2021 19:57:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org A479A611BD Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=axis.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=BiICUh2LauhRhPKLVwL2amH4+hnwDTJ+xtmQj0FRFjo=; b=kjz0cDc6zDetE+ ocCM6KghLyCA2+kH4PfgiN3qLoVRvPbxLrEwPOQI6ZLe3AauwkqQiakz/bcCpyZwh/tO3qKhgRima jb0xI8qGe20chPrAmD44EmQ2MuY8t6whCaiauOCiZU4LxJiyKg4qScBEAC1jY2any66f/MAADVU6I FYV3vk7Z1BcbR+Hqil1awYqOO58nnkWlLhMcn2c4p4Th+6DGqsvM69fB6mKWZvi5/tDGhWbM8zvj9 k1vcX8rbplG8Vv6luJyz75NLzL4bG3BnAz0z/kMpWa/LroHc7G3hldL5W+xINKUN+Miv58mS6OPdc DZtn0mmAJHwqaphu6lag==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mOmd0-00Dc1r-GH; Fri, 10 Sep 2021 19:56:02 +0000 Received: from smtp2.axis.com ([195.60.68.18]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mOmcw-00Dbze-8f for linux-arm-kernel@lists.infradead.org; Fri, 10 Sep 2021 19:56:00 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=axis.com; q=dns/txt; s=axis-central1; t=1631303758; x=1662839758; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=RxHsFDpgPb8WljFHoMd0jVOTaLKbxwOshUbSMEYRLiE=; b=HuUNrCO7Lp7E1s2NK0h4HMowldC8B8fn8hSUa3D2iR9dXXj0hUC7D/SP vP3JJwxY0uqbHr+u3fJ35SSmbRZFUSucnmzTfDxo/fCsFhuyy6NGRAOkr 8cUJTGpAtGcc3g55xKrf3Pdw8dEO+Ys1W11kQilS279RsZHKwU9d7a178 elrbuU2Xv5PCSVJ2FS+XyVQhQW9zZVpNGfdHKTOOvC6Pl1gXWHYdZ+yXW R2rDqoy0O+Kz6pj3c5gok+BNj9F7tRC00rI6fmK/Q+IvwLGylcjfj6dpg anmFU8boiYPhKfDv4ux1AFDH7nv6rjeyTt878tk1v4ZDReiZYzhVi5l2h g==; From: Jesper Nilsson To: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Jakub Kicinski , Maxime Coquelin CC: , Jesper Nilsson , , , , Subject: [PATCH] net: stmmac: allow CSR clock of 300MHz Date: Fri, 10 Sep 2021 21:55:34 +0200 Message-ID: <20210910195535.12533-1-jesper.nilsson@axis.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210910_125558_687739_E64F4E08 X-CRM114-Status: GOOD ( 13.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Synopsys Ethernet IP uses the CSR clock as a base clock for MDC. The divisor used is set in the MAC_MDIO_Address register field CR (Clock Rate) The divisor is there to change the CSR clock into a clock that falls below the IEEE 802.3 specified max frequency of 2.5MHz. If the CSR clock is 300MHz, the code falls back to using the reset value in the MAC_MDIO_Address register, as described in the comment above this code. However, 300MHz is actually an allowed value and the proper divider can be estimated quite easily (it's just 1Hz difference!) A CSR frequency of 300MHz with the maximum clock rate value of 0x5 (STMMAC_CSR_250_300M, a divisor of 124) gives somewhere around ~2.42MHz which is below the IEEE 802.3 specified maximum. For the ARTPEC-8 SoC, the CSR clock is this problematic 300MHz, and unfortunately, the reset-value of the MAC_MDIO_Address CR field is 0x0. This leads to a clock rate of zero and a divisor of 42, and gives an MDC frequency of ~7.14MHz. Allow CSR clock of 300MHz by making the comparison inclusive. Signed-off-by: Jesper Nilsson --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index ece02b35a6ce..6560d9f24715 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -309,7 +309,7 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) priv->clk_csr = STMMAC_CSR_100_150M; else if ((clk_rate >= CSR_F_150M) && (clk_rate < CSR_F_250M)) priv->clk_csr = STMMAC_CSR_150_250M; - else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M)) + else if ((clk_rate >= CSR_F_250M) && (clk_rate <= CSR_F_300M)) priv->clk_csr = STMMAC_CSR_250_300M; }