From patchwork Mon Sep 13 17:57:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 12490363 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74356C433EF for ; Mon, 13 Sep 2021 17:58:01 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 42FB160F12 for ; Mon, 13 Sep 2021 17:58:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 42FB160F12 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=poorly.run Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4F1776ECD0; Mon, 13 Sep 2021 17:58:00 +0000 (UTC) Received: from mail-qv1-xf2a.google.com (mail-qv1-xf2a.google.com [IPv6:2607:f8b0:4864:20::f2a]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2C96F6ECD0 for ; Mon, 13 Sep 2021 17:57:59 +0000 (UTC) Received: by mail-qv1-xf2a.google.com with SMTP id w9so6594927qvs.12 for ; Mon, 13 Sep 2021 10:57:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=poorly.run; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=d+0c/KjUqHpn1GIpqDl1Ixs4GRpYVbJG/MuBx+V7P1E=; b=L2tP1y7CEde/wo8dGafkL2fdhZr3wgmZaU7pjDYSC8mtd1/VTtid6IM2/6Wm88/09k afqZ2fx+Iop2Er9d9kjfAZGDbhnD7+RKud7s2ATW22u5ZNT+OpC2se9BSdw9HDh/ox0G L4KZ76l7YUm56BMHFvMMugVHt022JaY0W0OBZDG6h/utFJtptDp5oDauoJ9PGKg7TuPi At0UbnKU+pXO8q60bzOthEyP7gzmYVO9Uo91pA+UAyh/m9vj1SiDXG+bFRnJQe4zalll /yO2efNAg0RVK4FOVY3ecf9AObzThSoshjWpJbhqhdzTQfQ4z4pubT+nPUruksmHrAAl YRmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=d+0c/KjUqHpn1GIpqDl1Ixs4GRpYVbJG/MuBx+V7P1E=; b=pbiBcjN856ekbJyNaMeV0iy6T9nbtlA7cCvD6/b8Nab+/E00nzUNuksgu3djSG/Zvh mNwRcaP34aivT+mumcU3tYM7ZEoa1qJlL8w9xc0oUIdMKfT28P4vmhGAOhagoSHSdwbP Gr06w8kyrtGbrPME8+/LQltEP/CUsx9VMHXGSGUVpv8hAANQIYTHS8AA9v7/JeJocb43 GwhA6nnGAqhzv+ZvWBjMxagnYo+Tn0A8ztOSQHirp0EnF7QiPSSyYD+/9U/sZW6C8ZLT ESbr0XqCqrLEUaobMzV77JC/zl1cyyUReuclOxxuH17C88m0TC6nl70wXAMxGUtqDUT+ I4eg== X-Gm-Message-State: AOAM533fEnuhc7IpsNKcCdT9jZ313x/sF27J6kEQ44I506AMTGjcMkh1 k3aPbH4VJXeYS1c9hBQGA8Dx6w== X-Google-Smtp-Source: ABdhPJzgOA+MQYu6102Tw2pNq32mMaxtBCf0LPuRsCDXivqHAjwWda/4NYevbH+UtasEBLNSAw+Ajw== X-Received: by 2002:a0c:ab01:: with SMTP id h1mr819572qvb.0.1631555878221; Mon, 13 Sep 2021 10:57:58 -0700 (PDT) Received: from localhost ([167.100.64.199]) by smtp.gmail.com with ESMTPSA id w20sm5949891qkj.116.2021.09.13.10.57.57 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 13 Sep 2021 10:57:57 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi Date: Mon, 13 Sep 2021 13:57:32 -0400 Message-Id: <20210913175747.47456-2-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 01/14] drm/hdcp: Add drm_hdcp_atomic_check() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul This patch moves the hdcp atomic check from i915 to drm_hdcp so other drivers can use it. No functional changes, just cleaned up some of the code when moving it over. Signed-off-by: Sean Paul --- drivers/gpu/drm/drm_hdcp.c | 71 ++++++++++++++++++++- drivers/gpu/drm/i915/display/intel_atomic.c | 4 +- drivers/gpu/drm/i915/display/intel_hdcp.c | 47 -------------- drivers/gpu/drm/i915/display/intel_hdcp.h | 3 - include/drm/drm_hdcp.h | 3 + 5 files changed, 75 insertions(+), 53 deletions(-) diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c index ca9b8f697202..522326b03e66 100644 --- a/drivers/gpu/drm/drm_hdcp.c +++ b/drivers/gpu/drm/drm_hdcp.c @@ -13,13 +13,14 @@ #include #include +#include +#include #include #include #include #include #include #include -#include #include "drm_internal.h" @@ -421,3 +422,71 @@ void drm_hdcp_update_content_protection(struct drm_connector *connector, dev->mode_config.content_protection_property); } EXPORT_SYMBOL(drm_hdcp_update_content_protection); + +/** + * drm_hdcp_atomic_check - Helper for drivers to call during connector->atomic_check + * + * @state: pointer to the atomic state being checked + * @connector: drm_connector on which content protection state needs an update + * + * This function can be used by display drivers to perform an atomic check on the + * hdcp state elements. If hdcp state has changed, this function will set + * mode_changed on the crtc driving the connector so it can update its hardware + * to match the hdcp state. + */ +void drm_hdcp_atomic_check(struct drm_connector *connector, + struct drm_atomic_state *state) +{ + struct drm_connector_state *new_conn_state, *old_conn_state; + struct drm_crtc_state *new_crtc_state; + u64 old_hdcp, new_hdcp; + + old_conn_state = drm_atomic_get_old_connector_state(state, connector); + old_hdcp = old_conn_state->content_protection; + + new_conn_state = drm_atomic_get_new_connector_state(state, connector); + new_hdcp = new_conn_state->content_protection; + + if (!new_conn_state->crtc) { + /* + * If the connector is being disabled with CP enabled, mark it + * desired so it's re-enabled when the connector is brought back + */ + if (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) + new_conn_state->content_protection = + DRM_MODE_CONTENT_PROTECTION_DESIRED; + return; + } + + new_crtc_state = drm_atomic_get_new_crtc_state(state, + new_conn_state->crtc); + /* + * Fix the HDCP uapi content protection state in case of modeset. + * FIXME: As per HDCP content protection property uapi doc, an uevent() + * need to be sent if there is transition from ENABLED->DESIRED. + */ + if (drm_atomic_crtc_needs_modeset(new_crtc_state) && + (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED && + new_hdcp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)) + new_conn_state->content_protection = + DRM_MODE_CONTENT_PROTECTION_DESIRED; + + /* + * Nothing to do if content type is unchanged and one of: + * - state didn't change + * - HDCP was activated since the last commit + * - attempting to set to desired while already enabled + */ + if (old_hdcp == new_hdcp || + (old_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED && + new_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) || + (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED && + new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED)) { + if (old_conn_state->hdcp_content_type == + new_conn_state->hdcp_content_type) + return; + } + + new_crtc_state->mode_changed = true; +} +EXPORT_SYMBOL(drm_hdcp_atomic_check); diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c index b4e7ac51aa31..1e306e8427ec 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic.c +++ b/drivers/gpu/drm/i915/display/intel_atomic.c @@ -32,13 +32,13 @@ #include #include #include +#include #include #include "intel_atomic.h" #include "intel_cdclk.h" #include "intel_display_types.h" #include "intel_global_state.h" -#include "intel_hdcp.h" #include "intel_psr.h" #include "skl_universal_plane.h" @@ -122,7 +122,7 @@ int intel_digital_connector_atomic_check(struct drm_connector *conn, to_intel_digital_connector_state(old_state); struct drm_crtc_state *crtc_state; - intel_hdcp_atomic_check(conn, old_state, new_state); + drm_hdcp_atomic_check(conn, state); if (!new_state->crtc) return 0; diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index 9b9fd9d13043..feebafead046 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -2501,53 +2501,6 @@ void intel_hdcp_cleanup(struct intel_connector *connector) mutex_unlock(&hdcp->mutex); } -void intel_hdcp_atomic_check(struct drm_connector *connector, - struct drm_connector_state *old_state, - struct drm_connector_state *new_state) -{ - u64 old_cp = old_state->content_protection; - u64 new_cp = new_state->content_protection; - struct drm_crtc_state *crtc_state; - - if (!new_state->crtc) { - /* - * If the connector is being disabled with CP enabled, mark it - * desired so it's re-enabled when the connector is brought back - */ - if (old_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED) - new_state->content_protection = - DRM_MODE_CONTENT_PROTECTION_DESIRED; - return; - } - - crtc_state = drm_atomic_get_new_crtc_state(new_state->state, - new_state->crtc); - /* - * Fix the HDCP uapi content protection state in case of modeset. - * FIXME: As per HDCP content protection property uapi doc, an uevent() - * need to be sent if there is transition from ENABLED->DESIRED. - */ - if (drm_atomic_crtc_needs_modeset(crtc_state) && - (old_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED && - new_cp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)) - new_state->content_protection = - DRM_MODE_CONTENT_PROTECTION_DESIRED; - - /* - * Nothing to do if the state didn't change, or HDCP was activated since - * the last commit. And also no change in hdcp content type. - */ - if (old_cp == new_cp || - (old_cp == DRM_MODE_CONTENT_PROTECTION_DESIRED && - new_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED)) { - if (old_state->hdcp_content_type == - new_state->hdcp_content_type) - return; - } - - crtc_state->mode_changed = true; -} - /* Handles the CP_IRQ raised from the DP HDCP sink */ void intel_hdcp_handle_cp_irq(struct intel_connector *connector) { diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h index 8f53b0c7fe5c..7c5fd84a7b65 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.h +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h @@ -22,9 +22,6 @@ struct intel_digital_port; enum port; enum transcoder; -void intel_hdcp_atomic_check(struct drm_connector *connector, - struct drm_connector_state *old_state, - struct drm_connector_state *new_state); int intel_hdcp_init(struct intel_connector *connector, struct intel_digital_port *dig_port, const struct intel_hdcp_shim *hdcp_shim); diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h index 0b1111e3228e..d49977a042e1 100644 --- a/include/drm/drm_hdcp.h +++ b/include/drm/drm_hdcp.h @@ -291,6 +291,7 @@ struct hdcp_srm_header { u8 srm_gen_no; } __packed; +struct drm_atomic_state; struct drm_device; struct drm_connector; @@ -300,6 +301,8 @@ int drm_connector_attach_content_protection_property( struct drm_connector *connector, bool hdcp_content_type); void drm_hdcp_update_content_protection(struct drm_connector *connector, u64 val); +void drm_hdcp_atomic_check(struct drm_connector *connector, + struct drm_atomic_state *state); /* Content Type classification for HDCP2.2 vs others */ #define DRM_MODE_HDCP_CONTENT_TYPE0 0 From patchwork Mon Sep 13 17:57:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 12490365 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8950BC433FE for ; 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Mon, 13 Sep 2021 10:58:03 -0700 (PDT) Received: from localhost ([167.100.64.199]) by smtp.gmail.com with ESMTPSA id n18sm6033506qkn.63.2021.09.13.10.58.03 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 13 Sep 2021 10:58:03 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi Date: Mon, 13 Sep 2021 13:57:33 -0400 Message-Id: <20210913175747.47456-3-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 02/14] drm/hdcp: Avoid changing crtc state in hdcp atomic check X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul Instead of forcing a modeset in the hdcp atomic check, simply return true if the content protection value is changing and let the driver decide whether a modeset is required or not. Signed-off-by: Sean Paul --- drivers/gpu/drm/drm_hdcp.c | 33 +++++++++++++++------ drivers/gpu/drm/i915/display/intel_atomic.c | 5 ++-- include/drm/drm_hdcp.h | 2 +- 3 files changed, 27 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c index 522326b03e66..dd8fa91c51d6 100644 --- a/drivers/gpu/drm/drm_hdcp.c +++ b/drivers/gpu/drm/drm_hdcp.c @@ -430,11 +430,14 @@ EXPORT_SYMBOL(drm_hdcp_update_content_protection); * @connector: drm_connector on which content protection state needs an update * * This function can be used by display drivers to perform an atomic check on the - * hdcp state elements. If hdcp state has changed, this function will set - * mode_changed on the crtc driving the connector so it can update its hardware - * to match the hdcp state. + * hdcp state elements. If hdcp state has changed in a manner which requires the + * driver to enable or disable content protection, this function will return + * true. + * + * Returns: + * true if the driver must enable/disable hdcp, false otherwise */ -void drm_hdcp_atomic_check(struct drm_connector *connector, +bool drm_hdcp_atomic_check(struct drm_connector *connector, struct drm_atomic_state *state) { struct drm_connector_state *new_conn_state, *old_conn_state; @@ -452,10 +455,12 @@ void drm_hdcp_atomic_check(struct drm_connector *connector, * If the connector is being disabled with CP enabled, mark it * desired so it's re-enabled when the connector is brought back */ - if (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) + if (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) { new_conn_state->content_protection = DRM_MODE_CONTENT_PROTECTION_DESIRED; - return; + return true; + } + return false; } new_crtc_state = drm_atomic_get_new_crtc_state(state, @@ -467,9 +472,19 @@ void drm_hdcp_atomic_check(struct drm_connector *connector, */ if (drm_atomic_crtc_needs_modeset(new_crtc_state) && (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED && - new_hdcp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)) + new_hdcp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)) { new_conn_state->content_protection = DRM_MODE_CONTENT_PROTECTION_DESIRED; + return true; + } + + /* + * Coming back from disable or changing CRTC with DESIRED state requires + * that the driver try CP enable. + */ + if (new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED && + new_conn_state->crtc != old_conn_state->crtc) + return true; /* * Nothing to do if content type is unchanged and one of: @@ -484,9 +499,9 @@ void drm_hdcp_atomic_check(struct drm_connector *connector, new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED)) { if (old_conn_state->hdcp_content_type == new_conn_state->hdcp_content_type) - return; + return false; } - new_crtc_state->mode_changed = true; + return true; } EXPORT_SYMBOL(drm_hdcp_atomic_check); diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c index 1e306e8427ec..c7b5470c40aa 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic.c +++ b/drivers/gpu/drm/i915/display/intel_atomic.c @@ -122,8 +122,6 @@ int intel_digital_connector_atomic_check(struct drm_connector *conn, to_intel_digital_connector_state(old_state); struct drm_crtc_state *crtc_state; - drm_hdcp_atomic_check(conn, state); - if (!new_state->crtc) return 0; @@ -139,7 +137,8 @@ int intel_digital_connector_atomic_check(struct drm_connector *conn, new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio || new_conn_state->base.content_type != old_conn_state->base.content_type || new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode || - !drm_connector_atomic_hdr_metadata_equal(old_state, new_state)) + !drm_connector_atomic_hdr_metadata_equal(old_state, new_state) || + drm_hdcp_atomic_check(conn, state)) crtc_state->mode_changed = true; return 0; diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h index d49977a042e1..e6e3d16bc7d3 100644 --- a/include/drm/drm_hdcp.h +++ b/include/drm/drm_hdcp.h @@ -301,7 +301,7 @@ int drm_connector_attach_content_protection_property( struct drm_connector *connector, bool hdcp_content_type); void drm_hdcp_update_content_protection(struct drm_connector *connector, u64 val); -void drm_hdcp_atomic_check(struct drm_connector *connector, +bool drm_hdcp_atomic_check(struct drm_connector *connector, struct drm_atomic_state *state); /* Content Type classification for HDCP2.2 vs others */ From patchwork Mon Sep 13 17:57:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 12490367 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 478C5C433F5 for ; Mon, 13 Sep 2021 17:58:13 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 12B2E60F12 for ; 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Mon, 13 Sep 2021 10:58:08 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter Date: Mon, 13 Sep 2021 13:57:34 -0400 Message-Id: <20210913175747.47456-4-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 03/14] drm/hdcp: Update property value on content type and user changes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul This patch updates the connector's property value in 2 cases which were previously missed: 1- Content type changes. The value should revert back to DESIRED from ENABLED in case the driver must re-authenticate the link due to the new content type. 2- Userspace sets value to DESIRED while ENABLED. In this case, the value should be reset immediately to ENABLED since the link is actively being encrypted. To accommodate these changes, I've split up the conditionals to make things a bit more clear (as much as one can with this mess of state). Signed-off-by: Sean Paul --- drivers/gpu/drm/drm_hdcp.c | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c index dd8fa91c51d6..742313ce8f6f 100644 --- a/drivers/gpu/drm/drm_hdcp.c +++ b/drivers/gpu/drm/drm_hdcp.c @@ -487,21 +487,29 @@ bool drm_hdcp_atomic_check(struct drm_connector *connector, return true; /* - * Nothing to do if content type is unchanged and one of: - * - state didn't change + * Content type changes require an HDCP disable/enable cycle. + */ + if (new_conn_state->hdcp_content_type != old_conn_state->hdcp_content_type) { + new_conn_state->content_protection = + DRM_MODE_CONTENT_PROTECTION_DESIRED; + return true; + } + + /* + * Ignore meaningless state changes: * - HDCP was activated since the last commit - * - attempting to set to desired while already enabled + * - Attempting to set to desired while already enabled */ - if (old_hdcp == new_hdcp || - (old_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED && + if ((old_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED && new_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED) || (old_hdcp == DRM_MODE_CONTENT_PROTECTION_ENABLED && new_hdcp == DRM_MODE_CONTENT_PROTECTION_DESIRED)) { - if (old_conn_state->hdcp_content_type == - new_conn_state->hdcp_content_type) - return false; + new_conn_state->content_protection = + DRM_MODE_CONTENT_PROTECTION_ENABLED; + return false; } - return true; + /* Finally, if state changes, we need action */ + return old_hdcp != new_hdcp; } EXPORT_SYMBOL(drm_hdcp_atomic_check); From patchwork Mon Sep 13 17:57:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 12490369 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7313C433EF for ; Mon, 13 Sep 2021 17:58:17 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 77CE260F25 for ; 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Mon, 13 Sep 2021 10:58:12 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter Date: Mon, 13 Sep 2021 13:57:35 -0400 Message-Id: <20210913175747.47456-5-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 04/14] drm/hdcp: Expand HDCP helper library for enable/disable/check X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul This patch expands upon the HDCP helper library to manage HDCP enable, disable, and check. Previous to this patch, the majority of the state management and sink interaction is tucked inside the Intel driver with the understanding that once a new platform supported HDCP we could make good decisions about what should be centralized. With the addition of HDCP support for Qualcomm, it's time to migrate the protocol-specific bits of HDCP authentication, key exchange, and link checks to the HDCP helper. In terms of functionality, this migration is 1:1 with the Intel driver, however things are laid out a bit differently than with intel_hdcp.c, which is why this is a separate patch from the i915 transition to the helper. On i915, the "shim" vtable is used to account for HDMI vs. DP vs. DP-MST differences whereas the helper library uses a LUT to account for the register offsets and a remote read function to route the messages. On i915, storing the sink information in the source is done inline whereas now we use the new drm_hdcp_helper_funcs vtable to store and fetch information to/from source hw. Finally, instead of calling enable/disable directly from the driver, we'll leave that decision to the helper and by calling drm_hdcp_helper_atomic_commit() from the driver. All told, this will centralize the protocol and state handling in the helper, ensuring we collect all of our bugs^Wlogic in one place. Signed-off-by: Sean Paul Reported-by: kernel test robot --- drivers/gpu/drm/drm_hdcp.c | 1104 ++++++++++++++++++++++++++++++++++++ include/drm/drm_hdcp.h | 191 +++++++ 2 files changed, 1295 insertions(+) diff --git a/drivers/gpu/drm/drm_hdcp.c b/drivers/gpu/drm/drm_hdcp.c index 742313ce8f6f..c22390c127a2 100644 --- a/drivers/gpu/drm/drm_hdcp.c +++ b/drivers/gpu/drm/drm_hdcp.c @@ -6,15 +6,20 @@ * Ramalingam C */ +#include #include #include #include +#include +#include #include #include #include +#include #include #include +#include #include #include #include @@ -513,3 +518,1102 @@ bool drm_hdcp_atomic_check(struct drm_connector *connector, return old_hdcp != new_hdcp; } EXPORT_SYMBOL(drm_hdcp_atomic_check); + +struct drm_hdcp_helper_data { + struct mutex mutex; + struct mutex *driver_mutex; + + struct drm_connector *connector; + const struct drm_hdcp_helper_funcs *funcs; + + u64 value; + unsigned int enabled_type; + + struct delayed_work check_work; + struct work_struct prop_work; + + struct drm_dp_aux *aux; + const struct drm_hdcp_hdcp1_receiver_reg_lut *hdcp1_lut; +}; + +struct drm_hdcp_hdcp1_receiver_reg_lut { + unsigned int bksv; + unsigned int ri; + unsigned int aksv; + unsigned int an; + unsigned int ainfo; + unsigned int v[5]; + unsigned int bcaps; + unsigned int bcaps_mask_repeater_present; + unsigned int bstatus; +}; + +static const struct drm_hdcp_hdcp1_receiver_reg_lut drm_hdcp_hdcp1_ddc_lut = { + .bksv = DRM_HDCP_DDC_BKSV, + .ri = DRM_HDCP_DDC_RI_PRIME, + .aksv = DRM_HDCP_DDC_AKSV, + .an = DRM_HDCP_DDC_AN, + .ainfo = DRM_HDCP_DDC_AINFO, + .v = { DRM_HDCP_DDC_V_PRIME(0), DRM_HDCP_DDC_V_PRIME(1), + DRM_HDCP_DDC_V_PRIME(2), DRM_HDCP_DDC_V_PRIME(3), + DRM_HDCP_DDC_V_PRIME(4) }, + .bcaps = DRM_HDCP_DDC_BCAPS, + .bcaps_mask_repeater_present = DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT, + .bstatus = DRM_HDCP_DDC_BSTATUS, +}; + +static const struct drm_hdcp_hdcp1_receiver_reg_lut drm_hdcp_hdcp1_dpcd_lut = { + .bksv = DP_AUX_HDCP_BKSV, + .ri = DP_AUX_HDCP_RI_PRIME, + .aksv = DP_AUX_HDCP_AKSV, + .an = DP_AUX_HDCP_AN, + .ainfo = DP_AUX_HDCP_AINFO, + .v = { DP_AUX_HDCP_V_PRIME(0), DP_AUX_HDCP_V_PRIME(1), + DP_AUX_HDCP_V_PRIME(2), DP_AUX_HDCP_V_PRIME(3), + DP_AUX_HDCP_V_PRIME(4) }, + .bcaps = DP_AUX_HDCP_BCAPS, + .bcaps_mask_repeater_present = DP_BCAPS_REPEATER_PRESENT, + + /* + * For some reason the HDMI and DP HDCP specs call this register + * definition by different names. In the HDMI spec, it's called BSTATUS, + * but in DP it's called BINFO. + */ + .bstatus = DP_AUX_HDCP_BINFO, +}; + +static int drm_hdcp_remote_ddc_read(struct i2c_adapter *i2c, + unsigned int offset, u8 *value, size_t len) +{ + int ret; + u8 start = offset & 0xff; + struct i2c_msg msgs[] = { + { + .addr = DRM_HDCP_DDC_ADDR, + .flags = 0, + .len = 1, + .buf = &start, + }, + { + .addr = DRM_HDCP_DDC_ADDR, + .flags = I2C_M_RD, + .len = len, + .buf = value + } + }; + ret = i2c_transfer(i2c, msgs, ARRAY_SIZE(msgs)); + if (ret == ARRAY_SIZE(msgs)) + return 0; + return ret >= 0 ? -EIO : ret; +} + +static int drm_hdcp_remote_dpcd_read(struct drm_dp_aux *aux, + unsigned int offset, u8 *value, + size_t len) +{ + ssize_t ret; + + ret = drm_dp_dpcd_read(aux, offset, value, len); + if (ret != len) { + if (ret >= 0) + return -EIO; + return ret; + } + + return 0; +} + +static int drm_hdcp_remote_read(struct drm_hdcp_helper_data *data, + unsigned int offset, u8 *value, u8 len) +{ + if (data->aux) + return drm_hdcp_remote_dpcd_read(data->aux, offset, value, len); + else + return drm_hdcp_remote_ddc_read(data->connector->ddc, offset, value, len); +} + +static int drm_hdcp_remote_ddc_write(struct i2c_adapter *i2c, + unsigned int offset, u8 *buffer, + size_t size) +{ + int ret; + u8 *write_buf; + struct i2c_msg msg; + + write_buf = kzalloc(size + 1, GFP_KERNEL); + if (!write_buf) + return -ENOMEM; + + write_buf[0] = offset & 0xff; + memcpy(&write_buf[1], buffer, size); + + msg.addr = DRM_HDCP_DDC_ADDR; + msg.flags = 0, + msg.len = size + 1, + msg.buf = write_buf; + + ret = i2c_transfer(i2c, &msg, 1); + if (ret == 1) + ret = 0; + else if (ret >= 0) + ret = -EIO; + + kfree(write_buf); + return ret; +} + +static int drm_hdcp_remote_dpcd_write(struct drm_dp_aux *aux, + unsigned int offset, u8 *value, + size_t len) +{ + ssize_t ret; + + ret = drm_dp_dpcd_write(aux, offset, value, len); + if (ret != len) { + if (ret >= 0) + return -EIO; + return ret; + } + + return 0; +} + +static int drm_hdcp_remote_write(struct drm_hdcp_helper_data *data, + unsigned int offset, u8 *value, u8 len) +{ + if (data->aux) + return drm_hdcp_remote_dpcd_write(data->aux, offset, value, len); + else + return drm_hdcp_remote_ddc_write(data->connector->ddc, offset, + value, len); +} + +static bool drm_hdcp_is_ksv_valid(struct drm_hdcp_ksv *ksv) +{ + /* Valid Ksv has 20 0's and 20 1's */ + return hweight32(ksv->words[0]) + hweight32(ksv->words[1]) == 20; +} + +static int drm_hdcp_read_valid_bksv(struct drm_hdcp_helper_data *data, + struct drm_hdcp_ksv *bksv) +{ + int ret, i, tries = 2; + + /* HDCP spec states that we must retry the bksv if it is invalid */ + for (i = 0; i < tries; i++) { + ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bksv, + bksv->bytes, DRM_HDCP_KSV_LEN); + if (ret) + return ret; + + if (drm_hdcp_is_ksv_valid(bksv)) + break; + } + if (i == tries) { + drm_dbg_kms(data->connector->dev, "Bksv is invalid %*ph\n", + DRM_HDCP_KSV_LEN, bksv->bytes); + return -ENODEV; + } + + return 0; +} + +/** + * drm_hdcp_helper_hdcp1_capable - Checks if the sink is capable of HDCP 1.x. + * + * @data: pointer to the HDCP helper data. + * @capable: pointer to a bool which will contain true if the sink is capable. + * + * Returns: + * -errno if the transacation between source and sink fails. + */ +int drm_hdcp_helper_hdcp1_capable(struct drm_hdcp_helper_data *data, + bool *capable) +{ + /* + * DisplayPort has a dedicated bit for this in DPCD whereas HDMI spec + * states that transmitters should use bksv to determine capability. + */ + if (data->aux) { + int ret; + u8 bcaps; + + ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bcaps, + &bcaps, 1); + *capable = !ret && (bcaps & DP_BCAPS_HDCP_CAPABLE); + } else { + struct drm_hdcp_ksv bksv; + + *capable = drm_hdcp_read_valid_bksv(data, &bksv) == 0; + } + + return 0; +} +EXPORT_SYMBOL(drm_hdcp_helper_hdcp1_capable); + +static void drm_hdcp_update_value(struct drm_hdcp_helper_data *data, + u64 value, bool update_property) +{ + WARN_ON(!mutex_is_locked(&data->mutex)); + + data->value = value; + if (update_property) { + drm_connector_get(data->connector); + schedule_work(&data->prop_work); + } +} + +static int +drm_hdcp_helper_hdcp1_ksv_fifo_ready(struct drm_hdcp_helper_data *data) +{ + int ret; + u8 val, mask; + + /* KSV FIFO ready bit is stored in different locations on DP v. HDMI */ + if (data->aux) { + ret = drm_hdcp_remote_dpcd_read(data->aux, DP_AUX_HDCP_BSTATUS, + &val, 1); + mask = DP_BSTATUS_READY; + } else { + ret = drm_hdcp_remote_ddc_read(data->connector->ddc, + DRM_HDCP_DDC_BCAPS, &val, 1); + mask = DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY; + } + if (ret) + return ret; + if (val & mask) + return 0; + + return -EAGAIN; +} + +static int +drm_hdcp_helper_hdcp1_read_ksv_fifo(struct drm_hdcp_helper_data *data, u8 *fifo, + u8 num_downstream) +{ + struct drm_device *dev = data->connector->dev; + int ret, i; + + /* Over HDMI, read the whole thing at once */ + if (data->connector->ddc) { + ret = drm_hdcp_remote_ddc_read(data->connector->ddc, + DRM_HDCP_DDC_KSV_FIFO, fifo, + num_downstream * DRM_HDCP_KSV_LEN); + if (ret) + drm_err(dev, "DDC ksv fifo read failed (%d)\n", ret); + return ret; + } + + /* Over DP, read via 15 byte window (3 entries @ 5 bytes each) */ + for (i = 0; i < num_downstream; i += 3) { + size_t len = min(num_downstream - i, 3) * DRM_HDCP_KSV_LEN; + ret = drm_hdcp_remote_dpcd_read(data->aux, DP_AUX_HDCP_KSV_FIFO, + fifo + i * DRM_HDCP_KSV_LEN, + len); + if (ret) { + drm_err(dev, "Read ksv[%d] from DP/AUX failed (%d)\n", + i, ret); + return ret; + } + } + + return 0; +} + +static int drm_hdcp_helper_hdcp1_read_v_prime(struct drm_hdcp_helper_data *data, + u32 *v_prime) +{ + struct drm_device *dev = data->connector->dev; + int ret, i; + + for (i = 0; i < DRM_HDCP_V_PRIME_NUM_PARTS; i++) { + ret = drm_hdcp_remote_read(data, data->hdcp1_lut->v[i], + (u8 *)&v_prime[i], + DRM_HDCP_V_PRIME_PART_LEN); + if (ret) { + drm_dbg_kms(dev, "Read v'[%d] from failed (%d)\n", i, ret); + return ret >= 0 ? -EIO : ret; + } + } + return 0; +} + +static int +drm_hdcp_helper_hdcp1_authenticate_downstream(struct drm_hdcp_helper_data *data) +{ + struct drm_connector *connector = data->connector; + struct drm_device *dev = connector->dev; + u32 v_prime[DRM_HDCP_V_PRIME_NUM_PARTS]; + u8 bstatus[DRM_HDCP_BSTATUS_LEN]; + u8 num_downstream, *ksv_fifo; + int ret, i, tries = 3; + + ret = read_poll_timeout(drm_hdcp_helper_hdcp1_ksv_fifo_ready, ret, !ret, + 10 * 1000, 5 * 1000 * 1000, false, data); + if (ret) { + drm_err(dev, "Failed to poll ksv ready, %d\n", ret); + return ret; + } + + ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bstatus, + bstatus, DRM_HDCP_BSTATUS_LEN); + if (ret) + return ret; + + /* + * When repeater reports 0 device count, HDCP1.4 spec allows disabling + * the HDCP encryption. That implies that repeater can't have its own + * display. As there is no consumption of encrypted content in the + * repeater with 0 downstream devices, we are failing the + * authentication. + */ + num_downstream = DRM_HDCP_NUM_DOWNSTREAM(bstatus[0]); + if (num_downstream == 0) { + drm_err(dev, "Repeater with zero downstream devices, %*ph\n", + DRM_HDCP_BSTATUS_LEN, bstatus); + return -EINVAL; + } + + ksv_fifo = kcalloc(DRM_HDCP_KSV_LEN, num_downstream, GFP_KERNEL); + if (!ksv_fifo) + return -ENOMEM; + + ret = drm_hdcp_helper_hdcp1_read_ksv_fifo(data, ksv_fifo, + num_downstream); + if (ret) { + drm_err(dev, "Failed to read ksv fifo, %d/%d\n", num_downstream, + ret); + goto out; + } + + if (drm_hdcp_check_ksvs_revoked(dev, ksv_fifo, num_downstream)) { + drm_err(dev, "Revoked Ksv(s) in ksv_fifo\n"); + ret = -EPERM; + goto out; + } + + /* + * When V prime mismatches, DP Spec mandates re-read of + * V prime atleast twice. + */ + for (i = 0; i < tries; i++) { + ret = drm_hdcp_helper_hdcp1_read_v_prime(data, v_prime); + if (ret) + continue; + + ret = data->funcs->hdcp1_store_ksv_fifo(connector, ksv_fifo, + num_downstream, + bstatus, v_prime); + if (!ret) + break; + } + if (ret) + drm_err(dev, "Could not validate KSV FIFO with V' %d\n", ret); + +out: + if (!ret) + drm_dbg_kms(dev, "HDCP is enabled (%d downstream devices)\n", + num_downstream); + + kfree(ksv_fifo); + return ret; +} + +static int drm_hdcp_helper_hdcp1_validate_ri(struct drm_hdcp_helper_data *data) +{ + union { + u32 word; + u8 bytes[DRM_HDCP_RI_LEN]; + } ri_prime = { .word = 0 }; + struct drm_connector *connector = data->connector; + struct drm_device *dev = connector->dev; + int ret; + + ret = drm_hdcp_remote_read(data, data->hdcp1_lut->ri, ri_prime.bytes, + DRM_HDCP_RI_LEN); + if (ret) { + drm_err(dev, "Failed to read R0' %d\n", ret); + return ret; + } + + return data->funcs->hdcp1_match_ri(connector, ri_prime.word); +} + +static int drm_hdcp_helper_hdcp1_authenticate(struct drm_hdcp_helper_data *data) +{ + union { + u32 word; + u8 bytes[DRM_HDCP_BSTATUS_LEN]; + } bstatus; + const struct drm_hdcp_helper_funcs *funcs = data->funcs; + struct drm_connector *connector = data->connector; + struct drm_device *dev = connector->dev; + unsigned long r0_prime_timeout, r0_prime_remaining_us = 0, tmp_jiffies; + struct drm_hdcp_ksv aksv; + struct drm_hdcp_ksv bksv; + struct drm_hdcp_an an; + bool repeater_present; + int ret, i, tries = 3; + u8 bcaps; + + if (funcs->hdcp1_read_an_aksv) { + ret = funcs->hdcp1_read_an_aksv(connector, an.words, aksv.words); + if (ret) { + drm_err(dev, "Failed to read An/Aksv values, %d\n", ret); + return ret; + } + + ret = drm_hdcp_remote_write(data, data->hdcp1_lut->an, an.bytes, + DRM_HDCP_AN_LEN); + if (ret) { + drm_err(dev, "Failed to write An to receiver, %d\n", ret); + return ret; + } + + ret = drm_hdcp_remote_write(data, data->hdcp1_lut->aksv, aksv.bytes, + DRM_HDCP_KSV_LEN); + if (ret) { + drm_err(dev, "Failed to write Aksv to receiver, %d\n", ret); + return ret; + } + } else { + ret = funcs->hdcp1_send_an_aksv(connector); + if (ret) { + drm_err(dev, "Failed to read An/Aksv values, %d\n", ret); + return ret; + } + } + + /* + * Timeout for R0' to become available. The spec says 100ms from Aksv, + * but some monitors can take longer than this. We'll set the timeout at + * 300ms just to be sure. + */ + r0_prime_timeout = jiffies + msecs_to_jiffies(300); + + memset(&bksv, 0, sizeof(bksv)); + + ret = drm_hdcp_read_valid_bksv(data, &bksv); + if (ret < 0) + return ret; + + if (drm_hdcp_check_ksvs_revoked(dev, bksv.bytes, 1)) { + drm_err(dev, "BKSV is revoked\n"); + return -EPERM; + } + + ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bcaps, &bcaps, 1); + if (ret) + return ret; + + memset(&bstatus, 0, sizeof(bstatus)); + + ret = drm_hdcp_remote_read(data, data->hdcp1_lut->bstatus, + bstatus.bytes, DRM_HDCP_BSTATUS_LEN); + if (ret) + return ret; + + if (DRM_HDCP_MAX_DEVICE_EXCEEDED(bstatus.bytes[0]) || + DRM_HDCP_MAX_CASCADE_EXCEEDED(bstatus.bytes[1])) { + drm_err(dev, "Max Topology Limit Exceeded, bstatus=%*ph\n", + DRM_HDCP_BSTATUS_LEN, bstatus.bytes); + return -EPERM; + } + + repeater_present = bcaps & data->hdcp1_lut->bcaps_mask_repeater_present; + + ret = funcs->hdcp1_store_receiver_info(connector, bksv.words, + bstatus.word, bcaps, + repeater_present); + if (ret) { + drm_err(dev, "Failed to store bksv, %d\n", ret); + return ret; + } + + ret = funcs->hdcp1_enable_encryption(connector); + if (ret) + return ret; + + ret = funcs->hdcp1_wait_for_r0(connector); + if (ret) + return ret; + + tmp_jiffies = jiffies; + if (time_before(tmp_jiffies, r0_prime_timeout)) + r0_prime_remaining_us = jiffies_to_usecs(r0_prime_timeout - tmp_jiffies); + + /* + * Wait for R0' to become available. + * + * On DP, there's an R0_READY bit available but no such bit + * exists on HDMI. So poll the ready bit for DP and just wait the + * remainder of the 300 ms timeout for HDMI. + */ + if (data->aux) { + u8 val; + ret = read_poll_timeout(drm_hdcp_remote_dpcd_read, ret, + !ret && (val & DP_BSTATUS_R0_PRIME_READY), + 1000, r0_prime_remaining_us, false, + data->aux, DP_AUX_HDCP_BSTATUS, &val, 1); + if (ret) { + drm_err(dev, "R0' did not become ready %d\n", ret); + return ret; + } + } else { + usleep_range(r0_prime_remaining_us, + r0_prime_remaining_us + 1000); + } + + /* + * DP HDCP Spec mandates the two more reattempt to read R0, incase + * of R0 mismatch. + */ + for (i = 0; i < tries; i++) { + ret = drm_hdcp_helper_hdcp1_validate_ri(data); + if (!ret) + break; + } + if (ret) { + drm_err(dev, "Failed to match R0/R0', aborting HDCP %d\n", ret); + return ret; + } + + if (repeater_present) + return drm_hdcp_helper_hdcp1_authenticate_downstream(data); + + drm_dbg_kms(dev, "HDCP is enabled (no repeater present)\n"); + return 0; +} + +static int drm_hdcp_helper_hdcp1_enable(struct drm_hdcp_helper_data *data) +{ + struct drm_connector *connector = data->connector; + struct drm_device *dev = connector->dev; + int i, ret, tries = 3; + + drm_dbg_kms(dev, "[%s:%d] HDCP is being enabled...\n", connector->name, + connector->base.id); + + /* Incase of authentication failures, HDCP spec expects reauth. */ + for (i = 0; i < tries; i++) { + ret = drm_hdcp_helper_hdcp1_authenticate(data); + if (!ret) + return 0; + + drm_dbg_kms(dev, "HDCP Auth failure (%d)\n", ret); + + /* Ensuring HDCP encryption and signalling are stopped. */ + data->funcs->hdcp1_disable(data->connector); + } + + drm_err(dev, "HDCP authentication failed (%d tries/%d)\n", tries, ret); + return ret; +} + +static inline +void drm_hdcp_helper_driver_lock(struct drm_hdcp_helper_data *data) +{ + if (data->driver_mutex) + mutex_lock(data->driver_mutex); +} + +static inline +void drm_hdcp_helper_driver_unlock(struct drm_hdcp_helper_data *data) +{ + if (data->driver_mutex) + mutex_unlock(data->driver_mutex); +} + +static int drm_hdcp_helper_enable_hdcp(struct drm_hdcp_helper_data *data, + struct drm_atomic_state *state, + struct mutex *driver_mutex) +{ + struct drm_connector *connector = data->connector; + struct drm_connector_state *conn_state; + struct drm_device *dev = connector->dev; + unsigned long check_link_interval; + bool capable; + int ret = 0; + + conn_state = drm_atomic_get_new_connector_state(state, connector); + + mutex_lock(&data->mutex); + + if (data->value == DRM_MODE_CONTENT_PROTECTION_ENABLED) { + drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_ENABLED, + true); + goto out_data_mutex; + } + + drm_WARN_ON(dev, data->driver_mutex != NULL); + data->driver_mutex = driver_mutex; + + drm_hdcp_helper_driver_lock(data); + + if (data->funcs->setup) { + ret = data->funcs->setup(connector, state); + if (ret) { + drm_err(dev, "Failed to setup HDCP %d\n", ret); + goto out; + } + } + + if (!data->funcs->are_keys_valid || + !data->funcs->are_keys_valid(connector)) { + if (data->funcs->load_keys) { + ret = data->funcs->load_keys(connector); + if (ret) { + drm_err(dev, "Failed to load HDCP keys %d\n", ret); + goto out; + } + } + } + + /* + * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup + * is capable of HDCP2.2, it is preferred to use HDCP2.2. + */ + ret = data->funcs->hdcp2_capable(connector, &capable); + if (ret) { + drm_err(dev, "HDCP 2.x capability check failed %d\n", ret); + goto out; + } + if (capable) { + data->enabled_type = DRM_MODE_HDCP_CONTENT_TYPE1; + ret = data->funcs->hdcp2_enable(connector); + if (!ret) { + check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS; + goto out; + } + } + + /* + * When HDCP2.2 fails and Content Type is not Type1, HDCP1.4 will + * be attempted. + */ + ret = drm_hdcp_helper_hdcp1_capable(data, &capable); + if (ret) { + drm_err(dev, "HDCP 1.x capability check failed %d\n", ret); + goto out; + } + if (capable && conn_state->content_type != DRM_MODE_HDCP_CONTENT_TYPE1) { + data->enabled_type = DRM_MODE_HDCP_CONTENT_TYPE0; + ret = drm_hdcp_helper_hdcp1_enable(data); + if (!ret) + check_link_interval = DRM_HDCP_CHECK_PERIOD_MS; + } + +out: + if (!ret) { + schedule_delayed_work(&data->check_work, check_link_interval); + drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_ENABLED, + true); + } + + drm_hdcp_helper_driver_unlock(data); + if (ret) + data->driver_mutex = NULL; + +out_data_mutex: + mutex_unlock(&data->mutex); + return ret; +} + +static int drm_hdcp_helper_disable_hdcp(struct drm_hdcp_helper_data *data) +{ + int ret = 0; + + mutex_lock(&data->mutex); + drm_hdcp_helper_driver_lock(data); + + if (data->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED) + goto out; + + drm_dbg_kms(data->connector->dev, "[%s:%d] HDCP is being disabled...\n", + data->connector->name, data->connector->base.id); + + drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_UNDESIRED, true); + + if (data->enabled_type == DRM_MODE_HDCP_CONTENT_TYPE1) + ret = data->funcs->hdcp2_disable(data->connector); + else + ret = data->funcs->hdcp1_disable(data->connector); + + drm_dbg_kms(data->connector->dev, "HDCP is disabled\n"); + +out: + drm_hdcp_helper_driver_unlock(data); + data->driver_mutex = NULL; + mutex_unlock(&data->mutex); + cancel_delayed_work_sync(&data->check_work); + return ret; +} + +/** + * drm_hdcp_helper_atomic_commit - Helper for drivers to call during commit to + * enable/disable HDCP + * + * @data: pointer to the @drm_hdcp_helper_data for the connector + * @state: pointer to the atomic state being committed + * @driver_mutex: driver-provided lock to be used while interacting with the driver + * + * This function can be used by display drivers to determine when HDCP should be + * enabled or disabled based on the connector state. It should be called during + * steady-state commits as well as connector enable/disable. The function will + * handle the HDCP authentication/encryption logic, calling back into the driver + * when source operations are necessary. + * + * @driver_mutex will be retained and used for the duration of the HDCP session + * since it will be needed for link checks and retries. This mutex is useful if + * the driver has shared resources across connectors which must be serialized. + * For example, driver_mutex can be used for MST connectors sharing a common + * encoder which should not be accessed/changed concurrently. When the + * connector's session is torn down, the mutex will be forgotten by the helper + * for this connector until the next session. + */ +void drm_hdcp_helper_atomic_commit(struct drm_hdcp_helper_data *data, + struct drm_atomic_state *state, + struct mutex *driver_mutex) +{ + struct drm_connector *connector = data->connector; + struct drm_connector_state *conn_state; + bool type_changed, needs_enable; + + conn_state = drm_atomic_get_new_connector_state(state, connector); + + type_changed = conn_state->hdcp_content_type != data->enabled_type; + needs_enable = type_changed; + + if (conn_state->content_protection == DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { + drm_hdcp_helper_disable_hdcp(data); + return; + } + + if (!conn_state->crtc) { + drm_hdcp_helper_disable_hdcp(data); + + /* Restore property to DESIRED so it's retried later */ + if (conn_state->content_protection == DRM_MODE_CONTENT_PROTECTION_ENABLED) { + mutex_lock(&data->mutex); + drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED, + true); + mutex_unlock(&data->mutex); + } + return; + } + + /* Already enabled */ + if (conn_state->content_protection == DRM_MODE_CONTENT_PROTECTION_ENABLED) + return; + + /* Disable and re-enable HDCP on content type change */ + if (type_changed) + drm_hdcp_helper_disable_hdcp(data); + + drm_hdcp_helper_enable_hdcp(data, state, driver_mutex); +} +EXPORT_SYMBOL(drm_hdcp_helper_atomic_commit); + +static void drm_hdcp_helper_prop_work(struct work_struct *work) +{ + struct drm_hdcp_helper_data *data = container_of(work, + struct drm_hdcp_helper_data, + prop_work); + struct drm_connector *connector = data->connector; + struct drm_device *dev = connector->dev; + + drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); + mutex_lock(&data->mutex); + + /* + * This worker is only used to flip between ENABLED/DESIRED. Either of + * those to UNDESIRED is handled by core. If value == UNDESIRED, + * we're running just after hdcp has been disabled, so just exit + */ + if (data->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) + drm_hdcp_update_content_protection(connector, data->value); + + mutex_unlock(&data->mutex); + drm_modeset_unlock(&dev->mode_config.connection_mutex); +} + +static int drm_hdcp_hdcp1_check_link(struct drm_hdcp_helper_data *data) +{ + struct drm_connector *connector = data->connector; + struct drm_device *dev = connector->dev; + int ret; + + if (data->funcs->hdcp1_check_link) { + ret = data->funcs->hdcp1_check_link(connector); + if (ret) + goto retry; + } + + /* The link is checked differently for DP and HDMI */ + if (data->aux) { + u8 bstatus; + ret = drm_hdcp_remote_dpcd_read(data->aux, DP_AUX_HDCP_BSTATUS, + &bstatus, 1); + if (ret) { + drm_err(dev, "Failed to read dpcd bstatus, %d\n", ret); + return ret; + } + if (bstatus & (DP_BSTATUS_LINK_FAILURE | DP_BSTATUS_REAUTH_REQ)) + ret = -EINVAL; + } else { + ret = drm_hdcp_helper_hdcp1_validate_ri(data); + if (ret) + drm_err(dev,"Ri' mismatch, check failed (%d)\n", ret); + } + if (!ret) + return 0; + +retry: + drm_err(dev, "[%s:%d] HDCP link failed, retrying authentication\n", + connector->name, connector->base.id); + + ret = data->funcs->hdcp1_disable(connector); + if (ret) { + drm_err(dev, "Failed to disable hdcp (%d)\n", ret); + drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED, + true); + return ret; + } + + ret = drm_hdcp_helper_hdcp1_enable(data); + if (ret) { + drm_err(dev, "Failed to enable hdcp (%d)\n", ret); + drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED, + true); + return ret; + } + + return 0; +} + +static int drm_hdcp_hdcp2_check_link(struct drm_hdcp_helper_data *data) +{ + struct drm_connector *connector = data->connector; + struct drm_device *dev = connector->dev; + int ret; + + ret = data->funcs->hdcp2_check_link(connector); + if (!ret) + return 0; + + drm_err(dev, "[%s:%d] HDCP2 link failed, retrying authentication\n", + connector->name, connector->base.id); + + ret = data->funcs->hdcp2_disable(connector); + if (ret) { + drm_err(dev, "Failed to disable hdcp2 (%d)\n", ret); + drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED, + true); + return ret; + } + + ret = data->funcs->hdcp2_enable(connector); + if (ret) { + drm_err(dev, "Failed to enable hdcp2 (%d)\n", ret); + drm_hdcp_update_value(data, DRM_MODE_CONTENT_PROTECTION_DESIRED, + true); + return ret; + } + + return 0; +} + +static void drm_hdcp_helper_check_work(struct work_struct *work) +{ + struct drm_hdcp_helper_data *data = container_of(to_delayed_work(work), + struct drm_hdcp_helper_data, + check_work); + unsigned long check_link_interval; + + mutex_lock(&data->mutex); + if (data->value != DRM_MODE_CONTENT_PROTECTION_ENABLED) + goto out_data_mutex; + + drm_hdcp_helper_driver_lock(data); + + if (data->enabled_type == DRM_MODE_HDCP_CONTENT_TYPE1) { + if (drm_hdcp_hdcp2_check_link(data)) + goto out; + check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS; + } else { + if (drm_hdcp_hdcp1_check_link(data)) + goto out; + check_link_interval = DRM_HDCP_CHECK_PERIOD_MS; + } + schedule_delayed_work(&data->check_work, check_link_interval); + +out: + drm_hdcp_helper_driver_unlock(data); +out_data_mutex: + mutex_unlock(&data->mutex); +} + +/** + * drm_hdcp_helper_schedule_hdcp_check - Schedule a check link cycle. + * + * @data: Pointer to the HDCP helper data. + * + * This function will kick off a check link cycle on behalf of the caller. This + * can be used by DP short hpd interrupt handlers, where the driver must poke + * the helper to check the link is still valid. + */ +void drm_hdcp_helper_schedule_hdcp_check(struct drm_hdcp_helper_data *data) +{ + schedule_delayed_work(&data->check_work, 0); +} +EXPORT_SYMBOL(drm_hdcp_helper_schedule_hdcp_check); + +static struct drm_hdcp_helper_data * +drm_hdcp_helper_initialize(struct drm_connector *connector, + const struct drm_hdcp_helper_funcs *funcs, + bool attach_content_type_property) +{ + struct drm_hdcp_helper_data *out; + int ret; + + out = kzalloc(sizeof(*out), GFP_KERNEL); + if (!out) + return ERR_PTR(-ENOMEM); + + out->connector = connector; + out->funcs = funcs; + + mutex_init(&out->mutex); + out->value = DRM_MODE_CONTENT_PROTECTION_UNDESIRED; + + INIT_DELAYED_WORK(&out->check_work, drm_hdcp_helper_check_work); + INIT_WORK(&out->prop_work, drm_hdcp_helper_prop_work); + + ret = drm_connector_attach_content_protection_property(connector, + attach_content_type_property); + if (ret) { + drm_hdcp_helper_destroy(out); + return ERR_PTR(ret); + } + + return out; +} + +/** + * drm_hdcp_helper_initialize_dp - Initializes the HDCP helpers for a + * DisplayPort connector + * + * @connector: pointer to the DisplayPort connector. + * @funcs: pointer to the vtable of HDCP helper funcs for this connector. + * @attach_content_type_property: True if the content_type property should be + * attached. + * + * This function intializes the HDCP helper for the given DisplayPort connector. + * This involves creating the Content Protection property as well as the Content + * Type property (if desired). Upon success, it will return a pointer to the + * HDCP helper data. Ownership of the underlaying memory is transfered to the + * caller and should be freed using drm_hdcp_helper_destroy(). + * + * Returns: + * Pointer to newly created HDCP helper data. PTR_ERR on failure. + */ +struct drm_hdcp_helper_data * +drm_hdcp_helper_initialize_dp(struct drm_connector *connector, + struct drm_dp_aux *aux, + const struct drm_hdcp_helper_funcs *funcs, + bool attach_content_type_property) +{ + struct drm_hdcp_helper_data *out; + + out = drm_hdcp_helper_initialize(connector, funcs, + attach_content_type_property); + if (IS_ERR(out)) + return out; + + out->aux = aux; + out->hdcp1_lut = &drm_hdcp_hdcp1_dpcd_lut; + + return out; +} +EXPORT_SYMBOL(drm_hdcp_helper_initialize_dp); + +/** + * drm_hdcp_helper_initialize_hdmi - Initializes the HDCP helpers for an HDMI + * connector + * + * @connector: pointer to the HDMI connector. + * @funcs: pointer to the vtable of HDCP helper funcs for this connector. + * @attach_content_type_property: True if the content_type property should be + * attached. + * + * This function intializes the HDCP helper for the given HDMI connector. This + * involves creating the Content Protection property as well as the Content Type + * property (if desired). Upon success, it will return a pointer to the HDCP + * helper data. Ownership of the underlaying memory is transfered to the caller + * and should be freed using drm_hdcp_helper_destroy(). + * + * Returns: + * Pointer to newly created HDCP helper data. PTR_ERR on failure. + */ +struct drm_hdcp_helper_data * +drm_hdcp_helper_initialize_hdmi(struct drm_connector *connector, + const struct drm_hdcp_helper_funcs *funcs, + bool attach_content_type_property) +{ + struct drm_hdcp_helper_data *out; + + out = drm_hdcp_helper_initialize(connector, funcs, + attach_content_type_property); + if (IS_ERR(out)) + return out; + + out->hdcp1_lut = &drm_hdcp_hdcp1_ddc_lut; + + return out; +} +EXPORT_SYMBOL(drm_hdcp_helper_initialize_hdmi); + +/** + * drm_hdcp_helper_destroy - Destroys the given HDCP helper data. + * + * @data: Pointer to the HDCP helper data. + * + * This function cleans up and destroys the HDCP helper data created by + * drm_hdcp_helper_initialize_dp() or drm_hdcp_helper_initialize_hdmi(). + */ +void drm_hdcp_helper_destroy(struct drm_hdcp_helper_data *data) +{ + struct drm_connector *connector; + + if (!data) + return; + + connector = data->connector; + + /* + * If the connector is registered, it's possible userspace could kick + * off another HDCP enable, which would re-spawn the workers. + */ + drm_WARN_ON(connector->dev, + connector->registration_state == DRM_CONNECTOR_REGISTERED); + + /* + * Now that the connector is not registered, check_work won't be run, + * but cancel any outstanding instances of it + */ + cancel_delayed_work_sync(&data->check_work); + + /* + * We don't cancel prop_work in the same way as check_work since it + * requires connection_mutex which could be held while calling this + * function. Instead, we rely on the connector references grabbed before + * scheduling prop_work to ensure the connector is alive when prop_work + * is run. So if we're in the destroy path (which is where this + * function should be called), we're "guaranteed" that prop_work is not + * active (tl;dr This Should Never Happen). + */ + drm_WARN_ON(connector->dev, work_pending(&data->prop_work)); + + kfree(data); +} +EXPORT_SYMBOL(drm_hdcp_helper_destroy); diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h index e6e3d16bc7d3..69c6405db5d1 100644 --- a/include/drm/drm_hdcp.h +++ b/include/drm/drm_hdcp.h @@ -36,6 +36,7 @@ #define DRM_HDCP_DDC_BKSV 0x00 #define DRM_HDCP_DDC_RI_PRIME 0x08 #define DRM_HDCP_DDC_AKSV 0x10 +#define DRM_HDCP_DDC_AINFO 0x15 #define DRM_HDCP_DDC_AN 0x18 #define DRM_HDCP_DDC_V_PRIME(h) (0x20 + h * 4) #define DRM_HDCP_DDC_BCAPS 0x40 @@ -295,6 +296,19 @@ struct drm_atomic_state; struct drm_device; struct drm_connector; +struct drm_hdcp_ksv { + union { + u32 words[2]; + u8 bytes[DRM_HDCP_KSV_LEN]; + }; +}; +struct drm_hdcp_an { + union { + u32 words[2]; + u8 bytes[DRM_HDCP_AN_LEN]; + }; +}; + int drm_hdcp_check_ksvs_revoked(struct drm_device *dev, u8 *ksvs, u32 ksv_count); int drm_connector_attach_content_protection_property( @@ -303,9 +317,186 @@ void drm_hdcp_update_content_protection(struct drm_connector *connector, u64 val); bool drm_hdcp_atomic_check(struct drm_connector *connector, struct drm_atomic_state *state); +void drm_hdcp_atomic_commit(struct drm_atomic_state *state, + struct drm_connector *connector); /* Content Type classification for HDCP2.2 vs others */ #define DRM_MODE_HDCP_CONTENT_TYPE0 0 #define DRM_MODE_HDCP_CONTENT_TYPE1 1 +/** + * struct drm_hdcp_helper_funcs - A vtable of function hooks for the hdcp helper + * + * These hooks are used by the hdcp helper to call into the driver/connector + * code to read/write to hw. + */ +struct drm_hdcp_helper_funcs { + /** + * @setup - Performs driver-specific setup before hdcp is enabled + * + * Returns: 0 on success, -errno on failure + */ + int (*setup)(struct drm_connector *connector, + struct drm_atomic_state *state); + + /** + * @are_keys_valid - Checks if the HDCP transmitter keys are valid + * + * Returns: true if the display controller has valid keys loaded + */ + bool (*are_keys_valid)(struct drm_connector *connector); + + /** + * @load_keys - Instructs the driver to load its HDCP transmitter keys + * + * Returns: 0 on success, -errno on failure + */ + int (*load_keys)(struct drm_connector *connector); + + /** + * @hdcp2_capable - Checks if both source and sink support HDCP 2.x + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp2_capable)(struct drm_connector *connector, bool *capable); + + /** + * @hdcp2_enable - Enables HDCP 2.x on the specified connector + * + * Since we don't have multiple examples of HDCP 2.x enablement, we + * provide the bare minimum support for HDCP 2.x help. Once we have + * more examples, perhaps we can be more helpful. + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp2_enable)(struct drm_connector *connector); + + /** + * @hdcp2_check_link - Checks the HDCP 2.x link on a specified connector + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp2_check_link)(struct drm_connector *connector); + + /** + * @hdcp2_disable - Disables HDCP 2.x on the specified connector + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp2_disable)(struct drm_connector *connector); + + /** + * @hdcp1_read_an_aksv - Reads transmitter's An & Aksv from hardware + * + * Use this function if hardware allows reading the transmitter's An and + * Aksv values from the kernel. If your hardware will not allow this, + * use hdcp1_send_an_aksv() and implement the transmission in the + * driver. + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp1_read_an_aksv)(struct drm_connector *connector, u32 *an, + u32 *aksv); + + /** + * @hdcp1_send_an_aksv - Sends transmitter's An & Aksv to the receiver + * + * Only implement this on hardware where An or Aksv are not accessible + * from the kernel. If these values can be read, use + * hdcp1_read_an_aksv() instead. + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp1_send_an_aksv)(struct drm_connector *connector); + + /** + * @hdcp1_store_receiver_info - Stores the receiver's info in the transmitter + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp1_store_receiver_info)(struct drm_connector *connector, + u32 *ksv, u32 status, u8 caps, + bool repeater_present); + + /** + * @hdcp1_enable_encryption - Enables encryption of the outgoing signal + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp1_enable_encryption)(struct drm_connector *connector); + + /** + * @hdcp1_wait_for_r0 - Wait for transmitter to calculate R0 + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp1_wait_for_r0)(struct drm_connector *connector); + + /** + * @hdcp1_match_ri - Matches the given Ri from the receiver with Ri in + * the transmitter + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp1_match_ri)(struct drm_connector *connector, u32 ri_prime); + + /** + * @hdcp1_post_encryption - Allows the driver to confirm encryption and + * perform any post-processing + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp1_post_encryption)(struct drm_connector *connector); + + /** + * @hdcp1_store_ksv_fifo - Write the receiver's KSV list to transmitter + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp1_store_ksv_fifo)(struct drm_connector *connector, + u8 *ksv_fifo, u8 num_downstream, + u8 *bstatus, u32 *vprime); + + /** + * @hdcp1_check_link - Allows the driver to check the HDCP 1.x status + * on a specified connector + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp1_check_link)(struct drm_connector *connector); + + /** + * @hdcp1_disable - Disables HDCP 1.x on the specified connector + * + * Returns: 0 on success, -errno on failure + */ + int (*hdcp1_disable)(struct drm_connector *connector); +}; + +struct drm_hdcp_helper_data; +struct drm_dp_aux; +struct i2c_adapter; +struct mutex; + +struct drm_hdcp_helper_data * +drm_hdcp_helper_initialize_dp(struct drm_connector *connector, + struct drm_dp_aux *aux, + const struct drm_hdcp_helper_funcs *funcs, + bool attach_content_type_property); + +struct drm_hdcp_helper_data * +drm_hdcp_helper_initialize_hdmi(struct drm_connector *connector, + const struct drm_hdcp_helper_funcs *funcs, + bool attach_content_type_property); + +void drm_hdcp_helper_destroy(struct drm_hdcp_helper_data *data); + +int drm_hdcp_helper_hdcp1_capable(struct drm_hdcp_helper_data *data, + bool *capable); +void drm_hdcp_helper_atomic_commit(struct drm_hdcp_helper_data *data, + struct drm_atomic_state *state, + struct mutex *driver_mutex); + +void drm_hdcp_helper_schedule_hdcp_check(struct drm_hdcp_helper_data *data); + #endif From patchwork Mon Sep 13 17:57:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 12490371 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31AAFC433EF for ; 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Mon, 13 Sep 2021 10:58:18 -0700 (PDT) Received: from localhost ([167.100.64.199]) by smtp.gmail.com with ESMTPSA id c193sm5932130qkg.120.2021.09.13.10.58.17 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 13 Sep 2021 10:58:17 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , Daniel Vetter Date: Mon, 13 Sep 2021 13:57:36 -0400 Message-Id: <20210913175747.47456-6-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 05/14] drm/i915/hdcp: Consolidate HDCP setup/state cache X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul Stick all of the setup for HDCP into a dedicated function. No functional change, but this will facilitate moving HDCP logic into helpers. Signed-off-by: Sean Paul --- drivers/gpu/drm/i915/display/intel_hdcp.c | 52 +++++++++++++++-------- 1 file changed, 35 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index feebafead046..af166baf8c71 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -2167,6 +2167,37 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder) } } +static int +_intel_hdcp_setup(struct intel_connector *connector, + const struct intel_crtc_state *pipe_config, u8 content_type) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct intel_hdcp *hdcp = &connector->hdcp; + int ret = 0; + + if (!connector->encoder) { + drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n", + connector->base.name, connector->base.base.id); + return -ENODEV; + } + + hdcp->content_type = content_type; + + if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) { + hdcp->cpu_transcoder = pipe_config->mst_master_transcoder; + hdcp->stream_transcoder = pipe_config->cpu_transcoder; + } else { + hdcp->cpu_transcoder = pipe_config->cpu_transcoder; + hdcp->stream_transcoder = INVALID_TRANSCODER; + } + + if (DISPLAY_VER(dev_priv) >= 12) + dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder); + + return ret; +} + static int initialize_hdcp_port_data(struct intel_connector *connector, struct intel_digital_port *dig_port, const struct intel_hdcp_shim *shim) @@ -2306,28 +2337,14 @@ int intel_hdcp_enable(struct intel_connector *connector, if (!hdcp->shim) return -ENOENT; - if (!connector->encoder) { - drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n", - connector->base.name, connector->base.base.id); - return -ENODEV; - } - mutex_lock(&hdcp->mutex); mutex_lock(&dig_port->hdcp_mutex); drm_WARN_ON(&dev_priv->drm, hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED); - hdcp->content_type = content_type; - - if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) { - hdcp->cpu_transcoder = pipe_config->mst_master_transcoder; - hdcp->stream_transcoder = pipe_config->cpu_transcoder; - } else { - hdcp->cpu_transcoder = pipe_config->cpu_transcoder; - hdcp->stream_transcoder = INVALID_TRANSCODER; - } - if (DISPLAY_VER(dev_priv) >= 12) - dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder); + ret = _intel_hdcp_setup(connector, pipe_config, content_type); + if (ret) + goto out; /* * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup @@ -2355,6 +2372,7 @@ int intel_hdcp_enable(struct intel_connector *connector, true); } +out: mutex_unlock(&dig_port->hdcp_mutex); mutex_unlock(&hdcp->mutex); return ret; From patchwork Mon Sep 13 17:57:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 12490373 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C8A6C433FE for ; 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Mon, 13 Sep 2021 10:58:22 -0700 (PDT) Received: from localhost ([167.100.64.199]) by smtp.gmail.com with ESMTPSA id j18sm5745936qkl.12.2021.09.13.10.58.21 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 13 Sep 2021 10:58:21 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , Daniel Vetter Date: Mon, 13 Sep 2021 13:57:37 -0400 Message-Id: <20210913175747.47456-7-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 06/14] drm/i915/hdcp: Retain hdcp_capable return codes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul The shim functions return error codes, but they are discarded in intel_hdcp.c. This patch plumbs the return codes through so they are properly handled. Signed-off-by: Sean Paul --- .../drm/i915/display/intel_display_debugfs.c | 9 +++- drivers/gpu/drm/i915/display/intel_hdcp.c | 51 ++++++++++--------- drivers/gpu/drm/i915/display/intel_hdcp.h | 4 +- 3 files changed, 37 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 68f4ba8c46e7..5ffd31e9908f 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -644,6 +644,7 @@ static void intel_panel_info(struct seq_file *m, struct intel_panel *panel) static void intel_hdcp_info(struct seq_file *m, struct intel_connector *intel_connector) { + int ret; bool hdcp_cap, hdcp2_cap; if (!intel_connector->hdcp.shim) { @@ -651,8 +652,12 @@ static void intel_hdcp_info(struct seq_file *m, goto out; } - hdcp_cap = intel_hdcp_capable(intel_connector); - hdcp2_cap = intel_hdcp2_capable(intel_connector); + ret = intel_hdcp_capable(intel_connector, &hdcp_cap); + if (ret) + hdcp_cap = false; + ret = intel_hdcp2_capable(intel_connector, &hdcp2_cap); + if (ret) + hdcp2_cap = false; if (hdcp_cap) seq_puts(m, "HDCP1.4 "); diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index af166baf8c71..59275919e7b9 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -153,50 +153,49 @@ int intel_hdcp_read_valid_bksv(struct intel_digital_port *dig_port, } /* Is HDCP1.4 capable on Platform and Sink */ -bool intel_hdcp_capable(struct intel_connector *connector) +int intel_hdcp_capable(struct intel_connector *connector, bool *capable) { struct intel_digital_port *dig_port = intel_attached_dig_port(connector); const struct intel_hdcp_shim *shim = connector->hdcp.shim; - bool capable = false; u8 bksv[5]; + *capable = false; + if (!shim) - return capable; + return 0; - if (shim->hdcp_capable) { - shim->hdcp_capable(dig_port, &capable); - } else { - if (!intel_hdcp_read_valid_bksv(dig_port, shim, bksv)) - capable = true; - } + if (shim->hdcp_capable) + return shim->hdcp_capable(dig_port, capable); + + if (!intel_hdcp_read_valid_bksv(dig_port, shim, bksv)) + *capable = true; - return capable; + return 0; } /* Is HDCP2.2 capable on Platform and Sink */ -bool intel_hdcp2_capable(struct intel_connector *connector) +int intel_hdcp2_capable(struct intel_connector *connector, bool *capable) { struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_hdcp *hdcp = &connector->hdcp; - bool capable = false; + + *capable = false; /* I915 support for HDCP2.2 */ if (!hdcp->hdcp2_supported) - return false; + return 0; /* MEI interface is solid */ mutex_lock(&dev_priv->hdcp_comp_mutex); if (!dev_priv->hdcp_comp_added || !dev_priv->hdcp_master) { mutex_unlock(&dev_priv->hdcp_comp_mutex); - return false; + return 0; } mutex_unlock(&dev_priv->hdcp_comp_mutex); /* Sink's capability for HDCP2.2 */ - hdcp->shim->hdcp_2_2_capable(dig_port, &capable); - - return capable; + return hdcp->shim->hdcp_2_2_capable(dig_port, capable); } static bool intel_hdcp_in_use(struct drm_i915_private *dev_priv, @@ -2332,6 +2331,7 @@ int intel_hdcp_enable(struct intel_connector *connector, struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct intel_hdcp *hdcp = &connector->hdcp; unsigned long check_link_interval = DRM_HDCP_CHECK_PERIOD_MS; + bool capable; int ret = -EINVAL; if (!hdcp->shim) @@ -2350,21 +2350,27 @@ int intel_hdcp_enable(struct intel_connector *connector, * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup * is capable of HDCP2.2, it is preferred to use HDCP2.2. */ - if (intel_hdcp2_capable(connector)) { + ret = intel_hdcp2_capable(connector, &capable); + if (capable) { ret = _intel_hdcp2_enable(connector); - if (!ret) + if (!ret) { check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS; + goto out; + } } /* * When HDCP2.2 fails and Content Type is not Type1, HDCP1.4 will * be attempted. */ - if (ret && intel_hdcp_capable(connector) && - hdcp->content_type != DRM_MODE_HDCP_CONTENT_TYPE1) { + ret = intel_hdcp_capable(connector, &capable); + if (ret) + goto out; + + if (capable && hdcp->content_type != DRM_MODE_HDCP_CONTENT_TYPE1) ret = _intel_hdcp_enable(connector); - } +out: if (!ret) { schedule_delayed_work(&hdcp->check_work, check_link_interval); intel_hdcp_update_value(connector, @@ -2372,7 +2378,6 @@ int intel_hdcp_enable(struct intel_connector *connector, true); } -out: mutex_unlock(&dig_port->hdcp_mutex); mutex_unlock(&hdcp->mutex); return ret; diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h index 7c5fd84a7b65..f06f6e5a2b1a 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.h +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h @@ -33,8 +33,8 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port); -bool intel_hdcp_capable(struct intel_connector *connector); -bool intel_hdcp2_capable(struct intel_connector *connector); +int intel_hdcp_capable(struct intel_connector *connector, bool *capable); +int intel_hdcp2_capable(struct intel_connector *connector, bool *capable); void intel_hdcp_component_init(struct drm_i915_private *dev_priv); void intel_hdcp_component_fini(struct drm_i915_private *dev_priv); void intel_hdcp_cleanup(struct intel_connector *connector); From patchwork Mon Sep 13 17:57:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 12490375 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17525C433F5 for ; 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Mon, 13 Sep 2021 10:58:26 -0700 (PDT) Received: from localhost ([167.100.64.199]) by smtp.gmail.com with ESMTPSA id 69sm6111072qke.55.2021.09.13.10.58.26 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 13 Sep 2021 10:58:26 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , Daniel Vetter Date: Mon, 13 Sep 2021 13:57:38 -0400 Message-Id: <20210913175747.47456-8-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 07/14] drm/i915/hdcp: Use HDCP helpers for i915 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul Now that all of the HDCP 1.x logic has been migrated to the central HDCP helpers, use it in the i915 driver. The majority of the driver code for HDCP 1.x will live in intel_hdcp.c, however there are a few helper hooks which are connector-specific and need to be partially or fully implemented in the intel_dp_hdcp.c or intel_hdmi.c. We'll leave most of the HDCP 2.x code alone since we don't have another implementation of HDCP 2.x to use as reference for what should and should not live in the drm helpers. The helper will call the overly general enable/disable/is_capable HDCP 2.x callbacks and leave the interesting stuff for the driver. Once we have another HDCP 2.x implementation, we should do a similar migration. Signed-off-by: Sean Paul Reported-by: kernel test robot --- drivers/gpu/drm/i915/display/intel_ddi.c | 29 +- .../drm/i915/display/intel_display_debugfs.c | 6 +- .../drm/i915/display/intel_display_types.h | 58 +- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 341 +++---- drivers/gpu/drm/i915/display/intel_dp_mst.c | 17 +- drivers/gpu/drm/i915/display/intel_hdcp.c | 935 +++--------------- drivers/gpu/drm/i915/display/intel_hdcp.h | 30 +- drivers/gpu/drm/i915/display/intel_hdmi.c | 256 ++--- 8 files changed, 413 insertions(+), 1259 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 23ef291f7b30..8bdf41593174 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -26,6 +26,7 @@ */ #include +#include #include "i915_drv.h" #include "intel_audio.h" @@ -3131,6 +3132,9 @@ static void intel_enable_ddi(struct intel_atomic_state *state, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) { + struct intel_connector *connector = to_intel_connector(conn_state->connector); + struct intel_digital_port *dig_port = enc_to_dig_port(encoder); + drm_WARN_ON(state->base.dev, crtc_state->has_pch_encoder); if (!crtc_state->bigjoiner_slave) @@ -3147,12 +3151,10 @@ static void intel_enable_ddi(struct intel_atomic_state *state, else intel_enable_ddi_dp(state, encoder, crtc_state, conn_state); - /* Enable hdcp if it's desired */ - if (conn_state->content_protection == - DRM_MODE_CONTENT_PROTECTION_DESIRED) - intel_hdcp_enable(to_intel_connector(conn_state->connector), - crtc_state, - (u8)conn_state->hdcp_content_type); + if (connector->hdcp_helper_data) + drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data, + &state->base, + &dig_port->hdcp_mutex); } static void intel_disable_ddi_dp(struct intel_atomic_state *state, @@ -3212,7 +3214,13 @@ static void intel_disable_ddi(struct intel_atomic_state *state, const struct intel_crtc_state *old_crtc_state, const struct drm_connector_state *old_conn_state) { - intel_hdcp_disable(to_intel_connector(old_conn_state->connector)); + struct intel_connector *connector = to_intel_connector(old_conn_state->connector); + struct intel_digital_port *dig_port = enc_to_dig_port(encoder); + + if (connector->hdcp_helper_data) + drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data, + &state->base, + &dig_port->hdcp_mutex); if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI)) intel_disable_ddi_hdmi(state, encoder, old_crtc_state, @@ -3243,13 +3251,18 @@ void intel_ddi_update_pipe(struct intel_atomic_state *state, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) { + struct intel_connector *connector = to_intel_connector(conn_state->connector); + struct intel_digital_port *dig_port = enc_to_dig_port(encoder); if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) && !intel_encoder_is_mst(encoder)) intel_ddi_update_pipe_dp(state, encoder, crtc_state, conn_state); - intel_hdcp_update_pipe(state, encoder, crtc_state, conn_state); + if (connector->hdcp_helper_data) + drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data, + &state->base, + &dig_port->hdcp_mutex); } static void diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 5ffd31e9908f..74c1f5b48797 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -5,6 +5,7 @@ #include #include +#include #include "i915_debugfs.h" #include "intel_display_debugfs.h" @@ -652,10 +653,11 @@ static void intel_hdcp_info(struct seq_file *m, goto out; } - ret = intel_hdcp_capable(intel_connector, &hdcp_cap); + ret = drm_hdcp_helper_hdcp1_capable(intel_connector->hdcp_helper_data, + &hdcp_cap); if (ret) hdcp_cap = false; - ret = intel_hdcp2_capable(intel_connector, &hdcp2_cap); + ret = intel_hdcp2_capable(&intel_connector->base, &hdcp2_cap); if (ret) hdcp2_cap = false; diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index e9e806d90eec..e0ff98895567 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -357,70 +357,13 @@ enum check_link_response { * - Receiver register masks/offsets * For instance, the ready bit for the KSV fifo is in a different * place on DP vs HDMI - * - Receiver register names - * Seriously. In the DP spec, the 16-bit register containing - * downstream information is called BINFO, on HDMI it's called - * BSTATUS. To confuse matters further, DP has a BSTATUS register - * with a completely different definition. - * - KSV FIFO - * On HDMI, the ksv fifo is read all at once, whereas on DP it must - * be read 3 keys at a time - * - Aksv output - * Since Aksv is hidden in hardware, there's different procedures - * to send it over DP AUX vs DDC */ struct intel_hdcp_shim { - /* Outputs the transmitter's An and Aksv values to the receiver. */ - int (*write_an_aksv)(struct intel_digital_port *dig_port, u8 *an); - - /* Reads the receiver's key selection vector */ - int (*read_bksv)(struct intel_digital_port *dig_port, u8 *bksv); - - /* - * Reads BINFO from DP receivers and BSTATUS from HDMI receivers. The - * definitions are the same in the respective specs, but the names are - * different. Call it BSTATUS since that's the name the HDMI spec - * uses and it was there first. - */ - int (*read_bstatus)(struct intel_digital_port *dig_port, - u8 *bstatus); - - /* Determines whether a repeater is present downstream */ - int (*repeater_present)(struct intel_digital_port *dig_port, - bool *repeater_present); - - /* Reads the receiver's Ri' value */ - int (*read_ri_prime)(struct intel_digital_port *dig_port, u8 *ri); - - /* Determines if the receiver's KSV FIFO is ready for consumption */ - int (*read_ksv_ready)(struct intel_digital_port *dig_port, - bool *ksv_ready); - - /* Reads the ksv fifo for num_downstream devices */ - int (*read_ksv_fifo)(struct intel_digital_port *dig_port, - int num_downstream, u8 *ksv_fifo); - - /* Reads a 32-bit part of V' from the receiver */ - int (*read_v_prime_part)(struct intel_digital_port *dig_port, - int i, u32 *part); - /* Enables HDCP signalling on the port */ int (*toggle_signalling)(struct intel_digital_port *dig_port, enum transcoder cpu_transcoder, bool enable); - /* Enable/Disable stream encryption on DP MST Transport Link */ - int (*stream_encryption)(struct intel_connector *connector, - bool enable); - - /* Ensures the link is still protected */ - bool (*check_link)(struct intel_digital_port *dig_port, - struct intel_connector *connector); - - /* Detects panel's hdcp capability. This is optional for HDMI. */ - int (*hdcp_capable)(struct intel_digital_port *dig_port, - bool *hdcp_capable); - /* HDCP adaptation(DP/HDMI) required on the port */ enum hdcp_wired_protocol protocol; @@ -550,6 +493,7 @@ struct intel_connector { struct work_struct modeset_retry_work; struct intel_hdcp hdcp; + struct drm_hdcp_helper_data *hdcp_helper_data; }; struct intel_digital_connector_state { diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index 540a669e01dd..e2aec4ed92c0 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -55,16 +55,23 @@ static void intel_dp_hdcp_wait_for_cp_irq(struct intel_hdcp *hdcp, int timeout) } static -int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *dig_port, - u8 *an) +int intel_dp_hdcp1_send_an_aksv(struct drm_connector *drm_connector) { + struct intel_connector *connector = to_intel_connector(drm_connector); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); + struct drm_hdcp_an an; u8 aksv[DRM_HDCP_KSV_LEN] = {}; ssize_t dpcd_ret; + int ret; /* Output An first, that's easy */ + ret = intel_hdcp1_read_an(drm_connector, &an); + if (ret) + return ret; + dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AN, - an, DRM_HDCP_AN_LEN); + an.bytes, DRM_HDCP_AN_LEN); if (dpcd_ret != DRM_HDCP_AN_LEN) { drm_dbg_kms(&i915->drm, "Failed to write An over DP/AUX (%zd)\n", @@ -90,158 +97,6 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *dig_port, return 0; } -static int intel_dp_hdcp_read_bksv(struct intel_digital_port *dig_port, - u8 *bksv) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - ssize_t ret; - - ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BKSV, bksv, - DRM_HDCP_KSV_LEN); - if (ret != DRM_HDCP_KSV_LEN) { - drm_dbg_kms(&i915->drm, - "Read Bksv from DP/AUX failed (%zd)\n", ret); - return ret >= 0 ? -EIO : ret; - } - return 0; -} - -static int intel_dp_hdcp_read_bstatus(struct intel_digital_port *dig_port, - u8 *bstatus) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - ssize_t ret; - - /* - * For some reason the HDMI and DP HDCP specs call this register - * definition by different names. In the HDMI spec, it's called BSTATUS, - * but in DP it's called BINFO. - */ - ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BINFO, - bstatus, DRM_HDCP_BSTATUS_LEN); - if (ret != DRM_HDCP_BSTATUS_LEN) { - drm_dbg_kms(&i915->drm, - "Read bstatus from DP/AUX failed (%zd)\n", ret); - return ret >= 0 ? -EIO : ret; - } - return 0; -} - -static -int intel_dp_hdcp_read_bcaps(struct intel_digital_port *dig_port, - u8 *bcaps) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - ssize_t ret; - - ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BCAPS, - bcaps, 1); - if (ret != 1) { - drm_dbg_kms(&i915->drm, - "Read bcaps from DP/AUX failed (%zd)\n", ret); - return ret >= 0 ? -EIO : ret; - } - - return 0; -} - -static -int intel_dp_hdcp_repeater_present(struct intel_digital_port *dig_port, - bool *repeater_present) -{ - ssize_t ret; - u8 bcaps; - - ret = intel_dp_hdcp_read_bcaps(dig_port, &bcaps); - if (ret) - return ret; - - *repeater_present = bcaps & DP_BCAPS_REPEATER_PRESENT; - return 0; -} - -static -int intel_dp_hdcp_read_ri_prime(struct intel_digital_port *dig_port, - u8 *ri_prime) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - ssize_t ret; - - ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_RI_PRIME, - ri_prime, DRM_HDCP_RI_LEN); - if (ret != DRM_HDCP_RI_LEN) { - drm_dbg_kms(&i915->drm, "Read Ri' from DP/AUX failed (%zd)\n", - ret); - return ret >= 0 ? -EIO : ret; - } - return 0; -} - -static -int intel_dp_hdcp_read_ksv_ready(struct intel_digital_port *dig_port, - bool *ksv_ready) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - ssize_t ret; - u8 bstatus; - - ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS, - &bstatus, 1); - if (ret != 1) { - drm_dbg_kms(&i915->drm, - "Read bstatus from DP/AUX failed (%zd)\n", ret); - return ret >= 0 ? -EIO : ret; - } - *ksv_ready = bstatus & DP_BSTATUS_READY; - return 0; -} - -static -int intel_dp_hdcp_read_ksv_fifo(struct intel_digital_port *dig_port, - int num_downstream, u8 *ksv_fifo) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - ssize_t ret; - int i; - - /* KSV list is read via 15 byte window (3 entries @ 5 bytes each) */ - for (i = 0; i < num_downstream; i += 3) { - size_t len = min(num_downstream - i, 3) * DRM_HDCP_KSV_LEN; - ret = drm_dp_dpcd_read(&dig_port->dp.aux, - DP_AUX_HDCP_KSV_FIFO, - ksv_fifo + i * DRM_HDCP_KSV_LEN, - len); - if (ret != len) { - drm_dbg_kms(&i915->drm, - "Read ksv[%d] from DP/AUX failed (%zd)\n", - i, ret); - return ret >= 0 ? -EIO : ret; - } - } - return 0; -} - -static -int intel_dp_hdcp_read_v_prime_part(struct intel_digital_port *dig_port, - int i, u32 *part) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - ssize_t ret; - - if (i >= DRM_HDCP_V_PRIME_NUM_PARTS) - return -EINVAL; - - ret = drm_dp_dpcd_read(&dig_port->dp.aux, - DP_AUX_HDCP_V_PRIME(i), part, - DRM_HDCP_V_PRIME_PART_LEN); - if (ret != DRM_HDCP_V_PRIME_PART_LEN) { - drm_dbg_kms(&i915->drm, - "Read v'[%d] from DP/AUX failed (%zd)\n", i, ret); - return ret >= 0 ? -EIO : ret; - } - return 0; -} - static int intel_dp_hdcp_toggle_signalling(struct intel_digital_port *dig_port, enum transcoder cpu_transcoder, @@ -251,40 +106,6 @@ int intel_dp_hdcp_toggle_signalling(struct intel_digital_port *dig_port, return 0; } -static -bool intel_dp_hdcp_check_link(struct intel_digital_port *dig_port, - struct intel_connector *connector) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - ssize_t ret; - u8 bstatus; - - ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS, - &bstatus, 1); - if (ret != 1) { - drm_dbg_kms(&i915->drm, - "Read bstatus from DP/AUX failed (%zd)\n", ret); - return false; - } - - return !(bstatus & (DP_BSTATUS_LINK_FAILURE | DP_BSTATUS_REAUTH_REQ)); -} - -static -int intel_dp_hdcp_capable(struct intel_digital_port *dig_port, - bool *hdcp_capable) -{ - ssize_t ret; - u8 bcaps; - - ret = intel_dp_hdcp_read_bcaps(dig_port, &bcaps); - if (ret) - return ret; - - *hdcp_capable = bcaps & DP_BCAPS_HDCP_CAPABLE; - return 0; -} - struct hdcp2_dp_errata_stream_type { u8 msg_id; u8 stream_type; @@ -627,13 +448,17 @@ int intel_dp_hdcp2_check_link(struct intel_digital_port *dig_port, return ret; } -static -int intel_dp_hdcp2_capable(struct intel_digital_port *dig_port, - bool *capable) +static int intel_dp_hdcp2_capable(struct drm_connector *drm_connector, bool *capable) { + struct intel_connector *connector = to_intel_connector(drm_connector); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); u8 rx_caps[3]; int ret; + ret = intel_hdcp2_capable(drm_connector, capable); + if (ret || !capable) + return ret; + *capable = false; ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_HDCP_2_2_REG_RX_CAPS_OFFSET, @@ -649,22 +474,11 @@ int intel_dp_hdcp2_capable(struct intel_digital_port *dig_port, } static const struct intel_hdcp_shim intel_dp_hdcp_shim = { - .write_an_aksv = intel_dp_hdcp_write_an_aksv, - .read_bksv = intel_dp_hdcp_read_bksv, - .read_bstatus = intel_dp_hdcp_read_bstatus, - .repeater_present = intel_dp_hdcp_repeater_present, - .read_ri_prime = intel_dp_hdcp_read_ri_prime, - .read_ksv_ready = intel_dp_hdcp_read_ksv_ready, - .read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo, - .read_v_prime_part = intel_dp_hdcp_read_v_prime_part, .toggle_signalling = intel_dp_hdcp_toggle_signalling, - .check_link = intel_dp_hdcp_check_link, - .hdcp_capable = intel_dp_hdcp_capable, .write_2_2_msg = intel_dp_hdcp2_write_msg, .read_2_2_msg = intel_dp_hdcp2_read_msg, .config_stream_type = intel_dp_hdcp2_config_stream_type, .check_2_2_link = intel_dp_hdcp2_check_link, - .hdcp_2_2_capable = intel_dp_hdcp2_capable, .protocol = HDCP_PROTOCOL_DP, }; @@ -720,6 +534,43 @@ intel_dp_mst_hdcp_stream_encryption(struct intel_connector *connector, return 0; } +static int intel_dp_mst_hdcp1_post_encryption(struct drm_connector *drm_connector) +{ + struct intel_connector *connector = to_intel_connector(drm_connector); + int ret; + + ret = intel_hdcp1_post_encryption(drm_connector); + if (ret) + return ret; + + return intel_dp_mst_hdcp_stream_encryption(connector, true); +} + +static int intel_dp_mst_hdcp1_disable(struct drm_connector *drm_connector) +{ + struct intel_connector *connector = to_intel_connector(drm_connector); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct drm_i915_private *i915 = to_i915(connector->base.dev); + int ret; + + ret = intel_dp_mst_hdcp_stream_encryption(connector, true); + if (ret) { + drm_err(&i915->drm, "[%s:%d] Failed to disable HDCP 1.4 stream enc\n", + connector->base.name, connector->base.base.id); + return ret; + } + + /* + * If there are other connectors on this port using HDCP, + * don't disable it until it disabled HDCP encryption for + * all connectors in MST topology. + */ + if (dig_port->num_hdcp_streams > 0) + return 0; + + return intel_hdcp1_disable(drm_connector); +} + static int intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector, bool enable) @@ -757,7 +608,7 @@ intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector, static int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port, - struct intel_connector *connector) + struct intel_connector *connector) { struct intel_hdcp *hdcp = &connector->hdcp; int ret; @@ -778,45 +629,83 @@ int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port, } static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = { - .write_an_aksv = intel_dp_hdcp_write_an_aksv, - .read_bksv = intel_dp_hdcp_read_bksv, - .read_bstatus = intel_dp_hdcp_read_bstatus, - .repeater_present = intel_dp_hdcp_repeater_present, - .read_ri_prime = intel_dp_hdcp_read_ri_prime, - .read_ksv_ready = intel_dp_hdcp_read_ksv_ready, - .read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo, - .read_v_prime_part = intel_dp_hdcp_read_v_prime_part, .toggle_signalling = intel_dp_hdcp_toggle_signalling, - .stream_encryption = intel_dp_mst_hdcp_stream_encryption, - .check_link = intel_dp_hdcp_check_link, - .hdcp_capable = intel_dp_hdcp_capable, .write_2_2_msg = intel_dp_hdcp2_write_msg, .read_2_2_msg = intel_dp_hdcp2_read_msg, .config_stream_type = intel_dp_hdcp2_config_stream_type, .stream_2_2_encryption = intel_dp_mst_hdcp2_stream_encryption, .check_2_2_link = intel_dp_mst_hdcp2_check_link, - .hdcp_2_2_capable = intel_dp_hdcp2_capable, .protocol = HDCP_PROTOCOL_DP, }; +static const struct drm_hdcp_helper_funcs intel_dp_hdcp_helper_funcs = { + .setup = intel_hdcp_setup, + .load_keys = intel_hdcp_load_keys, + .hdcp2_capable = intel_dp_hdcp2_capable, + .hdcp2_enable = intel_hdcp2_enable, + .hdcp2_check_link = intel_hdcp2_check_link, + .hdcp2_disable = intel_hdcp2_disable, + .hdcp1_send_an_aksv = intel_dp_hdcp1_send_an_aksv, + .hdcp1_store_receiver_info = intel_hdcp1_store_receiver_info, + .hdcp1_enable_encryption = intel_hdcp1_enable_encryption, + .hdcp1_wait_for_r0 = intel_hdcp1_wait_for_r0, + .hdcp1_match_ri = intel_hdcp1_match_ri, + .hdcp1_post_encryption = intel_hdcp1_post_encryption, + .hdcp1_store_ksv_fifo = intel_hdcp1_store_ksv_fifo, + .hdcp1_disable = intel_hdcp1_disable, +}; + +static const struct drm_hdcp_helper_funcs intel_dp_mst_hdcp_helper_funcs = { + .setup = intel_hdcp_setup, + .load_keys = intel_hdcp_load_keys, + .hdcp2_capable = intel_dp_hdcp2_capable, + .hdcp2_enable = intel_hdcp2_enable, + .hdcp2_check_link = intel_hdcp2_check_link, + .hdcp2_disable = intel_hdcp2_disable, + .hdcp1_send_an_aksv = intel_dp_hdcp1_send_an_aksv, + .hdcp1_store_receiver_info = intel_hdcp1_store_receiver_info, + .hdcp1_enable_encryption = intel_hdcp1_enable_encryption, + .hdcp1_wait_for_r0 = intel_hdcp1_wait_for_r0, + .hdcp1_match_ri = intel_hdcp1_match_ri, + .hdcp1_post_encryption = intel_dp_mst_hdcp1_post_encryption, + .hdcp1_store_ksv_fifo = intel_hdcp1_store_ksv_fifo, + .hdcp1_disable = intel_dp_mst_hdcp1_disable, +}; + + int intel_dp_hdcp_init(struct intel_digital_port *dig_port, - struct intel_connector *intel_connector) + struct intel_connector *connector) { - struct drm_device *dev = intel_connector->base.dev; - struct drm_i915_private *dev_priv = to_i915(dev); + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_encoder *intel_encoder = &dig_port->base; enum port port = intel_encoder->port; struct intel_dp *intel_dp = &dig_port->dp; + struct drm_hdcp_helper_data *data; + int ret; - if (!is_hdcp_supported(dev_priv, port)) + if (!is_hdcp_supported(dev_priv, port) || intel_dp_is_edp(intel_dp)) return 0; - if (intel_connector->mst_port) - return intel_hdcp_init(intel_connector, dig_port, - &intel_dp_mst_hdcp_shim); - else if (!intel_dp_is_edp(intel_dp)) - return intel_hdcp_init(intel_connector, dig_port, - &intel_dp_hdcp_shim); + data = drm_hdcp_helper_initialize_dp(&connector->base, + &dig_port->dp.aux, + &intel_dp_hdcp_helper_funcs, + true); + if (IS_ERR(data)) { + drm_dbg_kms(&dev_priv->drm, "HDCP init failed, skipping.\n"); + return PTR_ERR(data); + } + + if (connector->mst_port) + ret = intel_hdcp_init(connector, dig_port, + &intel_dp_mst_hdcp_shim); + else + ret = intel_hdcp_init(connector, dig_port, + &intel_dp_hdcp_shim); + if (ret) { + drm_hdcp_helper_destroy(data); + return ret; + } + connector->hdcp_helper_data = data; return 0; } diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index d104441344c0..ce3b41ec61b2 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -40,7 +40,6 @@ #include "intel_dp_hdcp.h" #include "intel_dp_mst.h" #include "intel_dpio_phy.h" -#include "intel_hdcp.h" #include "intel_hotplug.h" #include "skl_scaler.h" @@ -374,7 +373,10 @@ static void intel_mst_disable_dp(struct intel_atomic_state *state, drm_dbg_kms(&i915->drm, "active links %d\n", intel_dp->active_mst_links); - intel_hdcp_disable(intel_mst->connector); + if (connector->hdcp_helper_data) + drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data, + &state->base, + &dig_port->hdcp_mutex); drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port); @@ -544,6 +546,8 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state, struct intel_digital_port *dig_port = intel_mst->primary; struct intel_dp *intel_dp = &dig_port->dp; struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_connector *connector = + to_intel_connector(conn_state->connector); enum transcoder trans = pipe_config->cpu_transcoder; drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder); @@ -574,11 +578,10 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state, intel_audio_codec_enable(encoder, pipe_config, conn_state); /* Enable hdcp if it's desired */ - if (conn_state->content_protection == - DRM_MODE_CONTENT_PROTECTION_DESIRED) - intel_hdcp_enable(to_intel_connector(conn_state->connector), - pipe_config, - (u8)conn_state->hdcp_content_type); + if (connector->hdcp_helper_data) + drm_hdcp_helper_atomic_commit(connector->hdcp_helper_data, + &state->base, + &dig_port->hdcp_mutex); } static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index 59275919e7b9..b1f2ed757d9a 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -116,67 +116,10 @@ static int intel_hdcp_prepare_streams(struct intel_connector *connector) return 0; } -static -bool intel_hdcp_is_ksv_valid(u8 *ksv) -{ - int i, ones = 0; - /* KSV has 20 1's and 20 0's */ - for (i = 0; i < DRM_HDCP_KSV_LEN; i++) - ones += hweight8(ksv[i]); - if (ones != 20) - return false; - - return true; -} - -static -int intel_hdcp_read_valid_bksv(struct intel_digital_port *dig_port, - const struct intel_hdcp_shim *shim, u8 *bksv) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - int ret, i, tries = 2; - - /* HDCP spec states that we must retry the bksv if it is invalid */ - for (i = 0; i < tries; i++) { - ret = shim->read_bksv(dig_port, bksv); - if (ret) - return ret; - if (intel_hdcp_is_ksv_valid(bksv)) - break; - } - if (i == tries) { - drm_dbg_kms(&i915->drm, "Bksv is invalid\n"); - return -ENODEV; - } - - return 0; -} - -/* Is HDCP1.4 capable on Platform and Sink */ -int intel_hdcp_capable(struct intel_connector *connector, bool *capable) -{ - struct intel_digital_port *dig_port = intel_attached_dig_port(connector); - const struct intel_hdcp_shim *shim = connector->hdcp.shim; - u8 bksv[5]; - - *capable = false; - - if (!shim) - return 0; - - if (shim->hdcp_capable) - return shim->hdcp_capable(dig_port, capable); - - if (!intel_hdcp_read_valid_bksv(dig_port, shim, bksv)) - *capable = true; - - return 0; -} - /* Is HDCP2.2 capable on Platform and Sink */ -int intel_hdcp2_capable(struct intel_connector *connector, bool *capable) +int intel_hdcp2_capable(struct drm_connector *drm_connector, bool *capable) { - struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct intel_connector *connector = to_intel_connector(drm_connector); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_hdcp *hdcp = &connector->hdcp; @@ -194,16 +137,24 @@ int intel_hdcp2_capable(struct intel_connector *connector, bool *capable) } mutex_unlock(&dev_priv->hdcp_comp_mutex); - /* Sink's capability for HDCP2.2 */ - return hdcp->shim->hdcp_2_2_capable(dig_port, capable); + return 0; } -static bool intel_hdcp_in_use(struct drm_i915_private *dev_priv, - enum transcoder cpu_transcoder, enum port port) +int intel_hdcp1_check_link(struct drm_connector *drm_connector) { - return intel_de_read(dev_priv, - HDCP_STATUS(dev_priv, cpu_transcoder, port)) & - HDCP_STATUS_ENC; + struct intel_connector *connector = to_intel_connector(drm_connector); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; + enum port port = dig_port->base.port; + u32 val; + + val = intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)); + + if (val & HDCP_STATUS_ENC) + return 0; + + return -EINVAL; } static bool intel_hdcp2_in_use(struct drm_i915_private *dev_priv, @@ -214,27 +165,6 @@ static bool intel_hdcp2_in_use(struct drm_i915_private *dev_priv, LINK_ENCRYPTION_STATUS; } -static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *dig_port, - const struct intel_hdcp_shim *shim) -{ - int ret, read_ret; - bool ksv_ready; - - /* Poll for ksv list ready (spec says max time allowed is 5s) */ - ret = __wait_for(read_ret = shim->read_ksv_ready(dig_port, - &ksv_ready), - read_ret || ksv_ready, 5 * 1000 * 1000, 1000, - 100 * 1000); - if (ret) - return ret; - if (read_ret) - return read_ret; - if (!ksv_ready) - return -ETIMEDOUT; - - return 0; -} - static bool hdcp_key_loadable(struct drm_i915_private *dev_priv) { enum i915_power_well_id id; @@ -270,11 +200,18 @@ static void intel_hdcp_clear_keys(struct drm_i915_private *dev_priv) HDCP_KEY_LOAD_DONE | HDCP_KEY_LOAD_STATUS | HDCP_FUSE_IN_PROGRESS | HDCP_FUSE_ERROR | HDCP_FUSE_DONE); } -static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv) +int intel_hdcp_load_keys(struct drm_connector *drm_connector) { + struct intel_connector *connector = to_intel_connector(drm_connector); + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); int ret; u32 val; + if (!hdcp_key_loadable(dev_priv)) { + drm_err(&dev_priv->drm, "HDCP key Load is not possible\n"); + return -ENXIO; + } + val = intel_de_read(dev_priv, HDCP_KEY_STATUS); if ((val & HDCP_KEY_LOAD_DONE) && (val & HDCP_KEY_LOAD_STATUS)) return 0; @@ -284,8 +221,10 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv) * out of reset. So if Key is not already loaded, its an error state. */ if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) - if (!(intel_de_read(dev_priv, HDCP_KEY_STATUS) & HDCP_KEY_LOAD_DONE)) - return -ENXIO; + if (!(intel_de_read(dev_priv, HDCP_KEY_STATUS) & HDCP_KEY_LOAD_DONE)) { + ret = -ENXIO; + goto err; + } /* * Initiate loading the HDCP key from fuses. @@ -302,7 +241,7 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv) drm_err(&dev_priv->drm, "Failed to initiate HDCP key load (%d)\n", ret); - return ret; + goto err; } } else { intel_de_write(dev_priv, HDCP_KEY_CONF, HDCP_KEY_LOAD_TRIGGER); @@ -312,15 +251,21 @@ static int intel_hdcp_load_keys(struct drm_i915_private *dev_priv) ret = __intel_wait_for_register(&dev_priv->uncore, HDCP_KEY_STATUS, HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE, 10, 1, &val); - if (ret) - return ret; - else if (!(val & HDCP_KEY_LOAD_STATUS)) - return -ENXIO; + if (ret) { + goto err; + } else if (!(val & HDCP_KEY_LOAD_STATUS)) { + ret = -ENXIO; + goto err; + } /* Send Aksv over to PCH display for use in authentication */ intel_de_write(dev_priv, HDCP_KEY_CONF, HDCP_AKSV_SEND_TRIGGER); return 0; + +err: + intel_hdcp_clear_keys(dev_priv); + return ret; } /* Returns updated SHA-1 index */ @@ -376,25 +321,21 @@ u32 intel_hdcp_get_repeater_ctl(struct drm_i915_private *dev_priv, } } -static -int intel_hdcp_validate_v_prime(struct intel_connector *connector, - const struct intel_hdcp_shim *shim, - u8 *ksv_fifo, u8 num_downstream, u8 *bstatus) +int intel_hdcp1_store_ksv_fifo(struct drm_connector *drm_connector, + u8 *ksv_fifo, u8 num_downstream, u8 *bstatus, + u32 *v_prime) { + struct intel_connector *connector = to_intel_connector(drm_connector); struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; enum port port = dig_port->base.port; - u32 vprime, sha_text, sha_leftovers, rep_ctl; + u32 sha_text, sha_leftovers, rep_ctl; int ret, i, j, sha_idx; /* Process V' values from the receiver */ - for (i = 0; i < DRM_HDCP_V_PRIME_NUM_PARTS; i++) { - ret = shim->read_v_prime_part(dig_port, i, &vprime); - if (ret) - return ret; - intel_de_write(dev_priv, HDCP_SHA_V_PRIME(i), vprime); - } + for (i = 0; i < DRM_HDCP_V_PRIME_NUM_PARTS; i++) + intel_de_write(dev_priv, HDCP_SHA_V_PRIME(i), v_prime[i]); /* * We need to write the concatenation of all device KSVs, BINFO (DP) || @@ -619,131 +560,39 @@ int intel_hdcp_validate_v_prime(struct intel_connector *connector, return 0; } -/* Implements Part 2 of the HDCP authorization procedure */ -static -int intel_hdcp_auth_downstream(struct intel_connector *connector) +int intel_hdcp1_store_receiver_info(struct drm_connector *drm_connector, + u32 *ksv, u32 status, u8 caps, + bool repeater_present) { + struct intel_connector *connector = to_intel_connector(drm_connector); struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - const struct intel_hdcp_shim *shim = connector->hdcp.shim; - u8 bstatus[2], num_downstream, *ksv_fifo; - int ret, i, tries = 3; - - ret = intel_hdcp_poll_ksv_fifo(dig_port, shim); - if (ret) { - drm_dbg_kms(&dev_priv->drm, - "KSV list failed to become ready (%d)\n", ret); - return ret; - } - - ret = shim->read_bstatus(dig_port, bstatus); - if (ret) - return ret; - - if (DRM_HDCP_MAX_DEVICE_EXCEEDED(bstatus[0]) || - DRM_HDCP_MAX_CASCADE_EXCEEDED(bstatus[1])) { - drm_dbg_kms(&dev_priv->drm, "Max Topology Limit Exceeded\n"); - return -EPERM; - } - - /* - * When repeater reports 0 device count, HDCP1.4 spec allows disabling - * the HDCP encryption. That implies that repeater can't have its own - * display. As there is no consumption of encrypted content in the - * repeater with 0 downstream devices, we are failing the - * authentication. - */ - num_downstream = DRM_HDCP_NUM_DOWNSTREAM(bstatus[0]); - if (num_downstream == 0) { - drm_dbg_kms(&dev_priv->drm, - "Repeater with zero downstream devices\n"); - return -EINVAL; - } - - ksv_fifo = kcalloc(DRM_HDCP_KSV_LEN, num_downstream, GFP_KERNEL); - if (!ksv_fifo) { - drm_dbg_kms(&dev_priv->drm, "Out of mem: ksv_fifo\n"); - return -ENOMEM; - } - - ret = shim->read_ksv_fifo(dig_port, num_downstream, ksv_fifo); - if (ret) - goto err; - - if (drm_hdcp_check_ksvs_revoked(&dev_priv->drm, ksv_fifo, - num_downstream) > 0) { - drm_err(&dev_priv->drm, "Revoked Ksv(s) in ksv_fifo\n"); - ret = -EPERM; - goto err; - } + enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; + enum port port = dig_port->base.port; - /* - * When V prime mismatches, DP Spec mandates re-read of - * V prime atleast twice. - */ - for (i = 0; i < tries; i++) { - ret = intel_hdcp_validate_v_prime(connector, shim, - ksv_fifo, num_downstream, - bstatus); - if (!ret) - break; - } + intel_de_write(dev_priv, HDCP_BKSVLO(dev_priv, cpu_transcoder, port), + ksv[0]); + intel_de_write(dev_priv, HDCP_BKSVHI(dev_priv, cpu_transcoder, port), + ksv[1]); - if (i == tries) { - drm_dbg_kms(&dev_priv->drm, - "V Prime validation failed.(%d)\n", ret); - goto err; - } + if (repeater_present) + intel_de_write(dev_priv, HDCP_REP_CTL, + intel_hdcp_get_repeater_ctl(dev_priv, + cpu_transcoder, + port)); - drm_dbg_kms(&dev_priv->drm, "HDCP is enabled (%d downstream devices)\n", - num_downstream); - ret = 0; -err: - kfree(ksv_fifo); - return ret; + return 0; } -/* Implements Part 1 of the HDCP authorization procedure */ -static int intel_hdcp_auth(struct intel_connector *connector) +int intel_hdcp1_read_an(struct drm_connector *drm_connector, + struct drm_hdcp_an *an) { + struct intel_connector *connector = to_intel_connector(drm_connector); struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct intel_hdcp *hdcp = &connector->hdcp; - const struct intel_hdcp_shim *shim = hdcp->shim; enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; enum port port = dig_port->base.port; - unsigned long r0_prime_gen_start; - int ret, i, tries = 2; - union { - u32 reg[2]; - u8 shim[DRM_HDCP_AN_LEN]; - } an; - union { - u32 reg[2]; - u8 shim[DRM_HDCP_KSV_LEN]; - } bksv; - union { - u32 reg; - u8 shim[DRM_HDCP_RI_LEN]; - } ri; - bool repeater_present, hdcp_capable; - - /* - * Detects whether the display is HDCP capable. Although we check for - * valid Bksv below, the HDCP over DP spec requires that we check - * whether the display supports HDCP before we write An. For HDMI - * displays, this is not necessary. - */ - if (shim->hdcp_capable) { - ret = shim->hdcp_capable(dig_port, &hdcp_capable); - if (ret) - return ret; - if (!hdcp_capable) { - drm_dbg_kms(&dev_priv->drm, - "Panel is not HDCP capable\n"); - return -EINVAL; - } - } + int i; /* Initialize An with 2 random values and acquire it */ for (i = 0; i < 2; i++) @@ -761,92 +610,72 @@ static int intel_hdcp_auth(struct intel_connector *connector) return -ETIMEDOUT; } - an.reg[0] = intel_de_read(dev_priv, - HDCP_ANLO(dev_priv, cpu_transcoder, port)); - an.reg[1] = intel_de_read(dev_priv, - HDCP_ANHI(dev_priv, cpu_transcoder, port)); - ret = shim->write_an_aksv(dig_port, an.shim); - if (ret) - return ret; - - r0_prime_gen_start = jiffies; - - memset(&bksv, 0, sizeof(bksv)); - - ret = intel_hdcp_read_valid_bksv(dig_port, shim, bksv.shim); - if (ret < 0) - return ret; - - if (drm_hdcp_check_ksvs_revoked(&dev_priv->drm, bksv.shim, 1) > 0) { - drm_err(&dev_priv->drm, "BKSV is revoked\n"); - return -EPERM; - } - - intel_de_write(dev_priv, HDCP_BKSVLO(dev_priv, cpu_transcoder, port), - bksv.reg[0]); - intel_de_write(dev_priv, HDCP_BKSVHI(dev_priv, cpu_transcoder, port), - bksv.reg[1]); + an->words[0] = intel_de_read(dev_priv, + HDCP_ANLO(dev_priv, cpu_transcoder, port)); + an->words[1] = intel_de_read(dev_priv, + HDCP_ANHI(dev_priv, cpu_transcoder, port)); - ret = shim->repeater_present(dig_port, &repeater_present); - if (ret) - return ret; - if (repeater_present) - intel_de_write(dev_priv, HDCP_REP_CTL, - intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder, port)); + return 0; +} - ret = shim->toggle_signalling(dig_port, cpu_transcoder, true); - if (ret) - return ret; +int intel_hdcp1_enable_encryption(struct drm_connector *drm_connector) +{ + struct intel_connector *connector = to_intel_connector(drm_connector); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; + enum port port = dig_port->base.port; intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), HDCP_CONF_AUTH_AND_ENC); + return 0; +} + +int intel_hdcp1_wait_for_r0(struct drm_connector *drm_connector) +{ + struct intel_connector *connector = to_intel_connector(drm_connector); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; + enum port port = dig_port->base.port; + /* Wait for R0 ready */ - if (wait_for(intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)) & + if (wait_for((intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port))) & (HDCP_STATUS_R0_READY | HDCP_STATUS_ENC), 1)) { drm_err(&dev_priv->drm, "Timed out waiting for R0 ready\n"); return -ETIMEDOUT; } - /* - * Wait for R0' to become available. The spec says 100ms from Aksv, but - * some monitors can take longer than this. We'll set the timeout at - * 300ms just to be sure. - * - * On DP, there's an R0_READY bit available but no such bit - * exists on HDMI. Since the upper-bound is the same, we'll just do - * the stupid thing instead of polling on one and not the other. - */ - wait_remaining_ms_from_jiffies(r0_prime_gen_start, 300); - - tries = 3; + return 0; +} - /* - * DP HDCP Spec mandates the two more reattempt to read R0, incase - * of R0 mismatch. - */ - for (i = 0; i < tries; i++) { - ri.reg = 0; - ret = shim->read_ri_prime(dig_port, ri.shim); - if (ret) - return ret; - intel_de_write(dev_priv, - HDCP_RPRIME(dev_priv, cpu_transcoder, port), - ri.reg); +int intel_hdcp1_match_ri(struct drm_connector *drm_connector, u32 ri_prime) +{ + struct intel_connector *connector = to_intel_connector(drm_connector); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; + enum port port = dig_port->base.port; - /* Wait for Ri prime match */ - if (!wait_for(intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)) & - (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1)) - break; - } + intel_de_write(dev_priv, HDCP_RPRIME(dev_priv, cpu_transcoder, port), + ri_prime); - if (i == tries) { - drm_dbg_kms(&dev_priv->drm, - "Timed out waiting for Ri prime match (%x)\n", - intel_de_read(dev_priv, HDCP_STATUS(dev_priv, - cpu_transcoder, port))); + /* Wait for Ri prime match */ + if (wait_for(intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port)) & + (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1)) return -ETIMEDOUT; - } + + return 0; +} + +int intel_hdcp1_post_encryption(struct drm_connector *drm_connector) +{ + struct intel_connector *connector = to_intel_connector(drm_connector); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; + enum port port = dig_port->base.port; /* Wait for encryption confirmation */ if (intel_de_wait_for_set(dev_priv, @@ -857,56 +686,22 @@ static int intel_hdcp_auth(struct intel_connector *connector) return -ETIMEDOUT; } - /* DP MST Auth Part 1 Step 2.a and Step 2.b */ - if (shim->stream_encryption) { - ret = shim->stream_encryption(connector, true); - if (ret) { - drm_err(&dev_priv->drm, "[%s:%d] Failed to enable HDCP 1.4 stream enc\n", - connector->base.name, connector->base.base.id); - return ret; - } - drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 transcoder: %s stream encrypted\n", - transcoder_name(hdcp->stream_transcoder)); - } - - if (repeater_present) - return intel_hdcp_auth_downstream(connector); - - drm_dbg_kms(&dev_priv->drm, "HDCP is enabled (no repeater present)\n"); return 0; } -static int _intel_hdcp_disable(struct intel_connector *connector) +int intel_hdcp1_disable(struct drm_connector *drm_connector) { + struct intel_connector *connector = to_intel_connector(drm_connector); struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_hdcp *hdcp = &connector->hdcp; enum port port = dig_port->base.port; enum transcoder cpu_transcoder = hdcp->cpu_transcoder; u32 repeater_ctl; - int ret; drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being disabled...\n", connector->base.name, connector->base.base.id); - if (hdcp->shim->stream_encryption) { - ret = hdcp->shim->stream_encryption(connector, false); - if (ret) { - drm_err(&dev_priv->drm, "[%s:%d] Failed to disable HDCP 1.4 stream enc\n", - connector->base.name, connector->base.base.id); - return ret; - } - drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 transcoder: %s stream encryption disabled\n", - transcoder_name(hdcp->stream_transcoder)); - /* - * If there are other connectors on this port using HDCP, - * don't disable it until it disabled HDCP encryption for - * all connectors in MST topology. - */ - if (dig_port->num_hdcp_streams > 0) - return 0; - } - hdcp->hdcp_encrypted = false; intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0); if (intel_de_wait_for_clear(dev_priv, @@ -922,190 +717,9 @@ static int _intel_hdcp_disable(struct intel_connector *connector) intel_de_write(dev_priv, HDCP_REP_CTL, intel_de_read(dev_priv, HDCP_REP_CTL) & ~repeater_ctl); - ret = hdcp->shim->toggle_signalling(dig_port, cpu_transcoder, false); - if (ret) { - drm_err(&dev_priv->drm, "Failed to disable HDCP signalling\n"); - return ret; - } - - drm_dbg_kms(&dev_priv->drm, "HDCP is disabled\n"); return 0; } -static int _intel_hdcp_enable(struct intel_connector *connector) -{ - struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct intel_hdcp *hdcp = &connector->hdcp; - int i, ret, tries = 3; - - drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being enabled...\n", - connector->base.name, connector->base.base.id); - - if (!hdcp_key_loadable(dev_priv)) { - drm_err(&dev_priv->drm, "HDCP key Load is not possible\n"); - return -ENXIO; - } - - for (i = 0; i < KEY_LOAD_TRIES; i++) { - ret = intel_hdcp_load_keys(dev_priv); - if (!ret) - break; - intel_hdcp_clear_keys(dev_priv); - } - if (ret) { - drm_err(&dev_priv->drm, "Could not load HDCP keys, (%d)\n", - ret); - return ret; - } - - /* Incase of authentication failures, HDCP spec expects reauth. */ - for (i = 0; i < tries; i++) { - ret = intel_hdcp_auth(connector); - if (!ret) { - hdcp->hdcp_encrypted = true; - return 0; - } - - drm_dbg_kms(&dev_priv->drm, "HDCP Auth failure (%d)\n", ret); - - /* Ensuring HDCP encryption and signalling are stopped. */ - _intel_hdcp_disable(connector); - } - - drm_dbg_kms(&dev_priv->drm, - "HDCP authentication failed (%d tries/%d)\n", tries, ret); - return ret; -} - -static struct intel_connector *intel_hdcp_to_connector(struct intel_hdcp *hdcp) -{ - return container_of(hdcp, struct intel_connector, hdcp); -} - -static void intel_hdcp_update_value(struct intel_connector *connector, - u64 value, bool update_property) -{ - struct drm_device *dev = connector->base.dev; - struct intel_digital_port *dig_port = intel_attached_dig_port(connector); - struct intel_hdcp *hdcp = &connector->hdcp; - - drm_WARN_ON(connector->base.dev, !mutex_is_locked(&hdcp->mutex)); - - if (hdcp->value == value) - return; - - drm_WARN_ON(dev, !mutex_is_locked(&dig_port->hdcp_mutex)); - - if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED) { - if (!drm_WARN_ON(dev, dig_port->num_hdcp_streams == 0)) - dig_port->num_hdcp_streams--; - } else if (value == DRM_MODE_CONTENT_PROTECTION_ENABLED) { - dig_port->num_hdcp_streams++; - } - - hdcp->value = value; - if (update_property) { - drm_connector_get(&connector->base); - schedule_work(&hdcp->prop_work); - } -} - -/* Implements Part 3 of the HDCP authorization procedure */ -static int intel_hdcp_check_link(struct intel_connector *connector) -{ - struct intel_digital_port *dig_port = intel_attached_dig_port(connector); - struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct intel_hdcp *hdcp = &connector->hdcp; - enum port port = dig_port->base.port; - enum transcoder cpu_transcoder; - int ret = 0; - - mutex_lock(&hdcp->mutex); - mutex_lock(&dig_port->hdcp_mutex); - - cpu_transcoder = hdcp->cpu_transcoder; - - /* Check_link valid only when HDCP1.4 is enabled */ - if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED || - !hdcp->hdcp_encrypted) { - ret = -EINVAL; - goto out; - } - - if (drm_WARN_ON(&dev_priv->drm, - !intel_hdcp_in_use(dev_priv, cpu_transcoder, port))) { - drm_err(&dev_priv->drm, - "%s:%d HDCP link stopped encryption,%x\n", - connector->base.name, connector->base.base.id, - intel_de_read(dev_priv, HDCP_STATUS(dev_priv, cpu_transcoder, port))); - ret = -ENXIO; - intel_hdcp_update_value(connector, - DRM_MODE_CONTENT_PROTECTION_DESIRED, - true); - goto out; - } - - if (hdcp->shim->check_link(dig_port, connector)) { - if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { - intel_hdcp_update_value(connector, - DRM_MODE_CONTENT_PROTECTION_ENABLED, true); - } - goto out; - } - - drm_dbg_kms(&dev_priv->drm, - "[%s:%d] HDCP link failed, retrying authentication\n", - connector->base.name, connector->base.base.id); - - ret = _intel_hdcp_disable(connector); - if (ret) { - drm_err(&dev_priv->drm, "Failed to disable hdcp (%d)\n", ret); - intel_hdcp_update_value(connector, - DRM_MODE_CONTENT_PROTECTION_DESIRED, - true); - goto out; - } - - ret = _intel_hdcp_enable(connector); - if (ret) { - drm_err(&dev_priv->drm, "Failed to enable hdcp (%d)\n", ret); - intel_hdcp_update_value(connector, - DRM_MODE_CONTENT_PROTECTION_DESIRED, - true); - goto out; - } - -out: - mutex_unlock(&dig_port->hdcp_mutex); - mutex_unlock(&hdcp->mutex); - return ret; -} - -static void intel_hdcp_prop_work(struct work_struct *work) -{ - struct intel_hdcp *hdcp = container_of(work, struct intel_hdcp, - prop_work); - struct intel_connector *connector = intel_hdcp_to_connector(hdcp); - struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - - drm_modeset_lock(&dev_priv->drm.mode_config.connection_mutex, NULL); - mutex_lock(&hdcp->mutex); - - /* - * This worker is only used to flip between ENABLED/DESIRED. Either of - * those to UNDESIRED is handled by core. If value == UNDESIRED, - * we're running just after hdcp has been disabled, so just exit - */ - if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) - drm_hdcp_update_content_protection(&connector->base, - hdcp->value); - - mutex_unlock(&hdcp->mutex); - drm_modeset_unlock(&dev_priv->drm.mode_config.connection_mutex); - - drm_connector_put(&connector->base); -} - bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port) { return INTEL_INFO(dev_priv)->display.has_hdcp && @@ -1938,8 +1552,9 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector) return ret; } -static int _intel_hdcp2_enable(struct intel_connector *connector) +int intel_hdcp2_enable(struct drm_connector *drm_connector) { + struct intel_connector *connector = to_intel_connector(drm_connector); struct drm_i915_private *i915 = to_i915(connector->base.dev); struct intel_hdcp *hdcp = &connector->hdcp; int ret; @@ -2001,9 +1616,15 @@ _intel_hdcp2_disable(struct intel_connector *connector, bool hdcp2_link_recovery return ret; } +int intel_hdcp2_disable(struct drm_connector *drm_connector) +{ + return _intel_hdcp2_disable(to_intel_connector(drm_connector), false); +} + /* Implements the Link Integrity Check for HDCP2.2 */ -static int intel_hdcp2_check_link(struct intel_connector *connector) +int intel_hdcp2_check_link(struct drm_connector *drm_connector) { + struct intel_connector *connector = to_intel_connector(drm_connector); struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_hdcp *hdcp = &connector->hdcp; @@ -2011,109 +1632,40 @@ static int intel_hdcp2_check_link(struct intel_connector *connector) enum transcoder cpu_transcoder; int ret = 0; - mutex_lock(&hdcp->mutex); - mutex_lock(&dig_port->hdcp_mutex); cpu_transcoder = hdcp->cpu_transcoder; /* hdcp2_check_link is expected only when HDCP2.2 is Enabled */ - if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED || - !hdcp->hdcp2_encrypted) { - ret = -EINVAL; - goto out; - } + if (!hdcp->hdcp2_encrypted) + return -EINVAL; if (drm_WARN_ON(&dev_priv->drm, !intel_hdcp2_in_use(dev_priv, cpu_transcoder, port))) { drm_err(&dev_priv->drm, "HDCP2.2 link stopped the encryption, %x\n", intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port))); - ret = -ENXIO; - _intel_hdcp2_disable(connector, true); - intel_hdcp_update_value(connector, - DRM_MODE_CONTENT_PROTECTION_DESIRED, - true); - goto out; + return -ENXIO; } ret = hdcp->shim->check_2_2_link(dig_port, connector); - if (ret == HDCP_LINK_PROTECTED) { - if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { - intel_hdcp_update_value(connector, - DRM_MODE_CONTENT_PROTECTION_ENABLED, - true); - } - goto out; - } + if (ret == HDCP_LINK_PROTECTED) + return 0; if (ret == HDCP_TOPOLOGY_CHANGE) { - if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED) - goto out; - drm_dbg_kms(&dev_priv->drm, "HDCP2.2 Downstream topology change\n"); ret = hdcp2_authenticate_repeater_topology(connector); - if (!ret) { - intel_hdcp_update_value(connector, - DRM_MODE_CONTENT_PROTECTION_ENABLED, - true); - goto out; - } - drm_dbg_kms(&dev_priv->drm, - "[%s:%d] Repeater topology auth failed.(%d)\n", - connector->base.name, connector->base.base.id, - ret); - } else { - drm_dbg_kms(&dev_priv->drm, - "[%s:%d] HDCP2.2 link failed, retrying auth\n", - connector->base.name, connector->base.base.id); - } - - ret = _intel_hdcp2_disable(connector, true); - if (ret) { - drm_err(&dev_priv->drm, - "[%s:%d] Failed to disable hdcp2.2 (%d)\n", - connector->base.name, connector->base.base.id, ret); - intel_hdcp_update_value(connector, - DRM_MODE_CONTENT_PROTECTION_DESIRED, true); - goto out; - } + if (!ret) + return 0; - ret = _intel_hdcp2_enable(connector); - if (ret) { drm_dbg_kms(&dev_priv->drm, - "[%s:%d] Failed to enable hdcp2.2 (%d)\n", + "[%s:%d] Repeater topology auth failed.(%d)\n", connector->base.name, connector->base.base.id, ret); - intel_hdcp_update_value(connector, - DRM_MODE_CONTENT_PROTECTION_DESIRED, - true); - goto out; } -out: - mutex_unlock(&dig_port->hdcp_mutex); - mutex_unlock(&hdcp->mutex); return ret; } -static void intel_hdcp_check_work(struct work_struct *work) -{ - struct intel_hdcp *hdcp = container_of(to_delayed_work(work), - struct intel_hdcp, - check_work); - struct intel_connector *connector = intel_hdcp_to_connector(hdcp); - - if (drm_connector_is_unregistered(&connector->base)) - return; - - if (!intel_hdcp2_check_link(connector)) - schedule_delayed_work(&hdcp->check_work, - DRM_HDCP2_CHECK_PERIOD_MS); - else if (!intel_hdcp_check_link(connector)) - schedule_delayed_work(&hdcp->check_work, - DRM_HDCP_CHECK_PERIOD_MS); -} - static int i915_hdcp_component_bind(struct device *i915_kdev, struct device *mei_kdev, void *data) { @@ -2166,22 +1718,27 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder) } } -static int -_intel_hdcp_setup(struct intel_connector *connector, - const struct intel_crtc_state *pipe_config, u8 content_type) +int intel_hdcp_setup(struct drm_connector *connector, + struct drm_atomic_state *state) { - struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct intel_digital_port *dig_port = intel_attached_dig_port(connector); - struct intel_hdcp *hdcp = &connector->hdcp; + struct drm_i915_private *dev_priv = to_i915(connector->dev); + struct intel_connector *intel_connector = to_intel_connector(connector); + struct intel_digital_port *dig_port = intel_attached_dig_port(intel_connector); + struct drm_connector_state *conn_state; + struct drm_crtc_state *crtc_state; + struct intel_crtc_state *pipe_config; + struct intel_hdcp *hdcp = &intel_connector->hdcp; int ret = 0; - if (!connector->encoder) { + if (!intel_connector->encoder) { drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n", - connector->base.name, connector->base.base.id); + connector->name, connector->base.id); return -ENODEV; } - hdcp->content_type = content_type; + conn_state = drm_atomic_get_new_connector_state(state, connector); + crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); + pipe_config = to_intel_crtc_state(crtc_state); if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) { hdcp->cpu_transcoder = pipe_config->mst_master_transcoder; @@ -2298,7 +1855,6 @@ int intel_hdcp_init(struct intel_connector *connector, { struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_hdcp *hdcp = &connector->hdcp; - int ret; if (!shim) return -EINVAL; @@ -2306,174 +1862,12 @@ int intel_hdcp_init(struct intel_connector *connector, if (is_hdcp2_supported(dev_priv)) intel_hdcp2_init(connector, dig_port, shim); - ret = - drm_connector_attach_content_protection_property(&connector->base, - hdcp->hdcp2_supported); - if (ret) { - hdcp->hdcp2_supported = false; - kfree(dig_port->hdcp_port_data.streams); - return ret; - } - hdcp->shim = shim; - mutex_init(&hdcp->mutex); - INIT_DELAYED_WORK(&hdcp->check_work, intel_hdcp_check_work); - INIT_WORK(&hdcp->prop_work, intel_hdcp_prop_work); init_waitqueue_head(&hdcp->cp_irq_queue); return 0; } -int intel_hdcp_enable(struct intel_connector *connector, - const struct intel_crtc_state *pipe_config, u8 content_type) -{ - struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct intel_digital_port *dig_port = intel_attached_dig_port(connector); - struct intel_hdcp *hdcp = &connector->hdcp; - unsigned long check_link_interval = DRM_HDCP_CHECK_PERIOD_MS; - bool capable; - int ret = -EINVAL; - - if (!hdcp->shim) - return -ENOENT; - - mutex_lock(&hdcp->mutex); - mutex_lock(&dig_port->hdcp_mutex); - drm_WARN_ON(&dev_priv->drm, - hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED); - - ret = _intel_hdcp_setup(connector, pipe_config, content_type); - if (ret) - goto out; - - /* - * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup - * is capable of HDCP2.2, it is preferred to use HDCP2.2. - */ - ret = intel_hdcp2_capable(connector, &capable); - if (capable) { - ret = _intel_hdcp2_enable(connector); - if (!ret) { - check_link_interval = DRM_HDCP2_CHECK_PERIOD_MS; - goto out; - } - } - - /* - * When HDCP2.2 fails and Content Type is not Type1, HDCP1.4 will - * be attempted. - */ - ret = intel_hdcp_capable(connector, &capable); - if (ret) - goto out; - - if (capable && hdcp->content_type != DRM_MODE_HDCP_CONTENT_TYPE1) - ret = _intel_hdcp_enable(connector); - -out: - if (!ret) { - schedule_delayed_work(&hdcp->check_work, check_link_interval); - intel_hdcp_update_value(connector, - DRM_MODE_CONTENT_PROTECTION_ENABLED, - true); - } - - mutex_unlock(&dig_port->hdcp_mutex); - mutex_unlock(&hdcp->mutex); - return ret; -} - -int intel_hdcp_disable(struct intel_connector *connector) -{ - struct intel_digital_port *dig_port = intel_attached_dig_port(connector); - struct intel_hdcp *hdcp = &connector->hdcp; - int ret = 0; - - if (!hdcp->shim) - return -ENOENT; - - mutex_lock(&hdcp->mutex); - mutex_lock(&dig_port->hdcp_mutex); - - if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED) - goto out; - - intel_hdcp_update_value(connector, - DRM_MODE_CONTENT_PROTECTION_UNDESIRED, false); - if (hdcp->hdcp2_encrypted) - ret = _intel_hdcp2_disable(connector, false); - else if (hdcp->hdcp_encrypted) - ret = _intel_hdcp_disable(connector); - -out: - mutex_unlock(&dig_port->hdcp_mutex); - mutex_unlock(&hdcp->mutex); - cancel_delayed_work_sync(&hdcp->check_work); - return ret; -} - -void intel_hdcp_update_pipe(struct intel_atomic_state *state, - struct intel_encoder *encoder, - const struct intel_crtc_state *crtc_state, - const struct drm_connector_state *conn_state) -{ - struct intel_connector *connector = - to_intel_connector(conn_state->connector); - struct intel_hdcp *hdcp = &connector->hdcp; - bool content_protection_type_changed, desired_and_not_enabled = false; - - if (!connector->hdcp.shim) - return; - - content_protection_type_changed = - (conn_state->hdcp_content_type != hdcp->content_type && - conn_state->content_protection != - DRM_MODE_CONTENT_PROTECTION_UNDESIRED); - - /* - * During the HDCP encryption session if Type change is requested, - * disable the HDCP and reenable it with new TYPE value. - */ - if (conn_state->content_protection == - DRM_MODE_CONTENT_PROTECTION_UNDESIRED || - content_protection_type_changed) - intel_hdcp_disable(connector); - - /* - * Mark the hdcp state as DESIRED after the hdcp disable of type - * change procedure. - */ - if (content_protection_type_changed) { - mutex_lock(&hdcp->mutex); - hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED; - drm_connector_get(&connector->base); - schedule_work(&hdcp->prop_work); - mutex_unlock(&hdcp->mutex); - } - - if (conn_state->content_protection == - DRM_MODE_CONTENT_PROTECTION_DESIRED) { - mutex_lock(&hdcp->mutex); - /* Avoid enabling hdcp, if it already ENABLED */ - desired_and_not_enabled = - hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED; - mutex_unlock(&hdcp->mutex); - /* - * If HDCP already ENABLED and CP property is DESIRED, schedule - * prop_work to update correct CP property to user space. - */ - if (!desired_and_not_enabled && !content_protection_type_changed) { - drm_connector_get(&connector->base); - schedule_work(&hdcp->prop_work); - } - } - - if (desired_and_not_enabled || content_protection_type_changed) - intel_hdcp_enable(connector, - crtc_state, - (u8)conn_state->hdcp_content_type); -} - void intel_hdcp_component_fini(struct drm_i915_private *dev_priv) { mutex_lock(&dev_priv->hdcp_comp_mutex); @@ -2495,33 +1889,8 @@ void intel_hdcp_cleanup(struct intel_connector *connector) if (!hdcp->shim) return; - /* - * If the connector is registered, it's possible userspace could kick - * off another HDCP enable, which would re-spawn the workers. - */ - drm_WARN_ON(connector->base.dev, - connector->base.registration_state == DRM_CONNECTOR_REGISTERED); - - /* - * Now that the connector is not registered, check_work won't be run, - * but cancel any outstanding instances of it - */ - cancel_delayed_work_sync(&hdcp->check_work); - - /* - * We don't cancel prop_work in the same way as check_work since it - * requires connection_mutex which could be held while calling this - * function. Instead, we rely on the connector references grabbed before - * scheduling prop_work to ensure the connector is alive when prop_work - * is run. So if we're in the destroy path (which is where this - * function should be called), we're "guaranteed" that prop_work is not - * active (tl;dr This Should Never Happen). - */ - drm_WARN_ON(connector->base.dev, work_pending(&hdcp->prop_work)); - - mutex_lock(&hdcp->mutex); + drm_hdcp_helper_destroy(connector->hdcp_helper_data); hdcp->shim = NULL; - mutex_unlock(&hdcp->mutex); } /* Handles the CP_IRQ raised from the DP HDCP sink */ @@ -2535,5 +1904,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector) atomic_inc(&connector->hdcp.cp_irq_count); wake_up_all(&connector->hdcp.cp_irq_queue); - schedule_delayed_work(&hdcp->check_work, 0); + drm_hdcp_helper_schedule_hdcp_check(connector->hdcp_helper_data); } diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h index f06f6e5a2b1a..767f75a85651 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.h +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h @@ -12,6 +12,7 @@ struct drm_connector; struct drm_connector_state; +struct drm_hdcp_an; struct drm_i915_private; struct intel_atomic_state; struct intel_connector; @@ -25,16 +26,29 @@ enum transcoder; int intel_hdcp_init(struct intel_connector *connector, struct intel_digital_port *dig_port, const struct intel_hdcp_shim *hdcp_shim); -int intel_hdcp_enable(struct intel_connector *connector, - const struct intel_crtc_state *pipe_config, u8 content_type); -int intel_hdcp_disable(struct intel_connector *connector); -void intel_hdcp_update_pipe(struct intel_atomic_state *state, - struct intel_encoder *encoder, - const struct intel_crtc_state *crtc_state, - const struct drm_connector_state *conn_state); +int intel_hdcp_setup(struct drm_connector *drm_connector, + struct drm_atomic_state *state); +int intel_hdcp_load_keys(struct drm_connector *drm_connector); bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port); int intel_hdcp_capable(struct intel_connector *connector, bool *capable); -int intel_hdcp2_capable(struct intel_connector *connector, bool *capable); +int intel_hdcp2_capable(struct drm_connector *drm_connector, bool *capable); +int intel_hdcp2_enable(struct drm_connector *drm_connector); +int intel_hdcp2_disable(struct drm_connector *drm_connector); +int intel_hdcp2_check_link(struct drm_connector *drm_connector); +int intel_hdcp1_store_receiver_info(struct drm_connector *drm_connector, + u32 *ksv, u32 status, u8 caps, + bool repeater_present); +int intel_hdcp1_read_an(struct drm_connector *drm_connector, + struct drm_hdcp_an *an); +int intel_hdcp1_enable_encryption(struct drm_connector *drm_connector); +int intel_hdcp1_wait_for_r0(struct drm_connector *drm_connector); +int intel_hdcp1_match_ri(struct drm_connector *drm_connector, u32 ri_prime); +int intel_hdcp1_post_encryption(struct drm_connector *drm_connector); +int intel_hdcp1_store_ksv_fifo(struct drm_connector *drm_connector, + u8 *ksv_fifo, u8 num_downstream, u8 *bstatus, + u32 *v_prime); +int intel_hdcp1_check_link(struct drm_connector *drm_connector); +int intel_hdcp1_disable(struct drm_connector *drm_connector); void intel_hdcp_component_init(struct drm_i915_private *dev_priv); void intel_hdcp_component_fini(struct drm_i915_private *dev_priv); void intel_hdcp_cleanup(struct intel_connector *connector); diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 1bc33766ed39..f0b47319683d 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -1322,16 +1322,24 @@ static int intel_hdmi_hdcp_write(struct intel_digital_port *dig_port, } static -int intel_hdmi_hdcp_write_an_aksv(struct intel_digital_port *dig_port, - u8 *an) +int intel_hdmi_hdcp1_send_an_aksv(struct drm_connector *drm_connector) { + struct intel_connector *connector = to_intel_connector(drm_connector); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); struct intel_hdmi *hdmi = &dig_port->hdmi; struct i2c_adapter *adapter = intel_gmbus_get_adapter(i915, hdmi->ddc_bus); + struct drm_hdcp_an an; int ret; - ret = intel_hdmi_hdcp_write(dig_port, DRM_HDCP_DDC_AN, an, + /* Output An first, that's easy */ + ret = intel_hdcp1_read_an(drm_connector, &an); + if (ret) + return ret; + + + ret = intel_hdmi_hdcp_write(dig_port, DRM_HDCP_DDC_AN, an.bytes, DRM_HDCP_AN_LEN); if (ret) { drm_dbg_kms(&i915->drm, "Write An over DDC failed (%d)\n", @@ -1347,120 +1355,6 @@ int intel_hdmi_hdcp_write_an_aksv(struct intel_digital_port *dig_port, return 0; } -static int intel_hdmi_hdcp_read_bksv(struct intel_digital_port *dig_port, - u8 *bksv) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - - int ret; - ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_BKSV, bksv, - DRM_HDCP_KSV_LEN); - if (ret) - drm_dbg_kms(&i915->drm, "Read Bksv over DDC failed (%d)\n", - ret); - return ret; -} - -static -int intel_hdmi_hdcp_read_bstatus(struct intel_digital_port *dig_port, - u8 *bstatus) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - - int ret; - ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_BSTATUS, - bstatus, DRM_HDCP_BSTATUS_LEN); - if (ret) - drm_dbg_kms(&i915->drm, "Read bstatus over DDC failed (%d)\n", - ret); - return ret; -} - -static -int intel_hdmi_hdcp_repeater_present(struct intel_digital_port *dig_port, - bool *repeater_present) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - int ret; - u8 val; - - ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_BCAPS, &val, 1); - if (ret) { - drm_dbg_kms(&i915->drm, "Read bcaps over DDC failed (%d)\n", - ret); - return ret; - } - *repeater_present = val & DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT; - return 0; -} - -static -int intel_hdmi_hdcp_read_ri_prime(struct intel_digital_port *dig_port, - u8 *ri_prime) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - - int ret; - ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_RI_PRIME, - ri_prime, DRM_HDCP_RI_LEN); - if (ret) - drm_dbg_kms(&i915->drm, "Read Ri' over DDC failed (%d)\n", - ret); - return ret; -} - -static -int intel_hdmi_hdcp_read_ksv_ready(struct intel_digital_port *dig_port, - bool *ksv_ready) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - int ret; - u8 val; - - ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_BCAPS, &val, 1); - if (ret) { - drm_dbg_kms(&i915->drm, "Read bcaps over DDC failed (%d)\n", - ret); - return ret; - } - *ksv_ready = val & DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY; - return 0; -} - -static -int intel_hdmi_hdcp_read_ksv_fifo(struct intel_digital_port *dig_port, - int num_downstream, u8 *ksv_fifo) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - int ret; - ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_KSV_FIFO, - ksv_fifo, num_downstream * DRM_HDCP_KSV_LEN); - if (ret) { - drm_dbg_kms(&i915->drm, - "Read ksv fifo over DDC failed (%d)\n", ret); - return ret; - } - return 0; -} - -static -int intel_hdmi_hdcp_read_v_prime_part(struct intel_digital_port *dig_port, - int i, u32 *part) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - int ret; - - if (i >= DRM_HDCP_V_PRIME_NUM_PARTS) - return -EINVAL; - - ret = intel_hdmi_hdcp_read(dig_port, DRM_HDCP_DDC_V_PRIME(i), - part, DRM_HDCP_V_PRIME_PART_LEN); - if (ret) - drm_dbg_kms(&i915->drm, "Read V'[%d] over DDC failed (%d)\n", - i, ret); - return ret; -} - static int kbl_repositioning_enc_en_signal(struct intel_connector *connector, enum transcoder cpu_transcoder) { @@ -1530,49 +1424,36 @@ int intel_hdmi_hdcp_toggle_signalling(struct intel_digital_port *dig_port, } static -bool intel_hdmi_hdcp_check_link_once(struct intel_digital_port *dig_port, - struct intel_connector *connector) +int intel_hdmi_hdcp1_enable_encryption(struct drm_connector *drm_connector) { - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - enum port port = dig_port->base.port; + struct intel_connector *connector = to_intel_connector(drm_connector); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; int ret; - union { - u32 reg; - u8 shim[DRM_HDCP_RI_LEN]; - } ri; - ret = intel_hdmi_hdcp_read_ri_prime(dig_port, ri.shim); + ret = intel_hdmi_hdcp_toggle_signalling(dig_port, cpu_transcoder, true); if (ret) - return false; - - intel_de_write(i915, HDCP_RPRIME(i915, cpu_transcoder, port), ri.reg); + return ret; - /* Wait for Ri prime match */ - if (wait_for((intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)) & - (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC)) == - (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1)) { - drm_dbg_kms(&i915->drm, "Ri' mismatch detected (%x)\n", - intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, - port))); - return false; - } - return true; + return intel_hdcp1_enable_encryption(drm_connector); } -static -bool intel_hdmi_hdcp_check_link(struct intel_digital_port *dig_port, - struct intel_connector *connector) +static int intel_hdmi_hdcp1_disable(struct drm_connector *drm_connector) { - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - int retry; + struct intel_connector *connector = to_intel_connector(drm_connector); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; + struct drm_i915_private *i915 = to_i915(connector->base.dev); + int ret; - for (retry = 0; retry < 3; retry++) - if (intel_hdmi_hdcp_check_link_once(dig_port, connector)) - return true; + ret = intel_hdcp1_disable(drm_connector); + if (ret) { + drm_err(&i915->drm, "[%s:%d] Failed to disable HDCP 1.4\n", + connector->base.name, connector->base.base.id); + return ret; + } - drm_err(&i915->drm, "Link check failed\n"); - return false; + return intel_hdmi_hdcp_toggle_signalling(dig_port, cpu_transcoder, false); } struct hdcp2_hdmi_msg_timeout { @@ -1717,7 +1598,7 @@ int intel_hdmi_hdcp2_read_msg(struct intel_digital_port *dig_port, static int intel_hdmi_hdcp2_check_link(struct intel_digital_port *dig_port, - struct intel_connector *connector) + struct intel_connector *connector) { u8 rx_status[HDCP_2_2_HDMI_RXSTATUS_LEN]; int ret; @@ -1739,12 +1620,18 @@ int intel_hdmi_hdcp2_check_link(struct intel_digital_port *dig_port, } static -int intel_hdmi_hdcp2_capable(struct intel_digital_port *dig_port, +int intel_hdmi_hdcp2_capable(struct drm_connector *drm_connector, bool *capable) { + struct intel_connector *connector = to_intel_connector(drm_connector); + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); u8 hdcp2_version; int ret; + ret = intel_hdcp2_capable(drm_connector, capable); + if (ret || !capable) + return ret; + *capable = false; ret = intel_hdmi_hdcp_read(dig_port, HDCP_2_2_HDMI_REG_VER_OFFSET, &hdcp2_version, sizeof(hdcp2_version)); @@ -1755,23 +1642,30 @@ int intel_hdmi_hdcp2_capable(struct intel_digital_port *dig_port, } static const struct intel_hdcp_shim intel_hdmi_hdcp_shim = { - .write_an_aksv = intel_hdmi_hdcp_write_an_aksv, - .read_bksv = intel_hdmi_hdcp_read_bksv, - .read_bstatus = intel_hdmi_hdcp_read_bstatus, - .repeater_present = intel_hdmi_hdcp_repeater_present, - .read_ri_prime = intel_hdmi_hdcp_read_ri_prime, - .read_ksv_ready = intel_hdmi_hdcp_read_ksv_ready, - .read_ksv_fifo = intel_hdmi_hdcp_read_ksv_fifo, - .read_v_prime_part = intel_hdmi_hdcp_read_v_prime_part, .toggle_signalling = intel_hdmi_hdcp_toggle_signalling, - .check_link = intel_hdmi_hdcp_check_link, .write_2_2_msg = intel_hdmi_hdcp2_write_msg, .read_2_2_msg = intel_hdmi_hdcp2_read_msg, .check_2_2_link = intel_hdmi_hdcp2_check_link, - .hdcp_2_2_capable = intel_hdmi_hdcp2_capable, .protocol = HDCP_PROTOCOL_HDMI, }; +static const struct drm_hdcp_helper_funcs intel_hdmi_hdcp_helper_funcs = { + .setup = intel_hdcp_setup, + .load_keys = intel_hdcp_load_keys, + .hdcp2_capable = intel_hdmi_hdcp2_capable, + .hdcp2_enable = intel_hdcp2_enable, + .hdcp2_check_link = intel_hdcp2_check_link, + .hdcp2_disable = intel_hdcp2_disable, + .hdcp1_send_an_aksv = intel_hdmi_hdcp1_send_an_aksv, + .hdcp1_store_receiver_info = intel_hdcp1_store_receiver_info, + .hdcp1_enable_encryption = intel_hdmi_hdcp1_enable_encryption, + .hdcp1_wait_for_r0 = intel_hdcp1_wait_for_r0, + .hdcp1_match_ri = intel_hdcp1_match_ri, + .hdcp1_post_encryption = intel_hdcp1_post_encryption, + .hdcp1_store_ksv_fifo = intel_hdcp1_store_ksv_fifo, + .hdcp1_disable = intel_hdmi_hdcp1_disable, +}; + static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@ -2835,6 +2729,38 @@ void intel_infoframe_init(struct intel_digital_port *dig_port) } } +static void intel_hdmi_hdcp_init(struct intel_digital_port *dig_port, + struct intel_connector *connector) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_encoder *intel_encoder = &dig_port->base; + enum port port = intel_encoder->port; + struct drm_hdcp_helper_data *data; + int ret; + + if (!is_hdcp_supported(dev_priv, port)) + return; + + data = drm_hdcp_helper_initialize_hdmi(&connector->base, + &intel_hdmi_hdcp_helper_funcs, + true); + if (IS_ERR(data)) { + drm_dbg_kms(&dev_priv->drm, "HDCP init failed ret=%ld\n", + PTR_ERR(data)); + return; + } + + ret = intel_hdcp_init(connector, dig_port, &intel_hdmi_hdcp_shim); + if (ret) { + drm_hdcp_helper_destroy(data); + drm_dbg_kms(&dev_priv->drm, "Intel HDCP init failed ret=%d\n", + ret); + return; + } + + connector->hdcp_helper_data = data; +} + void intel_hdmi_init_connector(struct intel_digital_port *dig_port, struct intel_connector *intel_connector) { @@ -2888,13 +2814,7 @@ void intel_hdmi_init_connector(struct intel_digital_port *dig_port, intel_connector_attach_encoder(intel_connector, intel_encoder); intel_hdmi->attached_connector = intel_connector; - if (is_hdcp_supported(dev_priv, port)) { - int ret = intel_hdcp_init(intel_connector, dig_port, - &intel_hdmi_hdcp_shim); - if (ret) - drm_dbg_kms(&dev_priv->drm, - "HDCP init failed, skipping.\n"); - } + intel_hdmi_hdcp_init(dig_port, intel_connector); /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written * 0xd. Failure to do so will result in spurious interrupts being From patchwork Mon Sep 13 17:57:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 12490377 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C7BCC433EF for ; Mon, 13 Sep 2021 17:58:36 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2E9D960F12 for ; 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Mon, 13 Sep 2021 10:58:30 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org Date: Mon, 13 Sep 2021 13:57:39 -0400 Message-Id: <20210913175747.47456-9-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 08/14] drm/msm/dpu_kms: Re-order dpu includes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul Make includes alphabetical in dpu_kms.c Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index ae48f41821cf..fb0d9f781c66 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -21,14 +21,14 @@ #include "msm_gem.h" #include "disp/msm_disp_snapshot.h" -#include "dpu_kms.h" #include "dpu_core_irq.h" +#include "dpu_crtc.h" +#include "dpu_encoder.h" #include "dpu_formats.h" #include "dpu_hw_vbif.h" -#include "dpu_vbif.h" -#include "dpu_encoder.h" +#include "dpu_kms.h" #include "dpu_plane.h" -#include "dpu_crtc.h" +#include "dpu_vbif.h" #define CREATE_TRACE_POINTS #include "dpu_trace.h" From patchwork Mon Sep 13 17:57:40 2021 Content-Type: text/plain; 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Mon, 13 Sep 2021 10:58:34 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org Date: Mon, 13 Sep 2021 13:57:40 -0400 Message-Id: <20210913175747.47456-10-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 09/14] drm/msm/dpu: Remove useless checks in dpu_encoder X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul A couple more useless checks to remove in dpu_encoder. Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 0e9d3fa1544b..984f8a59cb73 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1153,10 +1153,6 @@ static void dpu_encoder_virt_enable(struct drm_encoder *drm_enc) struct msm_drm_private *priv; struct drm_display_mode *cur_mode = NULL; - if (!drm_enc) { - DPU_ERROR("invalid encoder\n"); - return; - } dpu_enc = to_dpu_encoder_virt(drm_enc); mutex_lock(&dpu_enc->enc_lock); @@ -1203,14 +1199,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc) struct msm_drm_private *priv; int i = 0; - if (!drm_enc) { - DPU_ERROR("invalid encoder\n"); - return; - } else if (!drm_enc->dev) { - DPU_ERROR("invalid dev\n"); - return; - } - dpu_enc = to_dpu_encoder_virt(drm_enc); DPU_DEBUG_ENC(dpu_enc, "\n"); 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Mon, 13 Sep 2021 10:58:38 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org Date: Mon, 13 Sep 2021 13:57:41 -0400 Message-Id: <20210913175747.47456-11-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 10/14] drm/msm/dpu: Remove encoder->enable() hack X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul encoder->commit() was being misused because there were some global resources which needed to be tweaked in encoder->enable() which were not accessible in dpu_encoder.c. That is no longer true and the redirect serves no purpose any longer. So remove the indirection. Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 5 +---- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 22 --------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 4 ---- 4 files changed, 1 insertion(+), 32 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 984f8a59cb73..ddc542a0d41f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -2122,11 +2122,8 @@ static void dpu_encoder_frame_done_timeout(struct timer_list *t) static const struct drm_encoder_helper_funcs dpu_encoder_helper_funcs = { .mode_set = dpu_encoder_virt_mode_set, .disable = dpu_encoder_virt_disable, - .enable = dpu_kms_encoder_enable, + .enable = dpu_encoder_virt_enable, .atomic_check = dpu_encoder_virt_atomic_check, - - /* This is called by dpu_kms_encoder_enable */ - .commit = dpu_encoder_virt_enable, }; static const struct drm_encoder_funcs dpu_encoder_funcs = { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index fb0d9f781c66..4a0b55d145ad 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -381,28 +381,6 @@ static void dpu_kms_flush_commit(struct msm_kms *kms, unsigned crtc_mask) } } -/* - * Override the encoder enable since we need to setup the inline rotator and do - * some crtc magic before enabling any bridge that might be present. - */ -void dpu_kms_encoder_enable(struct drm_encoder *encoder) -{ - const struct drm_encoder_helper_funcs *funcs = encoder->helper_private; - struct drm_device *dev = encoder->dev; - struct drm_crtc *crtc; - - /* Forward this enable call to the commit hook */ - if (funcs && funcs->commit) - funcs->commit(encoder); - - drm_for_each_crtc(crtc, dev) { - if (!(crtc->state->encoder_mask & drm_encoder_mask(encoder))) - continue; - - trace_dpu_kms_enc_enable(DRMID(crtc)); - } -} - static void dpu_kms_complete_commit(struct msm_kms *kms, unsigned crtc_mask) { struct dpu_kms *dpu_kms = to_dpu_kms(kms); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h index 323a6bce9e64..f1ebb60dacab 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h @@ -248,8 +248,6 @@ void *dpu_debugfs_get_root(struct dpu_kms *dpu_kms); int dpu_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); void dpu_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc); -void dpu_kms_encoder_enable(struct drm_encoder *encoder); - /** * dpu_kms_get_clk_rate() - get the clock rate * @dpu_kms: pointer to dpu_kms structure diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h index 37bba57675a8..54d74341e690 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h @@ -266,10 +266,6 @@ DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_commit, TP_PROTO(uint32_t drm_id), TP_ARGS(drm_id) ); -DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_enc_enable, - TP_PROTO(uint32_t drm_id), - TP_ARGS(drm_id) -); DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_commit, TP_PROTO(uint32_t drm_id), TP_ARGS(drm_id) From patchwork Mon Sep 13 17:57:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 12490437 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10A80C43217 for ; Mon, 13 Sep 2021 17:58:56 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D54AB610CF for ; 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Mon, 13 Sep 2021 10:58:42 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org Date: Mon, 13 Sep 2021 13:57:42 -0400 Message-Id: <20210913175747.47456-12-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 11/14] drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul Audio is initialized last, it should be de-initialized first to match the order in dp_init_sub_modules(). Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/dp/dp_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index fbe4c2cd52a3..19946024e235 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -714,9 +714,9 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data) static void dp_display_deinit_sub_modules(struct dp_display_private *dp) { dp_debug_put(dp->debug); + dp_audio_put(dp->audio); dp_panel_put(dp->panel); dp_aux_put(dp->aux); - dp_audio_put(dp->audio); } static int dp_init_sub_modules(struct dp_display_private *dp) From patchwork Mon Sep 13 17:57:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 12490435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5CE9C433EF for ; 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Mon, 13 Sep 2021 10:58:46 -0700 (PDT) Received: from localhost ([167.100.64.199]) by smtp.gmail.com with ESMTPSA id d13sm4515415qtm.32.2021.09.13.10.58.45 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 13 Sep 2021 10:58:46 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Kuogee Hsieh , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Date: Mon, 13 Sep 2021 13:57:43 -0400 Message-Id: <20210913175747.47456-13-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul This patch adds the bindings for the MSM DisplayPort HDCP registers which are required to write the HDCP key into the display controller as well as the registers to enable HDCP authentication/key exchange/encryption. Signed-off-by: Sean Paul --- .../bindings/display/msm/dp-controller.yaml | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 64d8d9e5e47a..984301442653 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -21,6 +21,11 @@ properties: reg: maxItems: 1 + reg-names: + const: dp_controller + const: hdcp_key + const: hdcp_tz + interrupts: maxItems: 1 @@ -99,8 +104,10 @@ examples: #include displayport-controller@ae90000 { - compatible = "qcom,sc7180-dp"; - reg = <0xae90000 0x1400>; + reg = <0 0x0ae90000 0 0x1400>, + <0 0x0aed1000 0 0x174>, + <0 0x0aee1000 0 0x2c>; + reg-names = "dp_controller", "hdcp_key", "hdcp_tz"; interrupt-parent = <&mdss>; interrupts = <12>; clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, From patchwork Mon Sep 13 17:57:44 2021 Content-Type: text/plain; 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Mon, 13 Sep 2021 10:58:51 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org Date: Mon, 13 Sep 2021 13:57:44 -0400 Message-Id: <20210913175747.47456-14-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 13/14] drm/msm: Add hdcp register ranges to sc7180 device tree X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul This patch adds the register ranges required for HDCP to the sc7180 device tree. These registers will be used to inject HDCP key as well as toggle HDCP on and off. Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/dp/dp_parser.c | 30 +++++++++++++++++++++++++++--- drivers/gpu/drm/msm/dp/dp_parser.h | 4 ++++ 2 files changed, 31 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index 0519dd3ac3c3..4bbe2485ce3c 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -20,11 +20,19 @@ static const struct dp_regulator_cfg sdm845_dp_reg_cfg = { }; static int msm_dss_ioremap(struct platform_device *pdev, - struct dss_io_data *io_data) + struct dss_io_data *io_data, const char *name, + int fallback_idx) { struct resource *res = NULL; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name); + + /* Support dts which do not have named resources */ + if (!res) { + if (fallback_idx >= 0) + res = platform_get_resource(pdev, IORESOURCE_MEM, + fallback_idx); + } if (!res) { DRM_ERROR("%pS->%s: msm_dss_get_res failed\n", __builtin_return_address(0), __func__); @@ -55,6 +63,8 @@ static void dp_parser_unmap_io_resources(struct dp_parser *parser) { struct dp_io *io = &parser->io; + msm_dss_iounmap(&io->hdcp_tz); + msm_dss_iounmap(&io->hdcp_key); msm_dss_iounmap(&io->dp_controller); } @@ -64,12 +74,26 @@ static int dp_parser_ctrl_res(struct dp_parser *parser) struct platform_device *pdev = parser->pdev; struct dp_io *io = &parser->io; - rc = msm_dss_ioremap(pdev, &io->dp_controller); + rc = msm_dss_ioremap(pdev, &io->dp_controller, "dp_controller", 0); if (rc) { DRM_ERROR("unable to remap dp io resources, rc=%d\n", rc); goto err; } + rc = msm_dss_ioremap(pdev, &io->hdcp_key, "hdcp_key", -1); + if (rc) { + DRM_INFO("unable to remap dp hdcp resources, rc=%d\n", rc); + io->hdcp_key.base = NULL; + io->hdcp_key.len = 0; + } + + rc = msm_dss_ioremap(pdev, &io->hdcp_tz, "hdcp_tz", -1); + if (rc) { + DRM_INFO("unable to remap dp hdcp resources, rc=%d\n", rc); + io->hdcp_tz.base = NULL; + io->hdcp_tz.len = 0; + } + io->phy = devm_phy_get(&pdev->dev, "dp"); if (IS_ERR(io->phy)) { rc = PTR_ERR(io->phy); diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h index 34b49628bbaf..09d876620175 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -62,10 +62,14 @@ struct dp_display_data { * struct dp_ctrl_resource - controller's IO related data * * @dp_controller: Display Port controller mapped memory address + * @hdcp_key: mapped memory for HDCP key ingestion + * @hdcp_tz: mapped memory for HDCP TZ interaction * @phy_io: phy's mapped memory address */ struct dp_io { struct dss_io_data dp_controller; + struct dss_io_data hdcp_key; + struct dss_io_data hdcp_tz; struct phy *phy; union phy_configure_opts phy_opts; }; From patchwork Mon Sep 13 17:57:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 12490441 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C171EC433FE for ; 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Mon, 13 Sep 2021 10:59:02 -0700 (PDT) Received: from localhost ([167.100.64.199]) by smtp.gmail.com with ESMTPSA id w19sm5568651qki.21.2021.09.13.10.59.01 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 13 Sep 2021 10:59:01 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: Sean Paul , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org Date: Mon, 13 Sep 2021 13:57:45 -0400 Message-Id: <20210913175747.47456-15-sean@poorly.run> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210913175747.47456-1-sean@poorly.run> References: <20210913175747.47456-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul This patch adds HDCP 1.x support to msm DP connectors using the new HDCP helpers. Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/Makefile | 1 + drivers/gpu/drm/msm/dp/dp_debug.c | 49 +++- drivers/gpu/drm/msm/dp/dp_debug.h | 6 +- drivers/gpu/drm/msm/dp/dp_display.c | 45 ++- drivers/gpu/drm/msm/dp/dp_display.h | 5 + drivers/gpu/drm/msm/dp/dp_drm.c | 68 ++++- drivers/gpu/drm/msm/dp/dp_drm.h | 5 + drivers/gpu/drm/msm/dp/dp_hdcp.c | 433 ++++++++++++++++++++++++++++ drivers/gpu/drm/msm/dp/dp_hdcp.h | 27 ++ drivers/gpu/drm/msm/dp/dp_reg.h | 44 ++- drivers/gpu/drm/msm/msm_atomic.c | 15 + 11 files changed, 685 insertions(+), 13 deletions(-) create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.c create mode 100644 drivers/gpu/drm/msm/dp/dp_hdcp.h diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile index 904535eda0c4..98731fd262d6 100644 --- a/drivers/gpu/drm/msm/Makefile +++ b/drivers/gpu/drm/msm/Makefile @@ -109,6 +109,7 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ dp/dp_ctrl.o \ dp/dp_display.o \ dp/dp_drm.o \ + dp/dp_hdcp.o \ dp/dp_hpd.o \ dp/dp_link.o \ dp/dp_panel.o \ diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_debug.c index 2f6247e80e9d..de16fca8782a 100644 --- a/drivers/gpu/drm/msm/dp/dp_debug.c +++ b/drivers/gpu/drm/msm/dp/dp_debug.c @@ -8,6 +8,7 @@ #include #include #include +#include #include "dp_parser.h" #include "dp_catalog.h" @@ -15,6 +16,7 @@ #include "dp_ctrl.h" #include "dp_debug.h" #include "dp_display.h" +#include "dp_hdcp.h" #define DEBUG_NAME "msm_dp" @@ -24,6 +26,7 @@ struct dp_debug_private { struct dp_usbpd *usbpd; struct dp_link *link; struct dp_panel *panel; + struct dp_hdcp *hdcp; struct drm_connector **connector; struct device *dev; struct drm_device *drm_dev; @@ -349,6 +352,38 @@ static int dp_test_active_open(struct inode *inode, inode->i_private); } +static ssize_t dp_hdcp_key_write(struct file *file, const char __user *ubuf, + size_t len, loff_t *offp) +{ + char *input_buffer; + int ret = 0; + struct dp_debug_private *debug = file->private_data; + struct drm_device *dev; + + dev = debug->drm_dev; + + if (len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN)) + return -EINVAL; + + if (!debug->hdcp) + return -ENOENT; + + input_buffer = memdup_user_nul(ubuf, len); + if (IS_ERR(input_buffer)) + return PTR_ERR(input_buffer); + + ret = dp_hdcp_ingest_key(debug->hdcp, input_buffer, len); + + kfree(input_buffer); + if (ret < 0) { + DRM_ERROR("Could not ingest HDCP key, ret=%d\n", ret); + return ret; + } + + *offp += len; + return len; +} + static const struct file_operations dp_debug_fops = { .open = simple_open, .read = dp_debug_read_info, @@ -363,6 +398,12 @@ static const struct file_operations test_active_fops = { .write = dp_test_active_write }; +static const struct file_operations dp_hdcp_key_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .write = dp_hdcp_key_write, +}; + static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor) { int rc = 0; @@ -384,6 +425,10 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor) minor->debugfs_root, debug, &dp_test_type_fops); + debugfs_create_file("msm_dp_hdcp_key", 0222, + minor->debugfs_root, + debug, &dp_hdcp_key_fops); + debug->root = minor->debugfs_root; return rc; @@ -391,7 +436,8 @@ static int dp_debug_init(struct dp_debug *dp_debug, struct drm_minor *minor) struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel, struct dp_usbpd *usbpd, struct dp_link *link, - struct drm_connector **connector, struct drm_minor *minor) + struct dp_hdcp *hdcp, struct drm_connector **connector, + struct drm_minor *minor) { int rc = 0; struct dp_debug_private *debug; @@ -413,6 +459,7 @@ struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel, debug->usbpd = usbpd; debug->link = link; debug->panel = panel; + debug->hdcp = hdcp; debug->dev = dev; debug->drm_dev = minor->dev; debug->connector = connector; diff --git a/drivers/gpu/drm/msm/dp/dp_debug.h b/drivers/gpu/drm/msm/dp/dp_debug.h index 7eaedfbb149c..c4481339c0c5 100644 --- a/drivers/gpu/drm/msm/dp/dp_debug.h +++ b/drivers/gpu/drm/msm/dp/dp_debug.h @@ -6,6 +6,7 @@ #ifndef _DP_DEBUG_H_ #define _DP_DEBUG_H_ +#include "dp_hdcp.h" #include "dp_panel.h" #include "dp_link.h" @@ -43,7 +44,7 @@ struct dp_debug { */ struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel, struct dp_usbpd *usbpd, struct dp_link *link, - struct drm_connector **connector, + struct dp_hdcp *hdcp, struct drm_connector **connector, struct drm_minor *minor); /** @@ -60,7 +61,8 @@ void dp_debug_put(struct dp_debug *dp_debug); static inline struct dp_debug *dp_debug_get(struct device *dev, struct dp_panel *panel, struct dp_usbpd *usbpd, struct dp_link *link, - struct drm_connector **connector, struct drm_minor *minor) + struct dp_hdcp *hdcp, struct drm_connector **connector, + struct drm_minor *minor) { return ERR_PTR(-EINVAL); } diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 19946024e235..e7971263686a 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -26,6 +26,7 @@ #include "dp_drm.h" #include "dp_audio.h" #include "dp_debug.h" +#include "dp_hdcp.h" static struct msm_dp *g_dp_display; #define HPD_STRING_SIZE 30 @@ -96,6 +97,7 @@ struct dp_display_private { struct dp_panel *panel; struct dp_ctrl *ctrl; struct dp_debug *debug; + struct dp_hdcp *hdcp; struct dp_usbpd_cb usbpd_cb; struct dp_display_mode dp_mode; @@ -121,6 +123,15 @@ static const struct of_device_id dp_dt_match[] = { {} }; +struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector) +{ + struct msm_dp *dp_display = msm_dp_from_connector(connector); + struct dp_display_private *dp; + + dp = container_of(dp_display, struct dp_display_private, dp_display); + return dp->hdcp; +} + static int dp_add_event(struct dp_display_private *dp_priv, u32 event, u32 data, u32 delay) { @@ -714,6 +725,7 @@ static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data) static void dp_display_deinit_sub_modules(struct dp_display_private *dp) { dp_debug_put(dp->debug); + dp_hdcp_put(dp->hdcp); dp_audio_put(dp->audio); dp_panel_put(dp->panel); dp_aux_put(dp->aux); @@ -810,8 +822,18 @@ static int dp_init_sub_modules(struct dp_display_private *dp) goto error_ctrl; } + dp->hdcp = dp_hdcp_get(dp->parser, dp->aux); + if (IS_ERR(dp->hdcp)) { + rc = PTR_ERR(dp->hdcp); + DRM_ERROR("failed to initialize hdcp, rc = %d\n", rc); + dp->hdcp = NULL; + goto error_hdcp; + } + return rc; +error_hdcp: + dp_audio_put(dp->audio); error_ctrl: dp_panel_put(dp->panel); error_link: @@ -930,6 +952,15 @@ int dp_display_set_plugged_cb(struct msm_dp *dp_display, return 0; } +void dp_display_hdcp_commit(struct msm_dp *dp, struct drm_atomic_state *state) +{ + struct dp_display_private *dp_display; + + dp_display = container_of(dp, struct dp_display_private, dp_display); + + dp_hdcp_commit(dp_display->hdcp, state); +} + int dp_display_validate_mode(struct msm_dp *dp, u32 mode_pclk_khz) { const u32 num_components = 3, default_bpp = 24; @@ -1429,8 +1460,8 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor) dev = &dp->pdev->dev; dp->debug = dp_debug_get(dev, dp->panel, dp->usbpd, - dp->link, &dp->dp_display.connector, - minor); + dp->link, dp->hdcp, + &dp->dp_display.connector, minor); if (IS_ERR(dp->debug)) { rc = PTR_ERR(dp->debug); DRM_ERROR("failed to initialize debug, rc = %d\n", rc); @@ -1441,12 +1472,16 @@ void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor) int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev, struct drm_encoder *encoder) { + struct dp_display_private *dp_display_priv; struct msm_drm_private *priv; int ret; if (WARN_ON(!encoder) || WARN_ON(!dp_display) || WARN_ON(!dev)) return -EINVAL; + dp_display_priv = container_of(dp_display, struct dp_display_private, + dp_display); + priv = dev->dev_private; dp_display->drm_dev = dev; @@ -1467,6 +1502,12 @@ int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev, return ret; } + ret = dp_hdcp_attach(dp_display_priv->hdcp, dp_display->connector); + if (ret) { + DRM_ERROR("Failed to attach hdcp, ret=%d\n", ret); + return ret; + } + priv->connectors[priv->num_connectors++] = dp_display->connector; return 0; } diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/dp_display.h index 8b47cdabb67e..421268e47f30 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.h +++ b/drivers/gpu/drm/msm/dp/dp_display.h @@ -27,8 +27,13 @@ struct msm_dp { struct dp_audio *dp_audio; }; +struct drm_atomic_state; + int dp_display_set_plugged_cb(struct msm_dp *dp_display, hdmi_codec_plugged_cb fn, struct device *codec_dev); +struct dp_hdcp *dp_display_connector_to_hdcp(struct drm_connector *connector); +void dp_display_hdcp_commit(struct msm_dp *dp_display, + struct drm_atomic_state *state); int dp_display_validate_mode(struct msm_dp *dp_display, u32 mode_pclk_khz); int dp_display_get_modes(struct msm_dp *dp_display, struct dp_display_mode *dp_mode); diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.c index 764f4b81017e..8e62558b4fc3 100644 --- a/drivers/gpu/drm/msm/dp/dp_drm.c +++ b/drivers/gpu/drm/msm/dp/dp_drm.c @@ -5,11 +5,20 @@ #include #include +#include #include +#include #include "msm_drv.h" #include "msm_kms.h" #include "dp_drm.h" +#include "dp_hdcp.h" + +struct dp_connector_state { + struct drm_connector_state base; + bool hdcp_transition; +}; +#define to_dp_connector_state(x) container_of(x, struct dp_connector_state, base) struct dp_connector { struct drm_connector base; @@ -17,6 +26,11 @@ struct dp_connector { }; #define to_dp_connector(x) container_of(x, struct dp_connector, base) +struct msm_dp *msm_dp_from_connector(struct drm_connector *connector) +{ + return to_dp_connector(connector)->dp_display; +} + /** * dp_connector_detect - callback to determine if connector is connected * @conn: Pointer to drm connector structure @@ -114,20 +128,72 @@ static enum drm_mode_status dp_connector_mode_valid( return dp_display_validate_mode(dp_disp, mode->clock); } +static int dp_connector_atomic_check(struct drm_connector *connector, + struct drm_atomic_state *state) +{ + struct drm_connector_state *conn_state; + struct dp_connector_state *dp_state; + + conn_state = drm_atomic_get_new_connector_state(state, connector); + dp_state = to_dp_connector_state(conn_state); + + dp_state->hdcp_transition = drm_hdcp_atomic_check(connector, state); + + return 0; +} + +static struct drm_connector_state * +dp_connector_atomic_duplicate_state(struct drm_connector *connector) +{ + struct dp_connector_state *state; + + state = kzalloc(sizeof(*state), GFP_KERNEL); + if (!state) + return NULL; + + state->hdcp_transition = false; + + __drm_atomic_helper_connector_duplicate_state(connector, &state->base); + return &state->base; +} + static const struct drm_connector_funcs dp_connector_funcs = { .detect = dp_connector_detect, .fill_modes = drm_helper_probe_single_connector_modes, .destroy = drm_connector_cleanup, .reset = drm_atomic_helper_connector_reset, - .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, + .atomic_duplicate_state = dp_connector_atomic_duplicate_state, .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, }; static const struct drm_connector_helper_funcs dp_connector_helper_funcs = { .get_modes = dp_connector_get_modes, .mode_valid = dp_connector_mode_valid, + .atomic_check = dp_connector_atomic_check, }; +bool dp_drm_is_connector_msm_dp(struct drm_connector *connector) +{ + return connector->funcs == &dp_connector_funcs; +} + +void dp_drm_atomic_commit(struct drm_connector *connector, + struct drm_connector_state *conn_state, + struct drm_atomic_state *state) +{ + struct dp_connector_state *dp_state; + struct msm_dp *dp_disp; + + dp_state = to_dp_connector_state(conn_state); + + if (!dp_state->hdcp_transition) + return; + + dp_disp = msm_dp_from_connector(connector); + + dp_display_hdcp_commit(dp_disp, state); +} + /* connector initialization */ struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display) { diff --git a/drivers/gpu/drm/msm/dp/dp_drm.h b/drivers/gpu/drm/msm/dp/dp_drm.h index c27bfceefdf0..a5d95c6acd67 100644 --- a/drivers/gpu/drm/msm/dp/dp_drm.h +++ b/drivers/gpu/drm/msm/dp/dp_drm.h @@ -14,5 +14,10 @@ #include "dp_display.h" struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display); +struct msm_dp *msm_dp_from_connector(struct drm_connector *connector); +bool dp_drm_is_connector_msm_dp(struct drm_connector *connector); +void dp_drm_atomic_commit(struct drm_connector *connector, + struct drm_connector_state *conn_state, + struct drm_atomic_state *state); #endif /* _DP_DRM_H_ */ diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.c b/drivers/gpu/drm/msm/dp/dp_hdcp.c new file mode 100644 index 000000000000..07d2a1f04d97 --- /dev/null +++ b/drivers/gpu/drm/msm/dp/dp_hdcp.c @@ -0,0 +1,433 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright (C) 2021 Google, Inc. + * + * Authors: + * Sean Paul + */ + +#include "dp_display.h" +#include "dp_drm.h" +#include "dp_hdcp.h" +#include "dp_reg.h" + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +/* Offsets based on hdcp_ksv mmio */ +#define DP_HDCP_KSV_AN_LSB 0x0 +#define DP_HDCP_KSV_AN_MSB 0x4 +#define DP_HDCP_KSV_AKSV_MSB 0x1D8 +#define DP_HDCP_KSV_AKSV_LSB 0x1DC + +/* Key offsets based on hdcp_key mmio */ +#define DP_HDCP_KEY_BASE 0x30 +#define DP_HDCP_KEY_MSB(x) (DP_HDCP_KEY_BASE + (x * 8)) +#define DP_HDCP_KEY_LSB(x) (DP_HDCP_KEY_MSB(x) + 4) +#define DP_HDCP_KEY_VALID 0x170 +#define DP_HDCP_SW_KEY_VALID BIT(0) + +/* + * dp_hdcp_key - structure which contains an HDCP key set + * @ksv: The key selection vector + * @keys: Contains 40 keys + */ +struct dp_hdcp_key { + struct drm_hdcp_ksv ksv; + union { + u32 words[2]; + u8 bytes[DP_HDCP_KEY_LEN]; + } keys[DP_HDCP_NUM_KEYS]; + bool valid; +}; + +struct dp_hdcp { + struct drm_device *dev; + struct drm_connector *connector; + + struct drm_dp_aux *aux; + struct dp_parser *parser; + + struct drm_hdcp_helper_data *helper_data; + + struct mutex key_lock; + struct dp_hdcp_key *key; +}; + +static inline void dp_hdcp_write_dp(struct dp_hdcp *hdcp, u32 offset, u32 val) +{ + writel(val, hdcp->parser->io.dp_controller.base + offset); +} + +static inline u32 dp_hdcp_read_dp(struct dp_hdcp *hdcp, u32 offset) +{ + return readl(hdcp->parser->io.dp_controller.base + offset); +} + +static inline void dp_hdcp_write_hdcp(struct dp_hdcp *hdcp, u32 offset, u32 val) +{ + writel(val, hdcp->parser->io.hdcp_key.base + offset); +} + +static inline u32 dp_hdcp_read_hdcp(struct dp_hdcp *hdcp, u32 offset) +{ + return readl(hdcp->parser->io.hdcp_key.base + offset); +} + +static inline void dp_hdcp_write_tz(struct dp_hdcp *hdcp, u32 offset, u32 val) +{ + writel(val, hdcp->parser->io.hdcp_tz.base + offset); +} + +static inline u32 dp_hdcp_read_tz(struct dp_hdcp *hdcp, u32 offset) +{ + return readl(hdcp->parser->io.hdcp_tz.base + offset); +} + +int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len) +{ + struct dp_hdcp_key *key; + const u8 *ptr = raw_key; + unsigned int ksv_weight; + int i, ret = 0; + + mutex_lock(&hdcp->key_lock); + + if (raw_len != (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN)) { + DRM_ERROR("Invalid HDCP key length expected=%d actual=%d\n", + (DRM_HDCP_KSV_LEN + DP_HDCP_NUM_KEYS * DP_HDCP_KEY_LEN), + raw_len); + ret = -EINVAL; + goto out; + } + + key = hdcp->key; + + memcpy(key->ksv.bytes, ptr, DRM_HDCP_KSV_LEN); + ksv_weight = hweight32(key->ksv.words[0]) + hweight32(key->ksv.words[1]); + if (ksv_weight != 20) { + DRM_ERROR("Invalid ksv weight, expected=20 actual=%d\n", + ksv_weight); + ret = -EINVAL; + goto out; + } + + ptr += DRM_HDCP_KSV_LEN; + for (i = 0; i < DP_HDCP_NUM_KEYS; i++) { + memcpy(key->keys[i].bytes, ptr, DP_HDCP_KEY_LEN); + ptr += DP_HDCP_KEY_LEN; + } + + DRM_DEBUG_DRIVER("Successfully ingested HDCP key\n"); + hdcp->key->valid = true; + +out: + mutex_unlock(&hdcp->key_lock); + return ret; +} + +static bool dp_hdcp_are_keys_valid(struct drm_connector *connector) +{ + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector); + u32 val; + + val = dp_hdcp_read_dp(hdcp, DP_HDCP_STATUS); + return FIELD_GET(DP_HDCP_KEY_STATUS, val) == DP_HDCP_KEY_STATUS_VALID; +} + +static int dp_hdcp_load_keys(struct drm_connector *connector) +{ + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector); + struct dp_hdcp_key *key; + int i, ret = 0; + + mutex_lock(&hdcp->key_lock); + + key = hdcp->key; + + if (!key->valid) { + ret = -ENOENT; + goto out; + } + + dp_hdcp_write_dp(hdcp, DP_HDCP_SW_LOWER_AKSV, key->ksv.words[0]); + dp_hdcp_write_dp(hdcp, DP_HDCP_SW_UPPER_AKSV, key->ksv.words[1]); + + for (i = 0; i < DP_HDCP_NUM_KEYS; i++) { + dp_hdcp_write_hdcp(hdcp, DP_HDCP_KEY_LSB(i), + key->keys[i].words[0]); + dp_hdcp_write_hdcp(hdcp, DP_HDCP_KEY_MSB(i), + key->keys[i].words[1]); + } + + dp_hdcp_write_hdcp(hdcp, DP_HDCP_KEY_VALID, DP_HDCP_SW_KEY_VALID); + wmb(); + + dp_hdcp_write_dp(hdcp, DP_HDCP_ENTROPY_CTRL0, get_random_u32()); + dp_hdcp_write_dp(hdcp, DP_HDCP_ENTROPY_CTRL1, get_random_u32()); + wmb(); + +out: + mutex_unlock(&hdcp->key_lock); + return ret; +} + +static int dp_hdcp_hdcp2_capable(struct drm_connector *connector, bool *capable) +{ + *capable = false; + return 0; +} + +static int dp_hdcp_hdcp1_read_an_aksv(struct drm_connector *connector, + u32 *an, u32 *aksv) +{ + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector); + bool keys_valid; + int ret; + u32 val; + + dp_hdcp_write_dp(hdcp, DP_HDCP_CTRL, 1); + + ret = read_poll_timeout(dp_hdcp_are_keys_valid, keys_valid, keys_valid, + 20 * 1000, 10 * 1000, false, connector); + if (ret) { + drm_err(hdcp->dev, "HDCP keys invalid %d\n", ret); + return ret; + } + + /* Clear AInfo */ + dp_hdcp_write_dp(hdcp, DP_HDCP_RCVPORT_DATA4, 0); + + aksv[0] = dp_hdcp_read_dp(hdcp, DP_HDCP_RCVPORT_DATA3); + aksv[1] = GENMASK(7, 0) & dp_hdcp_read_dp(hdcp, DP_HDCP_RCVPORT_DATA4); + + ret = read_poll_timeout(dp_hdcp_read_dp, val, + (val & DP_HDCP_AN_READY_MASK) == DP_HDCP_AN_READY_MASK, + 100, 10 * 1000, false, hdcp, DP_HDCP_STATUS); + if (ret) { + drm_err(hdcp->dev, "AN failed to become ready %x/%d\n", val, ret); + return ret; + } + + /* + * Get An from hardware, for unknown reasons we need to read the reg + * twice to get valid data. + */ + dp_hdcp_read_dp(hdcp, DP_HDCP_RCVPORT_DATA5); + an[0] = dp_hdcp_read_dp(hdcp, DP_HDCP_RCVPORT_DATA5); + + dp_hdcp_read_dp(hdcp, DP_HDCP_RCVPORT_DATA6); + an[1] = dp_hdcp_read_dp(hdcp, DP_HDCP_RCVPORT_DATA6); + + return 0; +} + +static int dp_hdcp_hdcp1_store_receiver_info(struct drm_connector *connector, + u32 *ksv, u32 status, u8 bcaps, + bool is_repeater) +{ + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector); + u32 val; + + dp_hdcp_write_tz(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0, + ksv[0]); + dp_hdcp_write_tz(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1, + ksv[1]); + + val = ((status & GENMASK(15, 0)) << 8) | (bcaps & GENMASK(7, 0)); + + dp_hdcp_write_tz(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA12, val); + + return 0; +} + +static int dp_hdcp_hdcp1_enable_encryption(struct drm_connector *connector) +{ + return 0; +} + +static int dp_hdcp_hdcp1_wait_for_r0(struct drm_connector *connector) +{ + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector); + int ret; + u32 val; + + ret = read_poll_timeout(dp_hdcp_read_dp, val, (val & DP_HDCP_R0_READY), + 100, 1000, false, hdcp, + DP_HDCP_STATUS); + if (ret) { + drm_err(hdcp->dev, "HDCP R0 not ready %x/%d\n", val, ret); + return ret; + } + + return 0; +} + +static int dp_hdcp_hdcp1_match_ri(struct drm_connector *connector, u32 ri_prime) +{ + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector); + int ret; + u32 val; + + dp_hdcp_write_dp(hdcp, DP_HDCP_RCVPORT_DATA2_0, ri_prime); + + ret = read_poll_timeout(dp_hdcp_read_dp, val, (val & DP_HDCP_RI_MATCH), + 20 * 1000, 100 * 1000, false, hdcp, + DP_HDCP_STATUS); + if (ret) { + drm_err(hdcp->dev, "Failed to match Ri and Ri` (%08x) %08x/%d\n", + ri_prime, val, ret); + return ret; + } + return 0; +} + +static int dp_hdcp_hdcp1_store_ksv_fifo(struct drm_connector *connector, + u8 *ksv_fifo, u8 num_downstream, + u8 *bstatus, u32 *vprime) +{ + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector); + int num_bytes = (num_downstream * DRM_HDCP_KSV_LEN); + int ret, i; + u32 val; + + /* Reset the SHA computation block */ + dp_hdcp_write_tz(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL, + DP_HDCP_SHA_CTRL_RESET); + dp_hdcp_write_tz(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL, 0); + + /* + * KSV info gets written a byte at a time in the same order it was + * received. Every 64 bytes, we need to wait for the SHA_BLOCK_DONE + * bit to be set in SHA_CTRL. + */ + for (i = 0; i < num_bytes; i++) { + val = FIELD_PREP(DP_HDCP_SHA_DATA_MASK, ksv_fifo[i]); + + if (i == (num_bytes - 1)) + val |= DP_HDCP_SHA_DATA_DONE; + + dp_hdcp_write_tz(hdcp, HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA, + val); + + if (((i + 1) % 64) != 0) + continue; + + ret = read_poll_timeout(dp_hdcp_read_dp, val, + (val & DP_HDCP_SHA_DONE), 100, + 100 * 1000, false, hdcp, + DP_HDCP_SHA_STATUS); + if (ret) { + drm_err(hdcp->dev, "SHA block incomplete %d\n", ret); + return ret; + } + } + + ret = read_poll_timeout(dp_hdcp_read_dp, val, + (val & DP_HDCP_SHA_COMP_DONE), 100, 100 * 1000, + false, hdcp, DP_HDCP_SHA_STATUS); + if (ret) { + drm_err(hdcp->dev, "SHA computation incomplete %d\n", ret); + return ret; + } + + return 0; +} + +static int dp_hdcp_hdcp1_disable(struct drm_connector *connector) +{ + struct dp_hdcp *hdcp = dp_display_connector_to_hdcp(connector); + u32 val; + + val = dp_hdcp_read_dp(hdcp, REG_DP_SW_RESET); + dp_hdcp_write_dp(hdcp, REG_DP_SW_RESET, val | DP_HDCP_SW_RESET); + + /* Disable encryption and disable the HDCP block */ + dp_hdcp_write_dp(hdcp, DP_HDCP_CTRL, 0); + + dp_hdcp_write_dp(hdcp, REG_DP_SW_RESET, val); + + return 0; +} + +void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state) +{ + drm_hdcp_helper_atomic_commit(hdcp->helper_data, state, NULL); +} + +static const struct drm_hdcp_helper_funcs dp_hdcp_funcs = { + .are_keys_valid = dp_hdcp_are_keys_valid, + .load_keys = dp_hdcp_load_keys, + .hdcp2_capable = dp_hdcp_hdcp2_capable, + .hdcp1_read_an_aksv = dp_hdcp_hdcp1_read_an_aksv, + .hdcp1_store_receiver_info = dp_hdcp_hdcp1_store_receiver_info, + .hdcp1_enable_encryption = dp_hdcp_hdcp1_enable_encryption, + .hdcp1_wait_for_r0 = dp_hdcp_hdcp1_wait_for_r0, + .hdcp1_match_ri = dp_hdcp_hdcp1_match_ri, + .hdcp1_store_ksv_fifo = dp_hdcp_hdcp1_store_ksv_fifo, + .hdcp1_disable = dp_hdcp_hdcp1_disable, +}; + +int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector) +{ + struct drm_device *dev = connector->dev; + struct drm_hdcp_helper_data *helper_data; + int ret; + + /* HDCP is not configured for this device */ + if (!hdcp || !hdcp->parser || hdcp->parser->io.hdcp_key.len == 0) + return 0; + + helper_data = drm_hdcp_helper_initialize_dp(connector, hdcp->aux, + &dp_hdcp_funcs, false); + if (IS_ERR_OR_NULL(helper_data)) + return PTR_ERR(helper_data); + + ret = drm_connector_attach_content_protection_property(connector, false); + if (ret) { + drm_hdcp_helper_destroy(helper_data); + drm_err(dev, "Failed to attach content protection prop %d\n", ret); + return ret; + } + + hdcp->dev = connector->dev; + hdcp->connector = connector; + hdcp->helper_data = helper_data; + + return 0; +} + +struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux) +{ + struct dp_hdcp *hdcp; + + hdcp = devm_kzalloc(&parser->pdev->dev, sizeof(*hdcp), GFP_KERNEL); + if (!hdcp) + return ERR_PTR(-ENOMEM); + + hdcp->key = devm_kzalloc(&parser->pdev->dev, sizeof(*hdcp->key), GFP_KERNEL); + if (!hdcp->key) + return ERR_PTR(-ENOMEM); + + hdcp->parser = parser; + hdcp->aux = aux; + + mutex_init(&hdcp->key_lock); + + return hdcp; +} + +void dp_hdcp_put(struct dp_hdcp *hdcp) +{ + drm_hdcp_helper_destroy(hdcp->helper_data); +} diff --git a/drivers/gpu/drm/msm/dp/dp_hdcp.h b/drivers/gpu/drm/msm/dp/dp_hdcp.h new file mode 100644 index 000000000000..5637a9b0dea2 --- /dev/null +++ b/drivers/gpu/drm/msm/dp/dp_hdcp.h @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright (C) 2021 Google, Inc. + * + * Authors: + * Sean Paul + */ + +#ifndef DP_HDCP_H_ +#define DP_HDCP_H_ + +#define DP_HDCP_KEY_LEN 7 +#define DP_HDCP_NUM_KEYS 40 + +struct dp_hdcp; +struct dp_parser; +struct drm_atomic_state; +struct drm_dp_aux; + +struct dp_hdcp *dp_hdcp_get(struct dp_parser *parser, struct drm_dp_aux *aux); +void dp_hdcp_put(struct dp_hdcp *hdcp); + +int dp_hdcp_attach(struct dp_hdcp *hdcp, struct drm_connector *connector); +int dp_hdcp_ingest_key(struct dp_hdcp *hdcp, const u8 *raw_key, int raw_len); +void dp_hdcp_commit(struct dp_hdcp *hdcp, struct drm_atomic_state *state); + +#endif diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h index 268602803d9a..bc53c56d6120 100644 --- a/drivers/gpu/drm/msm/dp/dp_reg.h +++ b/drivers/gpu/drm/msm/dp/dp_reg.h @@ -6,11 +6,14 @@ #ifndef _DP_REG_H_ #define _DP_REG_H_ +#include + /* DP_TX Registers */ #define REG_DP_HW_VERSION (0x00000000) #define REG_DP_SW_RESET (0x00000010) -#define DP_SW_RESET (0x00000001) +#define DP_SW_RESET BIT(0) +#define DP_HDCP_SW_RESET BIT(1) #define REG_DP_PHY_CTRL (0x00000014) #define DP_PHY_CTRL_SW_RESET_PLL (0x00000001) @@ -283,19 +286,46 @@ /* DP HDCP 1.3 registers */ #define DP_HDCP_CTRL (0x0A0) #define DP_HDCP_STATUS (0x0A4) -#define DP_HDCP_SW_UPPER_AKSV (0x098) -#define DP_HDCP_SW_LOWER_AKSV (0x09C) -#define DP_HDCP_ENTROPY_CTRL0 (0x350) -#define DP_HDCP_ENTROPY_CTRL1 (0x35C) +#define DP_HDCP_KEY_STATUS GENMASK(18, 16) +#define DP_HDCP_KEY_STATUS_NO_KEYS 0 +#define DP_HDCP_KEY_STATUS_NOT_CHECKED 1 +#define DP_HDCP_KEY_STATUS_CHECKING 2 +#define DP_HDCP_KEY_STATUS_VALID 3 +#define DP_HDCP_KEY_STATUS_INVALID_AKSV 4 +#define DP_HDCP_KEY_STATUS_BAD_CHECKSUM 5 +#define DP_HDCP_KEY_STATUS_PROD_AKSV 6 +#define DP_HDCP_KEY_STATUS_RESV 7 +#define DP_HDCP_R0_READY BIT(14) +#define DP_HDCP_SHA_V_MATCH BIT(13) +#define DP_HDCP_RI_MATCH BIT(12) +#define DP_HDCP_AN_MSB_READY BIT(9) +#define DP_HDCP_AN_LSB_READY BIT(8) +#define DP_HDCP_AN_READY_MASK (DP_HDCP_AN_MSB_READY | DP_HDCP_AN_LSB_READY) +#define DP_HDCP_AUTH_FAIL_INFO GENMASK(7, 4) +#define DP_HDCP_AUTH_FAIL_INVALID_AKSV 3 +#define DP_HDCP_AUTH_FAIL_INVALID_BKSV 4 +#define DP_HDCP_AUTH_FAIL_RI_MISMATCH 5 +#define DP_HDCP_AUTH_FAIL BIT(2) +#define DP_HDCP_AUTH_SUCCESS BIT(0) +#define DP_HDCP_SW_UPPER_AKSV (0x298) +#define DP_HDCP_SW_LOWER_AKSV (0x29C) +#define DP_HDCP_ENTROPY_CTRL0 (0x750) +#define DP_HDCP_ENTROPY_CTRL1 (0x75C) #define DP_HDCP_SHA_STATUS (0x0C8) +#define DP_HDCP_SHA_COMP_DONE BIT(4) +#define DP_HDCP_SHA_DONE BIT(0) #define DP_HDCP_RCVPORT_DATA2_0 (0x0B0) -#define DP_HDCP_RCVPORT_DATA3 (0x0A4) -#define DP_HDCP_RCVPORT_DATA4 (0x0A8) +#define DP_HDCP_RCVPORT_DATA3 (0x2A4) +#define DP_HDCP_RCVPORT_DATA4 (0x2A8) #define DP_HDCP_RCVPORT_DATA5 (0x0C0) #define DP_HDCP_RCVPORT_DATA6 (0x0C4) +#define DP_HDCP_RCVPORT_DATA7 (0x0C8) #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_CTRL (0x024) +#define DP_HDCP_SHA_CTRL_RESET BIT(0) #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_SHA_DATA (0x028) +#define DP_HDCP_SHA_DATA_MASK GENMASK(23, 16) +#define DP_HDCP_SHA_DATA_DONE BIT(0) #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA0 (0x004) #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA1 (0x008) #define HDCP_SEC_DP_TZ_HV_HLOS_HDCP_RCVPORT_DATA7 (0x00C) diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c index fab09e7c6efc..444515277a1d 100644 --- a/drivers/gpu/drm/msm/msm_atomic.c +++ b/drivers/gpu/drm/msm/msm_atomic.c @@ -8,6 +8,7 @@ #include #include +#include "dp_drm.h" #include "msm_atomic_trace.h" #include "msm_drv.h" #include "msm_gem.h" @@ -203,6 +204,18 @@ static unsigned get_crtc_mask(struct drm_atomic_state *state) return mask; } +static void msm_atomic_commit_connectors(struct drm_atomic_state *state) +{ + struct drm_connector_state *conn_state; + struct drm_connector *connector; + int i; + + for_each_new_connector_in_state(state, connector, conn_state, i) { + if (dp_drm_is_connector_msm_dp(connector)) + dp_drm_atomic_commit(connector, conn_state, state); + } +} + void msm_atomic_commit_tail(struct drm_atomic_state *state) { struct drm_device *dev = state->dev; @@ -239,6 +252,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state) drm_atomic_helper_commit_planes(dev, state, 0); drm_atomic_helper_commit_modeset_enables(dev, state); + msm_atomic_commit_connectors(state); + if (async) { struct msm_pending_timer *timer = &kms->pending_timers[drm_crtc_index(async_crtc)];