From patchwork Thu Sep 23 01:04:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kieran Bingham X-Patchwork-Id: 12511755 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23E83C433FE for ; Thu, 23 Sep 2021 01:04:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 01CD261130 for ; Thu, 23 Sep 2021 01:04:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238035AbhIWBFj (ORCPT ); Wed, 22 Sep 2021 21:05:39 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33818 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234437AbhIWBFj (ORCPT ); Wed, 22 Sep 2021 21:05:39 -0400 Received: from Monstersaurus.local (cpc89244-aztw30-2-0-cust3082.18-1.cable.virginm.net [86.31.172.11]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 0BC0B145A; Thu, 23 Sep 2021 03:04:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1632359047; bh=AWpKGgAZnPbgSKyq9zFIJ8AREpLY7SQxBO1y7AQdQDE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jCWv4ZZKS7dMjY06uoWUVAaLjzBF8TNVM9GI5Z91ud2jayeBBmrGConG+0W6KqC3g QiD3YOOM2imG0zy3oSb0j+9kak7u4qsTjkJheqN2lNVyFOc0snRCpAe1ceBrhskS39 o75JOOw/HaPzjofaWZU3UzKQ0KT/uoGyk9kcW4aA= From: Kieran Bingham To: linux-renesas-soc@vger.kernel.org, Laurent Pinchart , Geert Uytterhoeven Cc: Kieran Bingham , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v3 1/3] arm64: dts: renesas: r8a779a0: Add DU support Date: Thu, 23 Sep 2021 02:04:00 +0100 Message-Id: <20210923010402.3418555-2-kieran.bingham@ideasonboard.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210923010402.3418555-1-kieran.bingham@ideasonboard.com> References: <20210923010402.3418555-1-kieran.bingham@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Kieran Bingham Provide the device nodes for the DU on the V3U platforms. Reviewed-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart Signed-off-by: Kieran Bingham --- v2 - Use a single clock specification for the whole DU. v3: - Use 'du.0' clock name instead of 'du' arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 30 +++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi index f9a882b34f82..dfe99af89908 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi @@ -1251,6 +1251,36 @@ vspd1: vsp@fea28000 { renesas,fcp = <&fcpvd1>; }; + du: display@feb00000 { + compatible = "renesas,du-r8a779a0"; + reg = <0 0xfeb00000 0 0x40000>; + interrupts = , + ; + clocks = <&cpg CPG_MOD 411>; + clock-names = "du.0"; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 411>; + vsps = <&vspd0 0>, <&vspd1 0>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + du_out_dsi0: endpoint { + }; + }; + + port@1 { + reg = <1>; + du_out_dsi1: endpoint { + }; + }; + }; + }; + prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>; From patchwork Thu Sep 23 01:04:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kieran Bingham X-Patchwork-Id: 12511753 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 081A4C43217 for ; Thu, 23 Sep 2021 01:04:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DD970610A0 for ; Thu, 23 Sep 2021 01:04:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238770AbhIWBFk (ORCPT ); Wed, 22 Sep 2021 21:05:40 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33828 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238728AbhIWBFk (ORCPT ); Wed, 22 Sep 2021 21:05:40 -0400 Received: from Monstersaurus.local (cpc89244-aztw30-2-0-cust3082.18-1.cable.virginm.net [86.31.172.11]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 9A7FE146F; Thu, 23 Sep 2021 03:04:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1632359048; bh=vtubVnyN/IFVUyscM8xZe8dSZqbaXbTsFGZ33uc67js=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lYlxvXpVs73lLzK1VP7aifmUfAI5YvwmkS52gEXjB3mXrLbQe8w7ZgIlIqEAcvbE4 THLyvRuvnQqrcgx6Lg3BNoJIdGqFGQUcicECQvByccC6sRbYSAPoIYnB1udyva/cZC n9gLhQifEWlJojhgXS7BH3m+euV6eyRT9O3YjUF4= From: Kieran Bingham To: linux-renesas-soc@vger.kernel.org, Laurent Pinchart , Geert Uytterhoeven Cc: Kieran Bingham , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v3 2/3] arm64: dts: renesas: r8a779a0: Add DSI encoders Date: Thu, 23 Sep 2021 02:04:01 +0100 Message-Id: <20210923010402.3418555-3-kieran.bingham@ideasonboard.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210923010402.3418555-1-kieran.bingham@ideasonboard.com> References: <20210923010402.3418555-1-kieran.bingham@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Kieran Bingham Provide the two MIPI DSI encoders on the V3U and connect them to the DU accordingly. Reviewed-by: Laurent Pinchart Signed-off-by: Kieran Bingham --- v2 - Fixup indentation v3 - Fix the clock references - Fixup dsi1 as well arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 64 +++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi index dfe99af89908..b81b2391ed29 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi @@ -1270,12 +1270,76 @@ ports { port@0 { reg = <0>; du_out_dsi0: endpoint { + remote-endpoint = <&dsi0_in>; }; }; port@1 { reg = <1>; du_out_dsi1: endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; + }; + }; + + dsi0: dsi-encoder@fed80000 { + compatible = "renesas,r8a779a0-dsi-csi2-tx"; + reg = <0 0xfed80000 0 0x10000>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 415>, + <&cpg CPG_CORE R8A779A0_CLK_DSI>, + <&extal_clk>; + clock-names = "fck", "dsi", "pll"; + + resets = <&cpg 415>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi0_in: endpoint { + remote-endpoint = <&du_out_dsi0>; + }; + }; + + port@1 { + reg = <1>; + dsi0_out: endpoint { + }; + }; + }; + }; + + dsi1: dsi-encoder@fed90000 { + compatible = "renesas,r8a779a0-dsi-csi2-tx"; + reg = <0 0xfed90000 0 0x10000>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 415>, + <&cpg CPG_CORE R8A779A0_CLK_DSI>, + <&extal_clk>; + clock-names = "fck", "dsi", "pll"; + + resets = <&cpg 416>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi1_in: endpoint { + remote-endpoint = <&du_out_dsi1>; + }; + }; + + port@1 { + reg = <1>; + dsi1_out: endpoint { }; }; }; From patchwork Thu Sep 23 01:04:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kieran Bingham X-Patchwork-Id: 12511757 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F4FFC433F5 for ; Thu, 23 Sep 2021 01:04:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2A82561130 for ; Thu, 23 Sep 2021 01:04:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238783AbhIWBFm (ORCPT ); Wed, 22 Sep 2021 21:05:42 -0400 Received: from perceval.ideasonboard.com ([213.167.242.64]:33834 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238757AbhIWBFk (ORCPT ); Wed, 22 Sep 2021 21:05:40 -0400 Received: from Monstersaurus.local (cpc89244-aztw30-2-0-cust3082.18-1.cable.virginm.net [86.31.172.11]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 35E781544; Thu, 23 Sep 2021 03:04:08 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1632359048; bh=9lKNehHtBlSmXLCn0XQYne0Kkaryt150ms/QkED1Z7U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PXw9zVgWE7cEC2BdWrid9GEoJcpTQUthZvELTZRiKedXwJywFFA8O4xmPYQv6CnJ3 XHzFV/odwFM/nSm5gEa6M83sPMwMUcUmXxF3ZWDN6ByoKrcvCYzuHEf3WPr+lYCHBC D8XfkLZmhj8v2dtcESQZiafwUAYxaTNBnXbMazMc= From: Kieran Bingham To: linux-renesas-soc@vger.kernel.org, Laurent Pinchart , Geert Uytterhoeven Cc: Kieran Bingham , Geert Uytterhoeven , Magnus Damm , Rob Herring , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v3 3/3] arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output Date: Thu, 23 Sep 2021 02:04:02 +0100 Message-Id: <20210923010402.3418555-4-kieran.bingham@ideasonboard.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210923010402.3418555-1-kieran.bingham@ideasonboard.com> References: <20210923010402.3418555-1-kieran.bingham@ideasonboard.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org From: Kieran Bingham Provide the display output using the sn65dsi86 MIPI DSI bridge Reviewed-by: Laurent Pinchart Signed-off-by: Kieran Bingham --- v3: - Fix the voltage regulator values - No longer override the clocks - use clk-x6 as clock node name .../boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi index a0a1a1da0d87..9943f09a5cc6 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi @@ -66,6 +66,15 @@ memory@700000000 { reg = <0x7 0x00000000 0x0 0x80000000>; }; + reg_1p2v: regulator-1p2v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + reg_1p8v: regulator-1p8v { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; @@ -83,6 +92,41 @@ reg_3p3v: regulator-3p3v { regulator-boot-on; regulator-always-on; }; + + mini-dp-con { + compatible = "dp-connector"; + label = "CN5"; + type = "mini"; + + port { + mini_dp_con_in: endpoint { + remote-endpoint = <&sn65dsi86_out>; + }; + }; + }; + + sn65dsi86_refclk: clk-x6 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <38400000>; + }; +}; + +&dsi0 { + status = "okay"; + + ports { + port@1 { + endpoint { + remote-endpoint = <&sn65dsi86_in>; + data-lanes = <1 2 3 4>; + }; + }; + }; +}; + +&du { + status = "okay"; }; &extal_clk { @@ -114,6 +158,41 @@ &i2c1 { status = "okay"; clock-frequency = <400000>; + + sn65dsi86@2c { + compatible = "ti,sn65dsi86"; + reg = <0x2c>; + + clocks = <&sn65dsi86_refclk>; + clock-names = "refclk"; + + interrupt-parent = <&gpio1>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; + + vccio-supply = <®_1p8v>; + vpll-supply = <®_1p8v>; + vcca-supply = <®_1p2v>; + vcc-supply = <®_1p2v>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + sn65dsi86_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + sn65dsi86_out: endpoint { + remote-endpoint = <&mini_dp_con_in>; + }; + }; + }; + }; }; &i2c6 {