From patchwork Fri Sep 24 03:39:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12513971 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86701C43219 for ; Fri, 24 Sep 2021 03:39:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6FC8F61242 for ; Fri, 24 Sep 2021 03:39:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244054AbhIXDlR (ORCPT ); Thu, 23 Sep 2021 23:41:17 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:46994 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244051AbhIXDlQ (ORCPT ); Thu, 23 Sep 2021 23:41:16 -0400 X-UUID: e96adb574e2942968a2aacd4160bd1a7-20210924 X-UUID: e96adb574e2942968a2aacd4160bd1a7-20210924 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 953275642; Fri, 24 Sep 2021 11:39:39 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 24 Sep 2021 11:39:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 24 Sep 2021 11:39:38 +0800 From: Tinghan Shen To: , , , , CC: , , , , , Tinghan Shen Subject: [PATCH v7 1/6] dt-bindings: remoteproc: mediatek: Add binding for mt8195 scp Date: Fri, 24 Sep 2021 11:39:30 +0800 Message-ID: <20210924033935.2127-2-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.15.GIT In-Reply-To: <20210924033935.2127-1-tinghan.shen@mediatek.com> References: <20210924033935.2127-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Add mt8195 compatible to binding document. The description of required properties are also modified to reflect the hardware change between mt8183 and mt8195. The mt8195 doesn't have to control the scp clock on kernel side. Signed-off-by: Tinghan Shen Acked-by: Rob Herring --- Documentation/devicetree/bindings/remoteproc/mtk,scp.txt | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt b/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt index 3f5f78764b60..d64466eefbe3 100644 --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt @@ -5,13 +5,15 @@ This binding provides support for ARM Cortex M4 Co-processor found on some Mediatek SoCs. Required properties: -- compatible Should be "mediatek,mt8183-scp" +- compatible Should be one of: + "mediatek,mt8183-scp" + "mediatek,mt8195-scp" - reg Should contain the address ranges for memory regions: SRAM, CFG, and L1TCM. - reg-names Contains the corresponding names for the memory regions: "sram", "cfg", and "l1tcm". -- clocks Clock for co-processor (See: ../clock/clock-bindings.txt) -- clock-names Contains the corresponding name for the clock. This +- clocks Required by mt8183. Clock for co-processor (See: ../clock/clock-bindings.txt) +- clock-names Required by mt8183. Contains the corresponding name for the clock. This should be named "main". Subnodes From patchwork Fri Sep 24 03:39:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12513975 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3BC3CC433F5 for ; Fri, 24 Sep 2021 03:39:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 25D3D61242 for ; Fri, 24 Sep 2021 03:39:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244070AbhIXDlS (ORCPT ); Thu, 23 Sep 2021 23:41:18 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:46976 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S237120AbhIXDlR (ORCPT ); Thu, 23 Sep 2021 23:41:17 -0400 X-UUID: 2f5bac2bbe974bb789acbc75a9eea78a-20210924 X-UUID: 2f5bac2bbe974bb789acbc75a9eea78a-20210924 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 312215166; Fri, 24 Sep 2021 11:39:40 +0800 Received: from mtkexhb02.mediatek.inc (172.21.101.103) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 24 Sep 2021 11:39:38 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 24 Sep 2021 11:39:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 24 Sep 2021 11:39:38 +0800 From: Tinghan Shen To: , , , , CC: , , , , , Tinghan Shen Subject: [PATCH v7 2/6] dt-bindings: remoteproc: mediatek: Add binding for mt8192 scp Date: Fri, 24 Sep 2021 11:39:31 +0800 Message-ID: <20210924033935.2127-3-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.15.GIT In-Reply-To: <20210924033935.2127-1-tinghan.shen@mediatek.com> References: <20210924033935.2127-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Add mt8192 compatible to binding document. Signed-off-by: Tinghan Shen Acked-by: Rob Herring --- Documentation/devicetree/bindings/remoteproc/mtk,scp.txt | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt b/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt index d64466eefbe3..88f37dee7bca 100644 --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt @@ -7,14 +7,17 @@ Mediatek SoCs. Required properties: - compatible Should be one of: "mediatek,mt8183-scp" + "mediatek,mt8192-scp" "mediatek,mt8195-scp" - reg Should contain the address ranges for memory regions: SRAM, CFG, and L1TCM. - reg-names Contains the corresponding names for the memory regions: "sram", "cfg", and "l1tcm". -- clocks Required by mt8183. Clock for co-processor (See: ../clock/clock-bindings.txt) -- clock-names Required by mt8183. Contains the corresponding name for the clock. This - should be named "main". +- clocks Required by mt8183 and mt8192. Clock for co-processor + (See: ../clock/clock-bindings.txt) +- clock-names Required by mt8183 and mt8192. Contains the + corresponding name for the clock. This should be + named "main". Subnodes -------- From patchwork Fri Sep 24 03:39:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12513979 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2EE0C05032 for ; Fri, 24 Sep 2021 03:39:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9B41460FA0 for ; Fri, 24 Sep 2021 03:39:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244080AbhIXDlT (ORCPT ); Thu, 23 Sep 2021 23:41:19 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:37176 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244056AbhIXDlR (ORCPT ); Thu, 23 Sep 2021 23:41:17 -0400 X-UUID: 9ca22d1fc0144aaca2d2e378c00508a6-20210924 X-UUID: 9ca22d1fc0144aaca2d2e378c00508a6-20210924 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1072256764; Fri, 24 Sep 2021 11:39:40 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 24 Sep 2021 11:39:39 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkcas07.mediatek.inc (172.21.101.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 24 Sep 2021 11:39:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 24 Sep 2021 11:39:38 +0800 From: Tinghan Shen To: , , , , CC: , , , , , Tinghan Shen Subject: [PATCH v7 3/6] dt-bindings: remoteproc: mediatek: Convert mtk,scp to json-schema Date: Fri, 24 Sep 2021 11:39:32 +0800 Message-ID: <20210924033935.2127-4-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.15.GIT In-Reply-To: <20210924033935.2127-1-tinghan.shen@mediatek.com> References: <20210924033935.2127-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Convert the mtk,scp binding to DT schema format using json-schema. Signed-off-by: Tinghan Shen Reviewed-by: Rob Herring --- .../bindings/remoteproc/mtk,scp.txt | 41 --------- .../bindings/remoteproc/mtk,scp.yaml | 92 +++++++++++++++++++ 2 files changed, 92 insertions(+), 41 deletions(-) delete mode 100644 Documentation/devicetree/bindings/remoteproc/mtk,scp.txt create mode 100644 Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt b/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt deleted file mode 100644 index 88f37dee7bca..000000000000 --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt +++ /dev/null @@ -1,41 +0,0 @@ -Mediatek SCP Bindings ----------------------------------------- - -This binding provides support for ARM Cortex M4 Co-processor found on some -Mediatek SoCs. - -Required properties: -- compatible Should be one of: - "mediatek,mt8183-scp" - "mediatek,mt8192-scp" - "mediatek,mt8195-scp" -- reg Should contain the address ranges for memory regions: - SRAM, CFG, and L1TCM. -- reg-names Contains the corresponding names for the memory regions: - "sram", "cfg", and "l1tcm". -- clocks Required by mt8183 and mt8192. Clock for co-processor - (See: ../clock/clock-bindings.txt) -- clock-names Required by mt8183 and mt8192. Contains the - corresponding name for the clock. This should be - named "main". - -Subnodes --------- - -Subnodes of the SCP represent rpmsg devices. The names of the devices are not -important. The properties of these nodes are defined by the individual bindings -for the rpmsg devices - but must contain the following property: - -- mtk,rpmsg-name Contains the name for the rpmsg device. Used to match - the subnode to rpmsg device announced by SCP. - -Example: - - scp: scp@10500000 { - compatible = "mediatek,mt8183-scp"; - reg = <0 0x10500000 0 0x80000>, - <0 0x105c0000 0 0x5000>; - reg-names = "sram", "cfg"; - clocks = <&infracfg CLK_INFRA_SCPSYS>; - clock-names = "main"; - }; diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml new file mode 100644 index 000000000000..d21a25ee96e6 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/mtk,scp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek SCP Bindings + +maintainers: + - Tinghan Shen + +description: + This binding provides support for ARM Cortex M4 Co-processor found on some + Mediatek SoCs. + +properties: + compatible: + enum: + - mediatek,mt8183-scp + - mediatek,mt8192-scp + - mediatek,mt8195-scp + + reg: + description: + Should contain the address ranges for memory regions SRAM, CFG, and + L1TCM. + maxItems: 3 + + reg-names: + items: + - const: sram + - const: cfg + - const: l1tcm + + clocks: + description: + Clock for co-processor (see ../clock/clock-bindings.txt). + Required by mt8183 and mt8192. + maxItems: 1 + + clock-names: + const: main + +required: + - compatible + - reg + - reg-names + +if: + properties: + compatible: + enum: + - mediatek,mt8183-scp + - mediatek,mt8192-scp +then: + required: + - clocks + - clock-names + +additionalProperties: + type: object + description: + Subnodes of the SCP represent rpmsg devices. The names of the devices + are not important. The properties of these nodes are defined by the + individual bindings for the rpmsg devices. + properties: + mediatek,rpmsg-name: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Contains the name for the rpmsg device. Used to match + the subnode to rpmsg device announced by SCP. + + required: + - mediatek,rpmsg-name + +examples: + - | + #include + + scp@10500000 { + compatible = "mediatek,mt8183-scp"; + reg = <0x10500000 0x80000>, + <0x10700000 0x8000>, + <0x10720000 0xe0000>; + reg-names = "sram", "cfg", "l1tcm"; + clocks = <&infracfg CLK_INFRA_SCPSYS>; + clock-names = "main"; + + cros_ec { + mediatek,rpmsg-name = "cros-ec-rpmsg"; + }; + }; From patchwork Fri Sep 24 03:39:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12513977 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3AB69C4167D for ; Fri, 24 Sep 2021 03:39:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1F5876128A for ; Fri, 24 Sep 2021 03:39:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244072AbhIXDlT (ORCPT ); Thu, 23 Sep 2021 23:41:19 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:37192 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244043AbhIXDlR (ORCPT ); Thu, 23 Sep 2021 23:41:17 -0400 X-UUID: 2089023ccc4748fdb52206d7574ef61e-20210924 X-UUID: 2089023ccc4748fdb52206d7574ef61e-20210924 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 254834021; Fri, 24 Sep 2021 11:39:40 +0800 Received: from MTKMBS06N1.mediatek.inc (172.21.101.129) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 24 Sep 2021 11:39:38 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs06n1.mediatek.inc (172.21.101.129) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 24 Sep 2021 11:39:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 24 Sep 2021 11:39:38 +0800 From: Tinghan Shen To: , , , , CC: , , , , , Tinghan Shen Subject: [PATCH v7 4/6] remoteproc: mediatek: Support mt8195 scp Date: Fri, 24 Sep 2021 11:39:33 +0800 Message-ID: <20210924033935.2127-5-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.15.GIT In-Reply-To: <20210924033935.2127-1-tinghan.shen@mediatek.com> References: <20210924033935.2127-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org The SCP clock design is changed on mt8195 that doesn't need to control SCP clock on kernel side. Signed-off-by: Tinghan Shen Reviewed-by: Mathieu Poirier --- drivers/remoteproc/mtk_common.h | 1 + drivers/remoteproc/mtk_scp.c | 48 +++++++++++++++++++++++++++++---- 2 files changed, 44 insertions(+), 5 deletions(-) diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h index 61901f5efa05..5ff3867c72f3 100644 --- a/drivers/remoteproc/mtk_common.h +++ b/drivers/remoteproc/mtk_common.h @@ -72,6 +72,7 @@ struct scp_ipi_desc { struct mtk_scp; struct mtk_scp_of_data { + int (*scp_clk_get)(struct mtk_scp *scp); int (*scp_before_load)(struct mtk_scp *scp); void (*scp_irq_handler)(struct mtk_scp *scp); void (*scp_reset_assert)(struct mtk_scp *scp); diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 9679cc26895e..36e48cf58ed6 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -312,6 +312,32 @@ static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp, return -ENOENT; } +static int mt8183_scp_clk_get(struct mtk_scp *scp) +{ + struct device *dev = scp->dev; + int ret = 0; + + scp->clk = devm_clk_get(dev, "main"); + if (IS_ERR(scp->clk)) { + dev_err(dev, "Failed to get clock\n"); + ret = PTR_ERR(scp->clk); + } + + return ret; +} + +static int mt8192_scp_clk_get(struct mtk_scp *scp) +{ + return mt8183_scp_clk_get(scp); +} + +static int mt8195_scp_clk_get(struct mtk_scp *scp) +{ + scp->clk = NULL; + + return 0; +} + static int mt8183_scp_before_load(struct mtk_scp *scp) { /* Clear SCP to host interrupt */ @@ -785,12 +811,9 @@ static int scp_probe(struct platform_device *pdev) if (ret) goto destroy_mutex; - scp->clk = devm_clk_get(dev, "main"); - if (IS_ERR(scp->clk)) { - dev_err(dev, "Failed to get clock\n"); - ret = PTR_ERR(scp->clk); + ret = scp->data->scp_clk_get(scp); + if (ret) goto release_dev_mem; - } /* register SCP initialization IPI */ ret = scp_ipi_register(scp, SCP_IPI_INIT, scp_init_ipi_handler, scp); @@ -852,6 +875,7 @@ static int scp_remove(struct platform_device *pdev) } static const struct mtk_scp_of_data mt8183_of_data = { + .scp_clk_get = mt8183_scp_clk_get, .scp_before_load = mt8183_scp_before_load, .scp_irq_handler = mt8183_scp_irq_handler, .scp_reset_assert = mt8183_scp_reset_assert, @@ -864,6 +888,19 @@ static const struct mtk_scp_of_data mt8183_of_data = { }; static const struct mtk_scp_of_data mt8192_of_data = { + .scp_clk_get = mt8192_scp_clk_get, + .scp_before_load = mt8192_scp_before_load, + .scp_irq_handler = mt8192_scp_irq_handler, + .scp_reset_assert = mt8192_scp_reset_assert, + .scp_reset_deassert = mt8192_scp_reset_deassert, + .scp_stop = mt8192_scp_stop, + .scp_da_to_va = mt8192_scp_da_to_va, + .host_to_scp_reg = MT8192_GIPC_IN_SET, + .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT, +}; + +static const struct mtk_scp_of_data mt8195_of_data = { + .scp_clk_get = mt8195_scp_clk_get, .scp_before_load = mt8192_scp_before_load, .scp_irq_handler = mt8192_scp_irq_handler, .scp_reset_assert = mt8192_scp_reset_assert, @@ -877,6 +914,7 @@ static const struct mtk_scp_of_data mt8192_of_data = { static const struct of_device_id mtk_scp_of_match[] = { { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data }, { .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data }, + { .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data }, {}, }; MODULE_DEVICE_TABLE(of, mtk_scp_of_match); From patchwork Fri Sep 24 03:39:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12513967 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A8D6C433F5 for ; Fri, 24 Sep 2021 03:39:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2657F60FA0 for ; Fri, 24 Sep 2021 03:39:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244044AbhIXDlQ (ORCPT ); Thu, 23 Sep 2021 23:41:16 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:46976 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S243927AbhIXDlP (ORCPT ); Thu, 23 Sep 2021 23:41:15 -0400 X-UUID: 49307a0b102b40bc9b983413f46c2494-20210924 X-UUID: 49307a0b102b40bc9b983413f46c2494-20210924 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1577762382; Fri, 24 Sep 2021 11:39:40 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 24 Sep 2021 11:39:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 24 Sep 2021 11:39:38 +0800 From: Tinghan Shen To: , , , , CC: , , , , , Tinghan Shen Subject: [PATCH v7 5/6] rpmsg: change naming of mediatek rpmsg property Date: Fri, 24 Sep 2021 11:39:34 +0800 Message-ID: <20210924033935.2127-6-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.15.GIT In-Reply-To: <20210924033935.2127-1-tinghan.shen@mediatek.com> References: <20210924033935.2127-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Change from "mtk,rpmsg-name" to "mediatek,rpmsg-name" to sync with the vendor name defined in vendor-prefixes.yaml. Signed-off-by: Tinghan Shen Reviewed-By: AngeloGioacchino Del Regno --- drivers/rpmsg/mtk_rpmsg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/rpmsg/mtk_rpmsg.c b/drivers/rpmsg/mtk_rpmsg.c index 96a17ec29140..5b4404b8be4c 100644 --- a/drivers/rpmsg/mtk_rpmsg.c +++ b/drivers/rpmsg/mtk_rpmsg.c @@ -183,7 +183,7 @@ mtk_rpmsg_match_device_subnode(struct device_node *node, const char *channel) int ret; for_each_available_child_of_node(node, child) { - ret = of_property_read_string(child, "mtk,rpmsg-name", &name); + ret = of_property_read_string(child, "mediatek,rpmsg-name", &name); if (ret) continue; From patchwork Fri Sep 24 03:39:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 12513973 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D90FFC4321E for ; Fri, 24 Sep 2021 03:39:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C10C961242 for ; Fri, 24 Sep 2021 03:39:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244067AbhIXDlS (ORCPT ); Thu, 23 Sep 2021 23:41:18 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:37176 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S244047AbhIXDlQ (ORCPT ); Thu, 23 Sep 2021 23:41:16 -0400 X-UUID: e5daf91db8344c0b9267e786a4569ebe-20210924 X-UUID: e5daf91db8344c0b9267e786a4569ebe-20210924 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1456224560; Fri, 24 Sep 2021 11:39:40 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 24 Sep 2021 11:39:39 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 24 Sep 2021 11:39:39 +0800 From: Tinghan Shen To: , , , , CC: , , , , , Tinghan Shen Subject: [PATCH v7 6/6] arm64: dts: mt8183: change rpmsg property name Date: Fri, 24 Sep 2021 11:39:35 +0800 Message-ID: <20210924033935.2127-7-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.15.GIT In-Reply-To: <20210924033935.2127-1-tinghan.shen@mediatek.com> References: <20210924033935.2127-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org The the rpmsg property name is changed to "mediatek," to sync with the vendor name defined in vendor-prefixes.yaml. Signed-off-by: Tinghan Shen Reviewed-By: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi index 8e9cf36a9a41..bc4bbcf457ee 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -754,7 +754,7 @@ cros_ec { compatible = "google,cros-ec-rpmsg"; - mtk,rpmsg-name = "cros-ec-rpmsg"; + mediatek,rpmsg-name = "cros-ec-rpmsg"; }; };