From patchwork Thu Sep 30 08:31:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 12527721 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B775BC433EF for ; Thu, 30 Sep 2021 08:33:40 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8E622617E6 for ; Thu, 30 Sep 2021 08:33:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 8E622617E6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=FVSsd0QervdVxDRFTa7a32jRmGEq45pMBRikFCQSHcM=; b=DuDWEcesAbKEo+ WmsYaZP9MACjP9Sp+VJEx/kvDZoHT8UbbVoLfOQ58xYyyFZl0pZjeogL/fi+jeXqmaraf47dJmiQA rhFamxoLI6HnFaEMezJVDrnbtwft3DBx1womLuZ80G6TNlqsb26u4isvl3jkjBCWVpNgJwOoSqhwl 215ogWVmbCAxmKeVKDf2uwWOyUqWKYNtaymLSUg6ILHTKoTud5f6f+Pzobhsg3Fi5UaFbWAKWvB4D UyCBjgd/n5muBcJCDJLNEs2qmC+P63fJwel3QyP0MVIQwp5C6UIQOthCaQJt8yyBuQeOImRtDfuac 5xi0bkwz8ZLY2iq/axVA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mVrUG-00DOB4-Ui; Thu, 30 Sep 2021 08:32:17 +0000 Received: from bhuna.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e3e3]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mVrU0-00DO1l-Pv; Thu, 30 Sep 2021 08:32:02 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 32D581F449EB From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: linux-mediatek@lists.infradead.org, eizan@chromium.org, kernel@collabora.com, drinkcat@chromium.org, jitao.shi@mediatek.com, chunkuang.hu@kernel.org, hsinyi@chromium.org, matthias.bgg@gmail.com, Guenter Roeck , Crystal Guo , Philipp Zabel , Rob Herring , Wim Van Sebroeck , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org Subject: [PATCH v4 1/7] arm64: dts: mediatek: Move reset controller constants into common location Date: Thu, 30 Sep 2021 10:31:44 +0200 Message-Id: <20210930103105.v4.1.I514d9aafff3a062f751b37d3fea7402f67595b86@changeid> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210930083150.3317003-1-enric.balletbo@collabora.com> References: <20210930083150.3317003-1-enric.balletbo@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210930_013200_989205_A7AC655D X-CRM114-Status: GOOD ( 10.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The DT binding includes for reset controllers are located in include/dt-bindings/reset/. Move the Mediatek reset constants in there. Signed-off-by: Enric Balletbo i Serra Reviewed-by: Guenter Roeck Reviewed-by: Matthias Brugger --- (no changes since v2) Changes in v2: - Fix build test ERROR Reported-by: kernel test robot arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 +- drivers/watchdog/mtk_wdt.c | 6 +++--- .../dt-bindings/{reset-controller => reset}/mt2712-resets.h | 0 .../dt-bindings/{reset-controller => reset}/mt8183-resets.h | 0 .../dt-bindings/{reset-controller => reset}/mt8192-resets.h | 0 5 files changed, 4 insertions(+), 4 deletions(-) rename include/dt-bindings/{reset-controller => reset}/mt2712-resets.h (100%) rename include/dt-bindings/{reset-controller => reset}/mt8183-resets.h (100%) rename include/dt-bindings/{reset-controller => reset}/mt8192-resets.h (100%) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 494f6fdbd603..9639ca17638e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c index 796fbb048cbe..3d208d627fb0 100644 --- a/drivers/watchdog/mtk_wdt.c +++ b/drivers/watchdog/mtk_wdt.c @@ -9,9 +9,9 @@ * Based on sunxi_wdt.c */ -#include -#include -#include +#include +#include +#include #include #include #include diff --git a/include/dt-bindings/reset-controller/mt2712-resets.h b/include/dt-bindings/reset/mt2712-resets.h similarity index 100% rename from include/dt-bindings/reset-controller/mt2712-resets.h rename to include/dt-bindings/reset/mt2712-resets.h diff --git a/include/dt-bindings/reset-controller/mt8183-resets.h b/include/dt-bindings/reset/mt8183-resets.h similarity index 100% rename from include/dt-bindings/reset-controller/mt8183-resets.h rename to include/dt-bindings/reset/mt8183-resets.h diff --git a/include/dt-bindings/reset-controller/mt8192-resets.h b/include/dt-bindings/reset/mt8192-resets.h similarity index 100% rename from include/dt-bindings/reset-controller/mt8192-resets.h rename to include/dt-bindings/reset/mt8192-resets.h From patchwork Thu Sep 30 08:31:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 12527723 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08D86C433EF for ; Thu, 30 Sep 2021 08:34:20 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C31C161875 for ; Thu, 30 Sep 2021 08:34:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org C31C161875 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; 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Thu, 30 Sep 2021 08:32:03 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 510A71F449EC From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: linux-mediatek@lists.infradead.org, eizan@chromium.org, kernel@collabora.com, drinkcat@chromium.org, jitao.shi@mediatek.com, chunkuang.hu@kernel.org, hsinyi@chromium.org, matthias.bgg@gmail.com, Fabien Parent , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 2/7] dt-bindings: mediatek: Add #reset-cells to mmsys system controller Date: Thu, 30 Sep 2021 10:31:45 +0200 Message-Id: <20210930103105.v4.2.I3f7f1c9a8e46be07d1757ddf4e0097535f3a7d41@changeid> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210930083150.3317003-1-enric.balletbo@collabora.com> References: <20210930083150.3317003-1-enric.balletbo@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210930_013201_847026_B5AF27E0 X-CRM114-Status: GOOD ( 10.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The mmsys system controller exposes a set of memory client resets and needs to specify the #reset-cells property in order to advertise the number of cells needed to describe each of the resets. Signed-off-by: Enric Balletbo i Serra Reviewed-by: Rob Herring --- (no changes since v3) Changes in v3: - Based on top of the patch that converts mmsys to schema .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index f9ffa5b703a5..763c62323a74 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -43,6 +43,9 @@ properties: "#clock-cells": const: 1 + '#reset-cells': + const: 1 + required: - compatible - reg @@ -56,4 +59,5 @@ examples: compatible = "mediatek,mt8173-mmsys", "syscon"; reg = <0x14000000 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; }; From patchwork Thu Sep 30 08:31:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 12527733 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F08D2C433FE for ; Thu, 30 Sep 2021 08:35:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B4568617E6 for ; Thu, 30 Sep 2021 08:35:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B4568617E6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=x0PQgbFDXpeEIwFJWrYsRP1O8zRAEN8zi5eZhtrOr2A=; b=G6Y6T7AkFWLEsF WVK5AiMPzP8aL6GOgKtvTExZQRNJd3hx5BVUfewxWFONEuXfoPMdf/i4eqCaKcvowrBQNy35M/qH7 tzyxo/ccP808a9THpJpxotpfr51VMWwgFfa+/r6TgD7WiUOv5R6Nz6TK6UTahl9z32bCvVZ8ORNUz HVJGpf28PWcrO/e4mkvXKrCgsyiPrLyk6x8ohzIR2q82UdFQdUtRGHnxqKTWhMbnOTscoavBLlncp JY2HuvwMZFihp8PrP2kkwZiY1yuvE3UTrj8HhfiZ6Clxae4Xm76UsEw+KM8DHRvhA65ht5nVdv20e 2MDPZgBbRbpZRWEpMJGw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mVrUW-00DOFn-OG; Thu, 30 Sep 2021 08:32:33 +0000 Received: from bhuna.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e3e3]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mVrU1-00DO23-8g; Thu, 30 Sep 2021 08:32:03 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 4ABF81F449F0 From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: linux-mediatek@lists.infradead.org, eizan@chromium.org, kernel@collabora.com, drinkcat@chromium.org, jitao.shi@mediatek.com, chunkuang.hu@kernel.org, hsinyi@chromium.org, matthias.bgg@gmail.com, Rob Herring , Daniel Vetter , David Airlie , Philipp Zabel , Rob Herring , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 3/7] dt-bindings: display: mediatek: add dsi reset optional property Date: Thu, 30 Sep 2021 10:31:46 +0200 Message-Id: <20210930103105.v4.3.Ifec72a83f224b62f24cfc967edfe78c5d276b2e3@changeid> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210930083150.3317003-1-enric.balletbo@collabora.com> References: <20210930083150.3317003-1-enric.balletbo@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210930_013201_459136_B303A456 X-CRM114-Status: GOOD ( 10.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update device tree binding documentation for the dsi to add the optional property to reset the dsi controller. Signed-off-by: Enric Balletbo i Serra Acked-by: Rob Herring --- (no changes since v2) Changes in v2: - Added a new patch to describe the dsi reset optional property. .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index d30428b9fb33..36b01458f45c 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -19,6 +19,11 @@ Required properties: Documentation/devicetree/bindings/graph.txt. This port should be connected to the input port of an attached DSI panel or DSI-to-eDP encoder chip. +Optional properties: +- resets: list of phandle + reset specifier pair, as described in [1]. + +[1] Documentation/devicetree/bindings/reset/reset.txt + MIPI TX Configuration Module ============================ @@ -45,6 +50,7 @@ dsi0: dsi@1401b000 { clocks = <&mmsys MM_DSI0_ENGINE>, <&mmsys MM_DSI0_DIGITAL>, <&mipi_tx0>; clock-names = "engine", "digital", "hs"; + resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>; phys = <&mipi_tx0>; phy-names = "dphy"; From patchwork Thu Sep 30 08:31:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 12527725 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1313CC433EF for ; Thu, 30 Sep 2021 08:34:34 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CA48761875 for ; Thu, 30 Sep 2021 08:34:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org CA48761875 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zG0wTnHwjdJwcFcbRCBYY969W3HmmdWJn9NMFvdk0Bs=; b=JADjly0jcA+nTr dTEjqjEHOS4iObNbDRv5kGBS22NnPRA5efS2ky8cWix1GvJ0ETzaU7Bs8ly6+h9mEbFQufr6za20D zktSqGvELKYXAYB7j5v2BgUw6z3UQjh8e93br71KfouJbxF5CZWJ5npSgd5Cnce2vFo/9paMdES0k pelf2zPcis57DU2RuBnra/FlK/KeQCMO3+3N8Q269xuMteleL42R/SIWCSt6YvYqrEDeNZ79dTSfd SqyuI+xcWucBypMe7EnvUbp9MBqQlri1kzcjQM8dp2ghtxpQZu32G3QYC9xHU2oCX/D6vBk27npsA KF6WKxNRpOj9N5jYmqtQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mVrV4-00DOVw-Gr; Thu, 30 Sep 2021 08:33:06 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mVrU3-00DO3E-0N; Thu, 30 Sep 2021 08:32:04 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 825C61F449F4 From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: linux-mediatek@lists.infradead.org, eizan@chromium.org, kernel@collabora.com, drinkcat@chromium.org, jitao.shi@mediatek.com, chunkuang.hu@kernel.org, hsinyi@chromium.org, matthias.bgg@gmail.com, Rob Herring , Philipp Zabel , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 4/7] arm64: dts: mt8173: Add the mmsys reset bit to reset the dsi0 Date: Thu, 30 Sep 2021 10:31:47 +0200 Message-Id: <20210930103105.v4.4.I7bd7d9a8da5e2894711b700a1127e6902a2b2f1d@changeid> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210930083150.3317003-1-enric.balletbo@collabora.com> References: <20210930083150.3317003-1-enric.balletbo@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210930_013203_207396_FF4CDF9C X-CRM114-Status: GOOD ( 10.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Reset the DSI hardware is needed to prevent different settings between the bootloader and the kernel. Signed-off-by: Enric Balletbo i Serra Acked-by: Rob Herring --- (no changes since v1) arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 ++ include/dt-bindings/reset/mt8173-resets.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 17d70e2f5394..97ea3f9960b1 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -1036,6 +1036,7 @@ mmsys: syscon@14000000 { assigned-clocks = <&topckgen CLK_TOP_MM_SEL>; assigned-clock-rates = <400000000>; #clock-cells = <1>; + #reset-cells = <1>; mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>, <&gce 1 CMDQ_THR_PRIO_HIGHEST>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; @@ -1262,6 +1263,7 @@ dsi0: dsi@1401b000 { <&mmsys CLK_MM_DSI0_DIGITAL>, <&mipi_tx0>; clock-names = "engine", "digital", "hs"; + resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>; phys = <&mipi_tx0>; phy-names = "dphy"; status = "disabled"; diff --git a/include/dt-bindings/reset/mt8173-resets.h b/include/dt-bindings/reset/mt8173-resets.h index ba8636eda5ae..6a60c7cecc4c 100644 --- a/include/dt-bindings/reset/mt8173-resets.h +++ b/include/dt-bindings/reset/mt8173-resets.h @@ -27,6 +27,8 @@ #define MT8173_INFRA_GCE_FAXI_RST 40 #define MT8173_INFRA_MMIOMMURST 47 +/* MMSYS resets */ +#define MT8173_MMSYS_SW0_RST_B_DISP_DSI0 25 /* PERICFG resets */ #define MT8173_PERI_UART0_SW_RST 0 From patchwork Thu Sep 30 08:31:48 2021 Content-Type: text/plain; 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Thu, 30 Sep 2021 08:32:05 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 98E811F449F5 From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: linux-mediatek@lists.infradead.org, eizan@chromium.org, kernel@collabora.com, drinkcat@chromium.org, jitao.shi@mediatek.com, chunkuang.hu@kernel.org, hsinyi@chromium.org, matthias.bgg@gmail.com, Rob Herring , Philipp Zabel , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 5/7] arm64: dts: mt8183: Add the mmsys reset bit to reset the dsi0 Date: Thu, 30 Sep 2021 10:31:48 +0200 Message-Id: <20210930103105.v4.5.I933f1532d7a1b2910843a9644c86a7d94a4b44e1@changeid> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210930083150.3317003-1-enric.balletbo@collabora.com> References: <20210930083150.3317003-1-enric.balletbo@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210930_013203_665302_C3EDAEA1 X-CRM114-Status: GOOD ( 12.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Reset the DSI hardware is needed to prevent different settings between the bootloader and the kernel. While here, also remove the undocumented and also not used 'mediatek,syscon-dsi' property. Signed-off-by: Enric Balletbo i Serra Acked-by: Rob Herring --- (no changes since v1) arch/arm64/boot/dts/mediatek/mt8183.dtsi | 3 ++- include/dt-bindings/reset/mt8183-resets.h | 3 +++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 9639ca17638e..9c4158a1057c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -1251,6 +1251,7 @@ mmsys: syscon@14000000 { compatible = "mediatek,mt8183-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>, <&gce 1 CMDQ_THR_PRIO_HIGHEST>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>; @@ -1365,11 +1366,11 @@ dsi0: dsi@14014000 { reg = <0 0x14014000 0 0x1000>; interrupts = ; power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; - mediatek,syscon-dsi = <&mmsys 0x140>; clocks = <&mmsys CLK_MM_DSI0_MM>, <&mmsys CLK_MM_DSI0_IF>, <&mipi_tx0>; clock-names = "engine", "digital", "hs"; + resets = <&mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0>; phys = <&mipi_tx0>; phy-names = "dphy"; }; diff --git a/include/dt-bindings/reset/mt8183-resets.h b/include/dt-bindings/reset/mt8183-resets.h index a1bbd41e0d12..48c5d2de0a38 100644 --- a/include/dt-bindings/reset/mt8183-resets.h +++ b/include/dt-bindings/reset/mt8183-resets.h @@ -80,6 +80,9 @@ #define MT8183_INFRACFG_SW_RST_NUM 128 +/* MMSYS resets */ +#define MT8183_MMSYS_SW0_RST_B_DISP_DSI0 25 + #define MT8183_TOPRGU_MM_SW_RST 1 #define MT8183_TOPRGU_MFG_SW_RST 2 #define MT8183_TOPRGU_VENC_SW_RST 3 From patchwork Thu Sep 30 08:31:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 12527731 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95168C433F5 for ; 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bh=LrY+Zac3xTs3XkTtcf8RtG+I1AirFwKWj1N8k8ogJMw=; b=X7TujDs3sz9yfr 6+BmLhTN0YdTsF9anAdfCh/xcREXBe6CM1ZwjFQZsN1RouUmf/JtbNAUbx5reNjoU90vXX1HeV00Y 420E0ejj8ywWc1ql4F+930UXQDm4mHFTtPEbkUpc6xK/ovURtskhZSgsqFBk2aZrAo2PUwe4Hee8u OZTx7CX4nyetc+Wkr1J3Bj5K/WibdxHO4NmSt/+pitMgh9ECy246O+y6qYBNzRwfwtJTmIycjSnw6 cbjcNlmKXKzDKxD3qYiR0xU/en08Sh9ccU03G9do1R/O3yi2Rm5kx8chPQ2z5px2F359STIuJrmUE uWLYvH/LKOACj8Dv7S6w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mVrVk-00DOyq-8l; Thu, 30 Sep 2021 08:33:48 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mVrU4-00DO4o-CQ; Thu, 30 Sep 2021 08:32:06 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id A49541F449FB From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: linux-mediatek@lists.infradead.org, eizan@chromium.org, kernel@collabora.com, drinkcat@chromium.org, jitao.shi@mediatek.com, chunkuang.hu@kernel.org, hsinyi@chromium.org, matthias.bgg@gmail.com, Philipp Zabel , linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 6/7] soc: mediatek: mmsys: Add reset controller support Date: Thu, 30 Sep 2021 10:31:49 +0200 Message-Id: <20210930103105.v4.6.I15e2419141a69b2e5c7e700c34d92a69df47e04d@changeid> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210930083150.3317003-1-enric.balletbo@collabora.com> References: <20210930083150.3317003-1-enric.balletbo@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210930_013204_591939_668CF7C6 X-CRM114-Status: GOOD ( 15.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Among other features the mmsys driver should implement a reset controller to be able to reset different bits from their space. Cc: Jitao Shi Suggested-by: Chun-Kuang Hu Signed-off-by: Enric Balletbo i Serra Reviewed-by: Philipp Zabel --- Changes in v4: - Remove unnused variable as pointed by Hsin-Yi. drivers/soc/mediatek/mtk-mmsys.c | 68 ++++++++++++++++++++++++++++++++ drivers/soc/mediatek/mtk-mmsys.h | 2 + 2 files changed, 70 insertions(+) diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index d9bbb0721ff4..132302154349 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -4,10 +4,12 @@ * Author: James Liao */ +#include #include #include #include #include +#include #include #include "mtk-mmsys.h" @@ -62,6 +64,8 @@ static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = { struct mtk_mmsys { void __iomem *regs; const struct mtk_mmsys_driver_data *data; + spinlock_t lock; /* protects mmsys_sw_rst_b reg */ + struct reset_controller_dev rcdev; }; void mtk_mmsys_ddp_connect(struct device *dev, @@ -101,6 +105,58 @@ void mtk_mmsys_ddp_disconnect(struct device *dev, } EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_disconnect); +static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned long id, + bool assert) +{ + struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys, rcdev); + unsigned long flags; + u32 reg; + + spin_lock_irqsave(&mmsys->lock, flags); + + reg = readl_relaxed(mmsys->regs + MMSYS_SW0_RST_B); + + if (assert) + reg &= ~BIT(id); + else + reg |= BIT(id); + + writel_relaxed(reg, mmsys->regs + MMSYS_SW0_RST_B); + + spin_unlock_irqrestore(&mmsys->lock, flags); + + return 0; +} + +static int mtk_mmsys_reset_assert(struct reset_controller_dev *rcdev, unsigned long id) +{ + return mtk_mmsys_reset_update(rcdev, id, true); +} + +static int mtk_mmsys_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id) +{ + return mtk_mmsys_reset_update(rcdev, id, false); +} + +static int mtk_mmsys_reset(struct reset_controller_dev *rcdev, unsigned long id) +{ + int ret; + + ret = mtk_mmsys_reset_assert(rcdev, id); + if (ret) + return ret; + + usleep_range(1000, 1100); + + return mtk_mmsys_reset_deassert(rcdev, id); +} + +static const struct reset_control_ops mtk_mmsys_reset_ops = { + .assert = mtk_mmsys_reset_assert, + .deassert = mtk_mmsys_reset_deassert, + .reset = mtk_mmsys_reset, +}; + static int mtk_mmsys_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -121,6 +177,18 @@ static int mtk_mmsys_probe(struct platform_device *pdev) return ret; } + spin_lock_init(&mmsys->lock); + + mmsys->rcdev.owner = THIS_MODULE; + mmsys->rcdev.nr_resets = 32; + mmsys->rcdev.ops = &mtk_mmsys_reset_ops; + mmsys->rcdev.of_node = pdev->dev.of_node; + ret = devm_reset_controller_register(&pdev->dev, &mmsys->rcdev); + if (ret) { + dev_err(&pdev->dev, "Couldn't register mmsys reset controller: %d\n", ret); + return ret; + } + mmsys->data = of_device_get_match_data(&pdev->dev); platform_set_drvdata(pdev, mmsys); diff --git a/drivers/soc/mediatek/mtk-mmsys.h b/drivers/soc/mediatek/mtk-mmsys.h index 9e2b81bd38db..8b0ed05117ea 100644 --- a/drivers/soc/mediatek/mtk-mmsys.h +++ b/drivers/soc/mediatek/mtk-mmsys.h @@ -78,6 +78,8 @@ #define DSI_SEL_IN_RDMA 0x1 #define DSI_SEL_IN_MASK 0x1 +#define MMSYS_SW0_RST_B 0x140 + struct mtk_mmsys_routes { u32 from_comp; u32 to_comp; From patchwork Thu Sep 30 08:31:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 12527735 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95A9EC433EF for ; Thu, 30 Sep 2021 08:35:51 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 64BD8617E6 for ; Thu, 30 Sep 2021 08:35:51 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 64BD8617E6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; 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Thu, 30 Sep 2021 08:32:06 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 8CAA71F449FE From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: linux-mediatek@lists.infradead.org, eizan@chromium.org, kernel@collabora.com, drinkcat@chromium.org, jitao.shi@mediatek.com, chunkuang.hu@kernel.org, hsinyi@chromium.org, matthias.bgg@gmail.com, Daniel Vetter , David Airlie , Philipp Zabel , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 7/7] drm/mediatek: mtk_dsi: Reset the dsi0 hardware Date: Thu, 30 Sep 2021 10:31:50 +0200 Message-Id: <20210930103105.v4.7.Idbb4727ddf00ba2fe796b630906baff10d994d89@changeid> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210930083150.3317003-1-enric.balletbo@collabora.com> References: <20210930083150.3317003-1-enric.balletbo@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210930_013205_655672_F3354363 X-CRM114-Status: GOOD ( 14.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Reset dsi0 HW to default when power on. This prevents to have different settingis between the bootloader and the kernel. As not all Mediatek boards have the reset consumer configured in their board description, also is not needed on all of them, the reset is optional, so the change is compatible with all boards. Cc: Jitao Shi Suggested-by: Chun-Kuang Hu Signed-off-by: Enric Balletbo i Serra Acked-by: Chun-Kuang Hu Reviewed-by: Matthias Brugger --- (no changes since v3) Changes in v3: - Fix typo in the commit description drivers/gpu/drm/mediatek/mtk_dsi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 93b40c245f00..5d90d2eb0019 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -11,6 +11,7 @@ #include #include #include +#include #include