From patchwork Thu Oct 7 21:24:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12543537 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3692C433F5 for ; Thu, 7 Oct 2021 21:25:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A3B9961251 for ; Thu, 7 Oct 2021 21:25:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241215AbhJGV1S (ORCPT ); Thu, 7 Oct 2021 17:27:18 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:58918 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233028AbhJGV1S (ORCPT ); Thu, 7 Oct 2021 17:27:18 -0400 Received: from localhost.localdomain (ip-213-127-63-121.ip.prioritytelecom.net [213.127.63.121]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 2333FC91C0; Thu, 7 Oct 2021 21:25:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633641923; bh=vm4XvzJRFYh/K71Zt5Zz2PQqoNrCtNh97Lggz9HLaJg=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=tFQf1PhLUs6sIHrn86U4XyF7E+aaJ0/0bTAv3/E88RukOWmeBs43vQK3Dx3moozIQ mYz0CPPVw2FyjrhzDhAKeKnesOdo58zMsnYgHPrvlhdMUjkhXwXVTT53wo50uBjupr ESfBYJp+nPcWIODwYmxGK7nmER56wZrDuNQ+tfes= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Luca Weiss , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , AngeloGioacchino Del Regno , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 01/11] clk: qcom: add select QCOM_GDSC for SM6350 Date: Thu, 7 Oct 2021 23:24:28 +0200 Message-Id: <20211007212444.328034-2-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211007212444.328034-1-luca@z3ntu.xyz> References: <20211007212444.328034-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org QCOM_GDSC is needed for the gcc driver to probe. Fixes: 131abae905df ("clk: qcom: Add SM6350 GCC driver") Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- v2: add R-b drivers/clk/qcom/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index 0a5596797b93..9ef007b3cf9b 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -564,6 +564,7 @@ config SM_GCC_6125 config SM_GCC_6350 tristate "SM6350 Global Clock Controller" + select QCOM_GDSC help Support for the global clock controller on SM6350 devices. Say Y if you want to use peripheral devices such as UART, From patchwork Thu Oct 7 21:24:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12543543 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0AADDC43219 for ; Thu, 7 Oct 2021 21:25:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E94DF6120D for ; Thu, 7 Oct 2021 21:25:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236433AbhJGV1Y (ORCPT ); Thu, 7 Oct 2021 17:27:24 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:58936 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233241AbhJGV1T (ORCPT ); Thu, 7 Oct 2021 17:27:19 -0400 Received: from localhost.localdomain (ip-213-127-63-121.ip.prioritytelecom.net [213.127.63.121]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 8F8B1C91C2; Thu, 7 Oct 2021 21:25:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633641923; bh=cPDamchJW0mjeP0iNR4px+LzJKosMc9BhKEa6fAGkEw=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=eNB27IH0URMurg1yZQMneF2+ZSlXjeFpjJJOYW3aWsbOdmP/Jp7kD8rJYcDWD7mzG BgO2zIfokQpcTNUirSUR+MF7GxzsugUYfg/REfROSyBirYE7AhMd9DQL74CCWGAiyI zM0j6mqBlBDUog6kBdd+JhV9gy9Sozc8szcyNsaE= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Luca Weiss , Andy Gross , Bjorn Andersson , Liam Girdwood , Mark Brown , Rob Herring , David Collins , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 02/11] dt-bindings: regulator: qcom,rpmh: Add compatible for PM6350 Date: Thu, 7 Oct 2021 23:24:29 +0200 Message-Id: <20211007212444.328034-3-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211007212444.328034-1-luca@z3ntu.xyz> References: <20211007212444.328034-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add compatible string for pm6350 used in sm6350 boards. Signed-off-by: Luca Weiss Acked-by: Rob Herring --- .../devicetree/bindings/regulator/qcom,rpmh-regulator.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml index 34de38377aa6..b959504e0ea4 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml @@ -35,6 +35,7 @@ description: | PMIC. Supported regulator node names are For PM6150, smps1 - smps5, ldo1 - ldo19 For PM6150L, smps1 - smps8, ldo1 - ldo11, bob + For PM6350, smps1 - smps5, ldo1 - ldo22 For PM7325, smps1 - smps8, ldo1 - ldo19 For PM8005, smps1 - smps4 For PM8009, smps1 - smps2, ldo1 - ldo7 @@ -52,6 +53,7 @@ properties: enum: - qcom,pm6150-rpmh-regulators - qcom,pm6150l-rpmh-regulators + - qcom,pm6350-rpmh-regulators - qcom,pm7325-rpmh-regulators - qcom,pm8005-rpmh-regulators - qcom,pm8009-rpmh-regulators From patchwork Thu Oct 7 21:24:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12543551 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BECD7C433EF for ; Thu, 7 Oct 2021 21:25:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AA0C061100 for ; Thu, 7 Oct 2021 21:25:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239143AbhJGV1Y (ORCPT ); Thu, 7 Oct 2021 17:27:24 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:58944 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241180AbhJGV1T (ORCPT ); Thu, 7 Oct 2021 17:27:19 -0400 Received: from localhost.localdomain (ip-213-127-63-121.ip.prioritytelecom.net [213.127.63.121]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 185DFC91C3; Thu, 7 Oct 2021 21:25:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633641924; bh=xc4vyQgr+xipDBHuJKiNHkgUGusUrGCcYMbyMWblToc=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=N3HD4jOR9lb2xn4D3uK2D38XNpEX1/rAMGyhDidHbhPuiNOMH7NjTc52B1m7jj0xY NATKaIunjyy1Af63kgEclsmGTTz6O4v8mx538+pItUJYcenQHgiPUUbxre1dh2bgUt ac7hc2jQkoweeN9MBVgmMGxjK7mgT3wfVese3/jE= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Luca Weiss , Andy Gross , Bjorn Andersson , Liam Girdwood , Mark Brown , linux-kernel@vger.kernel.org Subject: [PATCH v2 03/11] regulator: qcom-rpmh: Add PM6350 regulators Date: Thu, 7 Oct 2021 23:24:30 +0200 Message-Id: <20211007212444.328034-4-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211007212444.328034-1-luca@z3ntu.xyz> References: <20211007212444.328034-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the configuration for pm6350 regulators. The supplies are not known so leave them out for now. Additionally leave out configuration of smps3 - smps5 and ldo17 as these are not configured in the downstream kernel and the type of them is not known. Signed-off-by: Luca Weiss --- v2: set supply of regulators to NULL and clarify commit message drivers/regulator/qcom-rpmh-regulator.c | 32 +++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c index 7f458d510483..12425f667c00 100644 --- a/drivers/regulator/qcom-rpmh-regulator.c +++ b/drivers/regulator/qcom-rpmh-regulator.c @@ -1047,6 +1047,34 @@ static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = { {} }; +static const struct rpmh_vreg_init_data pm6350_vreg_data[] = { + RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, NULL), + RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, NULL), + /* smps3 - smps5 not configured */ + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, NULL), + RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, NULL), + RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, NULL), + RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, NULL), + RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, NULL), + RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, NULL), + RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, NULL), + RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, NULL), + RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, NULL), + RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, NULL), + RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, NULL), + RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo, NULL), + RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, NULL), + RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, NULL), + RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, NULL), + RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, NULL), + /* ldo17 not configured */ + RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, NULL), + RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, NULL), + RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, NULL), + RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, NULL), + RPMH_VREG("ldo22", "ldo%s22", &pmic5_nldo, NULL), +}; + static const struct rpmh_vreg_init_data pmx55_vreg_data[] = { RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"), @@ -1201,6 +1229,10 @@ static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = { .compatible = "qcom,pm6150l-rpmh-regulators", .data = pm6150l_vreg_data, }, + { + .compatible = "qcom,pm6350-rpmh-regulators", + .data = pm6350_vreg_data, + }, { .compatible = "qcom,pmc8180-rpmh-regulators", .data = pm8150_vreg_data, From patchwork Thu Oct 7 21:24:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12543547 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3EFD1C4321E for ; Thu, 7 Oct 2021 21:25:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2C7EA61139 for ; Thu, 7 Oct 2021 21:25:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241477AbhJGV1Z (ORCPT ); Thu, 7 Oct 2021 17:27:25 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:58950 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241283AbhJGV1U (ORCPT ); Thu, 7 Oct 2021 17:27:20 -0400 Received: from localhost.localdomain (ip-213-127-63-121.ip.prioritytelecom.net [213.127.63.121]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 945B4C91C4; Thu, 7 Oct 2021 21:25:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633641924; bh=QweKY5MA+C4H7ytFhPQeyJb1i/Tq++4mbxAZu/ezFn4=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=h5Tzl+78Ilko3NcbyMuaUopUMuIIlGmmqwMDMTGIOjfmg05dvTe8NIQ3Mm2aK95iw XoF1Q9azjusb5xXJhcCUVQ/kklZzxlw0F6OlwdaDOPQvqJ3ebmpUZD6yjeahnxtL2Z OW1M/n4qtAzAh5fwqJAnV7RRI7yPKf/GWTpaUdNM= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Luca Weiss , Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 04/11] dt-bindings: pinctrl: qcom,pmic-gpio: Add compatible for PM6350 Date: Thu, 7 Oct 2021 23:24:31 +0200 Message-Id: <20211007212444.328034-5-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211007212444.328034-1-luca@z3ntu.xyz> References: <20211007212444.328034-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add pmic-gpio compatible string for pm6350 pmic. Signed-off-by: Luca Weiss --- Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml index 9bd01db37dcd..1e5153f10ca1 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml @@ -21,6 +21,7 @@ properties: - qcom,pm660l-gpio - qcom,pm6150-gpio - qcom,pm6150l-gpio + - qcom,pm6350-gpio - qcom,pm7325-gpio - qcom,pm8005-gpio - qcom,pm8008-gpio @@ -103,6 +104,7 @@ $defs: this subnode. Valid pins are - gpio1-gpio10 for pm6150 - gpio1-gpio12 for pm6150l + - gpio1-gpio9 for pm6350 - gpio1-gpio10 for pm7325 - gpio1-gpio4 for pm8005 - gpio1-gpio2 for pm8008 From patchwork Thu Oct 7 21:24:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12543541 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0FAEC433F5 for ; Thu, 7 Oct 2021 21:25:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BAA6461130 for ; Thu, 7 Oct 2021 21:25:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241403AbhJGV1V (ORCPT ); Thu, 7 Oct 2021 17:27:21 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:58962 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241332AbhJGV1U (ORCPT ); Thu, 7 Oct 2021 17:27:20 -0400 Received: from localhost.localdomain (ip-213-127-63-121.ip.prioritytelecom.net [213.127.63.121]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 05359C91C6; Thu, 7 Oct 2021 21:25:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633641925; bh=Dnqi2pXbnY/JNzz6QlVr9FCTaGk42dEDlrk2dXM7fDo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=erO7v6gELfmyQo7hR8h1fUL/ksea5eKHrKTp+YpRXkN/dLnpGJzVAYkpTe4MsndeO 9vA5qm2WDS36Y4wQZ5l20dvQ2bNlfVlIX9ymveqvFRKw8KOPwJFMrVqHrMYNeqTJTt 3x3J2wPYzSzl/KbxxGc8LoUVx8jBXJ5Bierk1oCc= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Luca Weiss , Bjorn Andersson , Andy Gross , Linus Walleij , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 05/11] pinctrl: qcom: spmi-gpio: Add compatible for PM6350 Date: Thu, 7 Oct 2021 23:24:32 +0200 Message-Id: <20211007212444.328034-6-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211007212444.328034-1-luca@z3ntu.xyz> References: <20211007212444.328034-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for the GPIO controller in the pm6350 PMIC. Signed-off-by: Luca Weiss --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index 98bf0e2a2a8d..55a9227a87fd 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -1110,6 +1110,7 @@ static const struct of_device_id pmic_gpio_of_match[] = { { .compatible = "qcom,pm660l-gpio", .data = (void *) 12 }, { .compatible = "qcom,pm6150-gpio", .data = (void *) 10 }, { .compatible = "qcom,pm6150l-gpio", .data = (void *) 12 }, + { .compatible = "qcom,pm6350-gpio", .data = (void *) 9 }, { .compatible = "qcom,pm7325-gpio", .data = (void *) 10 }, { .compatible = "qcom,pm8005-gpio", .data = (void *) 4 }, { .compatible = "qcom,pm8008-gpio", .data = (void *) 2 }, From patchwork Thu Oct 7 21:24:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12543549 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC34DC43217 for ; Thu, 7 Oct 2021 21:25:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B1E2861130 for ; Thu, 7 Oct 2021 21:25:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241580AbhJGV11 (ORCPT ); Thu, 7 Oct 2021 17:27:27 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:58972 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241385AbhJGV1V (ORCPT ); Thu, 7 Oct 2021 17:27:21 -0400 Received: from localhost.localdomain (ip-213-127-63-121.ip.prioritytelecom.net [213.127.63.121]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 9133FC91C0; Thu, 7 Oct 2021 21:25:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633641926; bh=S2OUhzesZLy2ZTT4N0we/rTZZFKrfG2xmP6bO/1fGS8=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=IMBUece1NxCtsksVo3LzJd/t6PMYWOTjgdYYtHikVYZvcEjg+HjMncLg4IzZdoUo1 IkrBGvt7rotIGfyC/d6RgqcoTf4GJt4L439FDLzLZ6Yt46tFc1a/WJJsu08g0b+nWy zj5BHjpnC3yXhVbtI26PNu1VOjuPMNwTQB0v8TZk= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 06/11] arm64: dts: qcom: Add PM6350 PMIC Date: Thu, 7 Oct 2021 23:24:33 +0200 Message-Id: <20211007212444.328034-7-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211007212444.328034-1-luca@z3ntu.xyz> References: <20211007212444.328034-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org PM6350 is used in SM6350 and provides similar functionality to other Qualcomm PMICs. Add the pon node with power & volume key and the gpios. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- v2: add R-b arch/arm64/boot/dts/qcom/pm6350.dtsi | 54 ++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm6350.dtsi diff --git a/arch/arm64/boot/dts/qcom/pm6350.dtsi b/arch/arm64/boot/dts/qcom/pm6350.dtsi new file mode 100644 index 000000000000..c5d85064562b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pm6350.dtsi @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Luca Weiss + */ + +#include + +&spmi_bus { + pmic@0 { + compatible = "qcom,pm6350", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm6350_pon: pon@800 { + compatible = "qcom,pm8998-pon"; + reg = <0x800>; + mode-bootloader = <0x2>; + mode-recovery = <0x1>; + + pm6350_pwrkey: pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + linux,code = ; + }; + + pm6350_resin: resin { + compatible = "qcom,pm8941-resin"; + interrupts = <0x0 0x8 0x1 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + status = "disabled"; + }; + }; + + pm6350_gpios: gpios@c000 { + compatible = "qcom,pm6350-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmic@1 { + compatible = "qcom,pm6350", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; From patchwork Thu Oct 7 21:24:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12543545 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F5B6C433FE for ; Thu, 7 Oct 2021 21:25:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1C6AA61278 for ; Thu, 7 Oct 2021 21:25:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241519AbhJGV10 (ORCPT ); Thu, 7 Oct 2021 17:27:26 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:58962 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235536AbhJGV1W (ORCPT ); Thu, 7 Oct 2021 17:27:22 -0400 Received: from localhost.localdomain (ip-213-127-63-121.ip.prioritytelecom.net [213.127.63.121]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 0222BC91C2; Thu, 7 Oct 2021 21:25:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633641927; bh=F4fCRzLfOTYH/B1NDxYT8eVOthwcR73tD/zhl5pWh30=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=o/6DPp2UEFqnjPa1mwJwvzuBCGF1WhHthm8yStmPYu8Bvnx9e/bS1XbHBYJDOc4jO 9lbN8XYKM7NwBHjpzohmTrQaTqwk4R/QL4U3iMd0Us/BAs7UWSStsgxdjou9YIVYNX SArduUdOeBfb+D3qLSEQ6Hjb6uzjSabDMVWYqsis= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 07/11] arm64: dts: qcom: sm6350: add debug uart Date: Thu, 7 Oct 2021 23:24:34 +0200 Message-Id: <20211007212444.328034-8-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211007212444.328034-1-luca@z3ntu.xyz> References: <20211007212444.328034-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the necessary nodes for the debug uart on SM6350. Signed-off-by: Luca Weiss --- v2: remove mux{} from pinctrl node, add drive-strength & bias-disable arch/arm64/boot/dts/qcom/sm6350.dtsi | 31 ++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 95e69d9f8657..5becfb130be5 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -445,6 +445,30 @@ opp-384000000 { }; }; + qupv3_id_1: geniqup@9c0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x0 0x9c0000 0x0 0x2000>; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; + #address-cells = <2>; + #size-cells = <2>; + iommus = <&apps_smmu 0x4c3 0x0>; + ranges; + status = "disabled"; + + uart2: serial@98c000 { + compatible = "qcom,geni-debug-uart"; + reg = <0 0x98c000 0 0x4000>; + clock-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_uart2_default>; + interrupts = ; + status = "disabled"; + }; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x40000>; @@ -672,6 +696,13 @@ tlmm: pinctrl@f100000 { interrupt-controller; #interrupt-cells = <2>; gpio-ranges = <&tlmm 0 0 157>; + + qup_uart2_default: qup-uart2-default { + pins = "gpio25", "gpio26"; + function = "qup13_f2"; + drive-strength = <2>; + bias-disable; + }; }; apps_smmu: iommu@15000000 { From patchwork Thu Oct 7 21:24:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12543557 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B796AC433EF for ; Thu, 7 Oct 2021 21:25:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9F25B61139 for ; Thu, 7 Oct 2021 21:25:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241604AbhJGV1b (ORCPT ); Thu, 7 Oct 2021 17:27:31 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:58990 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241462AbhJGV1Y (ORCPT ); Thu, 7 Oct 2021 17:27:24 -0400 Received: from localhost.localdomain (ip-213-127-63-121.ip.prioritytelecom.net [213.127.63.121]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 9502EC91C3; Thu, 7 Oct 2021 21:25:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633641928; bh=X4Qneg2lzExo3bu3en8DYD1jCtqON6mIXHXBLOUGwvE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Rr52ltbDCtOGhdfUarR4DoKwO9e2wzk/oDvO5wyCMCYaZnAeKYHco5UY1KbnZrQ1D qWTA8iIAqTeo3PFLn6tJtoVA118olUierfjwTCzHnvONjNgSY1QaRvuWAogXLhpGlW hl4cZAoic8N7WTLByyOxij3oqifrYt0ZvNSDTygw= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Luca Weiss , Rob Herring , Viresh Kumar , Mark Brown , Greg Kroah-Hartman , Alexandre Belloni , Sudeep Holla , Vinod Koul , Hector Martin , Lorenzo Pieralisi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 08/11] dt-bindings: arm: cpus: Add Kryo 570 CPUs Date: Thu, 7 Oct 2021 23:24:35 +0200 Message-Id: <20211007212444.328034-9-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211007212444.328034-1-luca@z3ntu.xyz> References: <20211007212444.328034-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document Kryo 570 CPUs found in Qualcomm Snapdragon 750G (SM7225). Signed-off-by: Luca Weiss Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 897eec887e5a..1e530391f355 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -172,6 +172,7 @@ properties: - qcom,kryo468 - qcom,kryo485 - qcom,kryo560 + - qcom,kryo570 - qcom,kryo685 - qcom,scorpion From patchwork Thu Oct 7 21:24:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12543555 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F39C5C43219 for ; Thu, 7 Oct 2021 21:25:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E1CDC61283 for ; Thu, 7 Oct 2021 21:25:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241771AbhJGV1b (ORCPT ); Thu, 7 Oct 2021 17:27:31 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:58962 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230120AbhJGV1Y (ORCPT ); Thu, 7 Oct 2021 17:27:24 -0400 Received: from localhost.localdomain (ip-213-127-63-121.ip.prioritytelecom.net [213.127.63.121]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 3B344C91C4; Thu, 7 Oct 2021 21:25:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633641929; bh=RJQLF6oLD/LA6HJd8wF9mMr/P17NktfBH/lE5wJ42IE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=ZkbzQ5OuNDmyiGE2etBL2ndi3HyCEHycuQB4gWS7DxM8bqLZUjT/nJGUSqSRz+g5n yF0sw8jORPS2oIp3HjwzzTSkQhXOgUL8hLN/fyw+mmJbKy0cfVdgp3jIr/VPBhIn1f oouz1uZBH6U5HB7KSyFW+VYOi5ZfRy35VSNWpJoM= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 09/11] dt-bindings: arm: qcom: Document sm7225 and fairphone,fp4 board Date: Thu, 7 Oct 2021 23:24:36 +0200 Message-Id: <20211007212444.328034-10-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211007212444.328034-1-luca@z3ntu.xyz> References: <20211007212444.328034-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add binding documentation for Fairphone 4 smartphone which is based on Snapdragon 750G (sm7225). Signed-off-by: Luca Weiss Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 880ddafc634e..540dfafa3418 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -44,6 +44,7 @@ description: | sdm660 sdm845 sdx55 + sm7225 sm8150 sm8250 sm8350 @@ -217,6 +218,11 @@ properties: - qcom,sa8155p-adp - const: qcom,sa8155p + - items: + - enum: + - fairphone,fp4 + - const: qcom,sm7225 + - items: - enum: - qcom,sm8150-mtp From patchwork Thu Oct 7 21:24:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12543553 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1BE6C433F5 for ; Thu, 7 Oct 2021 21:25:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D842261100 for ; Thu, 7 Oct 2021 21:25:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241742AbhJGV1a (ORCPT ); Thu, 7 Oct 2021 17:27:30 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:59022 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241479AbhJGV10 (ORCPT ); Thu, 7 Oct 2021 17:27:26 -0400 Received: from localhost.localdomain (ip-213-127-63-121.ip.prioritytelecom.net [213.127.63.121]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id C34D3C9157; Thu, 7 Oct 2021 21:25:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633641931; bh=ypUUkVhGZTTYseT65cOBdzBB3lW/QgcaSQMa/iPZE2w=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=wWIAAESBEWm6F5bAxeygg4V1cUBOEDcb7mFL2DpzZTdAUiP+HXpVuDWql0EAn8zOp WSetlF/wqIQihOXj0VwQZVKsLC8t4w+9WbtajRfA760VIbTHI4P4fGH2+Y4iX8L/oU ffIuL6DiXvJNWZlftxv6mRpExsd0a7RBV0bwVnGQ= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 10/11] arm64: dts: qcom: Add SM7225 device tree Date: Thu, 7 Oct 2021 23:24:37 +0200 Message-Id: <20211007212444.328034-11-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211007212444.328034-1-luca@z3ntu.xyz> References: <20211007212444.328034-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The Snapdragon 750G (sm7225) is software-wise very similar to Snapdragon 690 (sm6350) with minor differences in clock speeds and as added here, it uses the Kryo 570 instead of Kryo 560. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- v2: add R-b arch/arm64/boot/dts/qcom/sm7225.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm7225.dtsi diff --git a/arch/arm64/boot/dts/qcom/sm7225.dtsi b/arch/arm64/boot/dts/qcom/sm7225.dtsi new file mode 100644 index 000000000000..7b2a002ca7ff --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm7225.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Luca Weiss + */ + +#include "sm6350.dtsi" + +/* SM7225 uses Kryo 570 instead of Kryo 560 */ +&CPU0 { compatible = "qcom,kryo570"; }; +&CPU1 { compatible = "qcom,kryo570"; }; +&CPU2 { compatible = "qcom,kryo570"; }; +&CPU3 { compatible = "qcom,kryo570"; }; +&CPU4 { compatible = "qcom,kryo570"; }; +&CPU5 { compatible = "qcom,kryo570"; }; +&CPU6 { compatible = "qcom,kryo570"; }; +&CPU7 { compatible = "qcom,kryo570"; }; From patchwork Thu Oct 7 21:24:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Weiss X-Patchwork-Id: 12543559 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0761CC433EF for ; Thu, 7 Oct 2021 21:25:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E308561139 for ; Thu, 7 Oct 2021 21:25:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241640AbhJGV1e (ORCPT ); Thu, 7 Oct 2021 17:27:34 -0400 Received: from mail.z3ntu.xyz ([128.199.32.197]:59038 "EHLO mail.z3ntu.xyz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241554AbhJGV11 (ORCPT ); Thu, 7 Oct 2021 17:27:27 -0400 Received: from localhost.localdomain (ip-213-127-63-121.ip.prioritytelecom.net [213.127.63.121]) by mail.z3ntu.xyz (Postfix) with ESMTPSA id 8CBA0C91C2; Thu, 7 Oct 2021 21:25:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=z3ntu.xyz; s=z3ntu; t=1633641932; bh=sWk+xj23wI0PKxnlXeVVu9dDXXYY2pME7W1fAJbQNTc=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=e7tTMU/6Ts9caGz6ogvtU/W+WpbsSHHXUcyoLOndpJA1yDu6lK53BgBj0D2eepx+X CW/oxXgunIkQissN09w9gYxx9lcSH8xftdShgXNLzGSZeHkAsB9fOr/zTItKYR2bGy lyL+WBO7OXkFIEOjGmJe9eOMHOYhw6fKh3pIdgwU= From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, konrad.dybcio@somainline.org, Luca Weiss , Andy Gross , Bjorn Andersson , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 11/11] arm64: dts: qcom: sm7225: Add device tree for Fairphone 4 Date: Thu, 7 Oct 2021 23:24:38 +0200 Message-Id: <20211007212444.328034-12-luca@z3ntu.xyz> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211007212444.328034-1-luca@z3ntu.xyz> References: <20211007212444.328034-1-luca@z3ntu.xyz> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add device tree for the Fairphone 4 smartphone which is based on Snapdragon 750G (sm7225) which is basically sm6350. Currently supported are UART, physical buttons (power & volume), screen (based on simple-framebuffer set up by the bootloader), regulators and USB. Signed-off-by: Luca Weiss --- v2: improve pinctrl node for volume buttons and add R-b arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/sm7225-fairphone-fp4.dts | 320 ++++++++++++++++++ 2 files changed, 321 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 59ece83abad0..9ed189e9c197 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -85,6 +85,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-xiaomi-beryllium.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb +dtb-$(CONFIG_ARCH_QCOM) += sm7225-fairphone-fp4.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8150-hdk.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8150-microsoft-surface-duo.dtb dtb-$(CONFIG_ARCH_QCOM) += sm8150-mtp.dtb diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts new file mode 100644 index 000000000000..8d6fd22873e0 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts @@ -0,0 +1,320 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Luca Weiss + */ + +/dts-v1/; + +#include +#include +#include +#include +#include "sm7225.dtsi" +#include "pm6350.dtsi" + +/ { + model = "Fairphone 4"; + compatible = "fairphone,fp4", "qcom,sm7225"; + + /* required for bootloader to select correct board */ + qcom,msm-id = <434 0x10000>, <459 0x10000>; + qcom,board-id = <8 32>; + + aliases { + serial0 = &uart2; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + stdout-path = "serial0:115200n8"; + + framebuffer0: framebuffer@a000000 { + compatible = "simple-framebuffer"; + reg = <0 0xa0000000 0 (2340 * 1080 * 4)>; + width = <1080>; + height = <2340>; + stride = <(1080 * 4)>; + format = "a8r8g8b8"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_pin>; + + volume-up { + label = "volume_up"; + linux,code = ; + gpios = <&pm6350_gpios 2 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&apps_rsc { + pm6350-rpmh-regulators { + compatible = "qcom,pm6350-rpmh-regulators"; + qcom,pmic-id = "a"; + + vreg_s1a: smps1 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1200000>; + }; + + vreg_s2a: smps2 { + regulator-min-microvolt = <1503000>; + regulator-max-microvolt = <2048000>; + }; + + vreg_l2a: ldo2 { + regulator-min-microvolt = <1503000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l3a: ldo3 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + vreg_l4a: ldo4 { + regulator-min-microvolt = <352000>; + regulator-max-microvolt = <801000>; + regulator-initial-mode = ; + }; + + vreg_l5a: ldo5 { + regulator-min-microvolt = <1503000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l6a: ldo6 { + regulator-min-microvolt = <1710000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l7a: ldo7 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l8a: ldo8 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-initial-mode = ; + }; + + vreg_l9a: ldo9 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3401000>; + regulator-initial-mode = ; + }; + + vreg_l11a: ldo11 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l12a: ldo12 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l13a: ldo13 { + regulator-min-microvolt = <570000>; + regulator-max-microvolt = <650000>; + regulator-initial-mode = ; + }; + + vreg_l14a: ldo14 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1900000>; + regulator-initial-mode = ; + }; + + vreg_l15a: ldo15 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1305000>; + regulator-initial-mode = ; + }; + + vreg_l16a: ldo16 { + regulator-min-microvolt = <830000>; + regulator-max-microvolt = <921000>; + regulator-initial-mode = ; + }; + + vreg_l18a: ldo18 { + regulator-min-microvolt = <788000>; + regulator-max-microvolt = <1049000>; + regulator-initial-mode = ; + }; + + vreg_l19a: ldo19 { + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1305000>; + regulator-initial-mode = ; + }; + + vreg_l20a: ldo20 { + regulator-min-microvolt = <530000>; + regulator-max-microvolt = <801000>; + regulator-initial-mode = ; + }; + + vreg_l21a: ldo21 { + regulator-min-microvolt = <751000>; + regulator-max-microvolt = <825000>; + regulator-initial-mode = ; + }; + + vreg_l22a: ldo22 { + regulator-min-microvolt = <1080000>; + regulator-max-microvolt = <1305000>; + regulator-initial-mode = ; + }; + }; + + pm6150l-rpmh-regulators { + compatible = "qcom,pm6150l-rpmh-regulators"; + qcom,pmic-id = "e"; + + vreg_s8e: smps8 { + regulator-min-microvolt = <313000>; + regulator-max-microvolt = <1395000>; + }; + + vreg_l1e: ldo1 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + }; + + vreg_l2e: ldo2 { + regulator-min-microvolt = <1170000>; + regulator-max-microvolt = <1305000>; + regulator-initial-mode = ; + }; + + vreg_l3e: ldo3 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1299000>; + regulator-initial-mode = ; + }; + + vreg_l4e: ldo4 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + vreg_l5e: ldo5 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + }; + + vreg_l6e: ldo6 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l7e: ldo7 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l8e: ldo8 { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + }; + + vreg_l9e: ldo9 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + }; + + vreg_l10e: ldo10 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3401000>; + regulator-initial-mode = ; + }; + + vreg_l11e: ldo11 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3401000>; + regulator-initial-mode = ; + }; + + vreg_bob: bob { + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <5492000>; + regulator-initial-mode = ; + regulator-allow-bypass; + }; + }; +}; + +&pm6350_gpios { + gpio_keys_pin: gpio-keys-pin { + pins = "gpio2"; + function = PMIC_GPIO_FUNC_NORMAL; + bias-pull-up; + input-enable; + power-source = <0>; + }; +}; + +&pm6350_resin { + status = "okay"; + linux,code = ; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&tlmm { + gpio-reserved-ranges = <13 4>, <56 2>; +}; + +&uart2 { + status = "okay"; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + maximum-speed = "super-speed"; + dr_mode = "peripheral"; +}; + +&usb_1_hsphy { + status = "okay"; + + vdd-supply = <&vreg_l18a>; + vdda-pll-supply = <&vreg_l2a>; + vdda-phy-dpdm-supply = <&vreg_l3a>; +}; + +&usb_1_qmpphy { + status = "okay"; + + vdda-phy-supply = <&vreg_l22a>; + vdda-pll-supply = <&vreg_l16a>; +};