From patchwork Fri Oct 8 05:33:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 12544403 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F237C433EF for ; Fri, 8 Oct 2021 05:35:25 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EB200610D1 for ; Fri, 8 Oct 2021 05:35:23 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org EB200610D1 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alsa-project.org Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id AFDDB1657; Fri, 8 Oct 2021 07:34:31 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz AFDDB1657 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1633671321; bh=e6nkNVnwst/mJnObVPYDGAAPPYbG6fon4iiU+aLswMk=; h=From:To:Subject:Date:Cc:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From; b=SQMlRZRNrsw8jamDUnDaPGUxQWjBZkV8BqCIrKd/VOcJpyZ3CVA1LURzKXKO+e7aQ Q+WPJkr+uqG99zkn2UUIHPumXLHh2UVJzb3HKjSk6wABdDawNwVm16bw9rYai3d1TV z78DKh2qy7KSTsqrXZbLNiqQoFVTw1jqRlEmcF1s= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 30597F800F0; Fri, 8 Oct 2021 07:34:31 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 6852CF80246; Fri, 8 Oct 2021 07:34:29 +0200 (CEST) Received: from m43-7.mailgun.net (m43-7.mailgun.net [69.72.43.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 80238F80124 for ; Fri, 8 Oct 2021 07:34:23 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 80238F80124 Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="meowOU2T" DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1633671266; h=Message-Id: Date: Subject: Cc: To: From: Sender; bh=+2/lFg6lZ/VKWGc8lCK4zQfyJWPRKZdJr0qg4DMQqJY=; b=meowOU2TZit1lNipJvLQ2e+ytWSNSCIr47Yx61HDg826AwkYtrjF6VjYXPUeJpzPShC6BCEu 1d4yOM4MmxtWBiR0FfD1y6yrduzx9OzQHSxzUsKx+7/r6y/3TWaDR0MC9Kk2AryweHxsnrl5 YQhRXN4M0XdboDwaT3NgcUCs9d8= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI4ZmE2ZSIsICJhbHNhLWRldmVsQGFsc2EtcHJvamVjdC5vcmciLCAiYmU5ZTRhIl0= Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n06.prod.us-west-2.postgun.com with SMTP id 615fd852f1c68960613e0425 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Fri, 08 Oct 2021 05:34:10 GMT Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 31EA8C4360C; Fri, 8 Oct 2021 05:34:10 +0000 (UTC) Received: from hu-srivasam-hyd.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: srivasam) by smtp.codeaurora.org (Postfix) with ESMTPSA id 69734C4338F; Fri, 8 Oct 2021 05:34:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org 69734C4338F Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Srinivasa Rao Mandadapu To: agross@kernel.org, bjorn.andersson@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, plai@codeaurora.org, bgoswami@codeaurora.org, perex@perex.cz, tiwai@suse.com, srinivas.kandagatla@linaro.org, rohitkr@codeaurora.org, linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, judyhsiao@chromium.org Subject: [PATCH v3] ASoC: qcom: soundwire: Enable soundwire bus clock for version 1.6 Date: Fri, 8 Oct 2021 11:03:52 +0530 Message-Id: <1633671232-30310-1-git-send-email-srivasam@codeaurora.org> X-Mailer: git-send-email 2.7.4 Cc: Venkata Prasad Potturu , Srinivasa Rao Mandadapu X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add support for soundwire 1.6 version to gate RX/TX bus clock. Signed-off-by: Venkata Prasad Potturu Signed-off-by: Srinivasa Rao Mandadapu --- Changes since v2: -- Update error check after ioremap. Changes since v1: -- Add const name to mask value. drivers/soundwire/qcom.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c index 0ef79d6..bd6fabd 100644 --- a/drivers/soundwire/qcom.c +++ b/drivers/soundwire/qcom.c @@ -109,6 +109,7 @@ #define SWR_MAX_CMD_ID 14 #define MAX_FIFO_RD_RETRY 3 #define SWR_OVERFLOW_RETRY_COUNT 30 +#define SWRM_HCTL_REG_MASK ~BIT(1) struct qcom_swrm_port_config { u8 si; @@ -127,6 +128,7 @@ struct qcom_swrm_ctrl { struct device *dev; struct regmap *regmap; void __iomem *mmio; + char __iomem *swrm_hctl_reg; struct completion broadcast; struct completion enumeration; struct work_struct slave_work; @@ -610,6 +612,12 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl) val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index); val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index); + if (ctrl->swrm_hctl_reg) { + val = ioread32(ctrl->swrm_hctl_reg); + val &= SWRM_HCTL_REG_MASK; + iowrite32(val, ctrl->swrm_hctl_reg); + } + ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val); /* Enable Auto enumeration */ @@ -1200,7 +1208,7 @@ static int qcom_swrm_probe(struct platform_device *pdev) struct qcom_swrm_ctrl *ctrl; const struct qcom_swrm_data *data; int ret; - u32 val; + int val, swrm_hctl_reg = 0; ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); if (!ctrl) @@ -1251,6 +1259,11 @@ static int qcom_swrm_probe(struct platform_device *pdev) ctrl->bus.port_ops = &qcom_swrm_port_ops; ctrl->bus.compute_params = &qcom_swrm_compute_params; + if (!of_property_read_u32(dev->of_node, "qcom,swrm-hctl-reg", &swrm_hctl_reg)) { + ctrl->swrm_hctl_reg = devm_ioremap(&pdev->dev, swrm_hctl_reg, 0x4); + if (!ctrl->swrm_hctl_reg) + return -ENODEV; + } ret = qcom_swrm_get_port_config(ctrl); if (ret) goto err_clk;