From patchwork Fri Oct 8 09:14:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanho Park X-Patchwork-Id: 12544669 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75C04C433EF for ; Fri, 8 Oct 2021 09:16:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 543A260EC0 for ; Fri, 8 Oct 2021 09:16:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237064AbhJHJSp (ORCPT ); Fri, 8 Oct 2021 05:18:45 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:41708 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237335AbhJHJSo (ORCPT ); Fri, 8 Oct 2021 05:18:44 -0400 Received: from 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1D.6A.09091.77C00616; Fri, 8 Oct 2021 18:16:39 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.51]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20211008091639epsmtip1364503ce5856f2eeaf26a9eea027e593~sA3zjGjyB2850628506epsmtip1N; Fri, 8 Oct 2021 09:16:39 +0000 (GMT) From: Chanho Park To: Krzysztof Kozlowski , Rob Herring , Linus Walleij Cc: Tomasz Figa , Sylwester Nawrocki , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, Chanho Park Subject: [PATCH v2 1/3] pinctrl: samsung: support ExynosAutov9 SoC pinctrl Date: Fri, 8 Oct 2021 18:14:41 +0900 Message-Id: <20211008091443.44625-2-chanho61.park@samsung.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211008091443.44625-1-chanho61.park@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprGJsWRmVeSWpSXmKPExsWy7bCmqW4FT0Kiwd9dWhaX92tbzD9yjtVi 49sfTBZT/ixnsphxfh+TReveI+wWh9+0s1qs2vWH0YHDY1ZDL5vHzll32T02repk87hzbQ+b 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s/zVR2+OPvusfXXLtUirn+kOW50T+z6q7xSZqfbhE+d/ZQmbvuk5vDFPRLy/Xr3mV9nI+yHi Tnwzy5qI6VffZmkd2bjoRIHZd2nDtdphq3PfhwYv/Tn7GkOY1wPGm7/DDtanC11L37DLb/eH dRd2HZypmGc6NUevqSdedtXZxnk5M2Q91kyoW9zAnh+4vf2xtvE1xZDDyusklFiKMxINtZiL ihMBK6n13uUCAAA= X-CMS-MailID: 20211008091639epcas2p28339f2f73755a3c842fbb95f313bf7d9 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20211008091639epcas2p28339f2f73755a3c842fbb95f313bf7d9 References: <20211008091443.44625-1-chanho61.park@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add pinctrl data for ExynosAuto v9 SoC. - GPA0, GPA1: 10, External wake up interrupt - GPQ0: 2, XbootLDO, Speedy PMIC I/F - GPB0, GPB1, GPB2, GPB3: 29, I2S 7 CH - GPF0, GPF1, GPF2, GPF3,GPF4, GPF5, GPF6, GPF8: 52, FSYS - GPG0, GPG1, GPG2, GPG3: 25, GPIO x 24, SMPL_INT - GPP0, GPP1, GPP2, GPP3, GPP4, GPP5: 48, USI 12 CH Signed-off-by: Chanho Park --- .../bindings/pinctrl/samsung-pinctrl.txt | 1 + .../pinctrl/samsung/pinctrl-exynos-arm64.c | 108 ++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-samsung.c | 2 + drivers/pinctrl/samsung/pinctrl-samsung.h | 1 + 4 files changed, 112 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index e7a1b1880375..b8b475967ff9 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -23,6 +23,7 @@ Required Properties: - "samsung,exynos5433-pinctrl": for Exynos5433 compatible pin-controller. - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller. - "samsung,exynos850-pinctrl": for Exynos850 compatible pin-controller. + - "samsung,exynosautov9-pinctrl": for ExynosAutov9 compatible pin-controller. - reg: Base address of the pin controller hardware module and length of the address space it occupies. diff --git a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c index fe5f6046fbd5..6b77fd24571e 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c @@ -538,3 +538,111 @@ const struct samsung_pinctrl_of_match_data exynos850_of_data __initconst = { .ctrl = exynos850_pin_ctrl, .num_ctrl = ARRAY_SIZE(exynos850_pin_ctrl), }; + +/* pin banks of exynosautov9 pin-controller 0 (ALIVE) */ +static const struct samsung_pin_bank_data exynosautov9_pin_banks0[] __initconst = { + EXYNOS850_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00), + EXYNOS850_PIN_BANK_EINTW(2, 0x020, "gpa1", 0x04), + EXYNOS850_PIN_BANK_EINTN(2, 0x040, "gpq0"), +}; + +/* pin banks of exynosautov9 pin-controller 1 (AUD) */ +static const struct samsung_pin_bank_data exynosautov9_pin_banks1[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00), + EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpb1", 0x04), + EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpb2", 0x08), + EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpb3", 0x0C), +}; + +/* pin banks of exynosautov9 pin-controller 2 (FSYS0) */ +static const struct samsung_pin_bank_data exynosautov9_pin_banks2[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(6, 0x000, "gpf0", 0x00), + EXYNOS850_PIN_BANK_EINTG(6, 0x020, "gpf1", 0x04), +}; + +/* pin banks of exynosautov9 pin-controller 3 (FSYS1) */ +static const struct samsung_pin_bank_data exynosautov9_pin_banks3[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(6, 0x000, "gpf8", 0x00), +}; + +/* pin banks of exynosautov9 pin-controller 4 (FSYS2) */ +static const struct samsung_pin_bank_data exynosautov9_pin_banks4[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(4, 0x000, "gpf2", 0x00), + EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpf3", 0x04), + EXYNOS850_PIN_BANK_EINTG(7, 0x040, "gpf4", 0x08), + EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpf5", 0x0C), + EXYNOS850_PIN_BANK_EINTG(7, 0x080, "gpf6", 0x10), +}; + +/* pin banks of exynosautov9 pin-controller 5 (PERIC0) */ +static const struct samsung_pin_bank_data exynosautov9_pin_banks5[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp0", 0x00), + EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp1", 0x04), + EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpp2", 0x08), + EXYNOS850_PIN_BANK_EINTG(5, 0x060, "gpg0", 0x0C), +}; + +/* pin banks of exynosautov9 pin-controller 6 (PERIC1) */ +static const struct samsung_pin_bank_data exynosautov9_pin_banks6[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(8, 0x000, "gpp3", 0x00), + EXYNOS850_PIN_BANK_EINTG(8, 0x020, "gpp4", 0x04), + EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpp5", 0x08), + EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpg1", 0x0C), + EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpg2", 0x10), + EXYNOS850_PIN_BANK_EINTG(4, 0x0A0, "gpg3", 0x14), +}; + +static const struct samsung_pin_ctrl exynosautov9_pin_ctrl[] __initconst = { + { + /* pin-controller instance 0 ALIVE data */ + .pin_banks = exynosautov9_pin_banks0, + .nr_banks = ARRAY_SIZE(exynosautov9_pin_banks0), + .eint_wkup_init = exynos_eint_wkup_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 1 AUD data */ + .pin_banks = exynosautov9_pin_banks1, + .nr_banks = ARRAY_SIZE(exynosautov9_pin_banks1), + }, { + /* pin-controller instance 2 FSYS0 data */ + .pin_banks = exynosautov9_pin_banks2, + .nr_banks = ARRAY_SIZE(exynosautov9_pin_banks2), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 3 FSYS1 data */ + .pin_banks = exynosautov9_pin_banks3, + .nr_banks = ARRAY_SIZE(exynosautov9_pin_banks3), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 4 FSYS2 data */ + .pin_banks = exynosautov9_pin_banks4, + .nr_banks = ARRAY_SIZE(exynosautov9_pin_banks4), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 5 PERIC0 data */ + .pin_banks = exynosautov9_pin_banks5, + .nr_banks = ARRAY_SIZE(exynosautov9_pin_banks5), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 6 PERIC1 data */ + .pin_banks = exynosautov9_pin_banks6, + .nr_banks = ARRAY_SIZE(exynosautov9_pin_banks6), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, +}; + +const struct samsung_pinctrl_of_match_data exynosautov9_of_data __initconst = { + .ctrl = exynosautov9_pin_ctrl, + .num_ctrl = ARRAY_SIZE(exynosautov9_pin_ctrl), +}; diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index 2a0fc63516f1..23f355ae9ca0 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1266,6 +1266,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { .data = &exynos7_of_data }, { .compatible = "samsung,exynos850-pinctrl", .data = &exynos850_of_data }, + { .compatible = "samsung,exynosautov9-pinctrl", + .data = &exynosautov9_of_data }, #endif #ifdef CONFIG_PINCTRL_S3C64XX { .compatible = "samsung,s3c64xx-pinctrl", diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h index 4c2149e9c544..547968a31aed 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -340,6 +340,7 @@ extern const struct samsung_pinctrl_of_match_data exynos5420_of_data; extern const struct samsung_pinctrl_of_match_data exynos5433_of_data; extern const struct samsung_pinctrl_of_match_data exynos7_of_data; extern const struct samsung_pinctrl_of_match_data exynos850_of_data; +extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data; extern const struct samsung_pinctrl_of_match_data s3c64xx_of_data; extern const struct samsung_pinctrl_of_match_data s3c2412_of_data; extern const struct samsung_pinctrl_of_match_data s3c2416_of_data; From patchwork Fri Oct 8 09:14:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanho Park X-Patchwork-Id: 12544675 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 064B9C433EF for ; Fri, 8 Oct 2021 09:16:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DBD7B6101E for ; Fri, 8 Oct 2021 09:16:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236195AbhJHJSs (ORCPT ); Fri, 8 Oct 2021 05:18:48 -0400 Received: from mailout4.samsung.com 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X-AuditID: b6c32a46-63bff70000002658-ff-61600c79d950 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 2D.6A.09091.77C00616; Fri, 8 Oct 2021 18:16:39 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.51]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20211008091639epsmtip19d6a4176ed7c1bc5dc05070de78ccd32~sA3zmS0il0184801848epsmtip1T; Fri, 8 Oct 2021 09:16:39 +0000 (GMT) From: Chanho Park To: Krzysztof Kozlowski , Rob Herring , Linus Walleij Cc: Tomasz Figa , Sylwester Nawrocki , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, Chanho Park Subject: [PATCH v2 2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC Date: Fri, 8 Oct 2021 18:14:42 +0900 Message-Id: <20211008091443.44625-3-chanho61.park@samsung.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211008091443.44625-1-chanho61.park@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: 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evjZo/PbJJKZsxpXr1n7qmzbjGv2otc1j8k5H50fOff9hWUPLT4kciW/3OTcst5wlZ02bzN/ YyCnQ+GzlVrNThF19fOf7taIuCbptEzz6Zk32uK2mf8eJylyuod5NFV9+vniALPvsiD5l1vl U5UmzO8KaVfTLU894Sz+9Nel1c9fCc+Qvd764bRg4T6+Y/UtO2NUkrmTDj+f/zZr+fVUwygW 3Tmn+U7Ofhxi377ir/rRSRoZV9XULpf8Ppa2PDWtQfhM5cc2VvndFQsfbr3D4c3CqeLMf+vU ZruJm/ntnrD6rLrfN+NMh4BSb1leYu2ZlDBtmb171lasFb3DdPBc2z2tl69i1Psu88dJKrEU ZyQaajEXFScCADdi3XnmAgAA X-CMS-MailID: 20211008091640epcas2p1fde9bedf5492db3f35207d118e5d9123 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20211008091640epcas2p1fde9bedf5492db3f35207d118e5d9123 References: <20211008091443.44625-1-chanho61.park@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add minimal support for ExynosAuto v9 SoC[1]. - Enumarate all pinctrl nodes - UART with exynos850 compatible - UFS0 HCI + Phy Like exynos850, this also uses fixed-rate clock nodes until clock driver has been supported. The clock nodes are initialized on bootloader stage thus we don't need to control them so far. [1]: https://www.samsung.com/semiconductor/minisite/exynos/products/automotiveprocessor/exynos-auto-v9/ Signed-off-by: Chanho Park --- .../devicetree/bindings/mfd/syscon.yaml | 1 + .../boot/dts/exynos/exynosautov9-pinctrl.dtsi | 1189 +++++++++++++++++ arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 301 +++++ 3 files changed, 1491 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9.dtsi diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index abe3fd817e0b..75dcbb741010 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -55,6 +55,7 @@ properties: - samsung,exynos4-sysreg - samsung,exynos5-sysreg - samsung,exynos5433-sysreg + - samsung,exynosautov9-sysreg - const: syscon diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi new file mode 100644 index 000000000000..8489b9bea3c9 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi @@ -0,0 +1,1189 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's ExynosAutov9 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2021 Samsung Electronics Co., Ltd. + * + * Samsung's ExynosAutov9 SoC pin-mux and pin-config options are listed as + * device tree nodes in this file. + */ + +#include + +&pinctrl_alive { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + ; + }; + + dp0_hpd_pin: dp0-hpd-pin { + samsung,pins = "gpa1-0"; + samsung,pin-function = ; + }; + + dp1_hpd_pin: dp1-hpd-pin { + samsung,pins = "gpa1-1"; + samsung,pin-function = ; + }; + + gpq0: gpq0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + speedy0_pin: speedy0-pin { + samsung,pins = "gpq0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + speedy1_pin: speedy1-pin { + samsung,pins = "gpa0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_aud { + gpb0: gpb0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb2: gpb2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb3: gpb3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + aud_codec_mclk_pin: aud-codec-mclk-pin { + samsung,pins = "gpb0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_codec_mclk_idle_pin: aud-codec-mclk-idle-pin { + samsung,pins = "gpb0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s0_pins: aud-i2s0-pins { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s0_idle_pins_pins: aud-i2s0-idle-pins-pins { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s1_pins: aud-i2s1-pins { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s1_idle_pins: aud-i2s1-idle-pins { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s2_pins: aud-i2s2-pins { + samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s2_idle_pins: aud-i2s2-idle-pins { + samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s3_pins: aud-i2s3-pins { + samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s3_idle_pins: aud-i2s3-idle-pins { + samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s4_pins: aud-i2s4-pins { + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s4_idle_pins: aud-i2s4-idle-pins { + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s5_pins: aud-i2s5-pins { + samsung,pins = "gpb3-0", "gpb3-1", "gpb3-2", "gpb3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s5_idle_pins: aaud-i2s5-idle-pins { + samsung,pins = "gpb3-0", "gpb3-1", "gpb3-2", "gpb3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s6_pins: aud-i2s6-pins { + samsung,pins = "gpb3-4", "gpb3-5", "gpb3-6", "gpb3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s6_idle_pins: aaud-i2s6-idle-pins { + samsung,pins = "gpb3-4", "gpb3-5", "gpb3-6", "gpb3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_fsys0 { + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + pcie_clkreq0_pin: pcie-clkreq0-pin { + samsung,pins = "gpf0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst0_out_pin: pcie-perst0-out-pin { + samsung,pins = "gpf0-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst0_in_pin: pcie-perst0-in-pin { + samsung,pins = "gpf0-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq1_pin: pcie-clkreq1-pin { + samsung,pins = "gpf0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst1_out_pin: pcie-perst1-out-pin { + samsung,pins = "gpf0-3"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst1_in_pin: pcie-perst1-in-pin { + samsung,pins = "gpf0-3"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq2_pin: pcie-clkreq2-pin { + samsung,pins = "gpf0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst2_out_pin: pcie-perst2-out-pin { + samsung,pins = "gpf0-5"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst2_in_pin: pcie-perst2-in-pin { + samsung,pins = "gpf0-5"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq3_pin: pcie-clkreq3-pin { + samsung,pins = "gpf1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst3_out_pin: pcie-perst3-out-pin { + samsung,pins = "gpf1-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst3_in_pin: pcie-perst3-in-pin { + samsung,pins = "gpf1-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq4_pin: pcie-clkreq4-pin { + samsung,pins = "gpf1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst4_out_pin: pcie-perst4-out-pin { + samsung,pins = "gpf1-3"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst4_in_pin: pcie-perst4-in-pin { + samsung,pins = "gpf1-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq5_pin: pcie-clkreq5-pin { + samsung,pins = "gpf1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst5_out_pin: pcie-perst5-out-pin { + samsung,pins = "gpf1-5"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst5_in_pin: pcie-perst5-in-pin { + samsung,pins = "gpf1-5"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; +}; + +&pinctrl_fsys1 { + gpf8: gpf8 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + sd2_clk_pin: sd2-clk-pin { + samsung,pins = "gpf8-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; + + sd2_cmd_pin: sd2-cmd-pin { + samsung,pins = "gpf8-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; + + sd2_width1_pin: sd2-width1-pin { + samsung,pins = "gpf8-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; + + sd2_width4_pins: sd2-width4-pins { + samsung,pins = "gpf8-3", "gpf8-4", "gpf8-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; +}; + +&pinctrl_fsys2 { + gpf2: gpf2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf3: gpf3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf4: gpf4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf5: gpf5 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf6: gpf6 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + ufs_rst_n_pin: ufs-rst-n-pin { + samsung,pins = "gpf2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_refclk_out_pin: ufs-refclk-out-pin { + samsung,pins = "gpf2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_rst_n_1_pin: ufs-rst-n-1-pin { + samsung,pins = "gpf2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_refclk_out_1_pin: ufs-refclk-out-1-pin { + samsung,pins = "gpf2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + eth0_mdc_mdio_pins: eth0-mdc-mdio-pins { + samsung,pins = "gpf4-5", "gpf4-6"; + samsung,pin-function = ; + }; + + eth0_rgmii_pins: eth0-rgmii-pins { + samsung,pins = "gpf3-1", "gpf3-2", "gpf3-3", "gpf3-4", + "gpf3-5", "gpf3-6", "gpf3-7", "gpf4-0", + "gpf4-1", "gpf4-2", "gpf4-3", "gpf4-4"; + samsung,pin-function = ; + }; + + eth0_pps_out_pin: eth0-pps-out-pin { + samsung,pins = "gpf3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + eth1_mdc_mdio_pins: eth1-mdc-mdio-pins { + samsung,pins = "gpf6-5", "gpf6-6"; + samsung,pin-function = ; + }; + + eth1_rgmii_pins: eth1-rgmii-pins { + samsung,pins = "gpf5-1", "gpf5-2", "gpf5-3", "gpf5-4", + "gpf5-5", "gpf5-6", "gpf5-7", "gpf6-0", + "gpf6-1", "gpf6-2", "gpf6-3", "gpf6-4"; + samsung,pin-function = ; + }; + + eth1_pps_out_pin: eth1-pps-out-pin { + samsung,pins = "gpf5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_peric0 { + gpp0: gpp0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp1: gpp1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp2: gpp2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + pwm_tout0_pin: pwm-tout0-pin { + samsung,pins = "gpg0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + pwm_tout1_pin: pwm-tout1-pin { + samsung,pins = "gpg0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + pwm_tout2_pin: pwm-tout2-pin { + samsung,pins = "gpg0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + pwm_tout3_pin: pwm-tout3-pin { + samsung,pins = "gpg0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI00 */ + hsi2c0_pins: hsi2c0-pins { + samsung,pins = "gpp0-0", "gpp0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI00_I2C */ + hsi2c1_pins: hsi2c1-pins { + samsung,pins = "gpp0-2", "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI01 */ + hsi2c2_pins: hsi2c2-pins { + samsung,pins = "gpp0-4", "gpp0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI01_I2C */ + hsi2c3_pins: hsi2c3-pins { + samsung,pins = "gpp0-6", "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI02 */ + hsi2c4_pins: hsi2c4-pins { + samsung,pins = "gpp1-0", "gpp1-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI02_I2C */ + hsi2c5_pins: hsi2c5-pins { + samsung,pins = "gpp1-2", "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI03 */ + hsi2c6_pins: hsi2c6-pins { + samsung,pins = "gpp1-4", "gpp1-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI03_I2C */ + hsi2c7_pins: hsi2c7-pins { + samsung,pins = "gpp1-6", "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI04 */ + hsi2c8_pins: hsi2c8-pins { + samsung,pins = "gpp2-0", "gpp2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI04_I2C */ + hsi2c9_pins: hsi2c9-pins { + samsung,pins = "gpp2-2", "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI05 */ + hsi2c10_pins: hsi2c10-pins { + samsung,pins = "gpp2-4", "gpp2-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI05_I2C */ + hsi2c11_pins: hsi2c11-pins { + samsung,pins = "gpp2-6", "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI USI_PERIC0_USI00_SPI */ + spi0_pins: spi0-pins { + samsung,pins = "gpp0-2", "gpp0-1", "gpp0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi0_cs_pin: spi0-cs-pin { + samsung,pins = "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi0_cs_func_pin: spi0-cs-func-pin { + samsung,pins = "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI01_SPI */ + spi1_pins: spi1-pins { + samsung,pins = "gpp0-6", "gpp0-5", "gpp0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi1_cs_pin: spi1-cs-pin { + samsung,pins = "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi1_cs_func_pin: spi1-cs-func-pin { + samsung,pins = "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI02_SPI */ + spi2_pins: spi2-pins { + samsung,pins = "gpp1-2", "gpp1-1", "gpp1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi2_cs_pin: spi2-cs-pin { + samsung,pins = "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi2_cs_func_pin: spi2-cs-func-pin { + samsung,pins = "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI03_SPI */ + spi3_pins: spi3-pins { + samsung,pins = "gpp1-6", "gpp1-5", "gpp1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi3_cs_pin: spi3-cs-pin { + samsung,pins = "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi3_cs_func_pin: spi3-cs-func-pin { + samsung,pins = "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI04_SPI */ + spi4_pins: spi4-pins { + samsung,pins = "gpp2-2", "gpp2-1", "gpp2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi4_cs_pin: spi4-cs-pin { + samsung,pins = "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi4_cs_func_pin: spi4-cs-func-pin { + samsung,pins = "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI05_SPI */ + spi5_pins: spi5-pins { + samsung,pins = "gpp2-6", "gpp2-5", "gpp2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi5_cs_pin: spi5-cs-pin { + samsung,pins = "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi5_cs_func_pin: spi5-cs-func-pin { + samsung,pins = "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI00_UART */ + uart0_pins: uart0-pins { + samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart0_dual_pins: uart0-dual-pins { + samsung,pins = "gpp0-0", "gpp0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI01_UART */ + uart1_pins: uart1-pins { + samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart1_dual_pins: uart1-dual-pins { + samsung,pins = "gpp0-4", "gpp0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI02_UART */ + uart2_pins: uart2-pins { + samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart2_dual_pins: uart2-dual-pins { + samsung,pins = "gpp1-0", "gpp1-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI03_UART */ + uart3_pins: uart3-pins { + samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart3_dual_pins: uart3-dual-pins { + samsung,pins = "gpp1-4", "gpp1-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI04_UART */ + uart4_pins: uart4-pins { + samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart4_dual_pins: uart4-dual-pins { + samsung,pins = "gpp2-0", "gpp2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI05_UART */ + uart5_pins: uart5-pins { + samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart5_dual_pins: uart5-dual-pins { + samsung,pins = "gpp2-4", "gpp2-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_peric1 { + gpp3: gpp3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp4: gpp4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp5: gpp5 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg3: gpg3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + /* PERIC1 USI06 */ + hsi2c12_pins: hsi2c12-pins { + samsung,pins = "gpp3-0", "gpp3-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI06_I2C */ + hsi2c13_pins: hsi2c13-pins { + samsung,pins = "gpp3-2", "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI07 */ + hsi2c14_pins: hsi2c14-pins { + samsung,pins = "gpp3-4", "gpp3-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI07_I2C */ + hsi2c15_pins: hsi2c15-pins { + samsung,pins = "gpp3-6", "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI08 */ + hsi2c16_pins: hsi2c16-pins { + samsung,pins = "gpp4-0", "gpp4-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI08_I2C */ + hsi2c17_pins: hsi2c17-pins { + samsung,pins = "gpp4-2", "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI09 */ + hsi2c18_pins: hsi2c18-pins { + samsung,pins = "gpp4-4", "gpp4-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI09_I2C */ + hsi2c19_pins: hsi2c19-pins { + samsung,pins = "gpp4-6", "gpp4-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI10 */ + hsi2c20_pins: hsi2c20-pins { + samsung,pins = "gpp5-0", "gpp5-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI10_I2C */ + hsi2c21_pins: hsi2c21-pins { + samsung,pins = "gpp5-2", "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI11 */ + hsi2c22_pins: hsi2c22-pins { + samsung,pins = "gpp5-4", "gpp5-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI11_I2C */ + hsi2c23_pins: hsi2c23-pins { + samsung,pins = "gpp5-6", "gpp5-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI06_SPI */ + spi6_pins: spi6-pins { + samsung,pins = "gpp3-2", "gpp3-1", "gpp3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi6_cs_pin: spi6-cs-pin { + samsung,pins = "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi6_cs_func_pin: spi6-cs-func-pin { + samsung,pins = "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI07_SPI */ + spi7_pins: spi7-pins { + samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi7_cs_pin: spi7-cs-pin { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi7_cs_func_pin: spi7-cs-func-pin { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI08_SPI */ + spi8_pins: spi8-pins { + samsung,pins = "gpp4-2", "gpp4-1", "gpp4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi8_cs_pin: spi8-cs-pin { + samsung,pins = "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi8_cs_func_pin: spi8-cs-func-pin { + samsung,pins = "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI09_SPI */ + spi9_pins: spi9-pins { + samsung,pins = "gpp4-6", "gpp4-5", "gpp4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi9_cs_pin: spi9-cs-pin { + samsung,pins = "gpp4-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi9_cs_func_pin: spi9-cs-func-pin { + samsung,pins = "gpp4-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI10_SPI */ + spi10_pins: spi10-pins { + samsung,pins = "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi10_cs_pin: spi10-cs-pin { + samsung,pins = "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi10_cs_func_pin: spi10-cs-func-pin { + samsung,pins = "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI11_SPI */ + spi11_pins: spi11-pins { + samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi11_cs_pin: spi11-cs-pin { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi11_cs_func_pin: spi11-cs-func-pin { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* USI_PERIC1_USI06_UART */ + uart6_pins: uart6-pins { + samsung,pins = "gpp3-3", "gpp3-2", "gpp3-1", "gpp3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart6_dual_pins: uart6-dual-pins { + samsung,pins = "gpp3-0", "gpp3-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI07_UART */ + uart7_pins: uart7-pins { + samsung,pins = "gpp3-7", "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart7_dual_pins: uart7-dual-pins { + samsung,pins = "gpp3-4", "gpp3-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI08_UART */ + uart8_pins: uart8-pins { + samsung,pins = "gpp4-3", "gpp4-2", "gpp4-1", "gpp4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart8_dual_pins: uart8-dual-pins { + samsung,pins = "gpp4-0", "gpp4-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI09_UART */ + uart9_pins: uart9-pins { + samsung,pins = "gpp4-7", "gpp4-6", "gpp4-5", "gpp4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart9_dual_pins: uart9-dual-pins { + samsung,pins = "gpp4-4", "gpp4-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI10_UART */ + uart10_pins: uart10-pins { + samsung,pins = "gpp5-3", "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart10_dual_pins: uart10-dual-pins { + samsung,pins = "gpp5-0", "gpp5-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI11_UART */ + uart11_pins: uart11-pins { + samsung,pins = "gpp5-7", "gpp5-6", "gpp5-5", "gpp5-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart11_dual_pins: uart11-dual-pins { + samsung,pins = "gpp5-4", "gpp5-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi new file mode 100644 index 000000000000..58ea392da5c3 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -0,0 +1,301 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's ExynosAuto v9 SoC device tree source + * + * Copyright (c) 2021 Samsung Electronics Co., Ltd. + * + */ + +#include + +/ { + compatible = "samsung,exynosautov9"; + #address-cells = <2>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + aliases { + pinctrl0 = &pinctrl_alive; + pinctrl1 = &pinctrl_aud; + pinctrl2 = &pinctrl_fsys0; + pinctrl3 = &pinctrl_fsys1; + pinctrl4 = &pinctrl_fsys2; + pinctrl5 = &pinctrl_peric0; + pinctrl6 = &pinctrl_peric1; + }; + + arm-pmu { + compatible = "arm,cortex-a76-pmu"; + interrupts = , + , + , + , + , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>, + <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu0: cpu@000000 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@000100 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x100>; + enable-method = "psci"; + }; + + cpu2: cpu@000200 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x200>; + enable-method = "psci"; + }; + + cpu3: cpu@000300 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x300>; + enable-method = "psci"; + }; + + cpu4: cpu@10000 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10000>; + enable-method = "psci"; + }; + + cpu5: cpu@10100 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10100>; + enable-method = "psci"; + }; + + cpu6: cpu@10200 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10200>; + enable-method = "psci"; + }; + + cpu7: cpu@10300 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10300>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + cpu_suspend = <0xc4000001>; + cpu_off = <0x84000002>; + cpu_on = <0xc4000003>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + fixed-rate-clocks { + xtcxo: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + clock-output-names = "oscclk"; + }; + + /* + * Keep the stub clock for serial driver, until proper clock + * driver is implemented. + */ + uart_clock: uart-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <133250000>; + clock-output-names = "uart"; + }; + + /* + * Keep the stub clock for ufs driver, until proper clock + * driver is implemented. + */ + ufs_core_clock: uart-core-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <166562500>; + }; + }; + + soc: soc@0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0x20000000>; + + gic: interrupt-controller@11001000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x10101000 0x1000>, + <0x10102000 0x2000>, + <0x10104000 0x2000>, + <0x10106000 0x2000>; + interrupts = ; + }; + + pinctrl_alive: pinctrl@10450000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x10450000 0x1000>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos7-wakeup-eint"; + }; + }; + + pinctrl_aud: pinctrl@19c60000{ + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x19c60000 0x1000>; + }; + + pinctrl_fsys0: pinctrl@17740000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x17740000 0x1000>; + interrupts = ; + }; + + pinctrl_fsys1: pinctrl@17060000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x17060000 0x1000>; + interrupts = ; + }; + + pinctrl_fsys2: pinctrl@17c30000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x17c30000 0x1000>; + interrupts = ; + }; + + pinctrl_peric0: pinctrl@10230000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x10230000 0x1000>; + interrupts = ; + }; + + pinctrl_peric1: pinctrl@10830000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x10830000 0x1000>; + interrupts = ; + }; + + pmu_system_controller: system-controller@10460000 { + compatible = "samsung,exynos7-pmu", "syscon"; + reg = <0x10460000 0x10000>; + }; + + syscon_fsys2: syscon@17c20000 { + compatible = "samsung,exynosautov9-sysreg", "syscon"; + reg = <0x17c20000 0x1000>; + }; + + /* USI: UART */ + serial_0: uart@103000000 { + compatible = "samsung,exynos850-uart"; + reg = <0x10300000 0x100>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_dual_pins>; + clocks = <&uart_clock>, <&uart_clock>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + ufs_0_phy: ufs0-phy@17e04000 { + compatible = "samsung,exynosautov9-ufs-phy"; + reg = <0x17e04000 0xc00>; + reg-names = "phy-pma"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + clocks = <&xtcxo>; + clock-names = "ref_clk"; + status = "disabled"; + }; + + ufs_0: ufs0@17e00000 { + compatible ="samsung,exynosautov9-ufs"; + + reg = <0x17e00000 0x100>, /* 0: HCI standard */ + <0x17e01100 0x410>, /* 1: Vendor-specific */ + <0x17e80000 0x8000>, /* 2: UNIPRO */ + <0x17dc0000 0x2200>; /* 3: UFS protector */ + reg-names = "hci", "vs_hci", "unipro", "ufsp"; + interrupts = ; + clocks = <&ufs_core_clock>, + <&ufs_core_clock>; + clock-names = "core_clk", "sclk_unipro_main"; + freq-table-hz = <0 0>, <0 0>; + pinctrl-names = "default"; + pinctrl-0 = <&ufs_rst_n_pin &ufs_refclk_out_pin>; + phys = <&ufs_0_phy>; + phy-names = "ufs-phy"; + samsung,sysreg = <&syscon_fsys2>; + samsung,ufs-shareability-reg-offset = <0x710>; + status = "disabled"; + }; + }; +}; + +#include "exynosautov9-pinctrl.dtsi" From patchwork Fri Oct 8 09:14:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanho Park X-Patchwork-Id: 12544671 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6339C43217 for ; Fri, 8 Oct 2021 09:16:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AF53B60E53 for ; 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Fri, 8 Oct 2021 18:16:39 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.51]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20211008091639epsmtip1917064cfc30fd82251c531bfff223e09~sA3zqKyTV0190601906epsmtip1S; Fri, 8 Oct 2021 09:16:39 +0000 (GMT) From: Chanho Park To: Krzysztof Kozlowski , Rob Herring , Linus Walleij Cc: Tomasz Figa , Sylwester Nawrocki , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, Chanho Park Subject: [PATCH v2 3/3] arm64: dts: exynos: add minimal support for exynosautov9 sadk board Date: Fri, 8 Oct 2021 18:14:43 +0900 Message-Id: <20211008091443.44625-4-chanho61.park@samsung.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211008091443.44625-1-chanho61.park@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprCJsWRmVeSWpSXmKPExsWy7bCmqW4FT0KiwY03yhaX92tbzD9yjtVi 49sfTBZT/ixnsphxfh+TReveI+wWh9+0s1qs2vWH0YHDY1ZDL5vHzll32T02repk87hzbQ+b R9+WVYwenzfJBbBFZdtkpCampBYppOYl56dk5qXbKnkHxzvHm5oZGOoaWlqYKynkJeam2iq5 +AToumXmAN2jpFCWmFMKFApILC5W0rezKcovLUlVyMgvLrFVSi1IySkwL9ArTswtLs1L18tL LbEyNDAwMgUqTMjO2HtbraBRouLX3rvsDYxHhLsYOTkkBEwkHv98wNbFyMUhJLCDUeL6kbdM EM4nRokF+xewQjjfGCVaXqxi72LkAGvpuWID0i0ksJdR4tlDH4iaj4wSt468YwNJsAnoSmx5 /ooRJCEi0MkosfLbNiaQBLPAAUaJLRfsQGxhgViJ/lsvwRpYBFQlmq+9YAGxeQXsJE6+3ckI cZ+8xJFfncwgNqeAvcTR9m5GiBpBiZMzn7BAzJSXaN46mxlkmYTAV3aJhRf2sUM0u0h8XbKX GcIWlnh1fAtUXEriZX8bO0RDN6NE66P/UInVjBKdjT4Qtr3Er+lbWEFeZhbQlFi/Sx/ie2WJ I7eg9vJJdBz+Cw0UXomONiGIRnWJA9uns0DYshLdcz6zQtgeEg1X/jBDAmsSo8SF7wuZJjAq zELyziwk78xCWLyAkXkVo1hqQXFuemqxUYEJPIKT83M3MYKTp5bHDsbZbz/oHWJk4mA8xCjB wawkwptvH5soxJuSWFmVWpQfX1Sak1p8iNEUGNgTmaVEk/OB6TuvJN7QxNLAxMzM0NzI1MBc SZx37j+nRCGB9MSS1OzU1ILUIpg+Jg5OqQamWYX/OG5XVv0P4d+0JTr4s8s/vvriKPF9KWpW Ffm6N06/dStXDTaxCTE7v1Jh4eQje1iip6xQuHtUe9HzeJ7vd1/1tts212ezSDVmrTL6n7Xi pFeugOODfg0v5pwja0RPdPnpSG+dJZLF/Wnus5ffak553fEseuWg8pw5RCxl/tYYwQCHy8/6 175rc/lna+jsP7HGZtJNU57vr1+kbgnIvH1ofnLSjzXPBNvXX1TIq54zL0d8w9rM3Revzk6p f9Uj80C4gqWob+fKWa8PSCUlT3Gax+R8Q7z3iM+S3oJNoWH8TfMqsrl9Zfdrc98oT7uqFLv9 88fw9qk7++YkR4qGrHK2CZJ56W34MnDiRw0lluKMREMt5qLiRACuHKTGJwQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrALMWRmVeSWpSXmKPExsWy7bCSnG45T0KiweZp2haX92tbzD9yjtVi 49sfTBZT/ixnsphxfh+TReveI+wWh9+0s1qs2vWH0YHDY1ZDL5vHzll32T02repk87hzbQ+b R9+WVYwenzfJBbBFcdmkpOZklqUW6dslcGXsva1W0ChR8WvvXfYGxiPCXYwcHBICJhI9V2y6 GLk4hAR2M0o8XbydpYuREyguK/Hs3Q52CFtY4n7LEVaIoveMEv2fXjGCJNgEdCW2PAexuThE BLqBEo29TCAOs8ARRon/33+BjRIWiJb42XMSrINFQFWi+doLsDivgJ3Eybc7GSFWyEsc+dXJ DGJzCthLHG3vBosLAdU8ebEZql5Q4uTMJ2A2M1B989bZzBMYBWYhSc1CklrAyLSKUTK1oDg3 PbfYsMAwL7Vcrzgxt7g0L10vOT93EyM40LU0dzBuX/VB7xAjEwfjIUYJDmYlEd58+9hEId6U xMqq1KL8+KLSnNTiQ4zSHCxK4rwXuk7GCwmkJ5akZqemFqQWwWSZODilGpiOZaZN530vtygk aAfnvg/XFgp632lX50ietCrbpG5/90qj4Ika9y/8ftks6eI2u9Trb5Wqzjp+53RNM5Z/CXqq 9nI/ujlXz9mW5y23Ry7DwoX9gNIp+02cy8ynb1xy5/A/e2lVntQ3PL6h912b76n+nfGr1maP m98D77U3/ln+W175btcW90vCT1ReeXoknzZdyqAd8K1Q6cDdn49nyX76fLU68+yXUq33ZfNe /LC532j1N2xzk4zIurW7K+NkXpv7cu9USlvdGawlO+vXnWVr79tFXJ1/3nEq24NpHtuMTi9f zBMbGe0lubio16Kdp3ayx7Ojn57sfnqgVypBbT+vyjEOndbD7tKZ567qbn2txFKckWioxVxU nAgA+xMys+MCAAA= X-CMS-MailID: 20211008091640epcas2p280fb1bce16ebff863f6ae4db66b2b240 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20211008091640epcas2p280fb1bce16ebff863f6ae4db66b2b240 References: <20211008091443.44625-1-chanho61.park@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org SADK(Samsung Automotive Development Kit) is the development kit to evaluate Exynos Auto v9 SoC. It has 16GB LPDDR4 DRAM and two 256GB Samsung UFS. This patch enables only serial console and ufs0 device. Signed-off-by: Chanho Park --- .../bindings/arm/samsung/samsung-boards.yaml | 6 ++ arch/arm64/boot/dts/exynos/Makefile | 3 +- .../boot/dts/exynos/exynosautov9-sadk.dts | 56 +++++++++++++++++++ 3 files changed, 64 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index 0796f0c87727..ef6dc14be4b5 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -199,6 +199,12 @@ properties: - samsung,exynos7-espresso # Samsung Exynos7 Espresso - const: samsung,exynos7 + - description: Exynos Auto v9 based boards + items: + - enum: + - samsung,exynosautov9-sadk # Samsung Exynos Auto v9 SADK + - const: samsung,exynosautov9 + required: - compatible diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile index e0a2facde6a2..b41e86df0a84 100644 --- a/arch/arm64/boot/dts/exynos/Makefile +++ b/arch/arm64/boot/dts/exynos/Makefile @@ -2,4 +2,5 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \ exynos5433-tm2.dtb \ exynos5433-tm2e.dtb \ - exynos7-espresso.dtb + exynos7-espresso.dtb \ + exynosautov9-sadk.dtb diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts new file mode 100644 index 000000000000..ef46d7aa6e28 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung ExynosAutov9 SADK board device tree source + * + * Copyright (c) 2021 Samsung Electronics Co., Ltd. + * + */ + +/dts-v1/; +#include "exynosautov9.dtsi" +#include + +/ { + model = "Samsung ExynosAuto v9 SADK board"; + compatible = "samsung,exynosautov9-sadk", "samsung,exynosautov9"; + + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &serial_0; + }; + + chosen { + stdout-path = &serial_0; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x77000000>, + <0x8 0x80000000 0x1 0x7ba00000>, + <0xa 0x00000000 0x2 0x00000000>; + }; + + ufs_0_fixed_vcc_reg: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "ufs-vcc"; + gpio = <&gpq0 1 GPIO_ACTIVE_HIGH>; + regulator-boot-on; + enable-active-high; + }; +}; + +&serial_0 { + status = "okay"; +}; + +&ufs_0_phy { + status = "okay"; +}; + +&ufs_0 { + status = "okay"; + vcc-supply = <&ufs_0_fixed_vcc_reg>; + vcc-fixed-regulator; +};