From patchwork Sun Oct 10 03:22:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanho Park X-Patchwork-Id: 12548239 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67DBEC43219 for ; Sun, 10 Oct 2021 03:25:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 423EE60F6D for ; Sun, 10 Oct 2021 03:25:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229907AbhJJD1F (ORCPT ); Sat, 9 Oct 2021 23:27:05 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:48814 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229916AbhJJD1E (ORCPT ); Sat, 9 Oct 2021 23:27:04 -0400 Received: from epcas2p2.samsung.com (unknown [182.195.41.54]) by mailout3.samsung.com (KnoxPortal) with ESMTP id 20211010032505epoutp0361556373c28ba1cf8430dbfd2ab7f2c9~sjXaJ88zO1128411284epoutp03D for ; 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Sun, 10 Oct 2021 12:24:57 +0900 (KST) Received: from epsmtrp1.samsung.com (unknown [182.195.40.13]) by epcas2p2.samsung.com (KnoxPortal) with ESMTPA id 20211010032456epcas2p2b56e49dcc5973224b26725cb8b7589b3~sjXSVgB_A2883828838epcas2p2f; Sun, 10 Oct 2021 03:24:56 +0000 (GMT) Received: from epsmgms1p2.samsung.com (unknown [182.195.42.42]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20211010032456epsmtrp1e04cb32b0896aafb3d3035b05f1bc9e3~sjXSUwy8o3229632296epsmtrp1R; Sun, 10 Oct 2021 03:24:56 +0000 (GMT) X-AuditID: b6c32a47-d29ff70000002615-6b-61625d096c48 Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgms1p2.samsung.com (Symantec Messaging Gateway) with SMTP id B6.85.08750.80D52616; Sun, 10 Oct 2021 12:24:56 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.51]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20211010032456epsmtip2c297855b8290045ab91a5a9e68326795~sjXSH5WgA1204912049epsmtip2y; Sun, 10 Oct 2021 03:24:56 +0000 (GMT) From: Chanho Park To: Krzysztof Kozlowski , Rob Herring , Linus Walleij Cc: Tomasz Figa , Sylwester Nawrocki , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, Chanho Park , Lee Jones Subject: [PATCH v3 1/3] dt-bindings: mfd: add samsung,exynosautov9-sysreg compatible Date: Sun, 10 Oct 2021 12:22:44 +0900 Message-Id: <20211010032246.146939-2-chanho61.park@samsung.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211010032246.146939-1-chanho61.park@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprNJsWRmVeSWpSXmKPExsWy7bCmqS5nbFKiwe7N4haX92tbzD9yjtVi 49sfTBb3vx5ltJjyZzmTxYzz+5gsWvceYbc4/Kad1WLVrj+MDpwesxp62Tx2zrrL7rFpVSeb x51re9g8+rasYvT4vEkugC0q2yYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJcSSEv MTfVVsnFJ0DXLTMH6CglhbLEnFKgUEBicbGSvp1NUX5pSapCRn5xia1SakFKToF5gV5xYm5x aV66Xl5qiZWhgYGRKVBhQnbG2gubmQumslVcOnGPsYHxK0sXIyeHhICJxLNVe5m6GLk4hAR2 MErsnr2dHcL5xCgx+1UbK0iVkMBnRonm19UwHduaT7FBFO1ilPg//RyU85FR4vHr92Bz2QR0 JbY8f8UIkhAR6GSUWPltG9gSZoEnjBJdN68wg1QJC4RJvGlexgRiswioSix5/hwszitgL7H3 8BU2iH3yEkd+dYLFOQUcJCZ03YOqEZQ4OfMJ2DZmoJrmrbOZQRZICDRySGy8+IAdotlF4s6W h1C2sMSr41ugbCmJl/1t7BAN3YwSrY/+QyVWM0p0NvpA2PYSv6ZvAYYAB9AGTYn1u/RBTAkB ZYkjt6D28kl0HP7LDhHmlehoE4JoVJc4sH06NIBlJbrnfGaFsD0k9q2ZAg3SyYwS//7WTmBU mIXkm1lIvpmFsHcBI/MqRrHUguLc9NRiowJjeBQn5+duYgSnUi33HYwz3n7QO8TIxMF4iFGC g1lJhFfLJDFRiDclsbIqtSg/vqg0J7X4EKMpMKwnMkuJJucDk3leSbyhiaWBiZmZobmRqYG5 kjjv3H9OiUIC6YklqdmpqQWpRTB9TBycUg1Ma1YquAo/cFj0xSjA7vXsto2+N6Jsni92TVyz ZVG70/99DVbiUxKubuxlV83ZyuZrv0fTsz/dfG1in2qtvuoavnUhE7136L9ZqSnQ58u5orgs cFnZLa9fdUe96nb6eh49klk003j/w4/bmc45HLNL7IqOlV3z3XlVVN6x2de8b0aeOKd/uP1S yOP3UdxRrS9fzbIKiosPmyBbzPNIrc+kOSkm/dayCZNufDfJzGzP3+kVbb5AfCfrvzANxtse N8SCH67+0CJXukb60/wtOjNefZwzKZVB8dgvh9mZCzeL1bkUzKrxyepMKt68SDv32a1ygzc6 HxLEmHc+2dkk1qZqJcz+XNZzSWWTpff/aWeVWIozEg21mIuKEwEiviJFLgQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGLMWRmVeSWpSXmKPExsWy7bCSvC5HbFKiQedZNYvL+7Ut5h85x2qx 8e0PJov7X48yWkz5s5zJYsb5fUwWrXuPsFscftPOarFq1x9GB06PWQ29bB47Z91l99i0qpPN 4861PWwefVtWMXp83iQXwBbFZZOSmpNZllqkb5fAlbH2wmbmgqlsFZdO3GNsYPzK0sXIySEh YCKxrfkUWxcjF4eQwA5GibmrLrJCJGQlnr3bwQ5hC0vcbznCClH0nlHiQ8stsASbgK7Eluev GEESIgLdjBL9jb1MIA6zwAtGiaV/9gNVcXAIC4RI9L/RBmlgEVCVWPL8OTOIzStgL7H38BU2 iA3yEkd+dYLFOQUcJCZ03QOzhYBqetY/YYKoF5Q4OfMJ2NnMQPXNW2czT2AUmIUkNQtJagEj 0ypGydSC4tz03GLDAqO81HK94sTc4tK8dL3k/NxNjOCg19Lawbhn1Qe9Q4xMHIyHGCU4mJVE eLVMEhOFeFMSK6tSi/Lji0pzUosPMUpzsCiJ817oOhkvJJCeWJKanZpakFoEk2Xi4JRqYFp9 Z3lYzUeNO25VtieV3Q0bPh7OSbw0cX3GjaoLBpUxFiYvLXQ9Pxon3feed0eh6Zbnt6SYna+O vP2qx2PJcXzBbWapbluP462uJtK/Dzy6+Tt5Trg3x9GPpZc3N7+8dsearWit2v9XhXqZN1r/ PDt2rOEMt/Y13si1Px9nPVx22cah9cMbY8FVIZWmsxvz8/LPCFV+3n1cap5DZpCX1OOIl0rN 8wXfpOXcMyhpunH7hPyLg6b6uyNCXaY37TErDmBJSZ4+c4K9f6bsCSsGhX0dtWvMDrHae386 L8xYtK397cZtihw/J8jX1ws/Dq0+aDV/y+81yypPN1cXTrgveOmVpsbG23kKR/6/PfJSOFGJ pTgj0VCLuag4EQCKVQTi6QIAAA== X-CMS-MailID: 20211010032456epcas2p2b56e49dcc5973224b26725cb8b7589b3 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20211010032456epcas2p2b56e49dcc5973224b26725cb8b7589b3 References: <20211010032246.146939-1-chanho61.park@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add document Samsung's Exynos Auto v9 compatible for system registers. Cc: Lee Jones Signed-off-by: Chanho Park Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index abe3fd817e0b..75dcbb741010 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -55,6 +55,7 @@ properties: - samsung,exynos4-sysreg - samsung,exynos5-sysreg - samsung,exynos5433-sysreg + - samsung,exynosautov9-sysreg - const: syscon From patchwork Sun Oct 10 03:22:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanho Park X-Patchwork-Id: 12548235 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E7FBC433F5 for ; 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Sun, 10 Oct 2021 03:24:56 +0000 (GMT) Received: from epsmgms1p2.samsung.com (unknown [182.195.42.42]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20211010032456epsmtrp121d31102f58913582c5cc87803794c3b~sjXSZTmFj3229632296epsmtrp1S; Sun, 10 Oct 2021 03:24:56 +0000 (GMT) X-AuditID: b6c32a48-d75ff70000002500-96-61625d0908ff Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgms1p2.samsung.com (Symantec Messaging Gateway) with SMTP id 47.85.08750.80D52616; Sun, 10 Oct 2021 12:24:56 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.51]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20211010032456epsmtip2c0669619c54b100d34a7f8b2156dc9d8~sjXSNme9R1129311293epsmtip20; Sun, 10 Oct 2021 03:24:56 +0000 (GMT) From: Chanho Park To: Krzysztof Kozlowski , Rob Herring , Linus Walleij Cc: Tomasz Figa , Sylwester Nawrocki , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, Chanho Park Subject: [PATCH v3 2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC Date: Sun, 10 Oct 2021 12:22:45 +0900 Message-Id: <20211010032246.146939-3-chanho61.park@samsung.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211010032246.146939-1-chanho61.park@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprBJsWRmVeSWpSXmKPExsWy7bCmuS5nbFKiwfYvWhaX92tbzD9yjtVi 49sfTBZT/ixnsphxfh+TReveI+wWh9+0s1qs2vWH0YHDY1ZDL5vHzll32T02repk87hzbQ+b R9+WVYwenzfJBbBFZdtkpCampBYppOYl56dk5qXbKnkHxzvHm5oZGOoaWlqYKynkJeam2iq5 +AToumXmAN2jpFCWmFMKFApILC5W0rezKcovLUlVyMgvLrFVSi1IySkwL9ArTswtLs1L18tL LbEyNDAwMgUqTMjOaFxxiLXg8RmmipbulWwNjLv6mboYOTkkBEwkzjxYxAJiCwnsYJRYM1O1 i5ELyP7EKPH9+RwWCOczo8SLp7NYYTp2T94MldjFKPHo6hw2COcjo8TCV9cZQarYBHQltjx/ xQiSEBHoZJRY+W0b2EJmgQOMElsu2IHYwgJhErN/3ARbziKgKrFu0gdmEJtXwF5iw8o2qAPl JY786gSLcwo4SEzougdVIyhxcuYTFoiZ8hLNW2czgyyTEPjJLrFv6nKoZheJ5/0bGCFsYYlX x7ewQ9hSEi/729ghGroZJVof/YdKrGaU6Gz0gbDtJX5N3wL0NAfQBk2J9bv0QUwJAWWJI7eg 9vJJdBz+yw4R5pXoaBOCaFSXOLB9OguELSvRPeczNOQ8JB7fa4OG3GRGiQ9TNrNPYFSYheSd WUjemYWweAEj8ypGsdSC4tz01GKjAhN4JCfn525iBCdRLY8djLPfftA7xMjEwXiIUYKDWUmE V8skMVGINyWxsiq1KD++qDQntfgQoykwsCcyS4km5wPTeF5JvKGJpYGJmZmhuZGpgbmSOO/c f06JQgLpiSWp2ampBalFMH1MHJxSDUynZgjemLblRMuW7B8a35ce/n577so4tWervznP6l36 wZb5Wn/PiqyW97PKJfnWWRVfsG/Ov/sy3Hk3n8x3xX5+J+Gqsy0vn6bta744Z+XszsVSxwP8 9++W6rmRxfrX8Nn16dsY680PzP1ct+1E5pFZCa7b8pynu2lkVm5rSI6rLPDabnak/mmRcQJv oOfZN5tPr2xRSPNclK/44vGsBxsdz+8TOfXDxeDKg013Vb8b8ZSu+DWtY8+vS89uxmpFuF/+ HjY7Un/OQlduh8pdaVtKrgmc5KgUTpAx4s3pv8cxb671jw93Vj86evV8dmdH9tL9K4rv9vdl PZnztXTfhUuzK5xDLM8skg+9+VfJ8ePkCiWW4oxEQy3mouJEAPOa7s8rBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrCLMWRmVeSWpSXmKPExsWy7bCSvC5HbFKiwZnZ2haX92tbzD9yjtVi 49sfTBZT/ixnsphxfh+TReveI+wWh9+0s1qs2vWH0YHDY1ZDL5vHzll32T02repk87hzbQ+b R9+WVYwenzfJBbBFcdmkpOZklqUW6dslcGU0rjjEWvD4DFNFS/dKtgbGXf1MXYycHBICJhK7 J29m6WLk4hAS2MEo8fP8D2aIhKzEs3c72CFsYYn7LUdYIYreM0pMXHGVESTBJqArseX5K0aQ hIhAN6NEf2MvE4jDLHCEUeL/918sIFXCAiESq39cA+tgEVCVWDfpA9gKXgF7iQ0r26DukJc4 8qsTLM4p4CAxoesemC0EVNOz/gkTRL2gxMmZT8BmMgPVN2+dzTyBUWAWktQsJKkFjEyrGCVT C4pz03OLDQuM8lLL9YoTc4tL89L1kvNzNzGCA15LawfjnlUf9A4xMnEwHmKU4GBWEuHVMklM FOJNSaysSi3Kjy8qzUktPsQozcGiJM57oetkvJBAemJJanZqakFqEUyWiYNTqoGpM+FCzLO6 5dW9MpbqzSE9+Xbvj3fte8mW+GdV6VnJz4Y+zu8UWk/uPV0jcU21cdf1h7avdoh/c1+kLyRy SUJUcXHQn7nzHwVu9Xu067XN96b47VrMp4J6GCeXRtstWTBhVnVF1/SYKSq8PV7xU3d7ePzS EE5c1MD8OPdqxf0TnrPezUw4tv52s8Z8d6bHCfZG3JOzDMy3X31yYElghaJ+3OFUixNL/z6s ZohqWPj9KIeOz1l58ZqmP/9Vq6Uy90l7J159tnZPhtC7ZYZ2mala37T6FK+tvBW1O3263/YL r2dNdzGzPrr9zdfYqv5IVSZvp0iVYO4jT4RYJu177fk7+cjKS5oaU73LItolkoOVWIozEg21 mIuKEwFXHwA35wIAAA== X-CMS-MailID: 20211010032456epcas2p29de8e098493cbe21a08db86d8253787e X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20211010032456epcas2p29de8e098493cbe21a08db86d8253787e References: <20211010032246.146939-1-chanho61.park@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add minimal support for ExynosAuto v9 SoC[1]. - Enumarate all pinctrl nodes - UART with exynos850 compatible - UFS0 HCI + Phy Like exynos850, this also uses fixed-rate clock nodes until clock driver has been supported. The clock nodes are initialized on bootloader stage thus we don't need to control them so far. [1]: https://www.samsung.com/semiconductor/minisite/exynos/products/automotiveprocessor/exynos-auto-v9/ Signed-off-by: Chanho Park --- .../boot/dts/exynos/exynosautov9-pinctrl.dtsi | 1189 +++++++++++++++++ arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 301 +++++ 2 files changed, 1490 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi new file mode 100644 index 000000000000..bef0942fd75b --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi @@ -0,0 +1,1189 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's ExynosAutov9 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2021 Samsung Electronics Co., Ltd. + * + * Samsung's ExynosAutov9 SoC pin-mux and pin-config options are listed as + * device tree nodes in this file. + */ + +#include + +&pinctrl_alive { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + ; + }; + + dp0_hpd: dp0-hpd-pins { + samsung,pins = "gpa1-0"; + samsung,pin-function = ; + }; + + dp1_hpd: dp1-hpd-pins { + samsung,pins = "gpa1-1"; + samsung,pin-function = ; + }; + + gpq0: gpq0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + speedy0_bus: speedy0-bus-pins { + samsung,pins = "gpq0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + speedy1_bus: speedy1-bus-pins { + samsung,pins = "gpa0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_aud { + gpb0: gpb0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb2: gpb2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb3: gpb3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + aud_codec_mclk: aud-codec-mclk-pins { + samsung,pins = "gpb0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_codec_mclk_idle: aud-codec-mclk-idle-pins { + samsung,pins = "gpb0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s0_bus: aud-i2s0-pins { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s0_idle: aud-i2s0-idle-pins { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s1_bus: aud-i2s1-pins { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s1_idle: aud-i2s1-idle-pins { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s2_bus: aud-i2s2-pins { + samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s2_idle: aud-i2s2-idle-pins { + samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s3_bus: aud-i2s3-pins { + samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s3_idle: aud-i2s3-idle-pins { + samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s4_bus: aud-i2s4-pins { + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s4_idle: aud-i2s4-idle-pins { + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s5_bus: aud-i2s5-pins { + samsung,pins = "gpb3-0", "gpb3-1", "gpb3-2", "gpb3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s5_idle: aaud-i2s5-idle-pins { + samsung,pins = "gpb3-0", "gpb3-1", "gpb3-2", "gpb3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s6_bus: aud-i2s6-pins { + samsung,pins = "gpb3-4", "gpb3-5", "gpb3-6", "gpb3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s6_idle: aaud-i2s6-idle-pins { + samsung,pins = "gpb3-4", "gpb3-5", "gpb3-6", "gpb3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_fsys0 { + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + pcie_clkreq0: pcie-clkreq0-pins { + samsung,pins = "gpf0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst0_out: pcie-perst0-out-pins { + samsung,pins = "gpf0-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst0_in: pcie-perst0-in-pins { + samsung,pins = "gpf0-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq1: pcie-clkreq1-pins { + samsung,pins = "gpf0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst1_out: pcie-perst1-out-pins { + samsung,pins = "gpf0-3"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst1_in: pcie-perst1-in-pins { + samsung,pins = "gpf0-3"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq2: pcie-clkreq2-pins { + samsung,pins = "gpf0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst2_out: pcie-perst2-out-pins { + samsung,pins = "gpf0-5"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst2_in: pcie-perst2-in-pins { + samsung,pins = "gpf0-5"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq3: pcie-clkreq3-pins { + samsung,pins = "gpf1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst3_out: pcie-perst3-out-pins { + samsung,pins = "gpf1-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst3_in: pcie-perst3-in-pins { + samsung,pins = "gpf1-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq4: pcie-clkreq4-pins { + samsung,pins = "gpf1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst4_out: pcie-perst4-out-pins { + samsung,pins = "gpf1-3"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst4_in: pcie-perst4-in-pins { + samsung,pins = "gpf1-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq5: pcie-clkreq5-pins { + samsung,pins = "gpf1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst5_out: pcie-perst5-out-pins { + samsung,pins = "gpf1-5"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst5_in: pcie-perst5-in-pins { + samsung,pins = "gpf1-5"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; +}; + +&pinctrl_fsys1 { + gpf8: gpf8 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + sd2_clk: sd2-clk-pins { + samsung,pins = "gpf8-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; + + sd2_cmd: sd2-cmd-pins { + samsung,pins = "gpf8-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; + + sd2_bus1: sd2-bus-width1-pins { + samsung,pins = "gpf8-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; + + sd2_bus4: sd2-bus-width4-pins { + samsung,pins = "gpf8-3", "gpf8-4", "gpf8-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; +}; + +&pinctrl_fsys2 { + gpf2: gpf2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf3: gpf3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf4: gpf4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf5: gpf5 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf6: gpf6 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + ufs_rst_n: ufs-rst-n-pins { + samsung,pins = "gpf2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_refclk_out: ufs-refclk-out-pins { + samsung,pins = "gpf2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_rst_n_1: ufs-rst-n-1-pins { + samsung,pins = "gpf2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_refclk_out_1: ufs-refclk-out-1-pins { + samsung,pins = "gpf2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + eth0_mdc_mdio: eth0-mdc-mdio-pins { + samsung,pins = "gpf4-5", "gpf4-6"; + samsung,pin-function = ; + }; + + eth0_rgmii: eth0-rgmii-pins { + samsung,pins = "gpf3-1", "gpf3-2", "gpf3-3", "gpf3-4", + "gpf3-5", "gpf3-6", "gpf3-7", "gpf4-0", + "gpf4-1", "gpf4-2", "gpf4-3", "gpf4-4"; + samsung,pin-function = ; + }; + + eth0_pps_out: eth0-pps-out-pins { + samsung,pins = "gpf3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + eth1_mdc_mdio: eth1-mdc-mdio-pins { + samsung,pins = "gpf6-5", "gpf6-6"; + samsung,pin-function = ; + }; + + eth1_rgmii: eth1-rgmii-pins { + samsung,pins = "gpf5-1", "gpf5-2", "gpf5-3", "gpf5-4", + "gpf5-5", "gpf5-6", "gpf5-7", "gpf6-0", + "gpf6-1", "gpf6-2", "gpf6-3", "gpf6-4"; + samsung,pin-function = ; + }; + + eth1_pps_out: eth1-pps-out-pins { + samsung,pins = "gpf5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_peric0 { + gpp0: gpp0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp1: gpp1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp2: gpp2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + pwm_tout0: pwm-tout0-pins { + samsung,pins = "gpg0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + pwm_tout1: pwm-tout1-pins { + samsung,pins = "gpg0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + pwm_tout2: pwm-tout2-pins { + samsung,pins = "gpg0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + pwm_tout3: pwm-tout3-pins { + samsung,pins = "gpg0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI00 */ + hsi2c0_bus: hsi2c0-bus-pins { + samsung,pins = "gpp0-0", "gpp0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI00_I2C */ + hsi2c1_bus: hsi2c1-bus-pins { + samsung,pins = "gpp0-2", "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI01 */ + hsi2c2_bus_pins: hsi2c2-bus-pins { + samsung,pins = "gpp0-4", "gpp0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI01_I2C */ + hsi2c3_bus_pins: hsi2c3-bus-pins { + samsung,pins = "gpp0-6", "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI02 */ + hsi2c4_bus: hsi2c4-bus-pins { + samsung,pins = "gpp1-0", "gpp1-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI02_I2C */ + hsi2c5_bus: hsi2c5-bus-pins { + samsung,pins = "gpp1-2", "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI03 */ + hsi2c6_bus: hsi2c6-bus-pins { + samsung,pins = "gpp1-4", "gpp1-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI03_I2C */ + hsi2c7_bus: hsi2c7-bus-pins { + samsung,pins = "gpp1-6", "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI04 */ + hsi2c8_bus: hsi2c8-bus-pins { + samsung,pins = "gpp2-0", "gpp2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI04_I2C */ + hsi2c9_bus: hsi2c9-bus-pins { + samsung,pins = "gpp2-2", "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI05 */ + hsi2c10_bus: hsi2c10-bus-pins { + samsung,pins = "gpp2-4", "gpp2-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI05_I2C */ + hsi2c11_bus: hsi2c11-bus-pins { + samsung,pins = "gpp2-6", "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI USI_PERIC0_USI00_SPI */ + spi0_bus: spi0-bus-pins { + samsung,pins = "gpp0-2", "gpp0-1", "gpp0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi0_cs: spi0-cs-pins { + samsung,pins = "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi0_cs_func: spi0-cs-func-pins { + samsung,pins = "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI01_SPI */ + spi1_bus: spi1-bus-pins { + samsung,pins = "gpp0-6", "gpp0-5", "gpp0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi1_cs: spi1-cs-pins { + samsung,pins = "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi1_cs_func: spi1-cs-func-pins { + samsung,pins = "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI02_SPI */ + spi2_bus: spi2-bus-pins { + samsung,pins = "gpp1-2", "gpp1-1", "gpp1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi2_cs: spi2-cs-pins { + samsung,pins = "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi2_cs_func: spi2-cs-func-pins { + samsung,pins = "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI03_SPI */ + spi3_bus: spi3-bus-pins { + samsung,pins = "gpp1-6", "gpp1-5", "gpp1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi3_cs: spi3-cs-pins { + samsung,pins = "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi3_cs_func: spi3-cs-func-pins { + samsung,pins = "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI04_SPI */ + spi4_bus: spi4-bus-pins { + samsung,pins = "gpp2-2", "gpp2-1", "gpp2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi4_cs: spi4-cs-pins { + samsung,pins = "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi4_cs_func: spi4-cs-func-pins { + samsung,pins = "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI05_SPI */ + spi5_bus: spi5-bus-pins { + samsung,pins = "gpp2-6", "gpp2-5", "gpp2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi5_cs: spi5-cs-pins { + samsung,pins = "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi5_cs_func: spi5-cs-func-pins { + samsung,pins = "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI00_UART */ + uart0_bus: uart0-bus-pins { + samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart0_bus_dual: uart0-bus-dual-pins { + samsung,pins = "gpp0-0", "gpp0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI01_UART */ + uart1_bus: uart1-bus-pins { + samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart1_bus_dual: uart1-bus-dual-pins { + samsung,pins = "gpp0-4", "gpp0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI02_UART */ + uart2_bus: uart2-bus-pins { + samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart2_bus_dual: uart2-bus-dual-pins { + samsung,pins = "gpp1-0", "gpp1-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI03_UART */ + uart3_bus: uart3-bus-pins { + samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart3_bus_dual: uart3-bus-dual-pins { + samsung,pins = "gpp1-4", "gpp1-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI04_UART */ + uart4_bus: uart4-bus-pins { + samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart4_bus_dual: uart4-bus-dual-pins { + samsung,pins = "gpp2-0", "gpp2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI05_UART */ + uart5_bus: uart5-bus-pins { + samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart5_bus_dual: uart5-bus-dual-pins { + samsung,pins = "gpp2-4", "gpp2-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_peric1 { + gpp3: gpp3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp4: gpp4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp5: gpp5 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg3: gpg3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + /* PERIC1 USI06 */ + hsi2c12_bus: hsi2c12-bus-pins { + samsung,pins = "gpp3-0", "gpp3-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI06_I2C */ + hsi2c13_bus: hsi2c13-bus-pins { + samsung,pins = "gpp3-2", "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI07 */ + hsi2c14_bus: hsi2c14-bus-pins { + samsung,pins = "gpp3-4", "gpp3-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI07_I2C */ + hsi2c15_bus: hsi2c15-bus-pins { + samsung,pins = "gpp3-6", "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI08 */ + hsi2c16_bus: hsi2c16-bus-pins { + samsung,pins = "gpp4-0", "gpp4-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI08_I2C */ + hsi2c17_bus: hsi2c17-bus-pins { + samsung,pins = "gpp4-2", "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI09 */ + hsi2c18_bus: hsi2c18-bus-pins { + samsung,pins = "gpp4-4", "gpp4-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI09_I2C */ + hsi2c19_bus: hsi2c19-bus-pins { + samsung,pins = "gpp4-6", "gpp4-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI10 */ + hsi2c20_bus: hsi2c20-bus-pins { + samsung,pins = "gpp5-0", "gpp5-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI10_I2C */ + hsi2c21_bus: hsi2c21-bus-pins { + samsung,pins = "gpp5-2", "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI11 */ + hsi2c22_bus: hsi2c22-bus-pins { + samsung,pins = "gpp5-4", "gpp5-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI11_I2C */ + hsi2c23_bus: hsi2c23-bus-pins { + samsung,pins = "gpp5-6", "gpp5-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI06_SPI */ + spi6_bus: spi6-bus-pins { + samsung,pins = "gpp3-2", "gpp3-1", "gpp3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi6_cs: spi6-cs-pins { + samsung,pins = "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi6_cs_func: spi6-cs-func-pins { + samsung,pins = "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI07_SPI */ + spi7_bus: spi7-bus-pins { + samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi7_cs: spi7-cs-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi7_cs_func: spi7-cs-func-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI08_SPI */ + spi8_bus: spi8-bus-pins { + samsung,pins = "gpp4-2", "gpp4-1", "gpp4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi8_cs: spi8-cs-pins { + samsung,pins = "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi8_cs_func: spi8-cs-func-pins { + samsung,pins = "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI09_SPI */ + spi9_bus: spi9-bus-pins { + samsung,pins = "gpp4-6", "gpp4-5", "gpp4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi9_cs: spi9-cs-pins { + samsung,pins = "gpp4-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi9_cs_func: spi9-cs-func-pins { + samsung,pins = "gpp4-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI10_SPI */ + spi10_pins: spi10-pins { + samsung,pins = "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi10_cs: spi10-cs-pins { + samsung,pins = "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi10_cs_func: spi10-cs-func-pins { + samsung,pins = "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI11_SPI */ + spi11_pins: spi11-pins { + samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi11_cs: spi11-cs-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi11_cs_func: spi11-cs-func-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* USI_PERIC1_USI06_UART */ + uart6_bus: uart6-bus-pins { + samsung,pins = "gpp3-3", "gpp3-2", "gpp3-1", "gpp3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart6_bus_dual: uart6-bus-dual-pins { + samsung,pins = "gpp3-0", "gpp3-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI07_UART */ + uart7_bus: uart7-bus-pins { + samsung,pins = "gpp3-7", "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart7_bus_dual: uart7-bus-dual-pins { + samsung,pins = "gpp3-4", "gpp3-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI08_UART */ + uart8_bus: uart8-bus-pins { + samsung,pins = "gpp4-3", "gpp4-2", "gpp4-1", "gpp4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart8_bus_dual: uart8-bus-dual-pins { + samsung,pins = "gpp4-0", "gpp4-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI09_UART */ + uart9_bus: uart9-bus-pins { + samsung,pins = "gpp4-7", "gpp4-6", "gpp4-5", "gpp4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart9_bus_dual: uart9-bus-dual-pins { + samsung,pins = "gpp4-4", "gpp4-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI10_UART */ + uart10_bus: uart10-bus-pins { + samsung,pins = "gpp5-3", "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart10_bus_dual: uart10-bus-dual-pins { + samsung,pins = "gpp5-0", "gpp5-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI11_UART */ + uart11_bus: uart11-bus-pins { + samsung,pins = "gpp5-7", "gpp5-6", "gpp5-5", "gpp5-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart11_bus_dual: uart11-bus-dual-pins { + samsung,pins = "gpp5-4", "gpp5-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi new file mode 100644 index 000000000000..d884ae421e12 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -0,0 +1,301 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's ExynosAuto v9 SoC device tree source + * + * Copyright (c) 2021 Samsung Electronics Co., Ltd. + * + */ + +#include + +/ { + compatible = "samsung,exynosautov9"; + #address-cells = <2>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + aliases { + pinctrl0 = &pinctrl_alive; + pinctrl1 = &pinctrl_aud; + pinctrl2 = &pinctrl_fsys0; + pinctrl3 = &pinctrl_fsys1; + pinctrl4 = &pinctrl_fsys2; + pinctrl5 = &pinctrl_peric0; + pinctrl6 = &pinctrl_peric1; + }; + + arm-pmu { + compatible = "arm,cortex-a76-pmu"; + interrupts = , + , + , + , + , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>, + <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu0: cpu@000000 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@000100 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x100>; + enable-method = "psci"; + }; + + cpu2: cpu@000200 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x200>; + enable-method = "psci"; + }; + + cpu3: cpu@000300 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x300>; + enable-method = "psci"; + }; + + cpu4: cpu@10000 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10000>; + enable-method = "psci"; + }; + + cpu5: cpu@10100 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10100>; + enable-method = "psci"; + }; + + cpu6: cpu@10200 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10200>; + enable-method = "psci"; + }; + + cpu7: cpu@10300 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10300>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + cpu_suspend = <0xc4000001>; + cpu_off = <0x84000002>; + cpu_on = <0xc4000003>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + fixed-rate-clocks { + xtcxo: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + clock-output-names = "oscclk"; + }; + + /* + * Keep the stub clock for serial driver, until proper clock + * driver is implemented. + */ + uart_clock: uart-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <133250000>; + clock-output-names = "uart"; + }; + + /* + * Keep the stub clock for ufs driver, until proper clock + * driver is implemented. + */ + ufs_core_clock: uart-core-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <166562500>; + }; + }; + + soc: soc@0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0x20000000>; + + gic: interrupt-controller@11001000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x10101000 0x1000>, + <0x10102000 0x2000>, + <0x10104000 0x2000>, + <0x10106000 0x2000>; + interrupts = ; + }; + + pinctrl_alive: pinctrl@10450000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x10450000 0x1000>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos7-wakeup-eint"; + }; + }; + + pinctrl_aud: pinctrl@19c60000{ + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x19c60000 0x1000>; + }; + + pinctrl_fsys0: pinctrl@17740000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x17740000 0x1000>; + interrupts = ; + }; + + pinctrl_fsys1: pinctrl@17060000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x17060000 0x1000>; + interrupts = ; + }; + + pinctrl_fsys2: pinctrl@17c30000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x17c30000 0x1000>; + interrupts = ; + }; + + pinctrl_peric0: pinctrl@10230000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x10230000 0x1000>; + interrupts = ; + }; + + pinctrl_peric1: pinctrl@10830000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x10830000 0x1000>; + interrupts = ; + }; + + pmu_system_controller: system-controller@10460000 { + compatible = "samsung,exynos7-pmu", "syscon"; + reg = <0x10460000 0x10000>; + }; + + syscon_fsys2: syscon@17c20000 { + compatible = "samsung,exynosautov9-sysreg", "syscon"; + reg = <0x17c20000 0x1000>; + }; + + /* USI: UART */ + serial_0: uart@103000000 { + compatible = "samsung,exynos850-uart"; + reg = <0x10300000 0x100>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_bus_dual>; + clocks = <&uart_clock>, <&uart_clock>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + ufs_0_phy: ufs0-phy@17e04000 { + compatible = "samsung,exynosautov9-ufs-phy"; + reg = <0x17e04000 0xc00>; + reg-names = "phy-pma"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + clocks = <&xtcxo>; + clock-names = "ref_clk"; + status = "disabled"; + }; + + ufs_0: ufs0@17e00000 { + compatible ="samsung,exynosautov9-ufs"; + + reg = <0x17e00000 0x100>, /* 0: HCI standard */ + <0x17e01100 0x410>, /* 1: Vendor-specific */ + <0x17e80000 0x8000>, /* 2: UNIPRO */ + <0x17dc0000 0x2200>; /* 3: UFS protector */ + reg-names = "hci", "vs_hci", "unipro", "ufsp"; + interrupts = ; + clocks = <&ufs_core_clock>, + <&ufs_core_clock>; + clock-names = "core_clk", "sclk_unipro_main"; + freq-table-hz = <0 0>, <0 0>; + pinctrl-names = "default"; + pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; + phys = <&ufs_0_phy>; + phy-names = "ufs-phy"; + samsung,sysreg = <&syscon_fsys2>; + samsung,ufs-shareability-reg-offset = <0x710>; + status = "disabled"; + }; + }; +}; + +#include "exynosautov9-pinctrl.dtsi" From patchwork Sun Oct 10 03:22:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanho Park X-Patchwork-Id: 12548241 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F00E4C4167B for ; Sun, 10 Oct 2021 03:25:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D88E3606A5 for ; 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Sun, 10 Oct 2021 12:24:56 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.51]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20211010032456epsmtip28ea6e31a359ae13cbc28304b7d083e46~sjXSRUfMG1204912049epsmtip2z; Sun, 10 Oct 2021 03:24:56 +0000 (GMT) From: Chanho Park To: Krzysztof Kozlowski , Rob Herring , Linus Walleij Cc: Tomasz Figa , Sylwester Nawrocki , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, Chanho Park Subject: [PATCH v3 3/3] arm64: dts: exynos: add minimal support for exynosautov9 sadk board Date: Sun, 10 Oct 2021 12:22:46 +0900 Message-Id: <20211010032246.146939-4-chanho61.park@samsung.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211010032246.146939-1-chanho61.park@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprMJsWRmVeSWpSXmKPExsWy7bCmhS5XbFKiwcN7ghaX92tbzD9yjtVi 49sfTBZT/ixnsphxfh+TReveI+wWh9+0s1qs2vWH0YHDY1ZDL5vHzll32T02repk87hzbQ+b R9+WVYwenzfJBbBFZdtkpCampBYppOYl56dk5qXbKnkHxzvHm5oZGOoaWlqYKynkJeam2iq5 +AToumXmAN2jpFCWmFMKFApILC5W0rezKcovLUlVyMgvLrFVSi1IySkwL9ArTswtLs1L18tL LbEyNDAwMgUqTMjO2HtbraBRouLX3rvsDYxHhLsYOTkkBEwkvlxuZQWxhQR2MEos2uncxcgF ZH9ilLh2ZgobROIzo8Tlt+UwDRcmfmOEKNrFKHF/eTczhPMRqGP+VLAONgFdiS3PX4FViQh0 Mkqs/LaNCSTBLHCAUWLLBTsQW1ggVqL9xT52EJtFQFVi65MFYM28AvYSKxfNYYZYJy9x5Fcn mM0p4CAxoeseM0SNoMTJmU9YIGbKSzRvnQ12hYTAV3aJlS8nsEE0u0h87f4IZQtLvDq+hR3C lpJ42d/GDtHQzSjR+ug/VGI1o0Rnow+EbS/xa/oWYMhwAG3QlFi/Sx/ElBBQljhyC2ovn0TH 4b/sEGFeiY42IYhGdYkD26ezQNiyEt1zPrNC2B4Sbx98hYboZEaJTVvkJzAqzELyzSwk38xC 2LuAkXkVo1hqQXFuemqxUYEhPH6T83M3MYJTp5brDsbJbz/oHWJk4mA8xCjBwawkwqtlkpgo xJuSWFmVWpQfX1Sak1p8iNEUGNYTmaVEk/OByTuvJN7QxNLAxMzM0NzI1MBcSZx37j+nRCGB 9MSS1OzU1ILUIpg+Jg5OqQam2BNnD1m9WHjkyvNVPr3HzEUeF6U2OfJqfWtsmHqeJ3mG5uHH T74p8AmUB2g9TjbgZnhm+Jr539272664+eTLbc4KKp/9lkVL3pB/puez3cZKsbmmV5IuTo7o MHpyqPvWzrqUG6vncnMKvlZjlmx+tqdmynfZhhpV44UOSzR2CNlJdh75Y3njuWTebvNJ66K0 di/ZsT6Y7UGU1Oq77X+l4xYeit109c1l2+8ma1Yr/D7lohdxxnChqzWDWN+C37sYp7hW+Dd3 WIQvf3Ip79nRC3UP4yNSmn7wsKX/3d65O8FbWGrDi5czqjTfivipZG6YNLejLbLh4l6pd1x3 Tufw/0liXjV1od0t4akWh398V2Ipzkg01GIuKk4EAClktJ8mBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrILMWRmVeSWpSXmKPExsWy7bCSvC5HbFKiQdNUXYvL+7Ut5h85x2qx 8e0PJospf5YzWcw4v4/JonXvEXaLw2/aWS1W7frD6MDhMauhl81j56y77B6bVnWyedy5tofN o2/LKkaPz5vkAtiiuGxSUnMyy1KL9O0SuDL23lYraJSo+LX3LnsD4xHhLkZODgkBE4kLE78x djFycQgJ7GCU+LHxKTNEQlbi2bsd7BC2sMT9liOsEEXvGSUuvbrCApJgE9CV2PL8FVi3iEA3 o0R/Yy8TiMMscIRR4v/3X2BVwgLREnemTAYbxSKgKrH1yQI2EJtXwF5i5aI5UOvkJY786gSz OQUcJCZ03QOzhYBqetY/YYKoF5Q4OfMJ2ExmoPrmrbOZJzAKzEKSmoUktYCRaRWjZGpBcW56 brFhgVFearlecWJucWleul5yfu4mRnCoa2ntYNyz6oPeIUYmDsZDjBIczEoivFomiYlCvCmJ lVWpRfnxRaU5qcWHGKU5WJTEeS90nYwXEkhPLEnNTk0tSC2CyTJxcEo1MHUrPFtxUI5n5XlR g8ik+C+e5mVSnx2Wzul1Wmk8s0Wh2rZB8Hua/SMxpscbnrKslPy/PvUp56e/H7T2vDhew9c0 69PLJd8UwjXk1wS5JpR7f9x2QS306sH89Z9VGm7+3GCSbDctwqxjYvr1P5pTU1UqrG7E2y1N mDZ1bfAvK/H2f4e9GxvLN1UsqMvYaKDmKMrlab0k4sPF2avf35vpb+bwLaL/uP9Gu6wV7+fo rJJZUvhBbfXlkuu71p8z2fDy2dnnCjtEOl/f4srffUv2wbQ+ztWBnA+fFB2QZalMTN0u7bJE LEZGt8lLZffWZSdzfs0RePQz/nnHwkJx91XfGN+Hf51h+Oxt2PRmqa+7151VYinOSDTUYi4q TgQAlODb1uQCAAA= X-CMS-MailID: 20211010032456epcas2p15f951954f7bc7ca505806fdcea4e6390 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20211010032456epcas2p15f951954f7bc7ca505806fdcea4e6390 References: <20211010032246.146939-1-chanho61.park@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org SADK(Samsung Automotive Development Kit) is the development kit to evaluate Exynos Auto v9 SoC. It has 16GB LPDDR4 DRAM and two 256GB Samsung UFS. This patch enables only serial console and ufs0 device. Signed-off-by: Chanho Park --- .../bindings/arm/samsung/samsung-boards.yaml | 6 ++ arch/arm64/boot/dts/exynos/Makefile | 3 +- .../boot/dts/exynos/exynosautov9-sadk.dts | 56 +++++++++++++++++++ 3 files changed, 64 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index 0796f0c87727..ef6dc14be4b5 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -199,6 +199,12 @@ properties: - samsung,exynos7-espresso # Samsung Exynos7 Espresso - const: samsung,exynos7 + - description: Exynos Auto v9 based boards + items: + - enum: + - samsung,exynosautov9-sadk # Samsung Exynos Auto v9 SADK + - const: samsung,exynosautov9 + required: - compatible diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile index e0a2facde6a2..b41e86df0a84 100644 --- a/arch/arm64/boot/dts/exynos/Makefile +++ b/arch/arm64/boot/dts/exynos/Makefile @@ -2,4 +2,5 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \ exynos5433-tm2.dtb \ exynos5433-tm2e.dtb \ - exynos7-espresso.dtb + exynos7-espresso.dtb \ + exynosautov9-sadk.dtb diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts new file mode 100644 index 000000000000..ef46d7aa6e28 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung ExynosAutov9 SADK board device tree source + * + * Copyright (c) 2021 Samsung Electronics Co., Ltd. + * + */ + +/dts-v1/; +#include "exynosautov9.dtsi" +#include + +/ { + model = "Samsung ExynosAuto v9 SADK board"; + compatible = "samsung,exynosautov9-sadk", "samsung,exynosautov9"; + + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &serial_0; + }; + + chosen { + stdout-path = &serial_0; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x77000000>, + <0x8 0x80000000 0x1 0x7ba00000>, + <0xa 0x00000000 0x2 0x00000000>; + }; + + ufs_0_fixed_vcc_reg: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "ufs-vcc"; + gpio = <&gpq0 1 GPIO_ACTIVE_HIGH>; + regulator-boot-on; + enable-active-high; + }; +}; + +&serial_0 { + status = "okay"; +}; + +&ufs_0_phy { + status = "okay"; +}; + +&ufs_0 { + status = "okay"; + vcc-supply = <&ufs_0_fixed_vcc_reg>; + vcc-fixed-regulator; +};