From patchwork Thu Dec 13 10:32:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinath Mannam X-Patchwork-Id: 10728433 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F2C971759 for ; Thu, 13 Dec 2018 10:33:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E26B3286D5 for ; Thu, 13 Dec 2018 10:33:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D679C28732; Thu, 13 Dec 2018 10:33:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7DC9F28714 for ; Thu, 13 Dec 2018 10:33:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728610AbeLMKdX (ORCPT ); Thu, 13 Dec 2018 05:33:23 -0500 Received: from mail-wm1-f67.google.com ([209.85.128.67]:38818 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727849AbeLMKdW (ORCPT ); Thu, 13 Dec 2018 05:33:22 -0500 Received: by mail-wm1-f67.google.com with SMTP id m22so1818442wml.3 for ; Thu, 13 Dec 2018 02:33:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=VpODZE1tUA9HmJlRXYvptIoWG22EEkLSR0YtOLzzTLM=; b=J/OCYF6vgCN7SMrZnnEePHIFZhL0QFA2U6/pLuP0XZ1QxXs+GgZaLFIwEq1epSC9Nn JRftF8vqrr3sb7ifX8asb1JQD30xpZnj+VzteNpIpclNWVdk70KHHI+bSM0VdiBZVsSZ TznM+61fQ6EE75+VVzScpZB2zdq0ZrIzyc+Og= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=VpODZE1tUA9HmJlRXYvptIoWG22EEkLSR0YtOLzzTLM=; b=WwL25W0J+WOB3//mEG1mTPHAXxZZ/RkPRi9v7TFldvh3aXbcGR6jBa7Yl93UgLjhOS sC6Zu3g/ozj4V5tTAi+Amfpqe/IlNO3FtI2m55+hXVpyS/eXLZa+wvdoMAVd/uUcgL4q GitD7AJQnmnJPzBt7ITCZ/M40EuTr7MOu42BVhuxC0+KiWAQiT6WdkzVwi5eRC2p/sBC U3KmPFJGAFCGxtEVv1dJjf0hyLOEGkbj9sJxfp7IJE9Qrm0t5VnpK1UllADzGMHKLOnh ZKifhUgEr7XCMvVL7kgSuD7/h+r6N2Z4YxYMe9+omkrA5ePLdvVbG6Q7vgNDXb7YBoT1 JT0g== X-Gm-Message-State: AA+aEWasSawpqv0azXCv8kKydBY4AMDXWkBYpYt756xDcnnKIkx8G2cQ 8S4HH43WjJYxGk5ywjrp3ADHnA== X-Google-Smtp-Source: AFSGD/V0z4dI+qRJQ7R68nGjRRHT8k8XwDlkcbdxqMxmBtMJ/kbvttRTLDdz0lvkc8vFn8ItpA8Bqg== X-Received: by 2002:a1c:c2d5:: with SMTP id s204mr10382746wmf.144.1544697200546; Thu, 13 Dec 2018 02:33:20 -0800 (PST) Received: from mannams-OptiPlex-7010.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id x76sm3327058wmd.27.2018.12.13.02.33.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 13 Dec 2018 02:33:20 -0800 (PST) From: Srinath Mannam To: Bjorn Helgaas , Robin Murphy , poza@codeaurora.org, Joerg Roedel , Lorenzo Pieralisi , Ray Jui Cc: bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Srinath Mannam Subject: [PATCH v2 1/3] PCI: Add dma-resv window list Date: Thu, 13 Dec 2018 16:02:52 +0530 Message-Id: <1544697174-6029-2-git-send-email-srinath.mannam@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1544697174-6029-1-git-send-email-srinath.mannam@broadcom.com> References: <1544697174-6029-1-git-send-email-srinath.mannam@broadcom.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a dma_resv parameter in pci host bridge structure to hold resource entries list of memory regions for which IOVAs have to reserve. PCIe host driver will add resource entries to this list based on its requirements. Few inbound address ranges can't be allowed by few PCIe host, so those address ranges will be add to this list to avoid IOMMU mapping. While initializing IOMMU domain of PCI EPs connected to that host bridge IOVAs for this given list of address ranges will be reserved. Signed-off-by: Srinath Mannam Based-on-patch-by: Oza Pawandeep --- drivers/pci/probe.c | 3 +++ include/linux/pci.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index ec78400..bbed0e7 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -544,6 +544,7 @@ struct pci_host_bridge *pci_alloc_host_bridge(size_t priv) return NULL; INIT_LIST_HEAD(&bridge->windows); + INIT_LIST_HEAD(&bridge->dma_resv); bridge->dev.release = pci_release_host_bridge_dev; /* @@ -572,6 +573,7 @@ struct pci_host_bridge *devm_pci_alloc_host_bridge(struct device *dev, return NULL; INIT_LIST_HEAD(&bridge->windows); + INIT_LIST_HEAD(&bridge->dma_resv); bridge->dev.release = devm_pci_release_host_bridge_dev; return bridge; @@ -581,6 +583,7 @@ EXPORT_SYMBOL(devm_pci_alloc_host_bridge); void pci_free_host_bridge(struct pci_host_bridge *bridge) { pci_free_resource_list(&bridge->windows); + pci_free_resource_list(&bridge->dma_resv); kfree(bridge); } diff --git a/include/linux/pci.h b/include/linux/pci.h index e72ca8d..1f0a32a 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -472,6 +472,7 @@ struct pci_host_bridge { void *sysdata; int busnr; struct list_head windows; /* resource_entry */ + struct list_head dma_resv; /* reserv dma ranges */ u8 (*swizzle_irq)(struct pci_dev *, u8 *); /* Platform IRQ swizzler */ int (*map_irq)(const struct pci_dev *, u8, u8); void (*release_fn)(struct pci_host_bridge *); From patchwork Thu Dec 13 10:32:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinath Mannam X-Patchwork-Id: 10728431 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C429B112E for ; Thu, 13 Dec 2018 10:33:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B570F286D5 for ; Thu, 13 Dec 2018 10:33:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A997428742; 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Thu, 13 Dec 2018 02:33:25 -0800 (PST) Received: from mannams-OptiPlex-7010.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id x76sm3327058wmd.27.2018.12.13.02.33.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 13 Dec 2018 02:33:24 -0800 (PST) From: Srinath Mannam To: Bjorn Helgaas , Robin Murphy , poza@codeaurora.org, Joerg Roedel , Lorenzo Pieralisi , Ray Jui Cc: bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Srinath Mannam Subject: [PATCH v2 2/3] iommu/dma: IOVA reserve for PCI host reserve address list Date: Thu, 13 Dec 2018 16:02:53 +0530 Message-Id: <1544697174-6029-3-git-send-email-srinath.mannam@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1544697174-6029-1-git-send-email-srinath.mannam@broadcom.com> References: <1544697174-6029-1-git-send-email-srinath.mannam@broadcom.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP PCI host bridge has list of resource entries contain address ranges for which IOVA address mapping has to be reserve. These address ranges are the address holes in dma-ranges DT property. It is similar to PCI IO resources address ranges reserving in IOMMU for each EP connected to host bridge. Signed-off-by: Srinath Mannam Based-on-patch-by: Oza Pawandeep --- drivers/iommu/dma-iommu.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 511ff9a..346da81 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -220,6 +220,14 @@ static void iova_reserve_pci_windows(struct pci_dev *dev, hi = iova_pfn(iovad, window->res->end - window->offset); reserve_iova(iovad, lo, hi); } + + /* Get reserved DMA windows from host bridge */ + resource_list_for_each_entry(window, &bridge->dma_resv) { + + lo = iova_pfn(iovad, window->res->start - window->offset); + hi = iova_pfn(iovad, window->res->end - window->offset); + reserve_iova(iovad, lo, hi); + } } static int iova_reserve_iommu_regions(struct device *dev, From patchwork Thu Dec 13 10:32:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinath Mannam X-Patchwork-Id: 10728429 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 024F5112E for ; Thu, 13 Dec 2018 10:33:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D7561286D5 for ; Thu, 13 Dec 2018 10:33:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C708228732; Thu, 13 Dec 2018 10:33:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4F47B286D5 for ; Thu, 13 Dec 2018 10:33:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727991AbeLMKdg (ORCPT ); Thu, 13 Dec 2018 05:33:36 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:46739 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728017AbeLMKdc (ORCPT ); Thu, 13 Dec 2018 05:33:32 -0500 Received: by mail-wr1-f68.google.com with SMTP id l9so1407854wrt.13 for ; Thu, 13 Dec 2018 02:33:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KsLuq/w2+4wqAK3w1JgIljoenhpHR4ZyQN2xHQt5mAo=; b=BuYqOYAGhory4gRz4+f3zZ1cpevXvNvZRNWlLzPUD53iF/w8IlaDeHT0wOw3Vplr10 6WUvAg/kMiKqusZhcf9IU0jadnGSg4OflOBOPghzbU3NISvlQNgUpSKLZQ7ybqK/VRd0 BraSgBOqy1xDUlmAwu2nFtf7JJTravNmW8z6g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KsLuq/w2+4wqAK3w1JgIljoenhpHR4ZyQN2xHQt5mAo=; b=Xk4NfVzZkW6XeSAY1EGFSFXy61wh3Ev8C5i38Y4Sh0KcSPJIFjSFmnr51Jk0XAEPgI NplP+94Z2Pg31t0HD3yypKXCaR/DWQNPh+nMmkplOexuxkMNEJbJWMEKv06/0dOpZjxk OsNU9eE5m6FPT3ugCYEG/5cI8LhzTpzHqtEJJMIcaGY9AVeK4IeIxg0uw8O/8Di7w6kF A/gfKHbrNZGq0LZ526C0zf3C0GigGuzyh7seAw7vr7dUrKQYHKs6YGl1HntaRCelAh+q gL/PCCrchnG4hvystIhyYY1XMMHi/voCPxoCShRfRGzI6h6rfK81wz7W/HQKfxnQExKm Is1g== X-Gm-Message-State: AA+aEWa50H4ROjnKrquBzrbF/PafnixQ+YUK7j4f6ETWRy1ewhQbgnIl dlzbfrj4VzHIeT/J9RixaC+pOA== X-Google-Smtp-Source: AFSGD/UELeyC7vWsdTldPryopCXnyHUgRP0R9wNEeFAeaSxQ5osycF83oKahNPiRilY7IcU8mZWnIQ== X-Received: by 2002:adf:84e4:: with SMTP id 91mr20254748wrg.237.1544697209674; Thu, 13 Dec 2018 02:33:29 -0800 (PST) Received: from mannams-OptiPlex-7010.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id x76sm3327058wmd.27.2018.12.13.02.33.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 13 Dec 2018 02:33:28 -0800 (PST) From: Srinath Mannam To: Bjorn Helgaas , Robin Murphy , poza@codeaurora.org, Joerg Roedel , Lorenzo Pieralisi , Ray Jui Cc: bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Srinath Mannam Subject: [PATCH v2 3/3] PCI: iproc: Add dma reserve resources to host Date: Thu, 13 Dec 2018 16:02:54 +0530 Message-Id: <1544697174-6029-4-git-send-email-srinath.mannam@broadcom.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1544697174-6029-1-git-send-email-srinath.mannam@broadcom.com> References: <1544697174-6029-1-git-send-email-srinath.mannam@broadcom.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP IPROC host has the limitation that it can use only those address ranges given by dma-ranges property as inbound address. So that the memory address holes in dma-ranges should be reserved to allocate as DMA address. Inbound address of host accessed by pcie devices will not be translated before it comes to IOMMU or directly to PE. But the limitation of this host is, access to few address ranges are ignored. So that IOVA ranges for these address ranges have to be reserved. All such addresses ranges are created as resource entries by parsing dma-ranges DT parameter and add to dma_resv list of pci host bridge. Ex: dma-ranges = < \ 0x43000000 0x00 0x80000000 0x00 0x80000000 0x00 0x80000000 \ 0x43000000 0x08 0x00000000 0x08 0x00000000 0x08 0x00000000 \ 0x43000000 0x80 0x00000000 0x80 0x00000000 0x40 0x00000000> In the above example of dma-ranges, memory address from 0x0 - 0x80000000, 0x100000000 - 0x800000000, 0x1000000000 - 0x8000000000 and 0x10000000000 - 0xffffffffffffffff. are not allowed to use as inbound addresses. So that we need to add these address ranges to dma_resv list to reserve corresponding IOVA address ranges. Signed-off-by: Srinath Mannam Based-on-patch-by: Oza Pawandeep --- drivers/pci/controller/pcie-iproc.c | 51 ++++++++++++++++++++++++++++++++++++- 1 file changed, 50 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-iproc.c b/drivers/pci/controller/pcie-iproc.c index 3160e93..636e92d 100644 --- a/drivers/pci/controller/pcie-iproc.c +++ b/drivers/pci/controller/pcie-iproc.c @@ -1154,25 +1154,74 @@ static int iproc_pcie_setup_ib(struct iproc_pcie *pcie, return ret; } +static int +iproc_pcie_add_dma_resv_range(struct device *dev, struct list_head *resources, + uint64_t start, uint64_t end) +{ + struct resource *res; + + res = devm_kzalloc(dev, sizeof(struct resource), GFP_KERNEL); + if (!res) + return -ENOMEM; + + res->start = (resource_size_t)start; + res->end = (resource_size_t)end; + pci_add_resource_offset(resources, res, 0); + + return 0; +} + static int iproc_pcie_map_dma_ranges(struct iproc_pcie *pcie) { + struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); struct of_pci_range range; struct of_pci_range_parser parser; int ret; + uint64_t start, end; + LIST_HEAD(resources); /* Get the dma-ranges from DT */ ret = of_pci_dma_range_parser_init(&parser, pcie->dev->of_node); if (ret) return ret; + start = 0; for_each_of_pci_range(&parser, &range) { + end = range.pci_addr; + /* dma-ranges list expected in sorted order */ + if (end < start) { + ret = -EINVAL; + goto out; + } /* Each range entry corresponds to an inbound mapping region */ ret = iproc_pcie_setup_ib(pcie, &range, IPROC_PCIE_IB_MAP_MEM); if (ret) - return ret; + goto out; + + if (end - start) { + ret = iproc_pcie_add_dma_resv_range(pcie->dev, + &resources, + start, end); + if (ret) + goto out; + } + start = range.pci_addr + range.size; } + end = DMA_BIT_MASK(sizeof(dma_addr_t) * BITS_PER_BYTE); + if (end - start) { + ret = iproc_pcie_add_dma_resv_range(pcie->dev, &resources, + start, end); + if (ret) + goto out; + } + + list_splice_init(&resources, &host->dma_resv); + return 0; +out: + pci_free_resource_list(&resources); + return ret; } static int iproce_pcie_get_msi(struct iproc_pcie *pcie,