From patchwork Tue Oct 12 00:23:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanho Park X-Patchwork-Id: 12551225 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E572C433FE for ; Tue, 12 Oct 2021 00:25:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7F99D60E8B for ; Tue, 12 Oct 2021 00:25:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231793AbhJLA14 (ORCPT ); Mon, 11 Oct 2021 20:27:56 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:47531 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232100AbhJLA1x (ORCPT ); Mon, 11 Oct 2021 20:27:53 -0400 Received: from epcas2p4.samsung.com (unknown [182.195.41.56]) by mailout4.samsung.com (KnoxPortal) with ESMTP id 20211012002547epoutp04de77bbc3e19b2ed59a28f3603d4e3e49~tINcNo-nv1497514975epoutp04i for ; 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Tue, 12 Oct 2021 09:25:34 +0900 (KST) Received: from epsmtrp1.samsung.com (unknown [182.195.40.13]) by epcas2p1.samsung.com (KnoxPortal) with ESMTPA id 20211012002533epcas2p182112e07ea081957a0e54fea46c66816~tINPLgoFH1646716467epcas2p1j; Tue, 12 Oct 2021 00:25:33 +0000 (GMT) Received: from epsmgms1p2.samsung.com (unknown [182.195.42.42]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20211012002533epsmtrp11d7537d14886da40d752a2c364445c89~tINPKiRZa2356223562epsmtrp1M; Tue, 12 Oct 2021 00:25:33 +0000 (GMT) X-AuditID: b6c32a48-d5fff70000002500-01-6164d5fe8218 Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgms1p2.samsung.com (Symantec Messaging Gateway) with SMTP id 26.F9.08750.DF5D4616; Tue, 12 Oct 2021 09:25:33 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.51]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20211012002533epsmtip2b5878ce763928fa81b40af9b776f96fa~tINO82rj91413714137epsmtip2J; Tue, 12 Oct 2021 00:25:33 +0000 (GMT) From: Chanho Park To: Krzysztof Kozlowski , Rob Herring , Linus Walleij Cc: Tomasz Figa , Sylwester Nawrocki , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, Chanho Park , Lee Jones Subject: [PATCH v4 1/3] dt-bindings: mfd: add samsung,exynosautov9-sysreg compatible Date: Tue, 12 Oct 2021 09:23:12 +0900 Message-Id: <20211012002314.38965-2-chanho61.park@samsung.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211012002314.38965-1-chanho61.park@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprNJsWRmVeSWpSXmKPExsWy7bCmue6/qymJBivmclpc3q9tMf/IOVaL jW9/MFnc/3qU0WLKn+VMFjPO72OyaN17hN3i8Jt2VotVu/4wOnB6zGroZfPYOesuu8emVZ1s Hneu7WHz6NuyitHj8ya5ALaobJuM1MSU1CKF1Lzk/JTMvHRbJe/geOd4UzMDQ11DSwtzJYW8 xNxUWyUXnwBdt8wcoKOUFMoSc0qBQgGJxcVK+nY2RfmlJakKGfnFJbZKqQUpOQXmBXrFibnF pXnpenmpJVaGBgZGpkCFCdkZu6f8Yim4zVYx6c8U9gbGbaxdjJwcEgImEvefXGDsYuTiEBLY wSjRcX41O4TziVFiypUPzBDOZ0aJDTtXwLV87t7ECpHYxSjRfrIdyvnIKDG5/z8jSBWbgK7E luevwAaLCHQySqz8to0JxGEWeMIo0XXzCjNIlbBAmMTKLU9Zuhg5OFgEVCVe3VIBCfMK2Ekc PrqTBWKdvMSRX51g5ZwC9hIta06xQNQISpyc+QTMZgaqad46mxmi/i+7xLUvlRC2i8S1t8+Y IGxhiVfHt7BD2FISL/vbwB6VEOhmlGh99B8qsZpRorPRB8K2l/g1fQsryG3MApoS63fpg5gS AsoSR25BreWT6Dj8lx0izCvR0SYE0agucWD7dKjrZSW653yGBpyHxJEjK6FhNYlR4vOeVqYJ jAqzkHwzC8k3sxAWL2BkXsUollpQnJueWmxUYAKP4uT83E2M4FSq5bGDcfbbD3qHGJk4GA8x SnAwK4nwvuVISRTiTUmsrEotyo8vKs1JLT7EaAoM6onMUqLJ+cBknlcSb2hiaWBiZmZobmRq YK4kzjv3n1OikEB6YklqdmpqQWoRTB8TB6dUA9Oy9xOO+d27p61h6/Xql+qWbU/Dm/dNzslb sOgjL6tXuUJvYeWn6k9b/bk1XKb23RYIag04plsx9W9LYNjv085MJ28dznl60fG1iboH355v orLWwp8f8wqnm2a8PyD5/Jkh5xO3uVpfpkXX33H6LnYm5vfW/9tcxY8ZvH9f7h3tczhJ6KSR 5Rn/Rv23ef9brXnulHWtD+h+7XH5qu3y4xtDM2d9sVlodkorJjzvxdRnbou8nyQX/5nw7esV /SnnX7DNki+7tap798qbm54a2VRk1tz99XXmefGJKrpRJm+P3+l9rXj66Qk3xc3iYklhIst3 baucsc3pwitxDutXXyTTPP5/XVX8f4frXO+Na2uYlFiKMxINtZiLihMBEDUEzy4EAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMLMWRmVeSWpSXmKPExsWy7bCSvO7fqymJBhtW6Flc3q9tMf/IOVaL jW9/MFnc/3qU0WLKn+VMFjPO72OyaN17hN3i8Jt2VotVu/4wOnB6zGroZfPYOesuu8emVZ1s Hneu7WHz6NuyitHj8ya5ALYoLpuU1JzMstQifbsErozdU36xFNxmq5j0Zwp7A+M21i5GTg4J AROJz92bwGwhgR2MEj87xCHishLP3u1gh7CFJe63HIGqec8ocX9pFYjNJqArseX5K8YuRi4O EYFuRon+xl4mEIdZ4AWjxNI/+8G6hQVCJF4fn8fWxcjBwSKgKvHqlgpImFfATuLw0Z0sEAvk JY786mQGsTkF7CVa1pxiASkXAqrp7TSCKBeUODnzCVg5M1B589bZzBMYBWYhSc1CklrAyLSK UTK1oDg3PbfYsMAoL7Vcrzgxt7g0L10vOT93EyM43LW0djDuWfVB7xAjEwfjIUYJDmYlEd63 HCmJQrwpiZVVqUX58UWlOanFhxilOViUxHkvdJ2MFxJITyxJzU5NLUgtgskycXBKNTC5PQy7 EN7rOJPhGXOvsfPdBac5gr7cv8p7IM33o8qOePNFb6bPsVbX3XKljqtQ6NTpiYEns57otfan XJF2eNbCevp+9Ss1/tn7+/ar+Yfb3V/39r3GqaCZRcv9JEt4g63ebD1tbr1GZNFn5csKAq9m amfkzl/5Wv76zG8nrgRpinFa1j9OFP6abaRyXPp9yPpIlm2zN6hKcnkfU3x33P9B+927NY0V F/ft6ro+Z1pFi+TbbqmDZdd4Zocvv/u7q9VXbWH0nOiMknsNuR1LEvbX/DrjVX98h/iEA7YB Ja9ls354su0wvbBUy+v6MmNRpcZU9ytdHw/0MLxYknJleZ5q6Squ0OyT4oeyF50JedSmxFKc kWioxVxUnAgAboXM6uYCAAA= X-CMS-MailID: 20211012002533epcas2p182112e07ea081957a0e54fea46c66816 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20211012002533epcas2p182112e07ea081957a0e54fea46c66816 References: <20211012002314.38965-1-chanho61.park@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add document Samsung's Exynos Auto v9 compatible for system registers. Cc: Lee Jones Reviewed-by: Krzysztof Kozlowski Signed-off-by: Chanho Park Acked-by: Rob Herring --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index abe3fd817e0b..75dcbb741010 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -55,6 +55,7 @@ properties: - samsung,exynos4-sysreg - samsung,exynos5-sysreg - samsung,exynos5433-sysreg + - samsung,exynosautov9-sysreg - const: syscon From patchwork Tue Oct 12 00:23:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanho Park X-Patchwork-Id: 12551231 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 690F6C43217 for ; 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Tue, 12 Oct 2021 00:25:33 +0000 (GMT) Received: from epsmgms1p2.samsung.com (unknown [182.195.42.42]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20211012002533epsmtrp1e11fb7107a567e6d0658172953f2dda9~tINPQjRJ62356023560epsmtrp1P; Tue, 12 Oct 2021 00:25:33 +0000 (GMT) X-AuditID: b6c32a45-4abff700000025f5-0d-6164d5fe8b1a Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgms1p2.samsung.com (Symantec Messaging Gateway) with SMTP id 46.F9.08750.DF5D4616; Tue, 12 Oct 2021 09:25:33 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.51]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20211012002533epsmtip28d2ad7502229ddfbfa682a16b13ca6b0~tINPDhHqi1904819048epsmtip2S; Tue, 12 Oct 2021 00:25:33 +0000 (GMT) From: Chanho Park To: Krzysztof Kozlowski , Rob Herring , Linus Walleij Cc: Tomasz Figa , Sylwester Nawrocki , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, Chanho Park Subject: [PATCH v4 2/3] arm64: dts: exynos: add initial support for exynosautov9 SoC Date: Tue, 12 Oct 2021 09:23:13 +0900 Message-Id: <20211012002314.38965-3-chanho61.park@samsung.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211012002314.38965-1-chanho61.park@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprCJsWRmVeSWpSXmKPExsWy7bCmhe6/qymJBu//yFlc3q9tMf/IOVaL jW9/MFlM+bOcyWLG+X1MFq17j7BbHH7TzmqxatcfRgcOj1kNvWweO2fdZffYtKqTzePOtT1s Hn1bVjF6fN4kF8AWlW2TkZqYklqkkJqXnJ+SmZduq+QdHO8cb2pmYKhraGlhrqSQl5ibaqvk 4hOg65aZA3SPkkJZYk4pUCggsbhYSd/Opii/tCRVISO/uMRWKbUgJafAvECvODG3uDQvXS8v tcTK0MDAyBSoMCE74+/PiILjZ5gq3h76y9bAOK+fqYuRk0NCwETi8r3rQDYXh5DADkaJ6z/e sIIkhAQ+MUp0b+SESHxmlPjzoJcVpmPtmZOMEIldjBKvP05hg+j4yCjxfqItiM0moCux5fkr sCIRgU5GiZXftoHtYxY4wCix5YIdiC0sECbx+mgrC4jNIqAqsWjVWXYQm1fATmL6ifvMENvk JY786gSzOQXsJVrWnGKBqBGUODnzCQvETHmJ5q2zmUGWSQh8ZZc4++g1VLOLxL3uo1C2sMSr 41vYIWwpiZf9bewQDd2MEq2P/kMlVjNKdDb6QNj2Er+mbwH6mQNog6bE+l36IKaEgLLEkVtQ e/kkOg7/ZYcI80p0tAlBNKpLHNg+nQXClpXonvOZFaLEQ6LrjRckqCYxSnyc7j6BUWEWkmdm IXlmFsLaBYzMqxjFUguKc9NTi40KDOERnJyfu4kRnDy1XHcwTn77Qe8QIxMH4yFGCQ5mJRHe txwpiUK8KYmVValF+fFFpTmpxYcYTYFBPZFZSjQ5H5i+80riDU0sDUzMzAzNjUwNzJXEeef+ c0oUEkhPLEnNTk0tSC2C6WPi4JRqYJp056eJ9BzT2V0vXgq0SYRHHJ4+icN+zYyKecy7HknZ VgitKGowvHp5qVn2WoaM6JflF1uUf3gsXyjGec7abOrShvnTznn+fXZ67g6xcwzs6W/rRBSE /GOuP1uzOOQd1/+o+vOcq9XXp/nOtPoR8iS78e8/XYXm+f6LxM5clK9urVTX114vvyvj4JT3 K4MWrsr8zBPKrLSoebn0royZDmFlRz7/X5o1NabZVK7CQeW12dJNflMfXrqqEux+KvsX15WF Cx5yVmV6FddcuJ4ze95K/VuZq3ItOT9/Xdv8W3DZxDOuAvWKW86e2PFiR8V9vkcO36NeiM// VBWfeHri1GfyuT+Sel4ZL5pz5cv7ULM6JZbijERDLeai4kQADdoQrScEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrELMWRmVeSWpSXmKPExsWy7bCSvO7fqymJBp3LjS0u79e2mH/kHKvF xrc/mCym/FnOZDHj/D4mi9a9R9gtDr9pZ7VYtesPowOHx6yGXjaPnbPusntsWtXJ5nHn2h42 j74tqxg9Pm+SC2CL4rJJSc3JLEst0rdL4Mr4+zOi4PgZpoq3h/6yNTDO62fqYuTkkBAwkVh7 5iRjFyMXh5DADkaJK3teMEIkZCWevdvBDmELS9xvOcIKUfSeUWLP+/dgCTYBXYktz1+BdYsI dDNK9Df2MoE4zAJHGCX+f//FAlIlLBAi0b97Fdg+FgFViUWrzoJ18wrYSUw/cZ8ZYoW8xJFf nWA2p4C9RMuaU0C9HEDr7CR6O40gygUlTs58AjaSGai8eets5gmMArOQpGYhSS1gZFrFKJla UJybnltsWGCUl1quV5yYW1yal66XnJ+7iREc7FpaOxj3rPqgd4iRiYPxEKMEB7OSCO9bjpRE Id6UxMqq1KL8+KLSnNTiQ4zSHCxK4rwXuk7GCwmkJ5akZqemFqQWwWSZODilGphEXaQFnGS7 pCNrC/vKTQuYL4XPWWdutPjtgaOcDEtmZi7lTL52iWvP9yzT74UdtbeP+hzwuHrxv3zYrs2S nUxqx+paDKbmfHrxpGHzfadJv1/9KeUPVv98+qT92baP6S+yVf5wOenmNb720Wbhf1Ri82iO 5J69jP7Rtw+Ycf+skfpw+1vPrjrmEBlxwR+mfPsKxavWdshO3H7yzHnhiPUaH/wm7tjhtmih xXXvoudm7SL1Mk9lu5o0mC+7TXDMjWOJcms7KbTkkPo+/e1HOs8pGe09tKfDoy6sSz11yod4 jWCWLslDP7bvqnGTMTmZb16TfTU477xAEJdiuHVn95IF/01zQu91WXDdXVXsrMRSnJFoqMVc VJwIAMTMXVDlAgAA X-CMS-MailID: 20211012002533epcas2p1ade9bfee49456149836f2ef1631d5626 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20211012002533epcas2p1ade9bfee49456149836f2ef1631d5626 References: <20211012002314.38965-1-chanho61.park@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Add minimal support for ExynosAuto v9 SoC[1]. - Enumarate all pinctrl nodes - UART with exynos850 compatible - UFS0 HCI + Phy Like exynos850, this also uses fixed-rate clock nodes until clock driver has been supported. The clock nodes are initialized on bootloader stage thus we don't need to control them so far. [1]: https://www.samsung.com/semiconductor/minisite/exynos/products/automotiveprocessor/exynos-auto-v9/ Signed-off-by: Chanho Park --- .../boot/dts/exynos/exynosautov9-pinctrl.dtsi | 1189 +++++++++++++++++ arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 301 +++++ 2 files changed, 1490 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi new file mode 100644 index 000000000000..2407b03b5404 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov9-pinctrl.dtsi @@ -0,0 +1,1189 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's ExynosAutov9 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2021 Samsung Electronics Co., Ltd. + * + * Samsung's ExynosAutov9 SoC pin-mux and pin-config options are listed as + * device tree nodes in this file. + */ + +#include + +&pinctrl_alive { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + , + , + , + , + , + , + ; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gic>; + interrupts = , + ; + }; + + dp0_hpd: dp0-hpd-pins { + samsung,pins = "gpa1-0"; + samsung,pin-function = ; + }; + + dp1_hpd: dp1-hpd-pins { + samsung,pins = "gpa1-1"; + samsung,pin-function = ; + }; + + gpq0: gpq0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + speedy0_bus: speedy0-bus-pins { + samsung,pins = "gpq0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + speedy1_bus: speedy1-bus-pins { + samsung,pins = "gpa0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_aud { + gpb0: gpb0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb2: gpb2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb3: gpb3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + aud_codec_mclk: aud-codec-mclk-pins { + samsung,pins = "gpb0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_codec_mclk_idle: aud-codec-mclk-idle-pins { + samsung,pins = "gpb0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s0_bus: aud-i2s0-pins { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s0_idle: aud-i2s0-idle-pins { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s1_bus: aud-i2s1-pins { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s1_idle: aud-i2s1-idle-pins { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s2_bus: aud-i2s2-pins { + samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s2_idle: aud-i2s2-idle-pins { + samsung,pins = "gpb1-4", "gpb1-5", "gpb1-6", "gpb1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s3_bus: aud-i2s3-pins { + samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s3_idle: aud-i2s3-idle-pins { + samsung,pins = "gpb2-0", "gpb2-1", "gpb2-2", "gpb2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s4_bus: aud-i2s4-pins { + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s4_idle: aud-i2s4-idle-pins { + samsung,pins = "gpb2-4", "gpb2-5", "gpb2-6", "gpb2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s5_bus: aud-i2s5-pins { + samsung,pins = "gpb3-0", "gpb3-1", "gpb3-2", "gpb3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s5_idle: aaud-i2s5-idle-pins { + samsung,pins = "gpb3-0", "gpb3-1", "gpb3-2", "gpb3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s6_bus: aud-i2s6-pins { + samsung,pins = "gpb3-4", "gpb3-5", "gpb3-6", "gpb3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + aud_i2s6_idle: aaud-i2s6-idle-pins { + samsung,pins = "gpb3-4", "gpb3-5", "gpb3-6", "gpb3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_fsys0 { + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + pcie_clkreq0: pcie-clkreq0-pins { + samsung,pins = "gpf0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst0_out: pcie-perst0-out-pins { + samsung,pins = "gpf0-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst0_in: pcie-perst0-in-pins { + samsung,pins = "gpf0-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq1: pcie-clkreq1-pins { + samsung,pins = "gpf0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst1_out: pcie-perst1-out-pins { + samsung,pins = "gpf0-3"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst1_in: pcie-perst1-in-pins { + samsung,pins = "gpf0-3"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq2: pcie-clkreq2-pins { + samsung,pins = "gpf0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst2_out: pcie-perst2-out-pins { + samsung,pins = "gpf0-5"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst2_in: pcie-perst2-in-pins { + samsung,pins = "gpf0-5"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq3: pcie-clkreq3-pins { + samsung,pins = "gpf1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst3_out: pcie-perst3-out-pins { + samsung,pins = "gpf1-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst3_in: pcie-perst3-in-pins { + samsung,pins = "gpf1-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq4: pcie-clkreq4-pins { + samsung,pins = "gpf1-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst4_out: pcie-perst4-out-pins { + samsung,pins = "gpf1-3"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst4_in: pcie-perst4-in-pins { + samsung,pins = "gpf1-1"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_clkreq5: pcie-clkreq5-pins { + samsung,pins = "gpf1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + samsung,pin-pud-pdn = ; + }; + + pcie_perst5_out: pcie-perst5-out-pins { + samsung,pins = "gpf1-5"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; + + pcie_perst5_in: pcie-perst5-in-pins { + samsung,pins = "gpf1-5"; + samsung,pin-function = ; + samsung,pin-drv = ; + samsung,pin-con-pdn = ; + }; +}; + +&pinctrl_fsys1 { + gpf8: gpf8 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + sd2_clk: sd2-clk-pins { + samsung,pins = "gpf8-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; + + sd2_cmd: sd2-cmd-pins { + samsung,pins = "gpf8-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; + + sd2_bus1: sd2-bus-width1-pins { + samsung,pins = "gpf8-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; + + sd2_bus4: sd2-bus-width4-pins { + samsung,pins = "gpf8-3", "gpf8-4", "gpf8-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = <2>; /* 2x drive strength */ + }; +}; + +&pinctrl_fsys2 { + gpf2: gpf2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf3: gpf3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf4: gpf4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf5: gpf5 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf6: gpf6 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + ufs_rst_n: ufs-rst-n-pins { + samsung,pins = "gpf2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_refclk_out: ufs-refclk-out-pins { + samsung,pins = "gpf2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_rst_n_1: ufs-rst-n-1-pins { + samsung,pins = "gpf2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + ufs_refclk_out_1: ufs-refclk-out-1-pins { + samsung,pins = "gpf2-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-con-pdn = ; + }; + + eth0_mdc_mdio: eth0-mdc-mdio-pins { + samsung,pins = "gpf4-5", "gpf4-6"; + samsung,pin-function = ; + }; + + eth0_rgmii: eth0-rgmii-pins { + samsung,pins = "gpf3-1", "gpf3-2", "gpf3-3", "gpf3-4", + "gpf3-5", "gpf3-6", "gpf3-7", "gpf4-0", + "gpf4-1", "gpf4-2", "gpf4-3", "gpf4-4"; + samsung,pin-function = ; + }; + + eth0_pps_out: eth0-pps-out-pins { + samsung,pins = "gpf3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + eth1_mdc_mdio: eth1-mdc-mdio-pins { + samsung,pins = "gpf6-5", "gpf6-6"; + samsung,pin-function = ; + }; + + eth1_rgmii: eth1-rgmii-pins { + samsung,pins = "gpf5-1", "gpf5-2", "gpf5-3", "gpf5-4", + "gpf5-5", "gpf5-6", "gpf5-7", "gpf6-0", + "gpf6-1", "gpf6-2", "gpf6-3", "gpf6-4"; + samsung,pin-function = ; + }; + + eth1_pps_out: eth1-pps-out-pins { + samsung,pins = "gpf5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_peric0 { + gpp0: gpp0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp1: gpp1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp2: gpp2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + pwm_tout0: pwm-tout0-pins { + samsung,pins = "gpg0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + pwm_tout1: pwm-tout1-pins { + samsung,pins = "gpg0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + pwm_tout2: pwm-tout2-pins { + samsung,pins = "gpg0-2"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + pwm_tout3: pwm-tout3-pins { + samsung,pins = "gpg0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI00 */ + hsi2c0_bus: hsi2c0-bus-pins { + samsung,pins = "gpp0-0", "gpp0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI00_I2C */ + hsi2c1_bus: hsi2c1-bus-pins { + samsung,pins = "gpp0-2", "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI01 */ + hsi2c2_bus: hsi2c2-bus-pins { + samsung,pins = "gpp0-4", "gpp0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI01_I2C */ + hsi2c3_bus: hsi2c3-bus-pins { + samsung,pins = "gpp0-6", "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI02 */ + hsi2c4_bus: hsi2c4-bus-pins { + samsung,pins = "gpp1-0", "gpp1-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI02_I2C */ + hsi2c5_bus: hsi2c5-bus-pins { + samsung,pins = "gpp1-2", "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI03 */ + hsi2c6_bus: hsi2c6-bus-pins { + samsung,pins = "gpp1-4", "gpp1-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI03_I2C */ + hsi2c7_bus: hsi2c7-bus-pins { + samsung,pins = "gpp1-6", "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI04 */ + hsi2c8_bus: hsi2c8-bus-pins { + samsung,pins = "gpp2-0", "gpp2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI04_I2C */ + hsi2c9_bus: hsi2c9-bus-pins { + samsung,pins = "gpp2-2", "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI05 */ + hsi2c10_bus: hsi2c10-bus-pins { + samsung,pins = "gpp2-4", "gpp2-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI05_I2C */ + hsi2c11_bus: hsi2c11-bus-pins { + samsung,pins = "gpp2-6", "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* SPI USI_PERIC0_USI00_SPI */ + spi0_bus: spi0-bus-pins { + samsung,pins = "gpp0-2", "gpp0-1", "gpp0-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi0_cs: spi0-cs-pins { + samsung,pins = "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi0_cs_func: spi0-cs-func-pins { + samsung,pins = "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI01_SPI */ + spi1_bus: spi1-bus-pins { + samsung,pins = "gpp0-6", "gpp0-5", "gpp0-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi1_cs: spi1-cs-pins { + samsung,pins = "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi1_cs_func: spi1-cs-func-pins { + samsung,pins = "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI02_SPI */ + spi2_bus: spi2-bus-pins { + samsung,pins = "gpp1-2", "gpp1-1", "gpp1-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi2_cs: spi2-cs-pins { + samsung,pins = "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi2_cs_func: spi2-cs-func-pins { + samsung,pins = "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI03_SPI */ + spi3_bus: spi3-bus-pins { + samsung,pins = "gpp1-6", "gpp1-5", "gpp1-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi3_cs: spi3-cs-pins { + samsung,pins = "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi3_cs_func: spi3-cs-func-pins { + samsung,pins = "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI04_SPI */ + spi4_bus: spi4-bus-pins { + samsung,pins = "gpp2-2", "gpp2-1", "gpp2-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi4_cs: spi4-cs-pins { + samsung,pins = "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi4_cs_func: spi4-cs-func-pins { + samsung,pins = "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* PERIC0 USI05_SPI */ + spi5_bus: spi5-bus-pins { + samsung,pins = "gpp2-6", "gpp2-5", "gpp2-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi5_cs: spi5-cs-pins { + samsung,pins = "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + spi5_cs_func: spi5-cs-func-pins { + samsung,pins = "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI00_UART */ + uart0_bus: uart0-bus-pins { + samsung,pins = "gpp0-0", "gpp0-1", "gpp0-2", "gpp0-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart0_bus_dual: uart0-bus-dual-pins { + samsung,pins = "gpp0-0", "gpp0-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI01_UART */ + uart1_bus: uart1-bus-pins { + samsung,pins = "gpp0-4", "gpp0-5", "gpp0-6", "gpp0-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart1_bus_dual: uart1-bus-dual-pins { + samsung,pins = "gpp0-4", "gpp0-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI02_UART */ + uart2_bus: uart2-bus-pins { + samsung,pins = "gpp1-0", "gpp1-1", "gpp1-2", "gpp1-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart2_bus_dual: uart2-bus-dual-pins { + samsung,pins = "gpp1-0", "gpp1-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI03_UART */ + uart3_bus: uart3-bus-pins { + samsung,pins = "gpp1-4", "gpp1-5", "gpp1-6", "gpp1-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart3_bus_dual: uart3-bus-dual-pins { + samsung,pins = "gpp1-4", "gpp1-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI04_UART */ + uart4_bus: uart4-bus-pins { + samsung,pins = "gpp2-0", "gpp2-1", "gpp2-2", "gpp2-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart4_bus_dual: uart4-bus-dual-pins { + samsung,pins = "gpp2-0", "gpp2-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC0_USI05_UART */ + uart5_bus: uart5-bus-pins { + samsung,pins = "gpp2-4", "gpp2-5", "gpp2-6", "gpp2-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart5_bus_dual: uart5-bus-dual-pins { + samsung,pins = "gpp2-4", "gpp2-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; + +&pinctrl_peric1 { + gpp3: gpp3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp4: gpp4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpp5: gpp5 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg3: gpg3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + /* PERIC1 USI06 */ + hsi2c12_bus: hsi2c12-bus-pins { + samsung,pins = "gpp3-0", "gpp3-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI06_I2C */ + hsi2c13_bus: hsi2c13-bus-pins { + samsung,pins = "gpp3-2", "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI07 */ + hsi2c14_bus: hsi2c14-bus-pins { + samsung,pins = "gpp3-4", "gpp3-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI07_I2C */ + hsi2c15_bus: hsi2c15-bus-pins { + samsung,pins = "gpp3-6", "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI08 */ + hsi2c16_bus: hsi2c16-bus-pins { + samsung,pins = "gpp4-0", "gpp4-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI08_I2C */ + hsi2c17_bus: hsi2c17-bus-pins { + samsung,pins = "gpp4-2", "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI09 */ + hsi2c18_bus: hsi2c18-bus-pins { + samsung,pins = "gpp4-4", "gpp4-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI09_I2C */ + hsi2c19_bus: hsi2c19-bus-pins { + samsung,pins = "gpp4-6", "gpp4-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI10 */ + hsi2c20_bus: hsi2c20-bus-pins { + samsung,pins = "gpp5-0", "gpp5-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI10_I2C */ + hsi2c21_bus: hsi2c21-bus-pins { + samsung,pins = "gpp5-2", "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI11 */ + hsi2c22_bus: hsi2c22-bus-pins { + samsung,pins = "gpp5-4", "gpp5-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI11_I2C */ + hsi2c23_bus: hsi2c23-bus-pins { + samsung,pins = "gpp5-6", "gpp5-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI06_SPI */ + spi6_bus: spi6-bus-pins { + samsung,pins = "gpp3-2", "gpp3-1", "gpp3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi6_cs: spi6-cs-pins { + samsung,pins = "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi6_cs_func: spi6-cs-func-pins { + samsung,pins = "gpp3-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI07_SPI */ + spi7_bus: spi7-bus-pins { + samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi7_cs: spi7-cs-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi7_cs_func: spi7-cs-func-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI08_SPI */ + spi8_bus: spi8-bus-pins { + samsung,pins = "gpp4-2", "gpp4-1", "gpp4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi8_cs: spi8-cs-pins { + samsung,pins = "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi8_cs_func: spi8-cs-func-pins { + samsung,pins = "gpp4-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI09_SPI */ + spi9_bus: spi9-bus-pins { + samsung,pins = "gpp4-6", "gpp4-5", "gpp4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi9_cs: spi9-cs-pins { + samsung,pins = "gpp4-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi9_cs_func: spi9-cs-func-pins { + samsung,pins = "gpp4-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI10_SPI */ + spi10_bus: spi10-pins { + samsung,pins = "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi10_cs: spi10-cs-pins { + samsung,pins = "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi10_cs_func: spi10-cs-func-pins { + samsung,pins = "gpp5-3"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* PERIC1 USI11_SPI */ + spi11_bus: spi11-pins { + samsung,pins = "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi11_cs: spi11-cs-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + spi11_cs_func: spi11-cs-func-pins { + samsung,pins = "gpp3-7"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; + + /* USI_PERIC1_USI06_UART */ + uart6_bus: uart6-bus-pins { + samsung,pins = "gpp3-3", "gpp3-2", "gpp3-1", "gpp3-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart6_bus_dual: uart6-bus-dual-pins { + samsung,pins = "gpp3-0", "gpp3-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI07_UART */ + uart7_bus: uart7-bus-pins { + samsung,pins = "gpp3-7", "gpp3-6", "gpp3-5", "gpp3-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart7_bus_dual: uart7-bus-dual-pins { + samsung,pins = "gpp3-4", "gpp3-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI08_UART */ + uart8_bus: uart8-bus-pins { + samsung,pins = "gpp4-3", "gpp4-2", "gpp4-1", "gpp4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart8_bus_dual: uart8-bus-dual-pins { + samsung,pins = "gpp4-0", "gpp4-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI09_UART */ + uart9_bus: uart9-bus-pins { + samsung,pins = "gpp4-7", "gpp4-6", "gpp4-5", "gpp4-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart9_bus_dual: uart9-bus-dual-pins { + samsung,pins = "gpp4-4", "gpp4-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI10_UART */ + uart10_bus: uart10-bus-pins { + samsung,pins = "gpp5-3", "gpp5-2", "gpp5-1", "gpp5-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart10_bus_dual: uart10-bus-dual-pins { + samsung,pins = "gpp5-0", "gpp5-1"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + /* USI_PERIC1_USI11_UART */ + uart11_bus: uart11-bus-pins { + samsung,pins = "gpp5-7", "gpp5-6", "gpp5-5", "gpp5-4"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; + + uart11_bus_dual: uart11-bus-dual-pins { + samsung,pins = "gpp5-4", "gpp5-5"; + samsung,pin-function = ; + samsung,pin-pud = ; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi new file mode 100644 index 000000000000..932d7525d4b8 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -0,0 +1,301 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's ExynosAuto v9 SoC device tree source + * + * Copyright (c) 2021 Samsung Electronics Co., Ltd. + * + */ + +#include + +/ { + compatible = "samsung,exynosautov9"; + #address-cells = <2>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + aliases { + pinctrl0 = &pinctrl_alive; + pinctrl1 = &pinctrl_aud; + pinctrl2 = &pinctrl_fsys0; + pinctrl3 = &pinctrl_fsys1; + pinctrl4 = &pinctrl_fsys2; + pinctrl5 = &pinctrl_peric0; + pinctrl6 = &pinctrl_peric1; + }; + + arm-pmu { + compatible = "arm,cortex-a76-pmu"; + interrupts = , + , + , + , + , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>, + <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x100>; + enable-method = "psci"; + }; + + cpu2: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x200>; + enable-method = "psci"; + }; + + cpu3: cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x300>; + enable-method = "psci"; + }; + + cpu4: cpu@10000 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10000>; + enable-method = "psci"; + }; + + cpu5: cpu@10100 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10100>; + enable-method = "psci"; + }; + + cpu6: cpu@10200 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10200>; + enable-method = "psci"; + }; + + cpu7: cpu@10300 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x10300>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + cpu_suspend = <0xc4000001>; + cpu_off = <0x84000002>; + cpu_on = <0xc4000003>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + fixed-rate-clocks { + xtcxo: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + clock-output-names = "oscclk"; + }; + + /* + * Keep the stub clock for serial driver, until proper clock + * driver is implemented. + */ + uart_clock: uart-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <133250000>; + clock-output-names = "uart"; + }; + + /* + * Keep the stub clock for ufs driver, until proper clock + * driver is implemented. + */ + ufs_core_clock: ufs-core-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <166562500>; + }; + }; + + soc: soc@0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0x20000000>; + + gic: interrupt-controller@10101000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x10101000 0x1000>, + <0x10102000 0x2000>, + <0x10104000 0x2000>, + <0x10106000 0x2000>; + interrupts = ; + }; + + pinctrl_alive: pinctrl@10450000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x10450000 0x1000>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos7-wakeup-eint"; + }; + }; + + pinctrl_aud: pinctrl@19c60000{ + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x19c60000 0x1000>; + }; + + pinctrl_fsys0: pinctrl@17740000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x17740000 0x1000>; + interrupts = ; + }; + + pinctrl_fsys1: pinctrl@17060000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x17060000 0x1000>; + interrupts = ; + }; + + pinctrl_fsys2: pinctrl@17c30000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x17c30000 0x1000>; + interrupts = ; + }; + + pinctrl_peric0: pinctrl@10230000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x10230000 0x1000>; + interrupts = ; + }; + + pinctrl_peric1: pinctrl@10830000 { + compatible = "samsung,exynosautov9-pinctrl"; + reg = <0x10830000 0x1000>; + interrupts = ; + }; + + pmu_system_controller: system-controller@10460000 { + compatible = "samsung,exynos7-pmu", "syscon"; + reg = <0x10460000 0x10000>; + }; + + syscon_fsys2: syscon@17c20000 { + compatible = "samsung,exynosautov9-sysreg", "syscon"; + reg = <0x17c20000 0x1000>; + }; + + /* USI: UART */ + serial_0: uart@10300000 { + compatible = "samsung,exynos850-uart"; + reg = <0x10300000 0x100>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_bus_dual>; + clocks = <&uart_clock>, <&uart_clock>; + clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; + }; + + ufs_0_phy: ufs0-phy@17e04000 { + compatible = "samsung,exynosautov9-ufs-phy"; + reg = <0x17e04000 0xc00>; + reg-names = "phy-pma"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + clocks = <&xtcxo>; + clock-names = "ref_clk"; + status = "disabled"; + }; + + ufs_0: ufs0@17e00000 { + compatible ="samsung,exynosautov9-ufs"; + + reg = <0x17e00000 0x100>, /* 0: HCI standard */ + <0x17e01100 0x410>, /* 1: Vendor-specific */ + <0x17e80000 0x8000>, /* 2: UNIPRO */ + <0x17dc0000 0x2200>; /* 3: UFS protector */ + reg-names = "hci", "vs_hci", "unipro", "ufsp"; + interrupts = ; + clocks = <&ufs_core_clock>, + <&ufs_core_clock>; + clock-names = "core_clk", "sclk_unipro_main"; + freq-table-hz = <0 0>, <0 0>; + pinctrl-names = "default"; + pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; + phys = <&ufs_0_phy>; + phy-names = "ufs-phy"; + samsung,sysreg = <&syscon_fsys2>; + samsung,ufs-shareability-reg-offset = <0x710>; + status = "disabled"; + }; + }; +}; + +#include "exynosautov9-pinctrl.dtsi" From patchwork Tue Oct 12 00:23:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chanho Park X-Patchwork-Id: 12551229 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E95D6C4332F for ; Tue, 12 Oct 2021 00:25:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C7327604DC for ; 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Tue, 12 Oct 2021 09:25:33 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.51]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20211012002533epsmtip233d30217830f2a683acbccded4234fbd~tINPH1fyD0815908159epsmtip2K; Tue, 12 Oct 2021 00:25:33 +0000 (GMT) From: Chanho Park To: Krzysztof Kozlowski , Rob Herring , Linus Walleij Cc: Tomasz Figa , Sylwester Nawrocki , linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, Chanho Park Subject: [PATCH v4 3/3] arm64: dts: exynos: add minimal support for exynosautov9 sadk board Date: Tue, 12 Oct 2021 09:23:14 +0900 Message-Id: <20211012002314.38965-4-chanho61.park@samsung.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211012002314.38965-1-chanho61.park@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprKJsWRmVeSWpSXmKPExsWy7bCmqe6/qymJBoeP61tc3q9tMf/IOVaL jW9/MFlM+bOcyWLG+X1MFq17j7BbHH7TzmqxatcfRgcOj1kNvWweO2fdZffYtKqTzePOtT1s Hn1bVjF6fN4kF8AWlW2TkZqYklqkkJqXnJ+SmZduq+QdHO8cb2pmYKhraGlhrqSQl5ibaqvk 4hOg65aZA3SPkkJZYk4pUCggsbhYSd/Opii/tCRVISO/uMRWKbUgJafAvECvODG3uDQvXS8v tcTK0MDAyBSoMCE7Y+9ttYJGiYpfe++yNzAeEe5i5OSQEDCRuNBwgrWLkYtDSGAHo0Tv04Ns EM4nRolt12eyg1QJCXxjlDi1RRum43DLP3aIor2MEjNb90M5Hxkl5q/fwwxSxSagK7Hl+StG kISIQCejxMpv25hAEswCBxgltlywA7GFBWIlNqzdB9bAIqAqMff8W1YQm1fATmLx9i3MEOvk JY786gSzOQXsJVrWnGKBqBGUODnzCQvETHmJ5q2zmUGWSQh8ZZdY9P8JK0Szi8SRQxegBglL vDq+hR3ClpJ42d/GDtHQzSjR+ug/VGI1o0Rnow+EbS/xa/oWoEEcQBs0Jdbv0gcxJQSUJY7c gtrLJ9Fx+C87RJhXoqNNCKJRXeLA9uksELasRPecz1DXeEhc3D8bGliTGCVWLDjPNoFRYRaS d2YheWcWwuIFjMyrGMVSC4pz01OLjQpM4DGcnJ+7iRGcPrU8djDOfvtB7xAjEwfjIUYJDmYl Ed63HCmJQrwpiZVVqUX58UWlOanFhxhNgYE9kVlKNDkfmMDzSuINTSwNTMzMDM2NTA3MlcR5 5/5zShQSSE8sSc1OTS1ILYLpY+LglGpg8ry1O31v6SIVn0MPTn1cwCfyg9O5w7q0sVjw+2mt v5bqupuq9pS+3cyjeuduwPrqKZ1LxU/IRm+5K20uvlKjrXLDG28h67Jc58elBU1ZSdfs1tlm dnEfW30kefvKC65KEe7f725SPv6c0bBh2vXnzxYa/q3u0o3yquNUb/n4bvOjY+9NOAKkLx/K EFU8098c9O74nuKrhms7o6Vex0/oUqza/7AqPuvb95aW5dN+fLk8623R9+0Sm1c1zXVYyi92 7NZ8BeYZXkIzj3mHsq1emWuztXCaQMzDjCcct+M0ZeOa86SqivP/+XLNPHRkz+q1/19mq4jJ 5Knc6vm/Wnbe+uNfc9v7ps7+dr1FaruIsRJLcUaioRZzUXEiAAau+5soBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrPLMWRmVeSWpSXmKPExsWy7bCSvO7fqymJBtM/m1pc3q9tMf/IOVaL jW9/MFlM+bOcyWLG+X1MFq17j7BbHH7TzmqxatcfRgcOj1kNvWweO2fdZffYtKqTzePOtT1s Hn1bVjF6fN4kF8AWxWWTkpqTWZZapG+XwJWx97ZaQaNExa+9d9kbGI8IdzFyckgImEgcbvnH DmILCexmlJj1LQEiLivx7N0OdghbWOJ+yxHWLkYuoJr3jBJfpnWzgCTYBHQltjx/xQiSEBHo ZpTob+xlAnGYBY4wSvz//gusSlggWmLbmYVMIDaLgKrE3PNvWUFsXgE7icXbtzBDrJCXOPKr E8zmFLCXaFlzCqiXA2idnURvpxFEuaDEyZlPwEYyA5U3b53NPIFRYBaS1CwkqQWMTKsYJVML inPTc4sNCwzzUsv1ihNzi0vz0vWS83M3MYLDXEtzB+P2VR/0DjEycTAeYpTgYFYS4X3LkZIo xJuSWFmVWpQfX1Sak1p8iFGag0VJnPdC18l4IYH0xJLU7NTUgtQimCwTB6dUA9PBhAMBthuV su/GajW5X/44o9TC5n6FVEDbN8+Q32dik9quH4p1uNUQv91Hf4NW8rTTPIzSPsv9/a7peRZM zeDZkCPy6teF2LZzSpsPbKj3sHDoW2D4VEL8oYBT26OUGbOmJ/H/nf6gUu2iVF9UbuLpGQa9 G9aqP5Y1k7Svka6Y49S766HI13hBBvvVzUrq60TLm3RYhK15z7scXK765GsTn9C7O4dDlk2a o92xd8aTk4Iny+ttNnr5vUxY5GUl3Pn05/WGDjaT1KDrbXEZOv9iTZ5Xua5e9jH5gn3qWq/7 z1fHP3975d7bu45Hp3+J/7Wlwl/x4YOX//6b9Oi/Me5ZYMj+ftXqcp1SN+fAeCWW4oxEQy3m ouJEAD8nisjiAgAA X-CMS-MailID: 20211012002533epcas2p10315d89423e02bf36a5e0c404268ca1f X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20211012002533epcas2p10315d89423e02bf36a5e0c404268ca1f References: <20211012002314.38965-1-chanho61.park@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org SADK(Samsung Automotive Development Kit) is the development kit to evaluate Exynos Auto v9 SoC. It has 16GB LPDDR4 DRAM and two 256GB Samsung UFS. This patch enables only serial console and ufs0 device. Signed-off-by: Chanho Park --- .../bindings/arm/samsung/samsung-boards.yaml | 6 ++ arch/arm64/boot/dts/exynos/Makefile | 3 +- .../boot/dts/exynos/exynosautov9-sadk.dts | 56 +++++++++++++++++++ 3 files changed, 64 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml index 0796f0c87727..ef6dc14be4b5 100644 --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml @@ -199,6 +199,12 @@ properties: - samsung,exynos7-espresso # Samsung Exynos7 Espresso - const: samsung,exynos7 + - description: Exynos Auto v9 based boards + items: + - enum: + - samsung,exynosautov9-sadk # Samsung Exynos Auto v9 SADK + - const: samsung,exynosautov9 + required: - compatible diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile index e0a2facde6a2..b41e86df0a84 100644 --- a/arch/arm64/boot/dts/exynos/Makefile +++ b/arch/arm64/boot/dts/exynos/Makefile @@ -2,4 +2,5 @@ dtb-$(CONFIG_ARCH_EXYNOS) += \ exynos5433-tm2.dtb \ exynos5433-tm2e.dtb \ - exynos7-espresso.dtb + exynos7-espresso.dtb \ + exynosautov9-sadk.dtb diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts new file mode 100644 index 000000000000..ef46d7aa6e28 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung ExynosAutov9 SADK board device tree source + * + * Copyright (c) 2021 Samsung Electronics Co., Ltd. + * + */ + +/dts-v1/; +#include "exynosautov9.dtsi" +#include + +/ { + model = "Samsung ExynosAuto v9 SADK board"; + compatible = "samsung,exynosautov9-sadk", "samsung,exynosautov9"; + + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &serial_0; + }; + + chosen { + stdout-path = &serial_0; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x77000000>, + <0x8 0x80000000 0x1 0x7ba00000>, + <0xa 0x00000000 0x2 0x00000000>; + }; + + ufs_0_fixed_vcc_reg: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "ufs-vcc"; + gpio = <&gpq0 1 GPIO_ACTIVE_HIGH>; + regulator-boot-on; + enable-active-high; + }; +}; + +&serial_0 { + status = "okay"; +}; + +&ufs_0_phy { + status = "okay"; +}; + +&ufs_0 { + status = "okay"; + vcc-supply = <&ufs_0_fixed_vcc_reg>; + vcc-fixed-regulator; +};