From patchwork Tue Oct 12 19:07:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 12553567 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65073C433FE for ; Tue, 12 Oct 2021 19:07:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1200B60EFE for ; Tue, 12 Oct 2021 19:07:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231751AbhJLTJV (ORCPT ); Tue, 12 Oct 2021 15:09:21 -0400 Received: from mail.kernel.org ([198.145.29.99]:32814 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232502AbhJLTJS (ORCPT ); Tue, 12 Oct 2021 15:09:18 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 3F23A60F3A; Tue, 12 Oct 2021 19:07:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1634065635; bh=dq25YDDgZtRWCgeIsWvsLSv7VHseIKNSZpeaKIwUbDY=; h=From:To:Cc:Subject:Date:From; b=uckfq2Ug9DsGxJmvutLCPQLJGrfh6oL/HiPdGlcxg2QmuU7SHoVfouFH68Ao+9NvY ciDOFwGaArgMTlP/SrSyvKZr04be9l181TrhmygaS0o0YQbEhhtNuHPcrna19i/MMR 9roVAp9jpOMFuC0ttYUs9YtSNiRSRM0OEzYYLB14aSnTESChzWOOfw1UgpApXfyYpM fLts/Yg9N5QkhbBliwnWBI7lx5omOgAGESh2INyUxC4OFX6fvuSV8Byt8wNRcWZ3RX RBYUyhzP3wNxhqyPSl6oEc1eyVuELjrzb183litHLGo6lt7ogTT8wXR2O0gAsvY++o D47J2TDA0Yiig== From: Dinh Nguyen To: bp@alien8.de Cc: dinguyen@kernel.org, linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, Michal Simek Subject: [PATCHv4 1/4] EDAC/synopsys: use the quirk for version instead of ddr version Date: Tue, 12 Oct 2021 14:07:06 -0500 Message-Id: <20211012190709.1504152-1-dinguyen@kernel.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Version 2.40a supports DDR_ECC_INTR_SUPPORT for a quirk, so use that quirk to determine a call to setup_address_map(). Reviewed-by: Michal Simek Signed-off-by: Dinh Nguyen --- v4: add Reviewed-by v3: new patch --- drivers/edac/synopsys_edac.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index 7e7146b22c16..bf237fccb444 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -1352,8 +1352,7 @@ static int mc_probe(struct platform_device *pdev) } } - if (of_device_is_compatible(pdev->dev.of_node, - "xlnx,zynqmp-ddrc-2.40a")) + if (priv->p_data->quirks & DDR_ECC_INTR_SUPPORT) setup_address_map(priv); #endif From patchwork Tue Oct 12 19:07:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 12553569 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D1C7C433EF for ; Tue, 12 Oct 2021 19:07:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 689B361050 for ; Tue, 12 Oct 2021 19:07:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233398AbhJLTJV (ORCPT ); Tue, 12 Oct 2021 15:09:21 -0400 Received: from mail.kernel.org ([198.145.29.99]:32836 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232568AbhJLTJS (ORCPT ); Tue, 12 Oct 2021 15:09:18 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 1A56561050; Tue, 12 Oct 2021 19:07:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1634065637; bh=fvFU9eEDCHxxVSMgMcUqyc5olonb7mh0yKqKvjyVRy4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iLm6nN1v4YcZrRC36IbEuI6+7xFWnWXkIThpdmiGavNKI87wELACqD54jiR64z1Uj G/i+2d6OhEa5w6kDEQQ2ZbvrK9VH9P1CP9e6ZElOpU6Hq+KZ+sifqODBJVr/qlO0uA +fyaxiZ8GCc08c5QhKC+J0OVg/VqboUCAJE2ZlVH3PQ5SJ5VLuegB8Zsk7Ggg5CvIx O5E9oLQXclZh4Jz9hoUHkX4MinZpC/hQVoHD2zjspBiITERhl9QN/4JyAiiPXzpvWu lYkW3P2CT3V3cLjV/grsSk3+w5Ty9qLeKVDitBtNp2WkA3T7qIA1YbSsRiJRXQdWX8 IepZy12kt9HqA== From: Dinh Nguyen To: bp@alien8.de Cc: dinguyen@kernel.org, linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, Michal Simek Subject: [PATCHv4 2/4] EDAC/synopsys: add support for version 3 of the Synopsys EDAC DDR Date: Tue, 12 Oct 2021 14:07:07 -0500 Message-Id: <20211012190709.1504152-2-dinguyen@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211012190709.1504152-1-dinguyen@kernel.org> References: <20211012190709.1504152-1-dinguyen@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Adds support for version 3.80a of the Synopsys DDR controller with EDAC. This version of the controller has the following differences: - UE/CE are auto cleared - Interrupts are supported by default Reviewed-by: Michal Simek Signed-off-by: Dinh Nguyen --- v4: Add Reviewed-by v3: Address comments from Michal Simek use bit macro removed extra "cleared" word from comment section about v3.0 v2: remove "This patch" from commit message --- drivers/edac/synopsys_edac.c | 49 ++++++++++++++++++++++++++++++------ 1 file changed, 42 insertions(+), 7 deletions(-) diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index bf237fccb444..66ee37ea0acc 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -101,6 +101,7 @@ /* DDR ECC Quirks */ #define DDR_ECC_INTR_SUPPORT BIT(0) #define DDR_ECC_DATA_POISON_SUPPORT BIT(1) +#define DDR_ECC_INTR_SELF_CLEAR BIT(2) /* ZynqMP Enhanced DDR memory controller registers that are relevant to ECC */ /* ECC Configuration Registers */ @@ -171,6 +172,10 @@ #define DDR_QOS_IRQ_EN_OFST 0x20208 #define DDR_QOS_IRQ_DB_OFST 0x2020C +/* DDR QOS Interrupt register definitions */ +#define DDR_UE_MASK BIT(9) +#define DDR_CE_MASK BIT(8) + /* ECC Corrected Error Register Mask and Shifts*/ #define ECC_CEADDR0_RW_MASK 0x3FFFF #define ECC_CEADDR0_RNK_MASK BIT(24) @@ -533,10 +538,16 @@ static irqreturn_t intr_handler(int irq, void *dev_id) priv = mci->pvt_info; p_data = priv->p_data; - regval = readl(priv->baseaddr + DDR_QOS_IRQ_STAT_OFST); - regval &= (DDR_QOSCE_MASK | DDR_QOSUE_MASK); - if (!(regval & ECC_CE_UE_INTR_MASK)) - return IRQ_NONE; + /* + * v3.0 of the controller has the ce/ue bits cleared automatically, + * so this condition does not apply. + */ + if (!(priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR)) { + regval = readl(priv->baseaddr + DDR_QOS_IRQ_STAT_OFST); + regval &= (DDR_QOSCE_MASK | DDR_QOSUE_MASK); + if (!(regval & ECC_CE_UE_INTR_MASK)) + return IRQ_NONE; + } status = p_data->get_error_info(priv); if (status) @@ -548,7 +559,9 @@ static irqreturn_t intr_handler(int irq, void *dev_id) edac_dbg(3, "Total error count CE %d UE %d\n", priv->ce_cnt, priv->ue_cnt); - writel(regval, priv->baseaddr + DDR_QOS_IRQ_STAT_OFST); + /* v3.0 of the controller does not have this register */ + if (!(priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR)) + writel(regval, priv->baseaddr + DDR_QOS_IRQ_STAT_OFST); return IRQ_HANDLED; } @@ -834,8 +847,13 @@ static void mc_init(struct mem_ctl_info *mci, struct platform_device *pdev) static void enable_intr(struct synps_edac_priv *priv) { /* Enable UE/CE Interrupts */ - writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK, - priv->baseaddr + DDR_QOS_IRQ_EN_OFST); + if (priv->p_data->quirks & DDR_ECC_INTR_SELF_CLEAR) + writel(DDR_UE_MASK | DDR_CE_MASK, + priv->baseaddr + ECC_CLR_OFST); + else + writel(DDR_QOSUE_MASK | DDR_QOSCE_MASK, + priv->baseaddr + DDR_QOS_IRQ_EN_OFST); + } static void disable_intr(struct synps_edac_priv *priv) @@ -890,6 +908,19 @@ static const struct synps_platform_data zynqmp_edac_def = { ), }; +static const struct synps_platform_data synopsys_edac_def = { + .get_error_info = zynqmp_get_error_info, + .get_mtype = zynqmp_get_mtype, + .get_dtype = zynqmp_get_dtype, + .get_ecc_state = zynqmp_get_ecc_state, + .quirks = (DDR_ECC_INTR_SUPPORT | DDR_ECC_INTR_SELF_CLEAR +#ifdef CONFIG_EDAC_DEBUG + | DDR_ECC_DATA_POISON_SUPPORT +#endif + ), +}; + + static const struct of_device_id synps_edac_match[] = { { .compatible = "xlnx,zynq-ddrc-a05", @@ -899,6 +930,10 @@ static const struct of_device_id synps_edac_match[] = { .compatible = "xlnx,zynqmp-ddrc-2.40a", .data = (void *)&zynqmp_edac_def }, + { + .compatible = "snps,ddrc-3.80a", + .data = (void *)&synopsys_edac_def + }, { /* end of table */ } From patchwork Tue Oct 12 19:07:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 12553571 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8FA1EC433F5 for ; Tue, 12 Oct 2021 19:07:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7AC20610CE for ; Tue, 12 Oct 2021 19:07:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233420AbhJLTJW (ORCPT ); Tue, 12 Oct 2021 15:09:22 -0400 Received: from mail.kernel.org ([198.145.29.99]:32852 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233033AbhJLTJT (ORCPT ); Tue, 12 Oct 2021 15:09:19 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 4013A610A2; Tue, 12 Oct 2021 19:07:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1634065637; bh=UFYdT5fM/ew8+GaYjoEF6ruKEwsdbZaQwxx70se9Yxc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cL/HZdF1BXvszd0aNiYtg6bzYCssVMKsXN7VssOBkyBqDxsvmUkSFr9AgQd8b6NnF LRsf6CZ1XPs5bpeSdDnKn7Vyrozh1m3lsvhq4PecdEaH+NeTtb36cGk2FfkvHMbe3R eBmH3oDXIuxnHkH6A5Sw4JDLW2jQuyeRufwruT4ylfjWV4PAi7QWUZqHIGOfCG7Yw2 RxXD/6vX0jBp40mzwNyrfuV1kuFsqTOFaF8ce/kYe2mJ5FXlk5eciLQNLGyUTohJhY sV6aKtWtNgWyjnuJpf01ZAeBm+XxG3vJKWeu5Rd8/8ahcro3SMZ7vKUm+QNwmwZ7AI YgVLZZ5E55Kcw== From: Dinh Nguyen To: bp@alien8.de Cc: dinguyen@kernel.org, linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, Michal Simek Subject: [PATCHv4 3/4] EDAC/synopsys: v3.80a of the synopsys edac contoller is also on the N5X Date: Tue, 12 Oct 2021 14:07:08 -0500 Message-Id: <20211012190709.1504152-3-dinguyen@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211012190709.1504152-1-dinguyen@kernel.org> References: <20211012190709.1504152-1-dinguyen@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Intel's N5X platform is also using the Synopsys EDAC controller. Acked-by: Michal Simek Signed-off-by: Dinh Nguyen --- v4: Add Acked-by v3: s/ARCH_N5X/ARCH_INTEL_SOCFPGA v2: no changes --- drivers/edac/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig index 2fc4c3f91fd5..58ab63642e72 100644 --- a/drivers/edac/Kconfig +++ b/drivers/edac/Kconfig @@ -484,7 +484,7 @@ config EDAC_ARMADA_XP config EDAC_SYNOPSYS tristate "Synopsys DDR Memory Controller" - depends on ARCH_ZYNQ || ARCH_ZYNQMP + depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA help Support for error detection and correction on the Synopsys DDR memory controller. From patchwork Tue Oct 12 19:07:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 12553573 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25565C43217 for ; Tue, 12 Oct 2021 19:07:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0EB0B60E09 for ; Tue, 12 Oct 2021 19:07:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233435AbhJLTJW (ORCPT ); Tue, 12 Oct 2021 15:09:22 -0400 Received: from mail.kernel.org ([198.145.29.99]:32872 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233287AbhJLTJU (ORCPT ); Tue, 12 Oct 2021 15:09:20 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 0E5B860E09; Tue, 12 Oct 2021 19:07:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1634065638; bh=NvMXR+4Usl2rtR3OS7hkHAbHRkGS7009/ooHLmyiRpE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aFoHYXY/VjP1zbmJJxlGRdqfCNffdBP3v/dmMe3+1WovkSA5gdUhRppzi63h5qziy WhikwQMnEBJgISdPETHf7VcW0cBF7Pz4HWsGMBDHGoQTWT6995bCYfh1MgRHp1F73w mS/jgpqVSAMTzPlIGrdir0m/rd5+wAN3xrxm2BtTzHOeI3LJ9WVlwcNvENeObXTgf0 Xj+3dPWguwsmibReGjuA/QAxOwKZPv6T1XZ//ibaVWFVAkOz/uK666IOX22JcWnwUa /azsn5Abf4LBMQZNGy4X8jt14zVxW17YPyXFjFimGQbnuzgmFpLR+HPJ8kw+E60Vkz D8kEoZWrqRrug== From: Dinh Nguyen To: bp@alien8.de Cc: dinguyen@kernel.org, linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, Rob Herring Subject: [PATCHv4 4/4] dt-bindings: memory: add entry for version 3.80a Date: Tue, 12 Oct 2021 14:07:09 -0500 Message-Id: <20211012190709.1504152-4-dinguyen@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211012190709.1504152-1-dinguyen@kernel.org> References: <20211012190709.1504152-1-dinguyen@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Add an entry for version 3.80a of the Synopsys DDR controller. Acked-by: Rob Herring Signed-off-by: Dinh Nguyen --- .../bindings/memory-controllers/synopsys,ddrc-ecc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml b/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml index a24588474625..fb7ae38a9c86 100644 --- a/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml @@ -26,6 +26,7 @@ properties: enum: - xlnx,zynq-ddrc-a05 - xlnx,zynqmp-ddrc-2.40a + - snps,ddrc-3.80a interrupts: maxItems: 1