From patchwork Sun Oct 17 01:33:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 12564059 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A1BAC433EF for ; Sun, 17 Oct 2021 01:56:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2348A60F8F for ; Sun, 17 Oct 2021 01:56:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244855AbhJQB6z (ORCPT ); Sat, 16 Oct 2021 21:58:55 -0400 Received: from vern.gendns.com ([98.142.107.122]:48390 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244893AbhJQB6r (ORCPT ); Sat, 16 Oct 2021 21:58:47 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=qRC0A3Ueoyv+zoqErrv6IS9gEd/4WrGP0FipcWDXCLU=; b=de9TKt6uXudRmo0ZN9rICTrV7n fNdMyu86kCqcKjAmOmCTrzWtcuoN1BypHHuqdhxOuEn2n+Gr1DAHKhS/XZx9J1pq2hfqUCaNGpYtL +Mv+uwLsEDTp9j8JTGf9iVPZ+l4PNentrECTCLRZoN6DYYhuCfj6J7teMyiYntYAsTV+EJQ2NeKwv 3PbO89saPH76+OqCO76q3fsE1arf4Fnv8lvgd9S/1lkV+7KORBpsSeMc/5N+jQw/tu8T4ifHSOwdF L8DdFBYzVHNYZFspMSG9bEKlQBee32bNf/X2/lu4kIEZmB+J9NNTDaipo9pWH8wNGQZe36AC8MXNX L8l1pAtw==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:41624 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.94.2) (envelope-from ) id 1mbv44-0004D2-Cb; Sat, 16 Oct 2021 21:34:18 -0400 From: David Lechner To: linux-iio@vger.kernel.org Cc: David Lechner , William Breathitt Gray , Robert Nelson , linux-kernel@vger.kernel.org Subject: [PATCH 1/8] counter/ti-eqep: implement over/underflow events Date: Sat, 16 Oct 2021 20:33:36 -0500 Message-Id: <20211017013343.3385923-2-david@lechnology.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211017013343.3385923-1-david@lechnology.com> References: <20211017013343.3385923-1-david@lechnology.com> MIME-Version: 1.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This adds support to the TI eQEP counter driver for subscribing to overflow and underflow events using the counter chrdev interface. Since this is the first event added, this involved adding an irq handler. Also, additional range checks had to be added to the ceiling attribute to avoid infinite interrupts. Signed-off-by: David Lechner --- drivers/counter/ti-eqep.c | 119 +++++++++++++++++++++++++++++++++++++- 1 file changed, 117 insertions(+), 2 deletions(-) diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c index 09817c953f9a..b7c79435e127 100644 --- a/drivers/counter/ti-eqep.c +++ b/drivers/counter/ti-eqep.c @@ -7,6 +7,7 @@ #include #include +#include #include #include #include @@ -67,6 +68,44 @@ #define QEPCTL_UTE BIT(1) #define QEPCTL_WDE BIT(0) +#define QEINT_UTO BIT(11) +#define QEINT_IEL BIT(10) +#define QEINT_SEL BIT(9) +#define QEINT_PCM BIT(8) +#define QEINT_PCR BIT(7) +#define QEINT_PCO BIT(6) +#define QEINT_PCU BIT(5) +#define QEINT_WTO BIT(4) +#define QEINT_QDC BIT(3) +#define QEINT_PHE BIT(2) +#define QEINT_PCE BIT(1) + +#define QFLG_UTO BIT(11) +#define QFLG_IEL BIT(10) +#define QFLG_SEL BIT(9) +#define QFLG_PCM BIT(8) +#define QFLG_PCR BIT(7) +#define QFLG_PCO BIT(6) +#define QFLG_PCU BIT(5) +#define QFLG_WTO BIT(4) +#define QFLG_QDC BIT(3) +#define QFLG_PHE BIT(2) +#define QFLG_PCE BIT(1) +#define QFLG_INT BIT(0) + +#define QCLR_UTO BIT(11) +#define QCLR_IEL BIT(10) +#define QCLR_SEL BIT(9) +#define QCLR_PCM BIT(8) +#define QCLR_PCR BIT(7) +#define QCLR_PCO BIT(6) +#define QCLR_PCU BIT(5) +#define QCLR_WTO BIT(4) +#define QCLR_QDC BIT(3) +#define QCLR_PHE BIT(2) +#define QCLR_PCE BIT(1) +#define QCLR_INT BIT(0) + /* EQEP Inputs */ enum { TI_EQEP_SIGNAL_QEPA, /* QEPA/XCLK */ @@ -233,12 +272,46 @@ static int ti_eqep_action_read(struct counter_device *counter, } } +static int ti_eqep_events_configure(struct counter_device *counter) +{ + struct ti_eqep_cnt *priv = counter->priv; + struct counter_event_node *event_node; + u32 qeint = 0; + + list_for_each_entry(event_node, &counter->events_list, l) { + switch (event_node->event) { + case COUNTER_EVENT_OVERFLOW: + qeint |= QEINT_PCO; + break; + case COUNTER_EVENT_UNDERFLOW: + qeint |= QEINT_PCU; + break; + } + } + + return regmap_write_bits(priv->regmap16, QEINT, ~0, qeint); +} + +static int ti_eqep_watch_validate(struct counter_device *counter, + const struct counter_watch *watch) +{ + switch (watch->event) { + case COUNTER_EVENT_OVERFLOW: + case COUNTER_EVENT_UNDERFLOW: + return 0; + default: + return -EINVAL; + } +} + static const struct counter_ops ti_eqep_counter_ops = { .count_read = ti_eqep_count_read, .count_write = ti_eqep_count_write, .function_read = ti_eqep_function_read, .function_write = ti_eqep_function_write, .action_read = ti_eqep_action_read, + .events_configure = ti_eqep_events_configure, + .watch_validate = ti_eqep_watch_validate, }; static int ti_eqep_position_ceiling_read(struct counter_device *counter, @@ -260,11 +333,17 @@ static int ti_eqep_position_ceiling_write(struct counter_device *counter, u64 ceiling) { struct ti_eqep_cnt *priv = counter->priv; + u32 qposmax = ceiling; - if (ceiling != (u32)ceiling) + /* ensure that value fits in 32-bit register */ + if (qposmax != ceiling) return -ERANGE; - regmap_write(priv->regmap32, QPOSMAX, ceiling); + /* protect against infinite overflow interrupts */ + if (qposmax == 0) + return -EINVAL; + + regmap_write(priv->regmap32, QPOSMAX, qposmax); return 0; } @@ -349,6 +428,25 @@ static struct counter_count ti_eqep_counts[] = { }, }; +static irqreturn_t ti_eqep_irq_handler(int irq, void *dev_id) +{ + struct ti_eqep_cnt *priv = dev_id; + struct counter_device *counter = &priv->counter; + u32 qflg; + + regmap_read(priv->regmap16, QFLG, &qflg); + + if (qflg & QFLG_PCO) + counter_push_event(counter, COUNTER_EVENT_OVERFLOW, 0); + + if (qflg & QFLG_PCU) + counter_push_event(counter, COUNTER_EVENT_UNDERFLOW, 0); + + regmap_set_bits(priv->regmap16, QCLR, ~0); + + return IRQ_HANDLED; +} + static const struct regmap_config ti_eqep_regmap32_config = { .name = "32-bit", .reg_bits = 32, @@ -371,6 +469,7 @@ static int ti_eqep_probe(struct platform_device *pdev) struct ti_eqep_cnt *priv; void __iomem *base; int err; + int irq; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) @@ -390,6 +489,15 @@ static int ti_eqep_probe(struct platform_device *pdev) if (IS_ERR(priv->regmap16)) return PTR_ERR(priv->regmap16); + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + err = devm_request_threaded_irq(dev, irq, NULL, ti_eqep_irq_handler, + IRQF_ONESHOT, dev_name(dev), priv); + if (err < 0) + return err; + priv->counter.name = dev_name(dev); priv->counter.parent = dev; priv->counter.ops = &ti_eqep_counter_ops; @@ -409,6 +517,13 @@ static int ti_eqep_probe(struct platform_device *pdev) pm_runtime_enable(dev); pm_runtime_get_sync(dev); + /* + * We can end up with an interupt infinite loop (interrupts triggered + * as soon as they are cleared) if we leave this at the default value + * of 0 and events are enabled. + */ + regmap_write(priv->regmap32, QPOSMAX, UINT_MAX); + err = counter_register(&priv->counter); if (err < 0) { pm_runtime_put_sync(dev); From patchwork Sun Oct 17 01:33:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 12564047 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BFB7C433F5 for ; Sun, 17 Oct 2021 01:56:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6D7C960F8F for ; Sun, 17 Oct 2021 01:56:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235366AbhJQB6P (ORCPT ); Sat, 16 Oct 2021 21:58:15 -0400 Received: from vern.gendns.com ([98.142.107.122]:48320 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244822AbhJQB6N (ORCPT ); Sat, 16 Oct 2021 21:58:13 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=/zJFA1/ApbUButziAVTyPfPd0dIklGtFb9nwExj0Sds=; b=tFYjUzQJAir5dUw9j3jTiHXWl9 xRrxkuOAos2Ayw0nPlXvCiVAzFoEwZUpeJBXbO0a+7B8b7zbKxIfmGd5yf0GU4qVnmrWFw4Oup2x8 xt1dg7sMdMpSAunJRpom3292ujLo78cPbDd4fxeqd+UZEvZprxVwpKjn1T24ZYLXd0GmgCUIBGlf/ d//SelhKaoYSR8AnFBYV5GBw1PZqkazm8VtwFpL88FbD0lm86brob0Qp1H8bHRFQ9YGipRiz9WGpU rRwnfexudaCbI0m+Zl2Es7toTHdQGHitHOzzpsI8bqHVTKIpre1a0ZO+8/VYTdifH+P2NAyCMTjl1 fNXvIGIw==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:41624 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.94.2) (envelope-from ) id 1mbv45-0004D2-5F; Sat, 16 Oct 2021 21:34:19 -0400 From: David Lechner To: linux-iio@vger.kernel.org Cc: David Lechner , William Breathitt Gray , Robert Nelson , linux-kernel@vger.kernel.org Subject: [PATCH 2/8] counter/ti-eqep: add support for direction Date: Sat, 16 Oct 2021 20:33:37 -0500 Message-Id: <20211017013343.3385923-3-david@lechnology.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211017013343.3385923-1-david@lechnology.com> References: <20211017013343.3385923-1-david@lechnology.com> MIME-Version: 1.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This adds support for direction to the TI eQEP counter driver. It adds both a direction attribute to sysfs and a direction change event to the chrdev. The direction change event type is new public API. Signed-off-by: David Lechner --- drivers/counter/ti-eqep.c | 33 +++++++++++++++++++++++++++++++++ include/uapi/linux/counter.h | 2 ++ 2 files changed, 35 insertions(+) diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c index b7c79435e127..9881e5115da6 100644 --- a/drivers/counter/ti-eqep.c +++ b/drivers/counter/ti-eqep.c @@ -106,6 +106,15 @@ #define QCLR_PCE BIT(1) #define QCLR_INT BIT(0) +#define QEPSTS_UPEVNT BIT(7) +#define QEPSTS_FDF BIT(6) +#define QEPSTS_QDF BIT(5) +#define QEPSTS_QDLF BIT(4) +#define QEPSTS_COEF BIT(3) +#define QEPSTS_CDEF BIT(2) +#define QEPSTS_FIMF BIT(1) +#define QEPSTS_PCEF BIT(0) + /* EQEP Inputs */ enum { TI_EQEP_SIGNAL_QEPA, /* QEPA/XCLK */ @@ -286,6 +295,9 @@ static int ti_eqep_events_configure(struct counter_device *counter) case COUNTER_EVENT_UNDERFLOW: qeint |= QEINT_PCU; break; + case COUNTER_EVENT_DIRECTION_CHANGE: + qeint |= QEINT_QDC; + break; } } @@ -298,6 +310,7 @@ static int ti_eqep_watch_validate(struct counter_device *counter, switch (watch->event) { case COUNTER_EVENT_OVERFLOW: case COUNTER_EVENT_UNDERFLOW: + case COUNTER_EVENT_DIRECTION_CHANGE: return 0; default: return -EINVAL; @@ -371,11 +384,27 @@ static int ti_eqep_position_enable_write(struct counter_device *counter, return 0; } +static int ti_eqep_direction_read(struct counter_device *counter, + struct counter_count *count, + enum counter_count_direction *direction) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qepsts; + + regmap_read(priv->regmap16, QEPSTS, &qepsts); + + *direction = (qepsts & QEPSTS_QDF) ? COUNTER_COUNT_DIRECTION_FORWARD + : COUNTER_COUNT_DIRECTION_BACKWARD; + + return 0; +} + static struct counter_comp ti_eqep_position_ext[] = { COUNTER_COMP_CEILING(ti_eqep_position_ceiling_read, ti_eqep_position_ceiling_write), COUNTER_COMP_ENABLE(ti_eqep_position_enable_read, ti_eqep_position_enable_write), + COUNTER_COMP_DIRECTION(ti_eqep_direction_read), }; static struct counter_signal ti_eqep_signals[] = { @@ -442,6 +471,10 @@ static irqreturn_t ti_eqep_irq_handler(int irq, void *dev_id) if (qflg & QFLG_PCU) counter_push_event(counter, COUNTER_EVENT_UNDERFLOW, 0); + if (qflg & QFLG_QDC) + counter_push_event(counter, COUNTER_EVENT_DIRECTION_CHANGE, 0); + + regmap_set_bits(priv->regmap16, QCLR, ~0); return IRQ_HANDLED; diff --git a/include/uapi/linux/counter.h b/include/uapi/linux/counter.h index d0aa95aeff7b..36dd3b474d09 100644 --- a/include/uapi/linux/counter.h +++ b/include/uapi/linux/counter.h @@ -61,6 +61,8 @@ enum counter_event_type { COUNTER_EVENT_THRESHOLD, /* Index signal detected */ COUNTER_EVENT_INDEX, + /* Direction change detected */ + COUNTER_EVENT_DIRECTION_CHANGE, }; /** From patchwork Sun Oct 17 01:33:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 12564045 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B0343C4332F for ; Sun, 17 Oct 2021 01:56:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8C42960F59 for ; Sun, 17 Oct 2021 01:56:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244817AbhJQB6N (ORCPT ); Sat, 16 Oct 2021 21:58:13 -0400 Received: from vern.gendns.com ([98.142.107.122]:48318 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235366AbhJQB6M (ORCPT ); Sat, 16 Oct 2021 21:58:12 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=eg3PSBzSaLZdxDSxvMTx8Ko3kMWj/4TAV4PDzuDIlOo=; b=Uv9YHvk+CgvDqLY7JrxFS4iwuu NTihF2NUnOgx64H4zbdoK2sBy/X7X6qPxRRBeu1KWCVwJtXMxTHbPPoTIk8VmLoiSswErZ5UJ7x60 ej5EUH5qqUomrxKQplFq8oTJs4ve1R4fqYp1sfYmcvNb12ea9FPsOD+qfz+O2fX/0/a9mck2FgnEp thsCm9BCwDWxHOCdG8FAWP98ZkGzUIKv4mjbcCEi0YN4TNvAs23Ms1Xs7YiSFajbegC438Le2n0Ms +jOIGR9PyaQ5cc/9fBcXEVrBFRLxvifRKEPDvYYBEgEH1foHCX86ALb7YJVP65pVUSPdRBHt7NMHF 4vYvvxdQ==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:41624 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.94.2) (envelope-from ) id 1mbv45-0004D2-T4; Sat, 16 Oct 2021 21:34:19 -0400 From: David Lechner To: linux-iio@vger.kernel.org Cc: David Lechner , William Breathitt Gray , Robert Nelson , linux-kernel@vger.kernel.org Subject: [PATCH 3/8] counter/ti-eqep: add support for unit timer Date: Sat, 16 Oct 2021 20:33:38 -0500 Message-Id: <20211017013343.3385923-4-david@lechnology.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211017013343.3385923-1-david@lechnology.com> References: <20211017013343.3385923-1-david@lechnology.com> MIME-Version: 1.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This adds support to the TI eQEP counter driver for the Unit Timer. The Unit Timer is a device-level extension that provides a timer to be used for speed calculations. The sysfs interface for the Unit Timer is new and will be documented in a later commit. It contains a R/W time attribute for the current time, a R/W period attribute for the timeout period and a R/W enable attribute to start/stop the timer. It also implements a timeout event on the chrdev interface that is triggered each time the period timeout is reached. Signed-off-by: David Lechner --- drivers/counter/ti-eqep.c | 132 ++++++++++++++++++++++++++++++++++- include/uapi/linux/counter.h | 2 + 2 files changed, 133 insertions(+), 1 deletion(-) diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c index 9881e5115da6..a4a5a4486329 100644 --- a/drivers/counter/ti-eqep.c +++ b/drivers/counter/ti-eqep.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -131,6 +132,7 @@ enum ti_eqep_count_func { struct ti_eqep_cnt { struct counter_device counter; + unsigned long sysclkout_rate; struct regmap *regmap32; struct regmap *regmap16; }; @@ -298,6 +300,9 @@ static int ti_eqep_events_configure(struct counter_device *counter) case COUNTER_EVENT_DIRECTION_CHANGE: qeint |= QEINT_QDC; break; + case COUNTER_EVENT_TIMEOUT: + qeint |= QEINT_UTO; + break; } } @@ -311,6 +316,7 @@ static int ti_eqep_watch_validate(struct counter_device *counter, case COUNTER_EVENT_OVERFLOW: case COUNTER_EVENT_UNDERFLOW: case COUNTER_EVENT_DIRECTION_CHANGE: + case COUNTER_EVENT_TIMEOUT: return 0; default: return -EINVAL; @@ -457,6 +463,106 @@ static struct counter_count ti_eqep_counts[] = { }, }; +static int ti_eqep_unit_timer_time_read(struct counter_device *counter, + u64 *value) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qutmr; + + regmap_read(priv->regmap32, QUTMR, &qutmr); + + /* convert timer ticks to nanoseconds */ + *value = mul_u64_u32_div(qutmr, NSEC_PER_SEC, priv->sysclkout_rate); + + return 0; +} + +static int ti_eqep_unit_timer_time_write(struct counter_device *counter, + u64 value) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qutmr; + + /* convert nanoseconds to timer ticks */ + qutmr = value = mul_u64_u32_div(value, priv->sysclkout_rate, NSEC_PER_SEC); + if (qutmr != value) + return -ERANGE; + + regmap_write(priv->regmap32, QUTMR, qutmr); + + return 0; +} + +static int ti_eqep_unit_timer_period_read(struct counter_device *counter, + u64 *value) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 quprd; + + regmap_read(priv->regmap32, QUPRD, &quprd); + + /* convert timer ticks to nanoseconds */ + *value = mul_u64_u32_div(quprd, NSEC_PER_SEC, priv->sysclkout_rate); + + return 0; +} + +static int ti_eqep_unit_timer_period_write(struct counter_device *counter, + u64 value) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 quprd; + + /* convert nanoseconds to timer ticks */ + quprd = value = mul_u64_u32_div(value, priv->sysclkout_rate, NSEC_PER_SEC); + if (quprd != value) + return -ERANGE; + + /* protect against infinite unit timeout interrupts */ + if (quprd == 0) + return -EINVAL; + + regmap_write(priv->regmap32, QUPRD, quprd); + + return 0; +} + +static int ti_eqep_unit_timer_enable_read(struct counter_device *counter, + u8 *value) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qepctl; + + regmap_read(priv->regmap16, QEPCTL, &qepctl); + *value = !!(qepctl & QEPCTL_UTE); + + return 0; +} + +static int ti_eqep_unit_timer_enable_write(struct counter_device *counter, + u8 value) +{ + struct ti_eqep_cnt *priv = counter->priv; + + if (value) + regmap_set_bits(priv->regmap16, QEPCTL, QEPCTL_UTE); + else + regmap_clear_bits(priv->regmap16, QEPCTL, QEPCTL_UTE); + + return 0; +} + +static struct counter_comp ti_eqep_device_ext[] = { + COUNTER_COMP_DEVICE_U64("unit_timer_time", ti_eqep_unit_timer_time_read, + ti_eqep_unit_timer_time_write), + COUNTER_COMP_DEVICE_U64("unit_timer_period", + ti_eqep_unit_timer_period_read, + ti_eqep_unit_timer_period_write), + COUNTER_COMP_DEVICE_BOOL("unit_timer_enable", + ti_eqep_unit_timer_enable_read, + ti_eqep_unit_timer_enable_write), +}; + static irqreturn_t ti_eqep_irq_handler(int irq, void *dev_id) { struct ti_eqep_cnt *priv = dev_id; @@ -474,6 +580,8 @@ static irqreturn_t ti_eqep_irq_handler(int irq, void *dev_id) if (qflg & QFLG_QDC) counter_push_event(counter, COUNTER_EVENT_DIRECTION_CHANGE, 0); + if (qflg & QFLG_UTO) + counter_push_event(counter, COUNTER_EVENT_TIMEOUT, 0); regmap_set_bits(priv->regmap16, QCLR, ~0); @@ -500,6 +608,7 @@ static int ti_eqep_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct ti_eqep_cnt *priv; + struct clk *clk; void __iomem *base; int err; int irq; @@ -508,6 +617,24 @@ static int ti_eqep_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; + clk = devm_clk_get(dev, "sysclkout"); + if (IS_ERR(clk)) { + if (PTR_ERR(clk) != -EPROBE_DEFER) + dev_err(dev, "failed to get sysclkout"); + return PTR_ERR(clk); + } + + priv->sysclkout_rate = clk_get_rate(clk); + if (priv->sysclkout_rate == 0) { + dev_err(dev, "failed to get sysclkout rate"); + /* prevent divide by zero */ + priv->sysclkout_rate = 1; + /* + * This error is not expected and the driver is mostly usable + * without clock rate anyway, so don't exit here. + */ + } + base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) return PTR_ERR(base); @@ -536,6 +663,8 @@ static int ti_eqep_probe(struct platform_device *pdev) priv->counter.ops = &ti_eqep_counter_ops; priv->counter.counts = ti_eqep_counts; priv->counter.num_counts = ARRAY_SIZE(ti_eqep_counts); + priv->counter.ext = ti_eqep_device_ext; + priv->counter.num_ext = ARRAY_SIZE(ti_eqep_device_ext); priv->counter.signals = ti_eqep_signals; priv->counter.num_signals = ARRAY_SIZE(ti_eqep_signals); priv->counter.priv = priv; @@ -552,10 +681,11 @@ static int ti_eqep_probe(struct platform_device *pdev) /* * We can end up with an interupt infinite loop (interrupts triggered - * as soon as they are cleared) if we leave this at the default value + * as soon as they are cleared) if we leave these at the default value * of 0 and events are enabled. */ regmap_write(priv->regmap32, QPOSMAX, UINT_MAX); + regmap_write(priv->regmap32, QUPRD, UINT_MAX); err = counter_register(&priv->counter); if (err < 0) { diff --git a/include/uapi/linux/counter.h b/include/uapi/linux/counter.h index 36dd3b474d09..640d9719b88c 100644 --- a/include/uapi/linux/counter.h +++ b/include/uapi/linux/counter.h @@ -63,6 +63,8 @@ enum counter_event_type { COUNTER_EVENT_INDEX, /* Direction change detected */ COUNTER_EVENT_DIRECTION_CHANGE, + /* Timer exceeded timeout */ + COUNTER_EVENT_TIMEOUT, }; /** From patchwork Sun Oct 17 01:33:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 12564043 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7703BC433EF for ; Sun, 17 Oct 2021 01:56:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4731160F70 for ; Sun, 17 Oct 2021 01:56:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241162AbhJQB6L (ORCPT ); Sat, 16 Oct 2021 21:58:11 -0400 Received: from vern.gendns.com ([98.142.107.122]:48316 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229456AbhJQB6L (ORCPT ); Sat, 16 Oct 2021 21:58:11 -0400 X-Greylist: delayed 1302 seconds by postgrey-1.27 at vger.kernel.org; Sat, 16 Oct 2021 21:58:10 EDT DKIM-Signature: v=1; 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Sat, 16 Oct 2021 21:34:20 -0400 From: David Lechner To: linux-iio@vger.kernel.org Cc: David Lechner , William Breathitt Gray , Robert Nelson , linux-kernel@vger.kernel.org Subject: [PATCH 4/8] docs: counter: add unit timer sysfs attributes Date: Sat, 16 Oct 2021 20:33:39 -0500 Message-Id: <20211017013343.3385923-5-david@lechnology.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211017013343.3385923-1-david@lechnology.com> References: <20211017013343.3385923-1-david@lechnology.com> MIME-Version: 1.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This documents new unit timer sysfs attributes for the counter subsystem. Signed-off-by: David Lechner --- Documentation/ABI/testing/sysfs-bus-counter | 24 +++++++++++++++++++++ drivers/counter/ti-eqep.c | 2 +- 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index 06c2b3e27e0b..37d960a8cb1b 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -218,6 +218,9 @@ What: /sys/bus/counter/devices/counterX/signalY/cable_fault_enable_component_id What: /sys/bus/counter/devices/counterX/signalY/filter_clock_prescaler_component_id What: /sys/bus/counter/devices/counterX/signalY/index_polarity_component_id What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode_component_id +What: /sys/bus/counter/devices/unit_timer_enable_component_id +What: /sys/bus/counter/devices/unit_timer_period_component_id +What: /sys/bus/counter/devices/unit_timer_time_component_id KernelVersion: 5.16 Contact: linux-iio@vger.kernel.org Description: @@ -345,3 +348,24 @@ Description: via index_polarity. The index function (as enabled via preset_enable) is performed synchronously with the quadrature clock on the active level of the index input. + +What: /sys/bus/counter/devices/unit_timer_enable +KernelVersion: 5.16 +Contact: linux-iio@vger.kernel.org +Description: + Read/write attribute that starts or stops the unit timer. Valid + values are boolean. + +What: /sys/bus/counter/devices/unit_timer_period +KernelVersion: 5.16 +Contact: linux-iio@vger.kernel.org +Description: + Read/write attribute that selects the unit timer timeout in + nanoseconds. + +What: /sys/bus/counter/devices/unit_timer_time +KernelVersion: 5.16 +Contact: linux-iio@vger.kernel.org +Description: + Read/write attribute that indicates the current time of the + unit timer in nanoseconds. diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c index a4a5a4486329..1ba7f3c7cb7e 100644 --- a/drivers/counter/ti-eqep.c +++ b/drivers/counter/ti-eqep.c @@ -680,7 +680,7 @@ static int ti_eqep_probe(struct platform_device *pdev) pm_runtime_get_sync(dev); /* - * We can end up with an interupt infinite loop (interrupts triggered + * We can end up with an interrupt infinite loop (interrupts triggered * as soon as they are cleared) if we leave these at the default value * of 0 and events are enabled. */ From patchwork Sun Oct 17 01:33:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 12564053 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77D50C433FE for ; Sun, 17 Oct 2021 01:56:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 614D760F59 for ; Sun, 17 Oct 2021 01:56:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244843AbhJQB6c (ORCPT ); Sat, 16 Oct 2021 21:58:32 -0400 Received: from vern.gendns.com ([98.142.107.122]:48338 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244855AbhJQB6b (ORCPT ); Sat, 16 Oct 2021 21:58:31 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=Srfvu66+WHwBlVtlu6SrXigSIgQSK8IPw30+2MaUfYE=; b=mt6eXQvjVxBdcTLelkFVygxLIR DvM/2ptnnkeDf75Htb2spheR/o+x6+0CQi3gRhYmnw5J+2byVLE9YJHd2MxB+cM3Yu8Ft4dIBHt5p B2KRZO0pp5BMa4gPoHwafmr64c4j+X/hO05QB0ZA5PxQEFfxsYGsO9Vzm0sa3HPTn40iOrsAuWl4l bxsKKTOmsvNv9UyWaS0k2PRfEyombPyv48QOtWO1OW0XrvjORFE2Gr2AbyB6y+btfCxTEAB7VKEYG MA3eId24kHL5+ha3JLKnPLw7NedjF1F9EnBhYQvfYIqVL9CvZnQc37pFSGoeW7FQBCX0i1eH8Ebxr cD1fFiyQ==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:41624 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.94.2) (envelope-from ) id 1mbv47-0004D2-D9; Sat, 16 Oct 2021 21:34:21 -0400 From: David Lechner To: linux-iio@vger.kernel.org Cc: David Lechner , William Breathitt Gray , Robert Nelson , linux-kernel@vger.kernel.org Subject: [PATCH 5/8] counter/ti-eqep: add support for latched position Date: Sat, 16 Oct 2021 20:33:40 -0500 Message-Id: <20211017013343.3385923-6-david@lechnology.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211017013343.3385923-1-david@lechnology.com> References: <20211017013343.3385923-1-david@lechnology.com> MIME-Version: 1.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This adds support to the TI eQEP counter driver for a latched position. This is a new extension that gets the counter count that was recorded when an event was triggered. A new device-level latch_mode attribute is added to select the trigger. Edge capture unit support will be needed to make full use of this, but "Unit timeout" mode can already be used to calculate high speeds. The unit timer could also have attributes for latched_time and latched_period that use the same trigger. However this is not a use case at this time, so they can be added later if needed. Signed-off-by: David Lechner --- drivers/counter/ti-eqep.c | 50 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c index 1ba7f3c7cb7e..ef899655ad1d 100644 --- a/drivers/counter/ti-eqep.c +++ b/drivers/counter/ti-eqep.c @@ -405,12 +405,28 @@ static int ti_eqep_direction_read(struct counter_device *counter, return 0; } +static int ti_eqep_position_latched_count_read(struct counter_device *counter, + struct counter_count *count, + u64 *value) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qposlat; + + regmap_read(priv->regmap32, QPOSLAT, &qposlat); + + *value = qposlat; + + return 0; +} + static struct counter_comp ti_eqep_position_ext[] = { COUNTER_COMP_CEILING(ti_eqep_position_ceiling_read, ti_eqep_position_ceiling_write), COUNTER_COMP_ENABLE(ti_eqep_position_enable_read, ti_eqep_position_enable_write), COUNTER_COMP_DIRECTION(ti_eqep_direction_read), + COUNTER_COMP_COUNT_U64("latched_count", + ti_eqep_position_latched_count_read, NULL), }; static struct counter_signal ti_eqep_signals[] = { @@ -463,6 +479,38 @@ static struct counter_count ti_eqep_counts[] = { }, }; +static int ti_eqep_latch_mode_read(struct counter_device *counter, + u32 *value) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qepctl; + + regmap_read(priv->regmap16, QEPCTL, &qepctl); + *value = !!(qepctl & QEPCTL_QCLM); + + return 0; +} + +static int ti_eqep_latch_mode_write(struct counter_device *counter, + u32 value) +{ + struct ti_eqep_cnt *priv = counter->priv; + + if (value) + regmap_set_bits(priv->regmap16, QEPCTL, QEPCTL_QCLM); + else + regmap_clear_bits(priv->regmap16, QEPCTL, QEPCTL_QCLM); + + return 0; +} + +static const char *const ti_eqep_latch_mode_names[] = { + "Read count", + "Unit timeout", +}; + +static DEFINE_COUNTER_ENUM(ti_eqep_latch_modes, ti_eqep_latch_mode_names); + static int ti_eqep_unit_timer_time_read(struct counter_device *counter, u64 *value) { @@ -553,6 +601,8 @@ static int ti_eqep_unit_timer_enable_write(struct counter_device *counter, } static struct counter_comp ti_eqep_device_ext[] = { + COUNTER_COMP_DEVICE_ENUM("latch_mode", ti_eqep_latch_mode_read, + ti_eqep_latch_mode_write, ti_eqep_latch_modes), COUNTER_COMP_DEVICE_U64("unit_timer_time", ti_eqep_unit_timer_time_read, ti_eqep_unit_timer_time_write), COUNTER_COMP_DEVICE_U64("unit_timer_period", From patchwork Sun Oct 17 01:33:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 12564049 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B64A4C4332F for ; Sun, 17 Oct 2021 01:56:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 998A660F59 for ; Sun, 17 Oct 2021 01:56:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244871AbhJQB6X (ORCPT ); Sat, 16 Oct 2021 21:58:23 -0400 Received: from vern.gendns.com ([98.142.107.122]:48322 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244830AbhJQB6P (ORCPT ); Sat, 16 Oct 2021 21:58:15 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=j9IRzaf6FPIjz8sK9QpS3IucQ9AuW3vUL2+PvONAE7Q=; b=JzXqxuxp6yXaSzaVmVVKboLWPi Db3CXQkDp0vT4VHVfx0rhfypHTNs0mQeIO+5BBDHZrfHcXvyd1leXn13M3WLNKYYkK0yU5eLkJRGE p8FbDyLGT+/HHR8ogfU+c2A5v/N/SUamgzUwsrbNHxkNBSzA1vfdC4tPi89VXYiT/j1nAkGPILhQH nf9y7qJS59povssq5ylqXaUaJgHOZzN60fzdltesIFRQKNnSBc7Ig+Np3tm6Z0M43o73yCn8kA6EI 1PyUx4pfzviLgUguLo8SO/qOKLJV/pQhUA7Vo1OJxsktJozfDU23KTgX/8Ne3BDSlJ+0AXFAXb/+M 2Tjj828g==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:41624 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.94.2) (envelope-from ) id 1mbv48-0004D2-52; Sat, 16 Oct 2021 21:34:22 -0400 From: David Lechner To: linux-iio@vger.kernel.org Cc: David Lechner , William Breathitt Gray , Robert Nelson , linux-kernel@vger.kernel.org Subject: [PATCH 6/8] docs: counter: add latch_mode and latched_count sysfs attributes Date: Sat, 16 Oct 2021 20:33:41 -0500 Message-Id: <20211017013343.3385923-7-david@lechnology.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211017013343.3385923-1-david@lechnology.com> References: <20211017013343.3385923-1-david@lechnology.com> MIME-Version: 1.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This documents new counterX/latch_mode* and counterX/countY/latched_count* attributes. The counterX/signalY/*_available are moved to the counterX/countY/*_available section similar to the way we already have The counterX/*_component_id and The counterX/signalY/*_component_id grouped together so that we don't have to start a 3rd redundant section for device-level *_available section. Signed-off-by: David Lechner --- Documentation/ABI/testing/sysfs-bus-counter | 39 ++++++++++++++++----- 1 file changed, 30 insertions(+), 9 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index 37d960a8cb1b..78bb1a501007 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -59,10 +59,13 @@ What: /sys/bus/counter/devices/counterX/countY/error_noise_available What: /sys/bus/counter/devices/counterX/countY/function_available What: /sys/bus/counter/devices/counterX/countY/prescaler_available What: /sys/bus/counter/devices/counterX/countY/signalZ_action_available +What: /sys/bus/counter/devices/counterX/latch_mode_available +What: /sys/bus/counter/devices/counterX/signalY/index_polarity_available +What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode_available KernelVersion: 5.2 Contact: linux-iio@vger.kernel.org Description: - Discrete set of available values for the respective Count Y + Discrete set of available values for the respective component configuration are listed in this file. Values are delimited by newline characters. @@ -147,6 +150,14 @@ Description: updates the respective count. Quadrature encoding determines the direction. +What: /sys/bus/counter/devices/counterX/countY/latched_count +KernelVersion: 5.16 +Contact: linux-iio@vger.kernel.org +Description: + Latched count data of Count Y represented as a string. The value + is latched in based on the trigger selected by the + counterX/latch_mode attribute. + What: /sys/bus/counter/devices/counterX/countY/name KernelVersion: 5.2 Contact: linux-iio@vger.kernel.org @@ -209,6 +220,7 @@ What: /sys/bus/counter/devices/counterX/countY/count_mode_component_id What: /sys/bus/counter/devices/counterX/countY/direction_component_id What: /sys/bus/counter/devices/counterX/countY/enable_component_id What: /sys/bus/counter/devices/counterX/countY/error_noise_component_id +What: /sys/bus/counter/devices/counterX/countY/latched_count_component_id What: /sys/bus/counter/devices/counterX/countY/prescaler_component_id What: /sys/bus/counter/devices/counterX/countY/preset_component_id What: /sys/bus/counter/devices/counterX/countY/preset_enable_component_id @@ -218,6 +230,7 @@ What: /sys/bus/counter/devices/counterX/signalY/cable_fault_enable_component_id What: /sys/bus/counter/devices/counterX/signalY/filter_clock_prescaler_component_id What: /sys/bus/counter/devices/counterX/signalY/index_polarity_component_id What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode_component_id +What: /sys/bus/counter/devices/latch_mode_component_id What: /sys/bus/counter/devices/unit_timer_enable_component_id What: /sys/bus/counter/devices/unit_timer_period_component_id What: /sys/bus/counter/devices/unit_timer_time_component_id @@ -244,6 +257,22 @@ Description: counter_event data structures. The number of elements will be rounded-up to a power of 2. +What: /sys/bus/counter/devices/counterX/latch_mode +KernelVersion: 5.16 +Contact: linux-iio@vger.kernel.org +Description: + Read/write attribute that selects the trigger for latching + values. Valid values are device-specific (given by + latch_mode_available attribute) and may include: + + "Read count": + Reading the countY/count attribute latches values. + + "Unit timeout": + Unit timer timeout event latches values. + + The latched values can be read from latched_* attributes. + What: /sys/bus/counter/devices/counterX/name KernelVersion: 5.2 Contact: linux-iio@vger.kernel.org @@ -298,14 +327,6 @@ Description: Active level of index input Signal Y; irrelevant in non-synchronous load mode. -What: /sys/bus/counter/devices/counterX/signalY/index_polarity_available -What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode_available -KernelVersion: 5.2 -Contact: linux-iio@vger.kernel.org -Description: - Discrete set of available values for the respective Signal Y - configuration are listed in this file. - What: /sys/bus/counter/devices/counterX/signalY/name KernelVersion: 5.2 Contact: linux-iio@vger.kernel.org From patchwork Sun Oct 17 01:33:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 12564051 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19CCAC4332F for ; Sun, 17 Oct 2021 01:56:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 031A360F59 for ; Sun, 17 Oct 2021 01:56:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244853AbhJQB62 (ORCPT ); Sat, 16 Oct 2021 21:58:28 -0400 Received: from vern.gendns.com ([98.142.107.122]:48328 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244865AbhJQB6Y (ORCPT ); Sat, 16 Oct 2021 21:58:24 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=24w9nrwLfyRJmDv2coW9BUbOX9BBFhZvpzyG5PnUyWM=; b=h7H+b+EeJ8bQVjONoeQNH4r7yf JTbGhw2iaeOorNs4M5IvQdKA4zB2+sJ99ozcU4+1eHnErvM1QxcJiKDRUMOr2Yby1TZGIAuWHtvPT Gd52LVm/EuIUPDz36n5867ZUdp5BSoOU4jKpsBc7MwiAjxvBjig8wtld6PCC+eDY2vW0dNjxGrAuf ImwvFevTDeQMUs7ICMXfxWIKHncy17ZyXTs/luOxvW2V/YwHoCiAu/lVmZL+Q2z5Cdl9TwVO9ytbr 0ELl4ZOcZvb+qPTLANElgyBVBb+laddCQj81mHuULGKhcBXHcYcxVpZeCWjj88jJcvcH0eGEPeePP HEuCz9JA==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:41624 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.94.2) (envelope-from ) id 1mbv48-0004D2-Sr; Sat, 16 Oct 2021 21:34:22 -0400 From: David Lechner To: linux-iio@vger.kernel.org Cc: David Lechner , William Breathitt Gray , Robert Nelson , linux-kernel@vger.kernel.org Subject: [PATCH 7/8] counter/ti-eqep: add support for edge capture unit Date: Sat, 16 Oct 2021 20:33:42 -0500 Message-Id: <20211017013343.3385923-8-david@lechnology.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211017013343.3385923-1-david@lechnology.com> References: <20211017013343.3385923-1-david@lechnology.com> MIME-Version: 1.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This adds support for the Edge Capture Unit to the TI eQEP counter driver. This just adds the minimum required features to measure speed using the Unit Timer and the Edge Capture unit. Additional features can be added in the future if needed. This adds 4 new device-level attributes: - edge_capture_unit_prescaler: selects a prescalar for the Counter count coming into the Edge Capture Unit - edge_capture_unit_max_period: selects the max time period that can be measured by the Edge Capture Unit - edge_capture_unit_latched_period: gets the period that was measured when the event selected by the latch_mode attribute is triggered - edge_capture_unit_enable: enables or disables the Edge Capture Unit Signed-off-by: David Lechner --- drivers/counter/ti-eqep.c | 150 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 150 insertions(+) diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c index ef899655ad1d..fb1f4d0b4cde 100644 --- a/drivers/counter/ti-eqep.c +++ b/drivers/counter/ti-eqep.c @@ -116,6 +116,12 @@ #define QEPSTS_FIMF BIT(1) #define QEPSTS_PCEF BIT(0) +#define QCAPCTL_CEN BIT(15) +#define QCAPCTL_CCPS_SHIFT 4 +#define QCAPCTL_CCPS GENMASK(6, 4) +#define QCAPCTL_UPPS_SHIFT 0 +#define QCAPCTL_UPPS GENMASK(3, 0) + /* EQEP Inputs */ enum { TI_EQEP_SIGNAL_QEPA, /* QEPA/XCLK */ @@ -479,6 +485,137 @@ static struct counter_count ti_eqep_counts[] = { }, }; +static int ti_eqep_edge_capture_unit_enable_read(struct counter_device *counter, + u8 *value) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qcapctl; + + regmap_read(priv->regmap16, QCAPCTL, &qcapctl); + *value = !!(qcapctl & QCAPCTL_CEN); + + return 0; +} + +static int ti_eqep_edge_capture_unit_enable_write(struct counter_device *counter, + u8 value) +{ + struct ti_eqep_cnt *priv = counter->priv; + + if (value) + regmap_set_bits(priv->regmap16, QCAPCTL, QCAPCTL_CEN); + else + regmap_clear_bits(priv->regmap16, QCAPCTL, QCAPCTL_CEN); + + return 0; +} + +static int +ti_eqep_edge_capture_unit_latched_period_read(struct counter_device *counter, + u64 *value) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qcprdlat, qcapctl; + u8 ccps; + + regmap_read(priv->regmap16, QCPRDLAT, &qcprdlat); + regmap_read(priv->regmap16, QCAPCTL, &qcapctl); + ccps = (qcapctl & QCAPCTL_CCPS) >> QCAPCTL_CCPS_SHIFT; + + /* convert timer ticks to nanoseconds */ + *value = mul_u64_u32_div(qcprdlat << ccps, NSEC_PER_SEC, priv->sysclkout_rate); + + return 0; +} + +static int +ti_eqep_edge_capture_unit_max_period_read(struct counter_device *counter, + u64 *value) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qcapctl; + u8 ccps; + + regmap_read(priv->regmap16, QCAPCTL, &qcapctl); + ccps = (qcapctl & QCAPCTL_CCPS) >> QCAPCTL_CCPS_SHIFT; + + /* convert timer ticks to nanoseconds */ + *value = mul_u64_u32_div(USHRT_MAX << ccps, NSEC_PER_SEC, + priv->sysclkout_rate); + + return 0; +} + +static int +ti_eqep_edge_capture_unit_max_period_write(struct counter_device *counter, + u64 value) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 period; + u8 ccps; + + /* convert nanoseconds to timer ticks */ + period = value = mul_u64_u32_div(value, priv->sysclkout_rate, NSEC_PER_SEC); + if (period != value) + return -ERANGE; + + /* find the smallest divider that will fit the requested period */ + for (ccps = 0; ccps <= 7; ccps++) + if (USHRT_MAX << ccps >= period) + break; + + if (ccps > 7) + return -EINVAL; + + regmap_write_bits(priv->regmap16, QCAPCTL, QCAPCTL_CCPS, + ccps << QCAPCTL_CCPS_SHIFT); + + return 0; +} + +static int +ti_eqep_edge_capture_unit_prescaler_read(struct counter_device *counter, + u32 *value) +{ + struct ti_eqep_cnt *priv = counter->priv; + u32 qcapctl; + + regmap_read(priv->regmap16, QCAPCTL, &qcapctl); + *value = (qcapctl & QCAPCTL_UPPS) >> QCAPCTL_UPPS_SHIFT; + + return 0; +} + +static int +ti_eqep_edge_capture_unit_prescaler_write(struct counter_device *counter, + u32 value) +{ + struct ti_eqep_cnt *priv = counter->priv; + + regmap_write_bits(priv->regmap16, QCAPCTL, QCAPCTL_UPPS, + value << QCAPCTL_UPPS_SHIFT); + + return 0; +} + +static const char *const ti_eqep_edge_capture_unit_prescaler_values[] = { + "1", + "2", + "4", + "8", + "16", + "32", + "64", + "128", + "256", + "512", + "1024", + "2048", +}; + +static DEFINE_COUNTER_ENUM(ti_eqep_edge_capture_unit_prescaler_available, + ti_eqep_edge_capture_unit_prescaler_values); + static int ti_eqep_latch_mode_read(struct counter_device *counter, u32 *value) { @@ -601,6 +738,19 @@ static int ti_eqep_unit_timer_enable_write(struct counter_device *counter, } static struct counter_comp ti_eqep_device_ext[] = { + COUNTER_COMP_DEVICE_BOOL("edge_capture_unit_enable", + ti_eqep_edge_capture_unit_enable_read, + ti_eqep_edge_capture_unit_enable_write), + COUNTER_COMP_DEVICE_U64("edge_capture_unit_latched_period", + ti_eqep_edge_capture_unit_latched_period_read, + NULL), + COUNTER_COMP_DEVICE_U64("edge_capture_unit_max_period", + ti_eqep_edge_capture_unit_max_period_read, + ti_eqep_edge_capture_unit_max_period_write), + COUNTER_COMP_DEVICE_ENUM("edge_capture_unit_prescaler", + ti_eqep_edge_capture_unit_prescaler_read, + ti_eqep_edge_capture_unit_prescaler_write, + ti_eqep_edge_capture_unit_prescaler_available), COUNTER_COMP_DEVICE_ENUM("latch_mode", ti_eqep_latch_mode_read, ti_eqep_latch_mode_write, ti_eqep_latch_modes), COUNTER_COMP_DEVICE_U64("unit_timer_time", ti_eqep_unit_timer_time_read, From patchwork Sun Oct 17 01:33:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Lechner X-Patchwork-Id: 12564055 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3E312C433F5 for ; Sun, 17 Oct 2021 01:56:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2703E60F8F for ; Sun, 17 Oct 2021 01:56:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244832AbhJQB6f (ORCPT ); Sat, 16 Oct 2021 21:58:35 -0400 Received: from vern.gendns.com ([98.142.107.122]:48350 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244847AbhJQB6d (ORCPT ); Sat, 16 Oct 2021 21:58:33 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=wPH2jK/OOV+TnEhd20yJJMhH7lEufQUYCOiUumD6kYQ=; b=YvEe9aC6fbNmSWJ46wHblq47Ty qdkQ1yht4qtkQA1U9k00ZBeR7d7uxViAXSYv+i5F74CkL0wdMOB7otLx2lHgzLI2UbKUiPnA2S2ia xk04PGz756bEMvfUnRFMxmt6JBA6N3UXAOP9By4H5VmrX7oar4yokGZCKo79iuGZjZZZ2Dh9LhlV+ KMG7sngs1sc8GcKl1Vr1ye4v7aHhk0DF7pfTbhK2lr+1W/x+CoCL60G9M4AXFIDGuY4+FHBYC9aLM tByFwJlzH8iGR8gCoX0P8z4j1O1lFIr/IkNuqyy+X727kgSYbOz1L7aqNPgrsLAVTAqfUzuVgAZTw 6OgvROZA==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:41624 helo=freyr.lechnology.com) by vern.gendns.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.94.2) (envelope-from ) id 1mbv49-0004D2-NG; Sat, 16 Oct 2021 21:34:23 -0400 From: David Lechner To: linux-iio@vger.kernel.org Cc: David Lechner , William Breathitt Gray , Robert Nelson , linux-kernel@vger.kernel.org Subject: [PATCH 8/8] docs: counter: add edge_capture_unit_* attributes Date: Sat, 16 Oct 2021 20:33:43 -0500 Message-Id: <20211017013343.3385923-9-david@lechnology.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211017013343.3385923-1-david@lechnology.com> References: <20211017013343.3385923-1-david@lechnology.com> MIME-Version: 1.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This adds documentation for new counter subsystem edge_capture_unit_* sysfs attributes. Signed-off-by: David Lechner --- Documentation/ABI/testing/sysfs-bus-counter | 37 +++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter index 78bb1a501007..6c192c8c2b55 100644 --- a/Documentation/ABI/testing/sysfs-bus-counter +++ b/Documentation/ABI/testing/sysfs-bus-counter @@ -59,6 +59,7 @@ What: /sys/bus/counter/devices/counterX/countY/error_noise_available What: /sys/bus/counter/devices/counterX/countY/function_available What: /sys/bus/counter/devices/counterX/countY/prescaler_available What: /sys/bus/counter/devices/counterX/countY/signalZ_action_available +What: /sys/bus/counter/devices/counterX/edge_capture_unit_prescaler_available What: /sys/bus/counter/devices/counterX/latch_mode_available What: /sys/bus/counter/devices/counterX/signalY/index_polarity_available What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode_available @@ -230,6 +231,10 @@ What: /sys/bus/counter/devices/counterX/signalY/cable_fault_enable_component_id What: /sys/bus/counter/devices/counterX/signalY/filter_clock_prescaler_component_id What: /sys/bus/counter/devices/counterX/signalY/index_polarity_component_id What: /sys/bus/counter/devices/counterX/signalY/synchronous_mode_component_id +What: /sys/bus/counter/devices/edge_capture_unit_enable_component_id +What: /sys/bus/counter/devices/edge_capture_unit_latched_period_component_id +What: /sys/bus/counter/devices/edge_capture_unit_max_period_component_id +What: /sys/bus/counter/devices/edge_capture_unit_prescaler_component_id What: /sys/bus/counter/devices/latch_mode_component_id What: /sys/bus/counter/devices/unit_timer_enable_component_id What: /sys/bus/counter/devices/unit_timer_period_component_id @@ -249,6 +254,38 @@ Description: shorter or equal to configured value are ignored. Value 0 means filter is disabled. +What: /sys/bus/counter/devices/edge_capture_unit_enable +KernelVersion: 5.16 +Contact: linux-iio@vger.kernel.org +Description: + Read/write attribute that starts or stops the Edge Capture Unit. + Valid values are boolean. + +What: /sys/bus/counter/devices/edge_capture_unit_latched_period +KernelVersion: 5.16 +Contact: linux-iio@vger.kernel.org +Description: + Latched period of the Edge Capture Unit represented as a string. + The value is latched in based on the trigger selected by the + counterX/latch_mode attribute. Units are nanoseconds. + +What: /sys/bus/counter/devices/edge_capture_unit_max_period +KernelVersion: 5.16 +Contact: linux-iio@vger.kernel.org +Description: + Read/write attribute that selects the maximum period that can + be measured by the Edge Capture Unit. Units are nanoseconds. + +What: /sys/bus/counter/devices/edge_capture_unit_prescaler +KernelVersion: 5.16 +Contact: linux-iio@vger.kernel.org +Description: + Read/write attribute that selects the how the + counterX/countY/count value is scaled coming in to the Edge + Capture Unit. This acts like a clock divider, e.g. if a value + of 4 is selected, the Edge Capture Unit will measure the period + between every 4 counts. + What: /sys/bus/counter/devices/counterX/events_queue_size KernelVersion: 5.16 Contact: linux-iio@vger.kernel.org