From patchwork Sat Nov 6 17:53:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Saheed O. Bolarinwa" X-Patchwork-Id: 12606409 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F70EC433F5 for ; Sat, 6 Nov 2021 17:54:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 67524610FD for ; Sat, 6 Nov 2021 17:54:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234711AbhKFR4l (ORCPT ); Sat, 6 Nov 2021 13:56:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48948 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233233AbhKFR4k (ORCPT ); Sat, 6 Nov 2021 13:56:40 -0400 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A307C061570; Sat, 6 Nov 2021 10:53:59 -0700 (PDT) Received: by mail-ed1-x533.google.com with SMTP id j21so44583739edt.11; Sat, 06 Nov 2021 10:53:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6D5HkkzZ/+jWBfSY9gLjOQ9sfmUeP65T8bu+SScNXxY=; b=mqT8opC1vtsJeLwFdLCmo9jx/z0UjbZ4IiGMX906qH/reDbnTKfShqHe9qwUnb1qJ9 rr8JaLowSYpJ94OAwZRgJ47gbTHlRw1oFB5h38s/7bYID61Oj/bya8WzlNcqi0VPDDeQ M+S3kQeZ+n1dXprEY0luKrX3Eu33pSiAx0VH0LAfxdUq1TnZ/5roBtzHnigP/0AqJt4T FzPnWIdPddx+Lm83s0vsOt0/AATsAe65w2cGMWSHyWWCFz9Pk+LpqxDVcJHfuy4aAAsJ t40S43yqP3L3gvaHkxhzuLsbLRL6FG3E+mpSMtFQAt1Aa/MM8A5nsSm4HplX6a8BlSKq 6K1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6D5HkkzZ/+jWBfSY9gLjOQ9sfmUeP65T8bu+SScNXxY=; b=cNJZDuMSn6VMEYvjqpizwpFO1LVNZWqAU80giO2yUKal2sUk6AX2SNOXyPyRyWDgFF UaNu96N27BfYnONHr36EFcJ/cWkFyfHLrixf8mTUkGZkQocPAXGMfF5ffbac0HdJFQcP AqixuvR/8Liltok8tjPyUXUy6ssWqe7wFd9JeK0XOHehNdgbBhus0rtj8Q0rWyrREFab DagCClbM9Id1S4KcHfX1wur6pL+eCpWNrI1oVzXJpCbXV8dZviGJV1Xc+ex2+Pwq9wBL Xo8oR2tXeDrZ9lgL6a+uK9cC2Mf7Fzo6cd+lB1oODgzHaBahLCov2/pxPWOv39bp2FKg NVLw== X-Gm-Message-State: AOAM5330xQ55Q3ZxU8aAqsRWbUDL9xjPN/li/R7CJPApGau2f6JZaV+M zfkyLcqsV+NlBFPhZUKcRwg+sRmDhCY= X-Google-Smtp-Source: ABdhPJxHay+IlnQngLVeJ5UftGjI+KZHVvns+uFn7U9nM1+xd765EY05nyQ4ZL8koht9Lsl2fDS1lw== X-Received: by 2002:a17:906:309b:: with SMTP id 27mr18284487ejv.129.1636221237719; Sat, 06 Nov 2021 10:53:57 -0700 (PDT) Received: from localhost.localdomain ([2a02:ab88:109:9f0:f6a6:7fbe:807a:e1cc]) by smtp.googlemail.com with ESMTPSA id m12sm5753494ejj.63.2021.11.06.10.53.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Nov 2021 10:53:57 -0700 (PDT) From: "Saheed O. Bolarinwa" To: helgaas@kernel.org Cc: "Saheed O. Bolarinwa" , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v1 1/6] PCI/ASPM: Extract out L1SS_CAP calculations Date: Sat, 6 Nov 2021 18:53:48 +0100 Message-Id: <20211106175353.26248-2-refactormyself@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211106175353.26248-1-refactormyself@gmail.com> References: <20211106175353.26248-1-refactormyself@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Inside pcie_aspm_cap_init() the L1SS_CAP of both ends of the link is calculated. The values are used to calculate link->aspm_support and link->aspm_enabled. Isolating this calcution with simplify pcie_aspm_cap_init(). Extract the calculations of L1SS_CAP on both ends into aspm_calc_both_l1ss_caps(). Signed-off-by: Saheed O. Bolarinwa --- drivers/pci/pcie/aspm.c | 42 ++++++++++++++++++++++++----------------- 1 file changed, 25 insertions(+), 17 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 013a47f587ce..057c6768fb7b 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -540,6 +540,30 @@ static void aspm_calc_l1ss_info(struct pcie_link_state *link, } } +static void aspm_calc_both_l1ss_caps(struct pcie_link_state *link, + u32 *up_l1ss_cap, u32 *dwn_l1ss_cap) +{ + struct pci_dev *child = link->downstream, *parent = link->pdev; + + pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CAP, + up_l1ss_cap); + pci_read_config_dword(child, child->l1ss + PCI_L1SS_CAP, + dwn_l1ss_cap); + + if (!(*up_l1ss_cap & PCI_L1SS_CAP_L1_PM_SS)) + *up_l1ss_cap = 0; + if (!(*dwn_l1ss_cap & PCI_L1SS_CAP_L1_PM_SS)) + *dwn_l1ss_cap = 0; + + /* + * If we don't have LTR for the entire path from the Root Complex + * to this device, we can't use ASPM L1.2 because it relies on the + * LTR_L1.2_THRESHOLD. See PCIe r4.0, secs 5.5.4, 6.18. + */ + if (!child->ltr_path) + *dwn_l1ss_cap &= ~PCI_L1SS_CAP_ASPM_L1_2; +} + static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) { struct pci_dev *child = link->downstream, *parent = link->pdev; @@ -606,23 +630,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) link->latency_dw.l1 = calc_l1_latency(child_lnkcap); /* Setup L1 substate */ - pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CAP, - &parent_l1ss_cap); - pci_read_config_dword(child, child->l1ss + PCI_L1SS_CAP, - &child_l1ss_cap); - - if (!(parent_l1ss_cap & PCI_L1SS_CAP_L1_PM_SS)) - parent_l1ss_cap = 0; - if (!(child_l1ss_cap & PCI_L1SS_CAP_L1_PM_SS)) - child_l1ss_cap = 0; - - /* - * If we don't have LTR for the entire path from the Root Complex - * to this device, we can't use ASPM L1.2 because it relies on the - * LTR_L1.2_THRESHOLD. See PCIe r4.0, secs 5.5.4, 6.18. - */ - if (!child->ltr_path) - child_l1ss_cap &= ~PCI_L1SS_CAP_ASPM_L1_2; + aspm_calc_both_l1ss_caps(link, &parent_l1ss_cap, &child_l1ss_cap); if (parent_l1ss_cap & child_l1ss_cap & PCI_L1SS_CAP_ASPM_L1_1) link->aspm_support |= ASPM_STATE_L1_1; From patchwork Sat Nov 6 17:53:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Saheed O. Bolarinwa" X-Patchwork-Id: 12606411 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B68FEC433EF for ; Sat, 6 Nov 2021 17:54:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A35606109F for ; Sat, 6 Nov 2021 17:54:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234741AbhKFR4m (ORCPT ); Sat, 6 Nov 2021 13:56:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234716AbhKFR4l (ORCPT ); Sat, 6 Nov 2021 13:56:41 -0400 Received: from mail-ed1-x532.google.com (mail-ed1-x532.google.com [IPv6:2a00:1450:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42011C061570; Sat, 6 Nov 2021 10:54:00 -0700 (PDT) Received: by mail-ed1-x532.google.com with SMTP id v11so42170428edc.9; Sat, 06 Nov 2021 10:54:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+AmIfT2U8zaxI4/8+Onr8HNn9TQ7SRU0ccQVrxGOsI0=; b=Jm5JzxB22xE3gjz5poX7ZGPbpgZi7v8ejFMyV/QTrYo97vKYACgfGzbE7sxIz3Y+/j E23VqlIziB8y18C7gWEI1T5ydmUdyDKv4bD6ZgZeD3diDRzJ4Bno2Gacq+tB4zg5zMte CwidWkBH/BDemsS8CG7s8CMzRuIqIfwIE5tT7jHp5CRwTHJ9DfDyS+1eYe8sWJMWWWVW R7YWIm5SPmvmsYmP6bT5VX7Ln+Apw/0iGRTdJJn7lZndO/l2FRjgiptMyQVOcW10Zblv YY7mm9n+E++8mQSfbqZ43J7BIGj6TqgzR2sBjrh6bOaC2ru8OhMYia5FxtHudAwVarud HyNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+AmIfT2U8zaxI4/8+Onr8HNn9TQ7SRU0ccQVrxGOsI0=; b=VrDdanqX9Amj7zGFnes0iWR1n539DgBRY1tCNyya4lC3j4MeA+5uzlNlDRuMVNH+Ay ENP4cqq40MQlxhNA8jIwelonCMpzrgimZa0wCWvUK+qm82VX9yhc3IYW6YbcHjYXhgrU sd5JkXRnYUpum/Nxd4p6166oTU0cfI0zCGYAcDUs8z59bb15Y2QUbuWjkMOTrCWovlqJ 73fXoSHjNeI5jnT30FIcDmd0VyKDhkiPWokapbLuPGT+mdJQQ35Xxi1v74B74GVDMNSd c+4mo7ChszdYpHWS3Esevio8UJi4Tp7SoCNSbxIYsQx2tbZkizEoS2GuTI0wZfQrVuGf Dm/A== X-Gm-Message-State: AOAM533YC+0pYd8TFSZdw1CQzSrD9C/Dg56Cf0ZQ4yCtMh5UXtXLOxZ7 HhnbfHv6sLUJFF9rdh1eXHQ= X-Google-Smtp-Source: ABdhPJy5sQI8KXzuOpcgUb6bH+YKrtAotFx+6RaJnOsvXvEG98nTOBSymzzgvSs/P6Hn69poPxiEDg== X-Received: by 2002:a50:da42:: with SMTP id a2mr86768450edk.361.1636221238641; Sat, 06 Nov 2021 10:53:58 -0700 (PDT) Received: from localhost.localdomain ([2a02:ab88:109:9f0:f6a6:7fbe:807a:e1cc]) by smtp.googlemail.com with ESMTPSA id m12sm5753494ejj.63.2021.11.06.10.53.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Nov 2021 10:53:58 -0700 (PDT) From: "Saheed O. Bolarinwa" To: helgaas@kernel.org Cc: "Saheed O. Bolarinwa" , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v1 2/6] PCI/ASPM: Extract the calculation of link->aspm_support Date: Sat, 6 Nov 2021 18:53:49 +0100 Message-Id: <20211106175353.26248-3-refactormyself@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211106175353.26248-1-refactormyself@gmail.com> References: <20211106175353.26248-1-refactormyself@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org struct pcie_link_state->aspm_support hold the initial capable state of the link. This value is calculated inside pcie_aspm_init_cap(). Isolating this calculation will simplify pcie_aspm_init_cap(). Extract the calculation of link->aspm_support into aspm_calc_init_linkcap(). Signed-off-by: Saheed O. Bolarinwa --- drivers/pci/pcie/aspm.c | 60 ++++++++++++++++++++++++----------------- 1 file changed, 35 insertions(+), 25 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 057c6768fb7b..23441a32f604 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -564,6 +564,33 @@ static void aspm_calc_both_l1ss_caps(struct pcie_link_state *link, *dwn_l1ss_cap &= ~PCI_L1SS_CAP_ASPM_L1_2; } +static u32 aspm_calc_init_linkcap(u32 up_lnkcap, u32 dwn_lnkcap, + u32 up_l1ss_cap, u32 dwn_l1ss_cap) +{ + u32 link_cap = 0; + + /* + * Note that we must not enable L0s in either direction on a + * given link unless components on both sides of the link each + * support L0s. + */ + if (up_lnkcap & dwn_lnkcap & PCI_EXP_LNKCAP_ASPM_L0S) + link_cap |= ASPM_STATE_L0S; + + if (up_lnkcap & dwn_lnkcap & PCI_EXP_LNKCAP_ASPM_L1) + link_cap |= ASPM_STATE_L1; + if (up_l1ss_cap & dwn_l1ss_cap & PCI_L1SS_CAP_ASPM_L1_1) + link_cap |= ASPM_STATE_L1_1; + if (up_l1ss_cap & dwn_l1ss_cap & PCI_L1SS_CAP_ASPM_L1_2) + link_cap |= ASPM_STATE_L1_2; + if (up_l1ss_cap & dwn_l1ss_cap & PCI_L1SS_CAP_PCIPM_L1_1) + link_cap |= ASPM_STATE_L1_1_PCIPM; + if (up_l1ss_cap & dwn_l1ss_cap & PCI_L1SS_CAP_PCIPM_L1_2) + link_cap |= ASPM_STATE_L1_2_PCIPM; + + return link_cap; +} + static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) { struct pci_dev *child = link->downstream, *parent = link->pdev; @@ -603,16 +630,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &parent_lnkctl); pcie_capability_read_word(child, PCI_EXP_LNKCTL, &child_lnkctl); - /* - * Setup L0s state - * - * Note that we must not enable L0s in either direction on a - * given link unless components on both sides of the link each - * support L0s. - */ - if (parent_lnkcap & child_lnkcap & PCI_EXP_LNKCAP_ASPM_L0S) - link->aspm_support |= ASPM_STATE_L0S; - + /* Setup L0s state */ if (child_lnkctl & PCI_EXP_LNKCTL_ASPM_L0S) link->aspm_enabled |= ASPM_STATE_L0S_UP; if (parent_lnkctl & PCI_EXP_LNKCTL_ASPM_L0S) @@ -621,9 +639,6 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) link->latency_dw.l0s = calc_l0s_latency(child_lnkcap); /* Setup L1 state */ - if (parent_lnkcap & child_lnkcap & PCI_EXP_LNKCAP_ASPM_L1) - link->aspm_support |= ASPM_STATE_L1; - if (parent_lnkctl & child_lnkctl & PCI_EXP_LNKCTL_ASPM_L1) link->aspm_enabled |= ASPM_STATE_L1; link->latency_up.l1 = calc_l1_latency(parent_lnkcap); @@ -632,15 +647,6 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) /* Setup L1 substate */ aspm_calc_both_l1ss_caps(link, &parent_l1ss_cap, &child_l1ss_cap); - if (parent_l1ss_cap & child_l1ss_cap & PCI_L1SS_CAP_ASPM_L1_1) - link->aspm_support |= ASPM_STATE_L1_1; - if (parent_l1ss_cap & child_l1ss_cap & PCI_L1SS_CAP_ASPM_L1_2) - link->aspm_support |= ASPM_STATE_L1_2; - if (parent_l1ss_cap & child_l1ss_cap & PCI_L1SS_CAP_PCIPM_L1_1) - link->aspm_support |= ASPM_STATE_L1_1_PCIPM; - if (parent_l1ss_cap & child_l1ss_cap & PCI_L1SS_CAP_PCIPM_L1_2) - link->aspm_support |= ASPM_STATE_L1_2_PCIPM; - if (parent_l1ss_cap) pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CTL1, &parent_l1ss_ctl1); @@ -657,12 +663,16 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) if (parent_l1ss_ctl1 & child_l1ss_ctl1 & PCI_L1SS_CTL1_PCIPM_L1_2) link->aspm_enabled |= ASPM_STATE_L1_2_PCIPM; - if (link->aspm_support & ASPM_STATE_L1SS) - aspm_calc_l1ss_info(link, parent_l1ss_cap, child_l1ss_cap); - /* Save default state */ link->aspm_default = link->aspm_enabled; + link->aspm_support = aspm_calc_init_linkcap(parent_lnkcap, + child_lnkcap, + parent_l1ss_cap, + child_l1ss_cap); + if (link->aspm_support & ASPM_STATE_L1SS) + aspm_calc_l1ss_info(link, parent_l1ss_cap, child_l1ss_cap); + /* Setup initial capable state. Will be updated later */ link->aspm_capable = link->aspm_support; From patchwork Sat Nov 6 17:53:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Saheed O. Bolarinwa" X-Patchwork-Id: 12606413 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86CFBC433F5 for ; Sat, 6 Nov 2021 17:54:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6D9E2610E9 for ; Sat, 6 Nov 2021 17:54:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234750AbhKFR4n (ORCPT ); Sat, 6 Nov 2021 13:56:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234742AbhKFR4m (ORCPT ); Sat, 6 Nov 2021 13:56:42 -0400 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0722EC061570; Sat, 6 Nov 2021 10:54:01 -0700 (PDT) Received: by mail-ed1-x52c.google.com with SMTP id j21so44583887edt.11; Sat, 06 Nov 2021 10:54:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fPpPXmTwNV5yeXl9702tcKFhNJGs8yk4TK4+l6VNXCw=; b=dlsKjMuLS69SncKp3BJ3M22AhATZyhxpd2o5sSXh+RjJQih4/pk6oOkavdaeRpiHYC V8Ev1N0lWy6xUkI8xnvd9WJ3iAcScy/NejXe7QQc5SAA8soDKk0ZFAVUo5twy+m8Ay0c Ng7Qgvola0FoZNrtGhHQoKp2YUm6dY/evSSKrm43z97N9hV2Es+ZWr3uos21/WJ475my k/sJkFpnf/QQufAgS8ljMBiCdX9Rll/KjpexWwEzCLz7SLh/YXyqo303bvIiSfYZlMkB K+xwOB36sOPu3eL6T5FY4Q47MCGzadH4wyjz9IViK4v398AgRDBchMM2LRFOtB5EvdsS TJDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fPpPXmTwNV5yeXl9702tcKFhNJGs8yk4TK4+l6VNXCw=; b=BEEsC9IqvQAyb7peW0j7aBUEtx37HcuoMTqqnCMGraZsHUiDwIDOPDNQkt9w+9boEr klMHgKamCiub92w+yUM3DV1mj9ovxffgDQob73QTLGLe4W8f8bQKwoP7eLFrfCbGgyGP xJVf/b60yKRSPyeyt6UrHdkuiZhjxEblgggN0vKzmoPzv+Hvcugkb5j/9kkDKoFUcYkk rPmRxKE0tNRqjIMgPSqVCBmxliDawGhi8mvwath4djzGbQ/aatEBmGA/MaXgve4510dP 7e24IB5rnk0zWRkw4tqCsB5Nm0ugNOcWqvgvVE9MTtQgP+lehbzX5yYt9cmMoh505hgO 7gfg== X-Gm-Message-State: AOAM531hL5wDXq0yLnLPMxTjnf8U3ttW4Yrc/k7oTHAJi+mgve6TCNYZ PyM97PbCWBwAvOYRVlRUKB8VEXGMVnA= X-Google-Smtp-Source: ABdhPJx6X8EKzVJj7H0tuECDEo0xWYPm+2J1fCNVay+kc/fGBL/143iwNuAzBOOrfV0LH+lgmknhow== X-Received: by 2002:a17:906:b884:: with SMTP id hb4mr79591932ejb.376.1636221239481; Sat, 06 Nov 2021 10:53:59 -0700 (PDT) Received: from localhost.localdomain ([2a02:ab88:109:9f0:f6a6:7fbe:807a:e1cc]) by smtp.googlemail.com with ESMTPSA id m12sm5753494ejj.63.2021.11.06.10.53.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Nov 2021 10:53:59 -0700 (PDT) From: "Saheed O. Bolarinwa" To: helgaas@kernel.org Cc: "Saheed O. Bolarinwa" , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v1 3/6] PCI/ASPM: Extract the calculation of link->aspm_enabled Date: Sat, 6 Nov 2021 18:53:50 +0100 Message-Id: <20211106175353.26248-4-refactormyself@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211106175353.26248-1-refactormyself@gmail.com> References: <20211106175353.26248-1-refactormyself@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Inside pcie_aspm_init_cap() the initial enabled state is read from the firmware and calculated. It is stored in struct pcie_link_state->aspm_enabled and also backed up in struct pcie_link_state->aspm_default. pcie_aspm_init_cap() can be simplified by isolation this calculation. Extract the calculation of struct pcie_link_state->aspm_enabled into aspm_calc_enabled_states(). Signed-off-by: Saheed O. Bolarinwa --- drivers/pci/pcie/aspm.c | 66 ++++++++++++++++++++++++----------------- 1 file changed, 38 insertions(+), 28 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 23441a32f604..5e8613cb5db6 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -591,13 +591,47 @@ static u32 aspm_calc_init_linkcap(u32 up_lnkcap, u32 dwn_lnkcap, return link_cap; } +static u32 aspm_calc_enabled_states(struct pcie_link_state *link, + u32 up_l1ss_cap, u32 dwn_l1ss_cap) +{ + struct pci_dev *child = link->downstream, *parent = link->pdev; + u16 parent_lnkctl, child_lnkctl; + u32 aspm_enabled = 0, parent_l1ss_ctl1 = 0, child_l1ss_ctl1 = 0; + + pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &parent_lnkctl); + pcie_capability_read_word(child, PCI_EXP_LNKCTL, &child_lnkctl); + + if (child_lnkctl & PCI_EXP_LNKCTL_ASPM_L0S) + aspm_enabled |= ASPM_STATE_L0S_UP; + if (parent_lnkctl & PCI_EXP_LNKCTL_ASPM_L0S) + aspm_enabled |= ASPM_STATE_L0S_DW; + if (parent_lnkctl & child_lnkctl & PCI_EXP_LNKCTL_ASPM_L1) + aspm_enabled |= ASPM_STATE_L1; + + if (up_l1ss_cap) + pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CTL1, + &parent_l1ss_ctl1); + if (dwn_l1ss_cap) + pci_read_config_dword(child, child->l1ss + PCI_L1SS_CTL1, + &child_l1ss_ctl1); + + if (parent_l1ss_ctl1 & child_l1ss_ctl1 & PCI_L1SS_CTL1_ASPM_L1_1) + aspm_enabled |= ASPM_STATE_L1_1; + if (parent_l1ss_ctl1 & child_l1ss_ctl1 & PCI_L1SS_CTL1_ASPM_L1_2) + aspm_enabled |= ASPM_STATE_L1_2; + if (parent_l1ss_ctl1 & child_l1ss_ctl1 & PCI_L1SS_CTL1_PCIPM_L1_1) + aspm_enabled |= ASPM_STATE_L1_1_PCIPM; + if (parent_l1ss_ctl1 & child_l1ss_ctl1 & PCI_L1SS_CTL1_PCIPM_L1_2) + aspm_enabled |= ASPM_STATE_L1_2_PCIPM; + + return aspm_enabled; +} + static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) { struct pci_dev *child = link->downstream, *parent = link->pdev; u32 parent_lnkcap, child_lnkcap; - u16 parent_lnkctl, child_lnkctl; u32 parent_l1ss_cap, child_l1ss_cap; - u32 parent_l1ss_ctl1 = 0, child_l1ss_ctl1 = 0; struct pci_bus *linkbus = parent->subordinate; if (blacklist) { @@ -627,41 +661,17 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) */ pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &parent_lnkcap); pcie_capability_read_dword(child, PCI_EXP_LNKCAP, &child_lnkcap); - pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &parent_lnkctl); - pcie_capability_read_word(child, PCI_EXP_LNKCTL, &child_lnkctl); - /* Setup L0s state */ - if (child_lnkctl & PCI_EXP_LNKCTL_ASPM_L0S) - link->aspm_enabled |= ASPM_STATE_L0S_UP; - if (parent_lnkctl & PCI_EXP_LNKCTL_ASPM_L0S) - link->aspm_enabled |= ASPM_STATE_L0S_DW; link->latency_up.l0s = calc_l0s_latency(parent_lnkcap); link->latency_dw.l0s = calc_l0s_latency(child_lnkcap); - - /* Setup L1 state */ - if (parent_lnkctl & child_lnkctl & PCI_EXP_LNKCTL_ASPM_L1) - link->aspm_enabled |= ASPM_STATE_L1; link->latency_up.l1 = calc_l1_latency(parent_lnkcap); link->latency_dw.l1 = calc_l1_latency(child_lnkcap); /* Setup L1 substate */ aspm_calc_both_l1ss_caps(link, &parent_l1ss_cap, &child_l1ss_cap); - if (parent_l1ss_cap) - pci_read_config_dword(parent, parent->l1ss + PCI_L1SS_CTL1, - &parent_l1ss_ctl1); - if (child_l1ss_cap) - pci_read_config_dword(child, child->l1ss + PCI_L1SS_CTL1, - &child_l1ss_ctl1); - - if (parent_l1ss_ctl1 & child_l1ss_ctl1 & PCI_L1SS_CTL1_ASPM_L1_1) - link->aspm_enabled |= ASPM_STATE_L1_1; - if (parent_l1ss_ctl1 & child_l1ss_ctl1 & PCI_L1SS_CTL1_ASPM_L1_2) - link->aspm_enabled |= ASPM_STATE_L1_2; - if (parent_l1ss_ctl1 & child_l1ss_ctl1 & PCI_L1SS_CTL1_PCIPM_L1_1) - link->aspm_enabled |= ASPM_STATE_L1_1_PCIPM; - if (parent_l1ss_ctl1 & child_l1ss_ctl1 & PCI_L1SS_CTL1_PCIPM_L1_2) - link->aspm_enabled |= ASPM_STATE_L1_2_PCIPM; + link->aspm_enabled = aspm_calc_enabled_states(link, parent_l1ss_cap, + child_l1ss_cap); /* Save default state */ link->aspm_default = link->aspm_enabled; From patchwork Sat Nov 6 17:53:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Saheed O. Bolarinwa" X-Patchwork-Id: 12606415 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6B20C433F5 for ; Sat, 6 Nov 2021 17:54:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AFDAA6023D for ; Sat, 6 Nov 2021 17:54:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234801AbhKFR4t (ORCPT ); Sat, 6 Nov 2021 13:56:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234754AbhKFR4n (ORCPT ); Sat, 6 Nov 2021 13:56:43 -0400 Received: from mail-ed1-x530.google.com (mail-ed1-x530.google.com [IPv6:2a00:1450:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CC344C061570; Sat, 6 Nov 2021 10:54:01 -0700 (PDT) Received: by mail-ed1-x530.google.com with SMTP id w1so45022437edd.10; Sat, 06 Nov 2021 10:54:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7IejH8ev4vgD/YiYMP4qv3THZTQhq4FVdFOE+OZylfw=; b=W80ZFKlzqux/TEjxfoRqzfCUu/+eAk3WS8wY999TBdLB9bg+xTnc7UPetB7DzjfXHr OxZ+gIijlMq4hBWgCeWAkxrxqkGJy7tUvYk56zjp5yyGDJH01Z5Pti+U8fwcHB+iQaH8 0eFN9XFY/BkPQqrUkjqkg3sdkxoZW0J3Na1bkbcPuapcxQ4taXddilI2s3YG71T6r0ml CWG8ZLxBOBI/l7VUTaFkpj5bSYh5NcfxQ2sLjLWslpUgJfkzhntoTWAdKj/eVlGdZhk9 HCNGTia80Wu+CVd3LuLRhZL+637xxLTasXLSs3rwSlnR8DX+AgDKD9Vefvft8duTxWPO HBLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7IejH8ev4vgD/YiYMP4qv3THZTQhq4FVdFOE+OZylfw=; b=4Ib0LRxcfAnIFVHKfKcyfCUdVCV0knHEh2SDfu+9+I4bQsmSWwGv9m2ysOitRWboXT XNstOF0hihiujnXICKeZFH8KoviXOcZGUOiXb9cLfue7uT1cefWcATpxqf2iLOCLrybx 7lMgzSi65GPYKFsJS0dfu49Do3xJkn39Y0TlCGPDIOLtIaFAgTKA+4w+tMte5BT5JCR2 v1vrQwOje6/8/46CwOdtaor+ADfI71dUdaxIc4i7mKjQsNnwChlyjoqPaGwJBL/+AEtK 9ggg7sPrAnc3pIKHkxY7/+BUy1oy1vkG44+SYhtSqaMhXRTb5vM8MCUopDXxz5w0K2i3 XstQ== X-Gm-Message-State: AOAM531zwNYc78iK+ZdJJ8X1ampDbMmIPuLlMNppg/5j6woXmiozcBUy rNUWgFFyQXfUssDgcaAtrAQ= X-Google-Smtp-Source: ABdhPJwgm5cmEwXIiN+OKz5hy65lr2B3U1xLy5fFu0rgZk+3icDr88dyKHrTmzh9nUf3FKlQzVIZAw== X-Received: by 2002:a50:9dca:: with SMTP id l10mr90558216edk.61.1636221240228; Sat, 06 Nov 2021 10:54:00 -0700 (PDT) Received: from localhost.localdomain ([2a02:ab88:109:9f0:f6a6:7fbe:807a:e1cc]) by smtp.googlemail.com with ESMTPSA id m12sm5753494ejj.63.2021.11.06.10.53.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Nov 2021 10:53:59 -0700 (PDT) From: "Saheed O. Bolarinwa" To: helgaas@kernel.org Cc: "Saheed O. Bolarinwa" , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v1 4/6] PCI/ASPM: Don't cache struct pcie_link_state->aspm_support Date: Sat, 6 Nov 2021 18:53:51 +0100 Message-Id: <20211106175353.26248-5-refactormyself@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211106175353.26248-1-refactormyself@gmail.com> References: <20211106175353.26248-1-refactormyself@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org aspm_support in struct pcie_link_state is used to cache the initial supported ASPM capabilty states as calculated within aspm_calc_init_linkcap(). This value can be accessed directly by calling aspm_calc_init_linkcap(). - Remove aspm_support from struct pcie_link_state; - Create a wrapper function for aspm_calc_init_linkcap() - Call the wrapper function outside pcie_aspm_cap_init() - Within pcie_aspm_cap_init() use a local variable to replace struct pcie_link_state->aspm_support. Signed-off-by: Saheed O. Bolarinwa --- drivers/pci/pcie/aspm.c | 37 +++++++++++++++++++++++++------------ 1 file changed, 25 insertions(+), 12 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 5e8613cb5db6..9aaae476ea31 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -54,7 +54,6 @@ struct pcie_link_state { struct list_head sibling; /* node in link_list */ /* ASPM state */ - u32 aspm_support:7; /* Supported ASPM state */ u32 aspm_enabled:7; /* Enabled ASPM state */ u32 aspm_capable:7; /* Capable ASPM state with latency */ u32 aspm_default:7; /* Default ASPM state by BIOS */ @@ -450,7 +449,8 @@ static void pci_clear_and_set_dword(struct pci_dev *pdev, int pos, /* Calculate L1.2 PM substate timing parameters */ static void aspm_calc_l1ss_info(struct pcie_link_state *link, - u32 parent_l1ss_cap, u32 child_l1ss_cap) + u32 aspm_support, u32 parent_l1ss_cap, + u32 child_l1ss_cap) { struct pci_dev *child = link->downstream, *parent = link->pdev; u32 val1, val2, scale1, scale2; @@ -459,7 +459,7 @@ static void aspm_calc_l1ss_info(struct pcie_link_state *link, u32 pctl1, pctl2, cctl1, cctl2; u32 pl1_2_enables, cl1_2_enables; - if (!(link->aspm_support & ASPM_STATE_L1_2_MASK)) + if (!(aspm_support & ASPM_STATE_L1_2_MASK)) return; /* Choose the greater of the two Port Common_Mode_Restore_Times */ @@ -591,6 +591,20 @@ static u32 aspm_calc_init_linkcap(u32 up_lnkcap, u32 dwn_lnkcap, return link_cap; } +static u32 aspm_get_init_cap(struct pcie_link_state *link) +{ + struct pci_dev *child = link->downstream, *parent = link->pdev; + u32 parent_lnkcap, child_lnkcap; + u32 parent_l1ss_cap, child_l1ss_cap; + + pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &parent_lnkcap); + pcie_capability_read_dword(child, PCI_EXP_LNKCAP, &child_lnkcap); + aspm_calc_both_l1ss_caps(link, &parent_l1ss_cap, &child_l1ss_cap); + + return aspm_calc_init_linkcap(parent_lnkcap, child_lnkcap, + parent_l1ss_cap, child_l1ss_cap); +} + static u32 aspm_calc_enabled_states(struct pcie_link_state *link, u32 up_l1ss_cap, u32 dwn_l1ss_cap) { @@ -630,7 +644,7 @@ static u32 aspm_calc_enabled_states(struct pcie_link_state *link, static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) { struct pci_dev *child = link->downstream, *parent = link->pdev; - u32 parent_lnkcap, child_lnkcap; + u32 parent_lnkcap, child_lnkcap, aspm_support; u32 parent_l1ss_cap, child_l1ss_cap; struct pci_bus *linkbus = parent->subordinate; @@ -676,15 +690,14 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) /* Save default state */ link->aspm_default = link->aspm_enabled; - link->aspm_support = aspm_calc_init_linkcap(parent_lnkcap, - child_lnkcap, - parent_l1ss_cap, - child_l1ss_cap); - if (link->aspm_support & ASPM_STATE_L1SS) - aspm_calc_l1ss_info(link, parent_l1ss_cap, child_l1ss_cap); + aspm_support = aspm_calc_init_linkcap(parent_lnkcap, child_lnkcap, + parent_l1ss_cap, child_l1ss_cap); + if (aspm_support & ASPM_STATE_L1SS) + aspm_calc_l1ss_info(link, aspm_support, parent_l1ss_cap, + child_l1ss_cap); /* Setup initial capable state. Will be updated later */ - link->aspm_capable = link->aspm_support; + link->aspm_capable = aspm_support; /* Get and check endpoint acceptable latencies */ list_for_each_entry(child, &linkbus->devices, bus_list) { @@ -994,7 +1007,7 @@ static void pcie_update_aspm_capable(struct pcie_link_state *root) list_for_each_entry(link, &link_list, sibling) { if (link->root != root) continue; - link->aspm_capable = link->aspm_support; + link->aspm_capable = aspm_get_init_cap(link); } list_for_each_entry(link, &link_list, sibling) { struct pci_dev *child; From patchwork Sat Nov 6 17:53:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Saheed O. Bolarinwa" X-Patchwork-Id: 12606417 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CE88C433EF for ; Sat, 6 Nov 2021 17:54:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 66BF06023D for ; Sat, 6 Nov 2021 17:54:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234803AbhKFR4u (ORCPT ); Sat, 6 Nov 2021 13:56:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233233AbhKFR4o (ORCPT ); Sat, 6 Nov 2021 13:56:44 -0400 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [IPv6:2a00:1450:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6A2DC061205; Sat, 6 Nov 2021 10:54:02 -0700 (PDT) Received: by mail-ed1-x533.google.com with SMTP id ee33so44973351edb.8; Sat, 06 Nov 2021 10:54:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=K3WG4rAD+56vKxa50XW1TjNBq/BUIzSO/60jcuHZf/Q=; b=SNOF1DfDg4DpLqPempXc2Rm9C7wQ/auTZo7U8lWSpvKf5E00/sqfQKNAPwXJNPDloZ 7ghptArMEL+RX7hsYwSFDhfvPpENUDQ4pVVuvoGsbhU4+J2I4wVS9tbETQOavC2He9lJ KngI1J2Oj7W72m/dvpCqpS2jY4QdlYj5sjizwa2wPrTNOSR4g4tmq3OHLsfIn2jtZdTr bU9yyC7F9UEmn+QQGAbUzYuePGrAHyRgHweDlxnXqjLzIUehxfpxZRkxFqA1ADBFPOaV q+7o1+L7hFAQIBScntpDRcOv0x8FGyxZkjlDIQ2J0e0YcYEJRGEmEO3I8GgP5MdLyjq+ nqTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K3WG4rAD+56vKxa50XW1TjNBq/BUIzSO/60jcuHZf/Q=; b=07FBzE+e011DZqB46ZV5Gr1FJXzeRaqW0wF50oWHQco8xS4uUxf+eWXFygfrUh3uHZ TH2NzxuvW84O2bOSbEm9YBIIMDeSp+vt5IcG5Uhb+KpVV6zMGlXaXYcGZa98Ciy35Do5 RzoUatysF0Dgc+tzhPVUGQobpccTAEQhixu0sJ9Pm56DTJ687XC4TgwUv/cpfCix0CMl 7t/jD/qR2wiPxMLIrKrHHE7D1z+AqYgSC+VkfZzoslqAKbmkSJS3DMp2aAsRGE4vPnZE waTbq92gR/3sV/soexxUzbHA5M2IZ7xQvPoAPF5bmMfN1IEn3hIT/I/u0uer21Fk9kew GPqw== X-Gm-Message-State: AOAM5320tAu5LKoJx7ACrlMww5BBybe6JOe1BwA7Mje4Wlws6LlMXKTx hUO/UsIfs42b4Qg6TNoUs64= X-Google-Smtp-Source: ABdhPJz8j0dvlOxXY448+qcUjsMKlCqnNdHUwRmE3hrjCsqAgyUi6E9z+98/qnLMevGfOWKenFANNw== X-Received: by 2002:a05:6402:2cd:: with SMTP id b13mr38280196edx.199.1636221241051; Sat, 06 Nov 2021 10:54:01 -0700 (PDT) Received: from localhost.localdomain ([2a02:ab88:109:9f0:f6a6:7fbe:807a:e1cc]) by smtp.googlemail.com with ESMTPSA id m12sm5753494ejj.63.2021.11.06.10.54.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Nov 2021 10:54:00 -0700 (PDT) From: "Saheed O. Bolarinwa" To: helgaas@kernel.org Cc: "Saheed O. Bolarinwa" , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v1 5/6] PCI/ASPM: Move pcie_aspm_sanity_check() upwards Date: Sat, 6 Nov 2021 18:53:52 +0100 Message-Id: <20211106175353.26248-6-refactormyself@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211106175353.26248-1-refactormyself@gmail.com> References: <20211106175353.26248-1-refactormyself@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Move pcie_aspm_sanity_check() upwards to make more accessible. Signed-off-by: Saheed O. Bolarinwa --- drivers/pci/pcie/aspm.c | 70 ++++++++++++++++++++--------------------- 1 file changed, 35 insertions(+), 35 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 9aaae476ea31..05ca165380e1 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -447,6 +447,41 @@ static void pci_clear_and_set_dword(struct pci_dev *pdev, int pos, pci_write_config_dword(pdev, pos, val); } +static int pcie_aspm_sanity_check(struct pci_dev *pdev) +{ + struct pci_dev *child; + u32 reg32; + + /* + * Some functions in a slot might not all be PCIe functions, + * very strange. Disable ASPM for the whole slot + */ + list_for_each_entry(child, &pdev->subordinate->devices, bus_list) { + if (!pci_is_pcie(child)) + return -EINVAL; + + /* + * If ASPM is disabled then we're not going to change + * the BIOS state. It's safe to continue even if it's a + * pre-1.1 device + */ + + if (aspm_disabled) + continue; + + /* + * Disable ASPM for pre-1.1 PCIe device, we follow MS to use + * RBER bit to determine if a function is 1.1 version device + */ + pcie_capability_read_dword(child, PCI_EXP_DEVCAP, ®32); + if (!(reg32 & PCI_EXP_DEVCAP_RBER) && !aspm_force) { + pci_info(child, "disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'\n"); + return -EINVAL; + } + } + return 0; +} + /* Calculate L1.2 PM substate timing parameters */ static void aspm_calc_l1ss_info(struct pcie_link_state *link, u32 aspm_support, u32 parent_l1ss_cap, @@ -846,41 +881,6 @@ static void free_link_state(struct pcie_link_state *link) kfree(link); } -static int pcie_aspm_sanity_check(struct pci_dev *pdev) -{ - struct pci_dev *child; - u32 reg32; - - /* - * Some functions in a slot might not all be PCIe functions, - * very strange. Disable ASPM for the whole slot - */ - list_for_each_entry(child, &pdev->subordinate->devices, bus_list) { - if (!pci_is_pcie(child)) - return -EINVAL; - - /* - * If ASPM is disabled then we're not going to change - * the BIOS state. It's safe to continue even if it's a - * pre-1.1 device - */ - - if (aspm_disabled) - continue; - - /* - * Disable ASPM for pre-1.1 PCIe device, we follow MS to use - * RBER bit to determine if a function is 1.1 version device - */ - pcie_capability_read_dword(child, PCI_EXP_DEVCAP, ®32); - if (!(reg32 & PCI_EXP_DEVCAP_RBER) && !aspm_force) { - pci_info(child, "disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force'\n"); - return -EINVAL; - } - } - return 0; -} - static struct pcie_link_state *alloc_pcie_link_state(struct pci_dev *pdev) { struct pcie_link_state *link; From patchwork Sat Nov 6 17:53:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Saheed O. Bolarinwa" X-Patchwork-Id: 12606419 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5078C4332F for ; Sat, 6 Nov 2021 17:54:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A0BB16023D for ; Sat, 6 Nov 2021 17:54:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234811AbhKFR4v (ORCPT ); Sat, 6 Nov 2021 13:56:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234765AbhKFR4p (ORCPT ); Sat, 6 Nov 2021 13:56:45 -0400 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72F8FC061208; Sat, 6 Nov 2021 10:54:03 -0700 (PDT) Received: by mail-ed1-x52a.google.com with SMTP id ee33so44973432edb.8; Sat, 06 Nov 2021 10:54:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6A7zCqzCZWyLyiZF3DRuNcihyZACWBNYNUaRORwS67o=; b=qz8jGwscVHWwpiGr2NGnGRq0w9XHF+qf2OsfpG7ncBlUEkdMPqeWqwnn7E6SlA7Icw /Kz6K0F4fr3DEC70CXj/O12sAc9JX2ZghKr8afemQOuaxyT/ebMKERCwUp7RNS9Xv1xb JcP+KU0y8KhtVZRJlEXm7rrGVhDtSZL1A1hZm5l8eVwJmVvYKvfemLGDWT4o2dTZWRom /jqRi2IvVw2m66z3GhkmPgp5tJZpgQZHUhSxFFz1rv1oSVzIt8llvKhFHYAWgX74ptsR kvlicFoZEqrwFX96TOJ9NrMQWepWsxQ4RPt/UM6s5sFSYMb9UvZ9c+n8mPxgLdShRe54 vVgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6A7zCqzCZWyLyiZF3DRuNcihyZACWBNYNUaRORwS67o=; b=PtnguBbZIAV6tU1u8K8JFuXQOI9UjMTP4qqy8T5ZYgJ5v2DWIbInXXGCSEyGarZ1YY t0NkxnGGtHYb988naspB9+/HH0fPG/jVlEnpEcjG5KKMGxP94/kI2yOnx5jcr1ZTKyu7 eAAqQbZNDwKXibRslYLDJUe9G/Z/v6Vqzp13gruHYroOVVXA9mSyMaQuoVuqTJxHjAEM E+5INgbNf3c/5gl9kGjfmMSDBakz7ob4zfmz43w+1hfAX7pgeerRuAeTxDkmFTiygA+t x0X9YwmWclePyXss9R+09PulYvQezu84wR4Hv9VBBaTHM3706Q2/VFHk5oUBT/oFBA3H LRyw== X-Gm-Message-State: AOAM533Rn+6cycJVsV4j1VKD5539p41lLmwHabJZO+IeTABAh59YptIJ VGFfyHX2qoWywNsnRKTGJ4jjFIY5CvI= X-Google-Smtp-Source: ABdhPJwrXFVzeZ21mBgdDmONxUiJSy9p4dYteuwI75Cq1o8zchlrsJMBtxJEchW9Tq2TBqP+i4Di1w== X-Received: by 2002:a17:907:8a20:: with SMTP id sc32mr56196955ejc.65.1636221241874; Sat, 06 Nov 2021 10:54:01 -0700 (PDT) Received: from localhost.localdomain ([2a02:ab88:109:9f0:f6a6:7fbe:807a:e1cc]) by smtp.googlemail.com with ESMTPSA id m12sm5753494ejj.63.2021.11.06.10.54.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 06 Nov 2021 10:54:01 -0700 (PDT) From: "Saheed O. Bolarinwa" To: helgaas@kernel.org Cc: "Saheed O. Bolarinwa" , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v1 6/6] PCI/ASPM: Don't cache struct pcie_link_state->aspm_enabled Date: Sat, 6 Nov 2021 18:53:53 +0100 Message-Id: <20211106175353.26248-7-refactormyself@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211106175353.26248-1-refactormyself@gmail.com> References: <20211106175353.26248-1-refactormyself@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org aspm_enabled in struct pcie_link_state usually holds the current enabled states of the link. This value is set in two places: 1. pcie_aspm_cap_init(): if the passed in blacklist value holds true, then `link->aspm_enabled = ASPM_STATE_ALL` otherwise values are read from the register and link->aspm_enabled is calculated. This calculation has been extracted into aspm_calc_enabled_states() in an earlier patch in this series. 2. pcie_config_aspm_link(): when a valid state is calculated from the value passed in. The result is later written into the register. The calculated valid state is then store in struct pcie_link_state->aspm_enabled. The calculations in aspm_calc_enabled_states() reads and uses the current state in the register. This can be called whenever link->aspm_enabled is needed. We don't need to store the state. For the case when blacklist value holds in pcie_aspm_cap_init(), this value comes from pcie_aspm_init_link_state(). We can obtain this value whenever link->aspm_enabled is needed and determine if the current enabled states should be set to "ASPM_STATE_ALL". So also in this case we don't need to store the enabled states, it can be obtained on the fly. - Remove aspm_enabled from struct pcie_link_state. - Create a wrapper function arround aspm_calc_enabled_states(). - Replace references to aspm_enabled with a function call. Signed-off-by: Saheed O. Bolarinwa --- drivers/pci/pcie/aspm.c | 36 ++++++++++++++++++++++-------------- 1 file changed, 22 insertions(+), 14 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 05ca165380e1..dce0851c6ab5 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -54,7 +54,6 @@ struct pcie_link_state { struct list_head sibling; /* node in link_list */ /* ASPM state */ - u32 aspm_enabled:7; /* Enabled ASPM state */ u32 aspm_capable:7; /* Capable ASPM state with latency */ u32 aspm_default:7; /* Default ASPM state by BIOS */ u32 aspm_disable:7; /* Disabled ASPM state */ @@ -676,6 +675,18 @@ static u32 aspm_calc_enabled_states(struct pcie_link_state *link, return aspm_enabled; } +static u32 aspm_get_enabled_states(struct pcie_link_state *link) +{ + u32 up_l1ss_cap, dwn_l1ss_cap; + + if (pcie_aspm_sanity_check(link->pdev)) + return ASPM_STATE_ALL; + + aspm_calc_both_l1ss_caps(link, &up_l1ss_cap, &dwn_l1ss_cap); + + return aspm_calc_enabled_states(link, up_l1ss_cap, dwn_l1ss_cap); +} + static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) { struct pci_dev *child = link->downstream, *parent = link->pdev; @@ -684,8 +695,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) struct pci_bus *linkbus = parent->subordinate; if (blacklist) { - /* Set enabled/disable so that we will disable ASPM later */ - link->aspm_enabled = ASPM_STATE_ALL; + /* Set disable so that we will disable ASPM later */ link->aspm_disable = ASPM_STATE_ALL; return; } @@ -719,11 +729,9 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) /* Setup L1 substate */ aspm_calc_both_l1ss_caps(link, &parent_l1ss_cap, &child_l1ss_cap); - link->aspm_enabled = aspm_calc_enabled_states(link, parent_l1ss_cap, - child_l1ss_cap); - /* Save default state */ - link->aspm_default = link->aspm_enabled; + link->aspm_default = aspm_calc_enabled_states(link, parent_l1ss_cap, + child_l1ss_cap); aspm_support = aspm_calc_init_linkcap(parent_lnkcap, child_lnkcap, parent_l1ss_cap, child_l1ss_cap); @@ -762,7 +770,7 @@ static void pcie_config_aspm_l1ss(struct pcie_link_state *link, u32 state) u32 val, enable_req; struct pci_dev *child = link->downstream, *parent = link->pdev; - enable_req = (link->aspm_enabled ^ state) & state; + enable_req = (aspm_get_enabled_states(link) ^ state) & state; /* * Here are the rules specified in the PCIe spec for enabling L1SS: @@ -821,6 +829,7 @@ static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state) u32 upstream = 0, dwstream = 0; struct pci_dev *child = link->downstream, *parent = link->pdev; struct pci_bus *linkbus = parent->subordinate; + u32 aspm_enabled = aspm_get_enabled_states(link); /* Enable only the states that were not explicitly disabled */ state &= (link->aspm_capable & ~link->aspm_disable); @@ -832,11 +841,11 @@ static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state) /* Spec says both ports must be in D0 before enabling PCI PM substates*/ if (parent->current_state != PCI_D0 || child->current_state != PCI_D0) { state &= ~ASPM_STATE_L1_SS_PCIPM; - state |= (link->aspm_enabled & ASPM_STATE_L1_SS_PCIPM); + state |= (aspm_enabled & ASPM_STATE_L1_SS_PCIPM); } /* Nothing to do if the link is already in the requested state */ - if (link->aspm_enabled == state) + if (aspm_enabled == state) return; /* Convert ASPM state to upstream/downstream ASPM register state */ if (state & ASPM_STATE_L0S_UP) @@ -863,8 +872,6 @@ static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state) pcie_config_aspm_dev(child, dwstream); if (!(state & ASPM_STATE_L1)) pcie_config_aspm_dev(parent, upstream); - - link->aspm_enabled = state; } static void pcie_config_aspm_path(struct pcie_link_state *link) @@ -1238,7 +1245,7 @@ bool pcie_aspm_enabled(struct pci_dev *pdev) if (!link) return false; - return link->aspm_enabled; + return aspm_get_enabled_states(link); } EXPORT_SYMBOL_GPL(pcie_aspm_enabled); @@ -1249,7 +1256,8 @@ static ssize_t aspm_attr_show_common(struct device *dev, struct pci_dev *pdev = to_pci_dev(dev); struct pcie_link_state *link = pcie_aspm_get_link(pdev); - return sysfs_emit(buf, "%d\n", (link->aspm_enabled & state) ? 1 : 0); + return sysfs_emit(buf, "%d\n", + (aspm_get_enabled_states(link) & state) ? 1 : 0); } static ssize_t aspm_attr_store_common(struct device *dev,