From patchwork Wed Nov 24 21:29:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 12637851 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 680EAC433EF for ; Wed, 24 Nov 2021 21:29:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343673AbhKXVcg (ORCPT ); Wed, 24 Nov 2021 16:32:36 -0500 Received: from mo4-p03-ob.smtp.rzone.de ([85.215.255.102]:14063 "EHLO mo4-p03-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232874AbhKXVcg (ORCPT ); Wed, 24 Nov 2021 16:32:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1637789357; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Cc:Date: From:Subject:Sender; bh=CDnhZE/bCmY+sU+9kBR2+/QdGVAtCkJSkm9JjrgStzg=; b=fuma3x8fG2syRP/1CXz2QsA4qT+Kcm5bcgmrqoT6FT8VtO6gUh2OUZLcsFMna0XNG5 scHLI9EW5PPX+c9p8yhkSi4fcsMYb9676mDDyH3BOJTCH5LWeOYfAkUiHBVlpP3uwyWQ JUANIUwDq88cyw7alHqBLmUOLZyI/bBS8eWz6+fz484O9TNv6vS/94rm/TKfc59PfEZH YDfPYJwdViEM4VKHU86811xNn4NaoUkyCAfr4mw752WSHP2FdpeA98/gRCaUvrl+fJjZ EN3zk8ax1VKDPT9zVf0H2qtvY7B3DO4WlxBFUAN2TQ/1whOjzO7BA2daXoS5GgdfEb5J yYTw== Authentication-Results: strato.com; dkim=none X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o1KHeBQyh+ITDDRsZQ==" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 47.34.10 DYNA|AUTH) with ESMTPSA id e05ed8xAOLTG5Aq (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Wed, 24 Nov 2021 22:29:16 +0100 (CET) From: "H. Nikolaus Schaller" To: Paul Cercueil , Rob Herring , Mark Rutland , Thomas Bogendoerfer , "H. Nikolaus Schaller" , Geert Uytterhoeven , Kees Cook , "Eric W. Biederman" , Miquel Raynal , David Airlie , Daniel Vetter , Neil Armstrong , Robert Foss , Laurent Pinchart , Jernej Skrabec , Ezequiel Garcia , Harry Wentland , Sam Ravnborg , Maxime Ripard , Hans Verkuil , Liam Girdwood , Mark Brown , Paul Boddie Cc: devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, Jonas Karlman , dri-devel@lists.freedesktop.org Subject: [PATCH v9 1/8] drm/ingenic: prepare ingenic drm for later addition of JZ4780 Date: Wed, 24 Nov 2021 22:29:07 +0100 Message-Id: X-Mailer: git-send-email 2.33.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org This changes the way the regmap is allocated to prepare for the later addition of the JZ4780 which has more registers and bits than the others. Therefore we make the regmap as big as the reg property in the device tree tells. Suggested-by: Paul Cercueil Signed-off-by: H. Nikolaus Schaller --- drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c index 462bc0f35f1bf..0bb590c3910d9 100644 --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c @@ -173,7 +173,6 @@ static const struct regmap_config ingenic_drm_regmap_config = { .val_bits = 32, .reg_stride = 4, - .max_register = JZ_REG_LCD_SIZE1, .writeable_reg = ingenic_drm_writeable_reg, }; @@ -1011,6 +1010,8 @@ static int ingenic_drm_bind(struct device *dev, bool has_components) struct ingenic_drm_bridge *ib; struct drm_device *drm; void __iomem *base; + struct resource *res; + struct regmap_config regmap_config; long parent_rate; unsigned int i, clone_mask = 0; int ret, irq; @@ -1056,14 +1057,16 @@ static int ingenic_drm_bind(struct device *dev, bool has_components) drm->mode_config.funcs = &ingenic_drm_mode_config_funcs; drm->mode_config.helper_private = &ingenic_drm_mode_config_helpers; - base = devm_platform_ioremap_resource(pdev, 0); + base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); if (IS_ERR(base)) { dev_err(dev, "Failed to get memory resource\n"); return PTR_ERR(base); } + regmap_config = ingenic_drm_regmap_config; + regmap_config.max_register = res->end - res->start; priv->map = devm_regmap_init_mmio(dev, base, - &ingenic_drm_regmap_config); + ®map_config); if (IS_ERR(priv->map)) { dev_err(dev, "Failed to create regmap\n"); return PTR_ERR(priv->map); From patchwork Wed Nov 24 21:29:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 12637855 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B72BC43217 for ; Wed, 24 Nov 2021 21:29:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344219AbhKXVcq (ORCPT ); Wed, 24 Nov 2021 16:32:46 -0500 Received: from mo4-p03-ob.smtp.rzone.de ([85.215.255.102]:17832 "EHLO mo4-p03-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343978AbhKXVcp (ORCPT ); Wed, 24 Nov 2021 16:32:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1637789357; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Cc:Date: From:Subject:Sender; bh=8whLw7LSPDit5tAOu3puFsieyl0uvLe0+DPRaMss9ys=; b=GMLYGNNhE3/hxILwsRDVklGNtduEapZ4ZcBdXoeL/XINYpKLZNrB6qy2VeBO3UUR78 fKUwvqdmVU9hGTmSDAd0ykfAZWzVAuRR4m5SgSYgD4XIhKJEgb6g7zgd2QKEUiVlLSMH BUlIaUxW4SiJ9VSKO0wiptGLwFzWeg8Ylp2yR5qEhV7k+qPj+eUB1LvjEm/kKo8zvdRo B+Tuvf65uPtx+/OKm1PRzgmYJClvsNVo3fUiSBz2vauuZACRUWBKaXIoGahOJGriQw1b eiYSZ1ink3PsRySIo4I2sn+UMHw9sWXlTFHsT4u9DVo+GRT8Pyz9AzvzlHxU6GiYrMSr AvMw== Authentication-Results: strato.com; dkim=none X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o1KHeBQyh+ITDDRsZQ==" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 47.34.10 DYNA|AUTH) with ESMTPSA id e05ed8xAOLTH5As (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Wed, 24 Nov 2021 22:29:17 +0100 (CET) From: "H. Nikolaus Schaller" To: Paul Cercueil , Rob Herring , Mark Rutland , Thomas Bogendoerfer , "H. Nikolaus Schaller" , Geert Uytterhoeven , Kees Cook , "Eric W. Biederman" , Miquel Raynal , David Airlie , Daniel Vetter , Neil Armstrong , Robert Foss , Laurent Pinchart , Jernej Skrabec , Ezequiel Garcia , Harry Wentland , Sam Ravnborg , Maxime Ripard , Hans Verkuil , Liam Girdwood , Mark Brown , Paul Boddie Cc: devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, Jonas Karlman , dri-devel@lists.freedesktop.org Subject: [PATCH v9 2/8] drm/ingenic: Add support for JZ4780 and HDMI output Date: Wed, 24 Nov 2021 22:29:08 +0100 Message-Id: <3c1aa7982faa0bebff0022c951635b18a4ac83e9.1637789354.git.hns@goldelico.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Paul Boddie Add support for the LCD controller present on JZ4780 SoCs. This SoC uses 8-byte descriptors which extend the current 4-byte descriptors used for other Ingenic SoCs. Tested on MIPS Creator CI20 board. Signed-off-by: Paul Boddie Signed-off-by: Ezequiel Garcia Signed-off-by: H. Nikolaus Schaller --- drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 53 +++++++++++++++++++++++ drivers/gpu/drm/ingenic/ingenic-drm.h | 38 ++++++++++++++++ 2 files changed, 91 insertions(+) diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c index 0bb590c3910d9..34089bc6e0fcd 100644 --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c @@ -6,6 +6,7 @@ #include "ingenic-drm.h" +#include #include #include #include @@ -49,6 +50,11 @@ struct ingenic_dma_hwdesc { u32 addr; u32 id; u32 cmd; + /* extended hw descriptor for jz4780 */ + u32 offsize; + u32 pagewidth; + u32 cpos; + u32 dessize; } __aligned(16); struct ingenic_dma_hwdescs { @@ -60,6 +66,7 @@ struct jz_soc_info { bool needs_dev_clk; bool has_osd; bool map_noncoherent; + bool use_extended_hwdesc; unsigned int max_width, max_height; const u32 *formats_f0, *formats_f1; unsigned int num_formats_f0, num_formats_f1; @@ -446,6 +453,9 @@ static int ingenic_drm_plane_atomic_check(struct drm_plane *plane, if (!crtc) return 0; + if (plane == &priv->f0) + return -EINVAL; + crtc_state = drm_atomic_get_existing_crtc_state(state, crtc); if (WARN_ON(!crtc_state)) @@ -662,6 +672,33 @@ static void ingenic_drm_plane_atomic_update(struct drm_plane *plane, hwdesc->cmd = JZ_LCD_CMD_EOF_IRQ | (width * height * cpp / 4); hwdesc->next = dma_hwdesc_addr(priv, next_id); + if (priv->soc_info->use_extended_hwdesc) { + hwdesc->cmd |= JZ_LCD_CMD_FRM_ENABLE; + + /* Extended 8-byte descriptor */ + hwdesc->cpos = 0; + hwdesc->offsize = 0; + hwdesc->pagewidth = 0; + + switch (newstate->fb->format->format) { + case DRM_FORMAT_XRGB1555: + hwdesc->cpos |= JZ_LCD_CPOS_RGB555; + fallthrough; + case DRM_FORMAT_RGB565: + hwdesc->cpos |= JZ_LCD_CPOS_BPP_15_16; + break; + case DRM_FORMAT_XRGB8888: + hwdesc->cpos |= JZ_LCD_CPOS_BPP_18_24; + break; + } + hwdesc->cpos |= (JZ_LCD_CPOS_COEFFICIENT_1 << + JZ_LCD_CPOS_COEFFICIENT_OFFSET); + hwdesc->dessize = + (0xff << JZ_LCD_DESSIZE_ALPHA_OFFSET) | + FIELD_PREP(JZ_LCD_DESSIZE_HEIGHT_MASK, height - 1) | + FIELD_PREP(JZ_LCD_DESSIZE_WIDTH_MASK, width - 1); + } + if (drm_atomic_crtc_needs_modeset(crtc_state)) { fourcc = newstate->fb->format->format; @@ -693,6 +730,9 @@ static void ingenic_drm_encoder_atomic_mode_set(struct drm_encoder *encoder, | JZ_LCD_CFG_SPL_DISABLE | JZ_LCD_CFG_REV_DISABLE; } + if (priv->soc_info->use_extended_hwdesc) + cfg |= JZ_LCD_CFG_DESCRIPTOR_8; + if (mode->flags & DRM_MODE_FLAG_NHSYNC) cfg |= JZ_LCD_CFG_HSYNC_ACTIVE_LOW; if (mode->flags & DRM_MODE_FLAG_NVSYNC) @@ -1468,10 +1508,23 @@ static const struct jz_soc_info jz4770_soc_info = { .num_formats_f0 = ARRAY_SIZE(jz4770_formats_f0), }; +static const struct jz_soc_info jz4780_soc_info = { + .needs_dev_clk = true, + .has_osd = true, + .use_extended_hwdesc = true, + .max_width = 4096, + .max_height = 2048, + .formats_f1 = jz4770_formats_f1, + .num_formats_f1 = ARRAY_SIZE(jz4770_formats_f1), + .formats_f0 = jz4770_formats_f0, + .num_formats_f0 = ARRAY_SIZE(jz4770_formats_f0), +}; + static const struct of_device_id ingenic_drm_of_match[] = { { .compatible = "ingenic,jz4740-lcd", .data = &jz4740_soc_info }, { .compatible = "ingenic,jz4725b-lcd", .data = &jz4725b_soc_info }, { .compatible = "ingenic,jz4770-lcd", .data = &jz4770_soc_info }, + { .compatible = "ingenic,jz4780-lcd", .data = &jz4780_soc_info }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, ingenic_drm_of_match); diff --git a/drivers/gpu/drm/ingenic/ingenic-drm.h b/drivers/gpu/drm/ingenic/ingenic-drm.h index 22654ac1dde1c..cb1d09b625881 100644 --- a/drivers/gpu/drm/ingenic/ingenic-drm.h +++ b/drivers/gpu/drm/ingenic/ingenic-drm.h @@ -44,8 +44,11 @@ #define JZ_REG_LCD_XYP1 0x124 #define JZ_REG_LCD_SIZE0 0x128 #define JZ_REG_LCD_SIZE1 0x12c +#define JZ_REG_LCD_PCFG 0x2c0 #define JZ_LCD_CFG_SLCD BIT(31) +#define JZ_LCD_CFG_DESCRIPTOR_8 BIT(28) +#define JZ_LCD_CFG_RECOVER_FIFO_UNDERRUN BIT(25) #define JZ_LCD_CFG_PS_DISABLE BIT(23) #define JZ_LCD_CFG_CLS_DISABLE BIT(22) #define JZ_LCD_CFG_SPL_DISABLE BIT(21) @@ -63,6 +66,7 @@ #define JZ_LCD_CFG_DE_ACTIVE_LOW BIT(9) #define JZ_LCD_CFG_VSYNC_ACTIVE_LOW BIT(8) #define JZ_LCD_CFG_18_BIT BIT(7) +#define JZ_LCD_CFG_24_BIT BIT(6) #define JZ_LCD_CFG_PDW (BIT(5) | BIT(4)) #define JZ_LCD_CFG_MODE_GENERIC_16BIT 0 @@ -132,6 +136,7 @@ #define JZ_LCD_CMD_SOF_IRQ BIT(31) #define JZ_LCD_CMD_EOF_IRQ BIT(30) #define JZ_LCD_CMD_ENABLE_PAL BIT(28) +#define JZ_LCD_CMD_FRM_ENABLE BIT(26) #define JZ_LCD_SYNC_MASK 0x3ff @@ -153,6 +158,7 @@ #define JZ_LCD_RGBC_EVEN_BGR (0x5 << 0) #define JZ_LCD_OSDC_OSDEN BIT(0) +#define JZ_LCD_OSDC_ALPHAEN BIT(2) #define JZ_LCD_OSDC_F0EN BIT(3) #define JZ_LCD_OSDC_F1EN BIT(4) @@ -176,6 +182,38 @@ #define JZ_LCD_SIZE01_WIDTH_LSB 0 #define JZ_LCD_SIZE01_HEIGHT_LSB 16 +#define JZ_LCD_DESSIZE_ALPHA_OFFSET 24 +#define JZ_LCD_DESSIZE_HEIGHT_MASK GENMASK(23, 12) +#define JZ_LCD_DESSIZE_WIDTH_MASK GENMASK(11, 0) + +#define JZ_LCD_CPOS_BPP_15_16 (4 << 27) +#define JZ_LCD_CPOS_BPP_18_24 (5 << 27) +#define JZ_LCD_CPOS_BPP_30 (7 << 27) +#define JZ_LCD_CPOS_RGB555 BIT(30) +#define JZ_LCD_CPOS_PREMULTIPLY_LCD BIT(26) +#define JZ_LCD_CPOS_COEFFICIENT_OFFSET 24 +#define JZ_LCD_CPOS_COEFFICIENT_0 0 +#define JZ_LCD_CPOS_COEFFICIENT_1 1 +#define JZ_LCD_CPOS_COEFFICIENT_ALPHA1 2 +#define JZ_LCD_CPOS_COEFFICIENT_1_ALPHA1 3 + +#define JZ_LCD_RGBC_RGB_PADDING BIT(15) +#define JZ_LCD_RGBC_RGB_PADDING_FIRST BIT(14) +#define JZ_LCD_RGBC_422 BIT(8) +#define JZ_LCD_RGBC_RGB_FORMAT_ENABLE BIT(7) + +#define JZ_LCD_PCFG_PRI_MODE BIT(31) +#define JZ_LCD_PCFG_HP_BST_4 (0 << 28) +#define JZ_LCD_PCFG_HP_BST_8 (1 << 28) +#define JZ_LCD_PCFG_HP_BST_16 (2 << 28) +#define JZ_LCD_PCFG_HP_BST_32 (3 << 28) +#define JZ_LCD_PCFG_HP_BST_64 (4 << 28) +#define JZ_LCD_PCFG_HP_BST_16_CONT (5 << 28) +#define JZ_LCD_PCFG_HP_BST_DISABLE (7 << 28) +#define JZ_LCD_PCFG_THRESHOLD2_OFFSET 18 +#define JZ_LCD_PCFG_THRESHOLD1_OFFSET 9 +#define JZ_LCD_PCFG_THRESHOLD0_OFFSET 0 + struct device; struct drm_plane; struct drm_plane_state; From patchwork Wed Nov 24 21:29:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 12637853 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 337DAC433FE for ; Wed, 24 Nov 2021 21:29:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344143AbhKXVcq (ORCPT ); Wed, 24 Nov 2021 16:32:46 -0500 Received: from mo4-p03-ob.smtp.rzone.de ([81.169.146.175]:9578 "EHLO mo4-p03-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343956AbhKXVcp (ORCPT ); Wed, 24 Nov 2021 16:32:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1637789358; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Cc:Date: From:Subject:Sender; bh=CaK/DHgCjE7tqxBG3dMIhNrm8hb5FjbRiN8SdBS6bsI=; b=msdevoLspuG7iyHhL0VQoY19KxapMEjDdYRuQftBp2O9ihj5HEvw83QOALaIOmLISS GG9//SbEz60cELPNJPthWrsl0cZPjKEKl0Sh5USxIo0gRMZ/ntDquGZ5B/y6qPtyJjp6 KUElAbRJmqJAv3cGf3+2kBuatwUOT3UAV+Dvc2nOMuemHGcmocvqt2k0r4HSvhmdDU0S FYxTbr7uS913dZJEA83axlCJBn9/V9nnmevF6elGslYDHbxabS1LrdKw07rgg5dG65DU azcX/R/04A8K+jP61iMq61MHnf/+Q5hGJpOpoCgIppaZOpvHFIcjTSgoup0zfhIrG1DB 0/Zg== Authentication-Results: strato.com; dkim=none X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o1KHeBQyh+ITDDRsZQ==" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 47.34.10 DYNA|AUTH) with ESMTPSA id e05ed8xAOLTH5At (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Wed, 24 Nov 2021 22:29:17 +0100 (CET) From: "H. Nikolaus Schaller" To: Paul Cercueil , Rob Herring , Mark Rutland , Thomas Bogendoerfer , "H. Nikolaus Schaller" , Geert Uytterhoeven , Kees Cook , "Eric W. Biederman" , Miquel Raynal , David Airlie , Daniel Vetter , Neil Armstrong , Robert Foss , Laurent Pinchart , Jernej Skrabec , Ezequiel Garcia , Harry Wentland , Sam Ravnborg , Maxime Ripard , Hans Verkuil , Liam Girdwood , Mark Brown , Paul Boddie Cc: devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, Jonas Karlman , dri-devel@lists.freedesktop.org, Rob Herring Subject: [PATCH v9 3/8] dt-bindings: display: Add ingenic,jz4780-dw-hdmi DT Schema Date: Wed, 24 Nov 2021 22:29:09 +0100 Message-Id: X-Mailer: git-send-email 2.33.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Sam Ravnborg Add DT bindings for the hdmi driver for the Ingenic JZ4780 SoC. Based on .txt binding from Zubair Lutfullah Kakakhel We also add generic ddc-i2c-bus to synopsys,dw-hdmi.yaml Signed-off-by: Sam Ravnborg Signed-off-by: H. Nikolaus Schaller Cc: Rob Herring Cc: devicetree@vger.kernel.org --- .../display/bridge/ingenic,jz4780-hdmi.yaml | 76 +++++++++++++++++++ .../display/bridge/synopsys,dw-hdmi.yaml | 3 + 2 files changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml new file mode 100644 index 0000000000000..9ab259ca2d849 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bridge/ingenic,jz4780-hdmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bindings for Ingenic JZ4780 HDMI Transmitter + +maintainers: + - H. Nikolaus Schaller + +description: | + The HDMI Transmitter in the Ingenic JZ4780 is a Synopsys DesignWare HDMI 1.4 + TX controller IP with accompanying PHY IP. + +allOf: + - $ref: bridge/synopsys,dw-hdmi.yaml# + +properties: + compatible: + const: ingenic,jz4780-dw-hdmi + + reg-io-width: + const: 4 + + clocks: + maxItems: 2 + + hdmi-5v-supply: + description: Optional regulator to provide +5V at the connector + + ports: + $ref: /schemas/graph.yaml#/properties/ports + +required: + - compatible + - clocks + - clock-names + - ports + - reg-io-width + +unevaluatedProperties: false + +examples: + - | + #include + + hdmi: hdmi@10180000 { + compatible = "ingenic,jz4780-dw-hdmi"; + reg = <0x10180000 0x8000>; + reg-io-width = <4>; + ddc-i2c-bus = <&i2c4>; + interrupt-parent = <&intc>; + interrupts = <3>; + clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>; + clock-names = "iahb", "isfr"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + hdmi_in: port@0 { + reg = <0>; + dw_hdmi_in: endpoint { + remote-endpoint = <&jz4780_lcd_out>; + }; + }; + hdmi_out: port@1 { + reg = <1>; + dw_hdmi_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml index 9be44a682e67a..9cbeabaee0968 100644 --- a/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml @@ -50,6 +50,9 @@ properties: interrupts: maxItems: 1 + ddc-i2c-bus: + description: An I2C interface if the internal DDC I2C driver is not to be used + additionalProperties: true ... From patchwork Wed Nov 24 21:29:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 12637861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7801FC43219 for ; Wed, 24 Nov 2021 21:29:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344832AbhKXVcs (ORCPT ); Wed, 24 Nov 2021 16:32:48 -0500 Received: from mo4-p04-ob.smtp.rzone.de ([85.215.255.123]:9121 "EHLO mo4-p04-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344026AbhKXVcp (ORCPT ); Wed, 24 Nov 2021 16:32:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1637789359; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Cc:Date: From:Subject:Sender; bh=+uwR8CCBVCX7GBtRnOw0T/l0Q9SeTWMEM8pLDnBgIoU=; b=P0ToiqWFqvoXSlRg4J8q0JVCNUbFOOg/PIh9hsNUQBzUo1zhSSzHWiNACGXmd0ZYnQ EVP5oV3xlxaPYEt+ZNcb++6Zf6A2PXvBY7qr3/H0kvijJ6mMxDuwiRJa8CMoqKMTybtJ Okof5RzyIJDEFU66NyFg1HOu7pzg82gwfyO6nmJFs2nhs8CnZPgLOUT2M8lLJMyovRDx HpTZueal2jGjVHiOjvJ4DUBIFidBsX9mmQURw2w7rBa9JhhQivia1SWz42i4Y1UosCRX 7egT4QtrKHEkwhv/DvDl8csieanW7VB8VkgPhMoWCv+C/Mr3ztTlRiPdv8sRcN9wecdH QNtw== Authentication-Results: strato.com; dkim=none X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o1KHeBQyh+ITDDRsZQ==" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 47.34.10 DYNA|AUTH) with ESMTPSA id e05ed8xAOLTI5Au (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Wed, 24 Nov 2021 22:29:18 +0100 (CET) From: "H. Nikolaus Schaller" To: Paul Cercueil , Rob Herring , Mark Rutland , Thomas Bogendoerfer , "H. Nikolaus Schaller" , Geert Uytterhoeven , Kees Cook , "Eric W. Biederman" , Miquel Raynal , David Airlie , Daniel Vetter , Neil Armstrong , Robert Foss , Laurent Pinchart , Jernej Skrabec , Ezequiel Garcia , Harry Wentland , Sam Ravnborg , Maxime Ripard , Hans Verkuil , Liam Girdwood , Mark Brown , Paul Boddie Cc: devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, Jonas Karlman , dri-devel@lists.freedesktop.org Subject: [PATCH v9 4/8] drm/ingenic: Add dw-hdmi driver for jz4780 Date: Wed, 24 Nov 2021 22:29:10 +0100 Message-Id: <876ce06ebbbca7234e9c37f8350b25770ba0c942.1637789354.git.hns@goldelico.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Paul Boddie A specialisation of the generic Synopsys HDMI driver is employed for JZ4780 HDMI support. This requires a new driver, plus device tree and configuration modifications. Here we add Kconfig DRM_INGENIC_DW_HDMI, Makefile and driver code. Signed-off-by: Paul Boddie Signed-off-by: Ezequiel Garcia Signed-off-by: H. Nikolaus Schaller --- drivers/gpu/drm/ingenic/Kconfig | 9 ++ drivers/gpu/drm/ingenic/Makefile | 1 + drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c | 138 ++++++++++++++++++++++ 3 files changed, 148 insertions(+) create mode 100644 drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c diff --git a/drivers/gpu/drm/ingenic/Kconfig b/drivers/gpu/drm/ingenic/Kconfig index 3b57f8be007c4..4efc709d77b0a 100644 --- a/drivers/gpu/drm/ingenic/Kconfig +++ b/drivers/gpu/drm/ingenic/Kconfig @@ -25,4 +25,13 @@ config DRM_INGENIC_IPU The Image Processing Unit (IPU) will appear as a second primary plane. +config DRM_INGENIC_DW_HDMI + tristate "Ingenic specific support for Synopsys DW HDMI" + depends on MACH_JZ4780 + select DRM_DW_HDMI + help + Choose this option to enable Synopsys DesignWare HDMI based driver. + If you want to enable HDMI on Ingenic JZ4780 based SoC, you should + select this option.. + endif diff --git a/drivers/gpu/drm/ingenic/Makefile b/drivers/gpu/drm/ingenic/Makefile index d313326bdddbb..f10cc1c5a5f22 100644 --- a/drivers/gpu/drm/ingenic/Makefile +++ b/drivers/gpu/drm/ingenic/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_DRM_INGENIC) += ingenic-drm.o ingenic-drm-y = ingenic-drm-drv.o ingenic-drm-$(CONFIG_DRM_INGENIC_IPU) += ingenic-ipu.o +obj-$(CONFIG_DRM_INGENIC_DW_HDMI) += ingenic-dw-hdmi.o diff --git a/drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c b/drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c new file mode 100644 index 0000000000000..199e39c227d29 --- /dev/null +++ b/drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c @@ -0,0 +1,138 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (C) 2011-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2019, 2020 Paul Boddie + * + * Derived from dw_hdmi-imx.c with i.MX portions removed. + * Probe and remove operations derived from rcar_dw_hdmi.c. + */ + +#include +#include +#include + +#include +#include +#include + +static const struct dw_hdmi_mpll_config ingenic_mpll_cfg[] = { + { 45250000, { { 0x01e0, 0x0000 }, { 0x21e1, 0x0000 }, { 0x41e2, 0x0000 } } }, + { 92500000, { { 0x0140, 0x0005 }, { 0x2141, 0x0005 }, { 0x4142, 0x0005 } } }, + { 148500000, { { 0x00a0, 0x000a }, { 0x20a1, 0x000a }, { 0x40a2, 0x000a } } }, + { 216000000, { { 0x00a0, 0x000a }, { 0x2001, 0x000f }, { 0x4002, 0x000f } } }, + { ~0UL, { { 0x0000, 0x0000 }, { 0x0000, 0x0000 }, { 0x0000, 0x0000 } } } +}; + +static const struct dw_hdmi_curr_ctrl ingenic_cur_ctr[] = { + /*pixelclk bpp8 bpp10 bpp12 */ + { 54000000, { 0x091c, 0x091c, 0x06dc } }, + { 58400000, { 0x091c, 0x06dc, 0x06dc } }, + { 72000000, { 0x06dc, 0x06dc, 0x091c } }, + { 74250000, { 0x06dc, 0x0b5c, 0x091c } }, + { 118800000, { 0x091c, 0x091c, 0x06dc } }, + { 216000000, { 0x06dc, 0x0b5c, 0x091c } }, + { ~0UL, { 0x0000, 0x0000, 0x0000 } }, +}; + +/* + * Resistance term 133Ohm Cfg + * PREEMP config 0.00 + * TX/CK level 10 + */ +static const struct dw_hdmi_phy_config ingenic_phy_config[] = { + /*pixelclk symbol term vlev */ + { 216000000, 0x800d, 0x0005, 0x01ad}, + { ~0UL, 0x0000, 0x0000, 0x0000} +}; + +static enum drm_mode_status +ingenic_dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, + const struct drm_display_info *info, + const struct drm_display_mode *mode) +{ + if (mode->clock < 13500) + return MODE_CLOCK_LOW; + /* FIXME: Hardware is capable of 270MHz, but setup data is missing. */ + if (mode->clock > 216000) + return MODE_CLOCK_HIGH; + + return MODE_OK; +} + +static struct dw_hdmi_plat_data ingenic_dw_hdmi_plat_data = { + .mpll_cfg = ingenic_mpll_cfg, + .cur_ctr = ingenic_cur_ctr, + .phy_config = ingenic_phy_config, + .mode_valid = ingenic_dw_hdmi_mode_valid, + .output_port = 1, +}; + +static const struct of_device_id ingenic_dw_hdmi_dt_ids[] = { + { .compatible = "ingenic,jz4780-dw-hdmi" }, + { /* Sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, ingenic_dw_hdmi_dt_ids); + +static void ingenic_dw_hdmi_cleanup(void *data) +{ + struct dw_hdmi *hdmi = (struct dw_hdmi *)data; + + dw_hdmi_remove(hdmi); +} + +static void ingenic_dw_hdmi_disable_regulator(void *data) +{ + struct regulator *regulator = (struct regulator *)data; + + regulator_disable(regulator); +} + +static int ingenic_dw_hdmi_probe(struct platform_device *pdev) +{ + struct dw_hdmi *hdmi; + struct regulator *regulator; + int ret; + + hdmi = dw_hdmi_probe(pdev, &ingenic_dw_hdmi_plat_data); + if (IS_ERR(hdmi)) + return PTR_ERR(hdmi); + + ret = devm_add_action_or_reset(&pdev->dev, ingenic_dw_hdmi_cleanup, hdmi); + if (ret) + return ret; + + regulator = devm_regulator_get_optional(&pdev->dev, "hdmi-5v"); + if (IS_ERR(regulator)) { + ret = PTR_ERR(regulator); + + DRM_DEV_ERROR(&pdev->dev, "failed to get hpd regulator: %s (%d)\n", + "hdmi-5v", ret); + + return ret; + } + + if (!regulator) + return 0; + ret = regulator_enable(regulator); + if (ret) { + DRM_DEV_ERROR(&pdev->dev, "Failed to enable hpd regulator: %d\n", + ret); + + return ret; + } + + return devm_add_action_or_reset(&pdev->dev, ingenic_dw_hdmi_disable_regulator, + regulator); +} + +static struct platform_driver ingenic_dw_hdmi_driver = { + .probe = ingenic_dw_hdmi_probe, + .driver = { + .name = "dw-hdmi-ingenic", + .of_match_table = ingenic_dw_hdmi_dt_ids, + }, +}; +module_platform_driver(ingenic_dw_hdmi_driver); + +MODULE_DESCRIPTION("JZ4780 Specific DW-HDMI Driver Extension"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:dwhdmi-ingenic"); From patchwork Wed Nov 24 21:29:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 12637865 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34EECC433F5 for ; Wed, 24 Nov 2021 21:30:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343956AbhKXVcs (ORCPT ); Wed, 24 Nov 2021 16:32:48 -0500 Received: from mo4-p04-ob.smtp.rzone.de ([85.215.255.121]:24801 "EHLO mo4-p04-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344039AbhKXVcp (ORCPT ); Wed, 24 Nov 2021 16:32:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1637789359; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Cc:Date: From:Subject:Sender; bh=HSbMnkEe2Jt2W3AUERTK6EItFoNAV8MtSmNWsrhpnPI=; b=aAcdMpWmp75Ubv53CkkdqSLWoAEpwE8yD+igFoapZ7JgCS6K7eByq2ZCQOWT11us9q 1Opjb/UOs6KeugmO818Aa33eBVDyv/uUUvxl7h2rf15T5WnT5a/mBRxLtfKbXrkWcqIT RIRRUHdzahBcZxHJGwZTxcjHp70YDfPiwLoulsR6TOkFxJwm8uqwkFfldJVm4IGodws/ 7XUMKc69ngVFnUfVfjc7QvnlsTlPIARnC9hK0qHebgx80Rlb+d4YdqgAcxGdDz/kS73y AhX5RL/y7cnV4W1zXuVYLtJKC9Fh/jlIii5go8RVTfOQVtERiu2wEcnnf0JNt4CU/mGv 4FIg== Authentication-Results: strato.com; dkim=none X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o1KHeBQyh+ITDDRsZQ==" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 47.34.10 DYNA|AUTH) with ESMTPSA id e05ed8xAOLTJ5Av (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Wed, 24 Nov 2021 22:29:19 +0100 (CET) From: "H. Nikolaus Schaller" To: Paul Cercueil , Rob Herring , Mark Rutland , Thomas Bogendoerfer , "H. Nikolaus Schaller" , Geert Uytterhoeven , Kees Cook , "Eric W. Biederman" , Miquel Raynal , David Airlie , Daniel Vetter , Neil Armstrong , Robert Foss , Laurent Pinchart , Jernej Skrabec , Ezequiel Garcia , Harry Wentland , Sam Ravnborg , Maxime Ripard , Hans Verkuil , Liam Girdwood , Mark Brown , Paul Boddie Cc: devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, Jonas Karlman , dri-devel@lists.freedesktop.org Subject: [PATCH v9 5/8] MIPS: DTS: jz4780: Account for Synopsys HDMI driver and LCD controllers Date: Wed, 24 Nov 2021 22:29:11 +0100 Message-Id: <3011e592c8a581f25672dc9fcb3040b2318ad9ce.1637789354.git.hns@goldelico.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Paul Boddie A specialisation of the generic Synopsys HDMI driver is employed for JZ4780 HDMI support. This requires a new driver, plus device tree and configuration modifications. Here we add jz4780 device tree setup. Signed-off-by: Paul Boddie Signed-off-by: H. Nikolaus Schaller --- arch/mips/boot/dts/ingenic/jz4780.dtsi | 40 ++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index b0a4e2e019c36..3f9ea47a10cd2 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -444,6 +444,46 @@ i2c4: i2c@10054000 { status = "disabled"; }; + hdmi: hdmi@10180000 { + compatible = "ingenic,jz4780-dw-hdmi"; + reg = <0x10180000 0x8000>; + reg-io-width = <4>; + + clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>; + clock-names = "iahb", "isfr"; + + interrupt-parent = <&intc>; + interrupts = <3>; + + status = "disabled"; + }; + + lcdc0: lcdc0@13050000 { + compatible = "ingenic,jz4780-lcd"; + reg = <0x13050000 0x1800>; + + clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>; + clock-names = "lcd", "lcd_pclk"; + + interrupt-parent = <&intc>; + interrupts = <31>; + + status = "disabled"; + }; + + lcdc1: lcdc1@130a0000 { + compatible = "ingenic,jz4780-lcd"; + reg = <0x130a0000 0x1800>; + + clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>; + clock-names = "lcd", "lcd_pclk"; + + interrupt-parent = <&intc>; + interrupts = <23>; + + status = "disabled"; + }; + nemc: nemc@13410000 { compatible = "ingenic,jz4780-nemc", "simple-mfd"; reg = <0x13410000 0x10000>; From patchwork Wed Nov 24 21:29:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 12637859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E481DC4167B for ; Wed, 24 Nov 2021 21:29:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345139AbhKXVcv (ORCPT ); Wed, 24 Nov 2021 16:32:51 -0500 Received: from mo4-p04-ob.smtp.rzone.de ([85.215.255.123]:9000 "EHLO mo4-p04-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344055AbhKXVcp (ORCPT ); Wed, 24 Nov 2021 16:32:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1637789360; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Cc:Date: From:Subject:Sender; bh=CCzoD26r5WYLfaWl8adjwn/dam2pLbSIK+t8rP3qAZQ=; b=cXdz3DwpNA6z2XHDJX06svq7n8S3+1gNNDnwFD11n79SSDH79tKv0+ySUSz+f+CwHI N9S58fCE07KlCo5l4xiFTyxKRKe1Fo9TFCt47tLu1X4o44E421pooxkj0IJMNNSPNZUQ IkwB2zJlXb/XfslMulA6PbFgP2RYbQOEKlLhc/5I9df/12Xn8a5K/cXS6Wt2CYmk8er9 OY2Wuv8op7hEmDSXStUKAdL7kIm5Fw5rKOOzdq8opslIFDV3dpKGxeWahBSWoURa+nRc hrM1TtAsq8cNINhf2tJE+WU28Ey8Q+1eYFO+14sV+BfBgro7m5KwWgA2g79Au0g92C1F La4g== Authentication-Results: strato.com; dkim=none X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o1KHeBQyh+ITDDRsZQ==" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 47.34.10 DYNA|AUTH) with ESMTPSA id e05ed8xAOLTJ5Aw (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Wed, 24 Nov 2021 22:29:19 +0100 (CET) From: "H. Nikolaus Schaller" To: Paul Cercueil , Rob Herring , Mark Rutland , Thomas Bogendoerfer , "H. Nikolaus Schaller" , Geert Uytterhoeven , Kees Cook , "Eric W. Biederman" , Miquel Raynal , David Airlie , Daniel Vetter , Neil Armstrong , Robert Foss , Laurent Pinchart , Jernej Skrabec , Ezequiel Garcia , Harry Wentland , Sam Ravnborg , Maxime Ripard , Hans Verkuil , Liam Girdwood , Mark Brown , Paul Boddie Cc: devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, Jonas Karlman , dri-devel@lists.freedesktop.org Subject: [PATCH v9 6/8] MIPS: DTS: CI20: Add DT nodes for HDMI setup Date: Wed, 24 Nov 2021 22:29:12 +0100 Message-Id: X-Mailer: git-send-email 2.33.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Paul Boddie We need to hook up * HDMI connector * HDMI power regulator * JZ4780_CLK_HDMI @ 27 MHz * DDC pinmux * HDMI and LCDC endpoint connections Signed-off-by: Paul Boddie Signed-off-by: H. Nikolaus Schaller --- arch/mips/boot/dts/ingenic/ci20.dts | 72 ++++++++++++++++++++++++++++- 1 file changed, 70 insertions(+), 2 deletions(-) diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index b249a4f0f6b62..3e336b3dbb109 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -78,6 +78,18 @@ eth0_power: fixedregulator@0 { enable-active-high; }; + hdmi_out: connector { + compatible = "hdmi-connector"; + label = "HDMI OUT"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&dw_hdmi_out>; + }; + }; + }; + ir: ir { compatible = "gpio-ir-receiver"; gpios = <&gpe 3 GPIO_ACTIVE_LOW>; @@ -102,6 +114,17 @@ otg_power: fixedregulator@2 { gpio = <&gpf 14 GPIO_ACTIVE_LOW>; enable-active-high; }; + + hdmi_power: fixedregulator@3 { + compatible = "regulator-fixed"; + + regulator-name = "hdmi_power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpa 25 0>; + enable-active-high; + }; }; &ext { @@ -114,11 +137,12 @@ &cgu { * precision. */ assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>, - <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>; + <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>, + <&cgu JZ4780_CLK_HDMI>; assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>, <&cgu JZ4780_CLK_MPLL>, <&cgu JZ4780_CLK_SSIPLL>; - assigned-clock-rates = <48000000>, <0>, <54000000>; + assigned-clock-rates = <48000000>, <0>, <54000000>, <0>, <27000000>; }; &tcu { @@ -509,6 +533,12 @@ pins_i2c4: i2c4 { bias-disable; }; + pins_hdmi_ddc: hdmi_ddc { + function = "hdmi-ddc"; + groups = "hdmi-ddc"; + bias-disable; + }; + pins_nemc: nemc { function = "nemc"; groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe"; @@ -539,3 +569,41 @@ pins_mmc1: mmc1 { bias-disable; }; }; + +&hdmi { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_hdmi_ddc>; + + hdmi-5v-supply = <&hdmi_power>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dw_hdmi_in: endpoint { + remote-endpoint = <&lcd_out>; + }; + }; + + port@1 { + reg = <1>; + dw_hdmi_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; +}; + +&lcdc0 { + status = "okay"; + + port { + lcd_out: endpoint { + remote-endpoint = <&dw_hdmi_in>; + }; + }; +}; From patchwork Wed Nov 24 21:29:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 12637863 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96901C433EF for ; Wed, 24 Nov 2021 21:29:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343978AbhKXVcw (ORCPT ); Wed, 24 Nov 2021 16:32:52 -0500 Received: from mo4-p04-ob.smtp.rzone.de ([85.215.255.120]:9001 "EHLO mo4-p04-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344088AbhKXVcp (ORCPT ); Wed, 24 Nov 2021 16:32:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1637789361; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Cc:Date: From:Subject:Sender; bh=mgm9FcGOkzWufyh28STSVM1vIR8mFSf+dMssEkkvORM=; b=JSjxL52ofxgmBkjCHyaks5JrPO3dC54eXSMDfTEO5kC/ryIRb04BbjJHN4bGZ9+WUu vlnMueZVvZihZr4BFlMte8Xu/9975TRRil/xKfNUchen9TrUprJlKDeXO/nlEQQ+xeMv p2V9/BJ6FtJFr5mmVX9Y3FBRaw9HAXmU06ttsqkS3sKzgcotu/VT3dzCBSlzj8YYmqcA vDXqC5QaZQBLV7I2CwrSvTZAR4i0Cq7mZyUTzQXbZVBsoDcKpXJejQDqdkmRPZ4h7ixV oM9q2urzm74Ca++y54MYIVD79PtzqRTEvFQkvh6Y7zq6FgZkS4rfqUshVK3GJDBsLelB akDQ== Authentication-Results: strato.com; dkim=none X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o1KHeBQyh+ITDDRsZQ==" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 47.34.10 DYNA|AUTH) with ESMTPSA id e05ed8xAOLTK5Ax (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Wed, 24 Nov 2021 22:29:20 +0100 (CET) From: "H. Nikolaus Schaller" To: Paul Cercueil , Rob Herring , Mark Rutland , Thomas Bogendoerfer , "H. Nikolaus Schaller" , Geert Uytterhoeven , Kees Cook , "Eric W. Biederman" , Miquel Raynal , David Airlie , Daniel Vetter , Neil Armstrong , Robert Foss , Laurent Pinchart , Jernej Skrabec , Ezequiel Garcia , Harry Wentland , Sam Ravnborg , Maxime Ripard , Hans Verkuil , Liam Girdwood , Mark Brown , Paul Boddie Cc: devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, Jonas Karlman , dri-devel@lists.freedesktop.org Subject: [PATCH v9 7/8] MIPS: defconfig: CI20: configure for DRM_DW_HDMI_JZ4780 Date: Wed, 24 Nov 2021 22:29:13 +0100 Message-Id: <4569d54265134bf5e53cc5db6da6b2944b73861f.1637789354.git.hns@goldelico.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Enable CONFIG options as modules. Signed-off-by: Ezequiel Garcia Signed-off-by: H. Nikolaus Schaller --- arch/mips/configs/ci20_defconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig index ab7ebb0668340..cc69b215854ea 100644 --- a/arch/mips/configs/ci20_defconfig +++ b/arch/mips/configs/ci20_defconfig @@ -98,7 +98,13 @@ CONFIG_RC_DEVICES=y CONFIG_IR_GPIO_CIR=m CONFIG_IR_GPIO_TX=m CONFIG_MEDIA_SUPPORT=m +CONFIG_DRM=m +CONFIG_DRM_INGENIC=m +CONFIG_DRM_INGENIC_DW_HDMI=m +CONFIG_DRM_DISPLAY_CONNECTOR=m # CONFIG_VGA_CONSOLE is not set +CONFIG_FB=y +CONFIG_FRAMEBUFFER_CONSOLE=y # CONFIG_HID is not set CONFIG_USB=y CONFIG_USB_STORAGE=y From patchwork Wed Nov 24 21:29:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 12637867 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 934CAC433F5 for ; Wed, 24 Nov 2021 21:30:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229569AbhKXVdO (ORCPT ); Wed, 24 Nov 2021 16:33:14 -0500 Received: from mo4-p04-ob.smtp.rzone.de ([85.215.255.121]:23245 "EHLO mo4-p04-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344064AbhKXVcp (ORCPT ); Wed, 24 Nov 2021 16:32:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1637789361; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Cc:Date: From:Subject:Sender; bh=15Nkk1H/19ZCPCTvtDzkEK7DIJe2pfI1c9+1syWWzcY=; b=qx+OsfjGXm9wq0EEFYO7n3+DTsM2kaSa1lhlvONQmCL0REFCCF6KWClVl1IISy0rcp EJM9P00izC7yjTjuG1Jrtj94pNCeojPV7Oi9P0nOWbOnu4yx9Lt5xQKW1GO+Bwax9Jmx WYOCaC8GL2SR2vUH2jvdgZScXBxzN6wanrB3YqlNK3Vs4gYipurZODi5ehsPCpmnlERb f4dfEwqW1dugw4DiuH/NRmek5Lk0URdwMn5DM8L/EXPrwnovzwMErv9bSwbtyz6w+GoU 7uLtmX/Kk8YUskjynM3Q9egA/HQN4IA0lzBytEhep0D2DyNcAR04bp6l3IyeDvOwFZnj /U5g== Authentication-Results: strato.com; dkim=none X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o1KHeBQyh+ITDDRsZQ==" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 47.34.10 DYNA|AUTH) with ESMTPSA id e05ed8xAOLTL5Ay (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Wed, 24 Nov 2021 22:29:21 +0100 (CET) From: "H. Nikolaus Schaller" To: Paul Cercueil , Rob Herring , Mark Rutland , Thomas Bogendoerfer , "H. Nikolaus Schaller" , Geert Uytterhoeven , Kees Cook , "Eric W. Biederman" , Miquel Raynal , David Airlie , Daniel Vetter , Neil Armstrong , Robert Foss , Laurent Pinchart , Jernej Skrabec , Ezequiel Garcia , Harry Wentland , Sam Ravnborg , Maxime Ripard , Hans Verkuil , Liam Girdwood , Mark Brown , Paul Boddie Cc: devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, Jonas Karlman , dri-devel@lists.freedesktop.org Subject: [PATCH v9 8/8] [RFC] MIPS: DTS: Ingenic: adjust register size to available registers Date: Wed, 24 Nov 2021 22:29:14 +0100 Message-Id: <3bad52da49844bbfbede41c5f7d984ba9502a358.1637789354.git.hns@goldelico.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org After getting the regmap size from the device tree we should reduce the ranges to the really available registers. This allows to read only existing registers from the debug fs and makes the regmap check out-of-bounds access. For the jz4780 we have done this already. Suggested-for: Paul Cercueil Signed-off-by: H. Nikolaus Schaller --- arch/mips/boot/dts/ingenic/jz4725b.dtsi | 2 +- arch/mips/boot/dts/ingenic/jz4740.dtsi | 2 +- arch/mips/boot/dts/ingenic/jz4770.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/boot/dts/ingenic/jz4725b.dtsi b/arch/mips/boot/dts/ingenic/jz4725b.dtsi index 0c6a5a4266f43..e9e48022f6316 100644 --- a/arch/mips/boot/dts/ingenic/jz4725b.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4725b.dtsi @@ -321,7 +321,7 @@ udc: usb@13040000 { lcd: lcd-controller@13050000 { compatible = "ingenic,jz4725b-lcd"; - reg = <0x13050000 0x1000>; + reg = <0x13050000 0x130>; /* tbc */ interrupt-parent = <&intc>; interrupts = <31>; diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi index 772542e1f266a..7f76cba03a089 100644 --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi @@ -323,7 +323,7 @@ udc: usb@13040000 { lcd: lcd-controller@13050000 { compatible = "ingenic,jz4740-lcd"; - reg = <0x13050000 0x1000>; + reg = <0x13050000 0x60>; /* LCDCMD1+4 */ interrupt-parent = <&intc>; interrupts = <30>; diff --git a/arch/mips/boot/dts/ingenic/jz4770.dtsi b/arch/mips/boot/dts/ingenic/jz4770.dtsi index dfe74328ae5dc..bda0a3a86ed5f 100644 --- a/arch/mips/boot/dts/ingenic/jz4770.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4770.dtsi @@ -399,7 +399,7 @@ gpu: gpu@13040000 { lcd: lcd-controller@13050000 { compatible = "ingenic,jz4770-lcd"; - reg = <0x13050000 0x300>; + reg = <0x13050000 0x130>; /* tbc */ interrupt-parent = <&intc>; interrupts = <31>;