From patchwork Fri Nov 26 16:34:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12641153 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 790B3C433EF for ; Fri, 26 Nov 2021 16:37:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378477AbhKZQkZ (ORCPT ); Fri, 26 Nov 2021 11:40:25 -0500 Received: from relay4-d.mail.gandi.net ([217.70.183.196]:44261 "EHLO relay4-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378498AbhKZQiW (ORCPT ); Fri, 26 Nov 2021 11:38:22 -0500 Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id D5351E0017; Fri, 26 Nov 2021 16:34:58 +0000 (UTC) From: Miquel Raynal To: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Mark Brown , , Rob Herring , Cc: Thomas Petazzoni , Michal Simek , Miquel Raynal Subject: [PATCH v2 1/5] spi: dt-bindings: Allow describing flashes with two CS Date: Fri, 26 Nov 2021 17:34:46 +0100 Message-Id: <20211126163450.394861-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211126163450.394861-1-miquel.raynal@bootlin.com> References: <20211126163450.394861-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org The Xilinx QSPI controller has two advanced modes which allow the controller to behave differently and consider two flashes as one single storage. One of these two modes is quite complex to support from a binding point of view and is the dual parallel memories. In this mode, each byte of data is stored in both devices: the even bits in one, the odd bits in the other. The split is automatically handled by the QSPI controller and is transparent for the user. The other mode is simpler to support, it is called dual stacked memories. The controller shares the same SPI bus but each of the devices contain half of the data. Once in this mode, the controller does not follow CS requests but instead internally wires the two CSlevels with the value of the most significant address bit. Supporting these two modes will involve core changes which include the possibility of providing two CS for a single SPI device, and thus changing the node name regular expression. Signed-off-by: Miquel Raynal --- Documentation/devicetree/bindings/spi/spi-controller.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index 8246891602e7..556c5ddc39d2 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -91,7 +91,7 @@ properties: - compatible patternProperties: - "^.*@[0-9a-f]+$": + "^.*@[0-9a-f]+,?[0-9a-f]*$": type: object properties: From patchwork Fri Nov 26 16:34:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12641155 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCA19C433F5 for ; Fri, 26 Nov 2021 16:37:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378480AbhKZQk0 (ORCPT ); Fri, 26 Nov 2021 11:40:26 -0500 Received: from relay4-d.mail.gandi.net ([217.70.183.196]:57277 "EHLO relay4-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378513AbhKZQiX (ORCPT ); Fri, 26 Nov 2021 11:38:23 -0500 Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id 17669E000E; Fri, 26 Nov 2021 16:35:09 +0000 (UTC) From: Miquel Raynal To: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Mark Brown , , Rob Herring , Cc: Thomas Petazzoni , Michal Simek , Miquel Raynal Subject: [PATCH v2 2/5] dt-bindings: mtd: spi-nor: Allow external properties Date: Fri, 26 Nov 2021 17:34:47 +0100 Message-Id: <20211126163450.394861-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211126163450.394861-1-miquel.raynal@bootlin.com> References: <20211126163450.394861-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Setting "additionalProperties: false" will refuse any generic SPI property while they should be of course authorized. In practice it looks like many people used compatibles different than "jedec,spi-nor" in order to workaround this limitation because otherwise no SPI property could be used in the examples. Use "unevaluatedProperties: false" instead to allow defined properties to be used. It is likely that at the time of the conversion to yaml of the jedec file, the unevaluated keyword was not yet introduced. Fixes: 3ff9ee2a8890 ("dt-bindings: mtd: spi-nor: Convert to DT schema format") Signed-off-by: Miquel Raynal --- Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml index ed590d7c6e37..81be0620b264 100644 --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml @@ -88,7 +88,7 @@ patternProperties: "^otp(-[0-9]+)?$": type: object -additionalProperties: false +unevaluatedProperties: false examples: - | From patchwork Fri Nov 26 16:34:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12641157 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A57D3C433F5 for ; Fri, 26 Nov 2021 16:37:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230241AbhKZQkd (ORCPT ); Fri, 26 Nov 2021 11:40:33 -0500 Received: from relay4-d.mail.gandi.net ([217.70.183.196]:50167 "EHLO relay4-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233915AbhKZQid (ORCPT ); Fri, 26 Nov 2021 11:38:33 -0500 Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id 3AA5FE000F; Fri, 26 Nov 2021 16:35:10 +0000 (UTC) From: Miquel Raynal To: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Mark Brown , , Rob Herring , Cc: Thomas Petazzoni , Michal Simek , Miquel Raynal Subject: [PATCH v2 3/5] dt-bindings: mtd: spi-nor: Allow two CS per device Date: Fri, 26 Nov 2021 17:34:48 +0100 Message-Id: <20211126163450.394861-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211126163450.394861-1-miquel.raynal@bootlin.com> References: <20211126163450.394861-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This will be needed in order to be able to describe Xilinx QSPI controller stacked and parallel modes. Signed-off-by: Miquel Raynal Acked-by: Rob Herring --- Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml index 81be0620b264..b61e448d1394 100644 --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml @@ -46,7 +46,8 @@ properties: identified by the JEDEC READ ID opcode (0x9F). reg: - maxItems: 1 + minItems: 1 + maxItems: 2 spi-max-frequency: true spi-rx-bus-width: true From patchwork Fri Nov 26 16:34:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12641159 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 427CFC433F5 for ; Fri, 26 Nov 2021 16:37:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378798AbhKZQkh (ORCPT ); Fri, 26 Nov 2021 11:40:37 -0500 Received: from relay4-d.mail.gandi.net ([217.70.183.196]:40219 "EHLO relay4-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233916AbhKZQih (ORCPT ); Fri, 26 Nov 2021 11:38:37 -0500 Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id 38CBBE0010; Fri, 26 Nov 2021 16:35:19 +0000 (UTC) From: Miquel Raynal To: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Mark Brown , , Rob Herring , Cc: Thomas Petazzoni , Michal Simek , Miquel Raynal Subject: [PATCH v2 4/5] spi: dt-bindings: Describe stacked/parallel memories modes Date: Fri, 26 Nov 2021 17:34:49 +0100 Message-Id: <20211126163450.394861-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211126163450.394861-1-miquel.raynal@bootlin.com> References: <20211126163450.394861-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Describe two new memories modes: - A stacked mode when the bus is common but the address space extended with an additinals wires. - A parallel mode with parallel busses accessing parallel flashes where the data is spread. Signed-off-by: Miquel Raynal --- .../bindings/spi/spi-controller.yaml | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index 556c5ddc39d2..1ceba6c7430d 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -162,6 +162,27 @@ patternProperties: description: Delay, in microseconds, after a write transfer. + stacked-memories: + type: boolean + description: Several SPI memories can be wired in stacked mode. + This basically means that either a device features several chip + selects, or that different devices must be seen as a single + bigger chip. This basically doubles (or more) the total address + space with only a single additional wire, while still needing + to repeat the commands when crossing a chip boundary. XIP is + usually not supported in this mode. + + parallel-memories: + type: boolean + description: Several SPI memories can be wired in parallel mode. + The devices are physically on a different buses but will always + act synchronously as each data word is spread across the + different memories (eg. even bits are stored in one memory, odd + bits in the other). This basically doubles the address space and + the throughput while greatly complexifying the wiring because as + many busses as devices must be wired. XIP is usually not + supported in this mode. + required: - compatible - reg From patchwork Fri Nov 26 16:34:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 12641161 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9B623C433FE for ; Fri, 26 Nov 2021 16:37:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378800AbhKZQki (ORCPT ); Fri, 26 Nov 2021 11:40:38 -0500 Received: from relay4-d.mail.gandi.net ([217.70.183.196]:58751 "EHLO relay4-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234023AbhKZQii (ORCPT ); Fri, 26 Nov 2021 11:38:38 -0500 Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id A5886E001D; Fri, 26 Nov 2021 16:35:23 +0000 (UTC) From: Miquel Raynal To: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Mark Brown , , Rob Herring , Cc: Thomas Petazzoni , Michal Simek , Miquel Raynal Subject: [PATCH v2 5/5] spi: dt-bindings: Add an example with two stacked flashes Date: Fri, 26 Nov 2021 17:34:50 +0100 Message-Id: <20211126163450.394861-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211126163450.394861-1-miquel.raynal@bootlin.com> References: <20211126163450.394861-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Provide an example of how to describe two flashes in eg. stacked mode. Signed-off-by: Miquel Raynal --- Documentation/devicetree/bindings/spi/spi-controller.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml index 1ceba6c7430d..7a3fb237830a 100644 --- a/Documentation/devicetree/bindings/spi/spi-controller.yaml +++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml @@ -225,4 +225,11 @@ examples: spi-max-frequency = <100000>; reg = <1>; }; + + flash@2,3 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <2>, <3>; + stacked-memories; + }; };