From patchwork Tue Dec 7 07:11:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 12661149 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CFE77C433F5 for ; Tue, 7 Dec 2021 07:11:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 484F68B848; Tue, 7 Dec 2021 07:11:42 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 48EF98B848 for ; Tue, 7 Dec 2021 07:11:40 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10190"; a="261579644" X-IronPort-AV: E=Sophos;i="5.87,293,1631602800"; d="scan'208";a="261579644" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Dec 2021 23:11:39 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,293,1631602800"; d="scan'208";a="679331747" Received: from cfl-desktop.iind.intel.com ([10.190.239.20]) by orsmga005.jf.intel.com with ESMTP; 06 Dec 2021 23:11:37 -0800 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Tue, 7 Dec 2021 12:41:33 +0530 Message-Id: <20211207071135.3660332-2-uma.shankar@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211207071135.3660332-1-uma.shankar@intel.com> References: <20211207071135.3660332-1-uma.shankar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v3 1/3] drm/i915/xelpd: Enable Pipe color support for D13 platform X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Enable pipe color support for Display 13 platforms. Currently limit to just 10bit gamma and later extend it for logarithmic gamma, once the new UAPI is agreed by community and implemented by a userspace consumer. v2: Updated dev_priv to i915 (Ville) Signed-off-by: Uma Shankar Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_color.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 840f13b75492..42fe549ef6fe 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -1574,6 +1574,8 @@ static int glk_color_check(struct intel_crtc_state *crtc_state) static u32 icl_gamma_mode(const struct intel_crtc_state *crtc_state) { + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct drm_i915_private *i915 = to_i915(crtc->base.dev); u32 gamma_mode = 0; if (crtc_state->hw.degamma_lut) @@ -1586,6 +1588,13 @@ static u32 icl_gamma_mode(const struct intel_crtc_state *crtc_state) if (!crtc_state->hw.gamma_lut || crtc_state_is_legacy_gamma(crtc_state)) gamma_mode |= GAMMA_MODE_MODE_8BIT; + /* + * Enable 10bit gamma for D13 + * ToDo: Extend to Logarithmic Gamma once the new UAPI + * is acccepted and implemented by a userspace consumer + */ + else if (DISPLAY_VER(i915) >= 13) + gamma_mode |= GAMMA_MODE_MODE_10BIT; else gamma_mode |= GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED; From patchwork Tue Dec 7 07:11:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 12661151 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1C465C433F5 for ; Tue, 7 Dec 2021 07:11:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 87B2B8B83F; Tue, 7 Dec 2021 07:11:48 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 81DA68B83F for ; Tue, 7 Dec 2021 07:11:47 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10190"; a="261579652" X-IronPort-AV: E=Sophos;i="5.87,293,1631602800"; d="scan'208";a="261579652" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Dec 2021 23:11:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,293,1631602800"; d="scan'208";a="679331757" Received: from cfl-desktop.iind.intel.com ([10.190.239.20]) by orsmga005.jf.intel.com with ESMTP; 06 Dec 2021 23:11:40 -0800 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Tue, 7 Dec 2021 12:41:34 +0530 Message-Id: <20211207071135.3660332-3-uma.shankar@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211207071135.3660332-1-uma.shankar@intel.com> References: <20211207071135.3660332-1-uma.shankar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v3 2/3] drm/i915/xelpd: Enable Pipe Degamma X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Enable Pipe Degamma for XE_LPD. Extend the legacy implementation to incorparate the extended lut size for XE_LPD. v2: Added a helper for degamma lut size (Ville) Signed-off-by: Uma Shankar Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_color.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 42fe549ef6fe..de3ded1e327a 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -808,6 +808,14 @@ static void bdw_load_luts(const struct intel_crtc_state *crtc_state) } } +static int glk_degamma_lut_size(struct drm_i915_private *i915) +{ + if (DISPLAY_VER(i915) >= 13) + return 131; + else + return 35; +} + static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); @@ -827,8 +835,8 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state) for (i = 0; i < lut_size; i++) { /* - * First 33 entries represent range from 0 to 1.0 - * 34th and 35th entry will represent extended range + * First lut_size entries represent range from 0 to 1.0 + * 3 additional lut entries will represent extended range * inputs 3.0 and 7.0 respectively, currently clamped * at 1.0. Since the precision is 16bit, the user * value can be directly filled to register. @@ -844,7 +852,7 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state) } /* Clamp values > 1.0. */ - while (i++ < 35) + while (i++ < glk_degamma_lut_size(dev_priv)) intel_de_write_fw(dev_priv, PRE_CSC_GAMC_DATA(pipe), 1 << 16); intel_de_write_fw(dev_priv, PRE_CSC_GAMC_INDEX(pipe), 0); From patchwork Tue Dec 7 07:11:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 12661153 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 80DE1C433EF for ; Tue, 7 Dec 2021 07:11:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A6F9D8B84C; Tue, 7 Dec 2021 07:11:48 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id A0C3E8B84C for ; Tue, 7 Dec 2021 07:11:47 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10190"; a="261579660" X-IronPort-AV: E=Sophos;i="5.87,293,1631602800"; d="scan'208";a="261579660" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Dec 2021 23:11:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,293,1631602800"; d="scan'208";a="679331767" Received: from cfl-desktop.iind.intel.com ([10.190.239.20]) by orsmga005.jf.intel.com with ESMTP; 06 Dec 2021 23:11:42 -0800 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Tue, 7 Dec 2021 12:41:35 +0530 Message-Id: <20211207071135.3660332-4-uma.shankar@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211207071135.3660332-1-uma.shankar@intel.com> References: <20211207071135.3660332-1-uma.shankar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v3 3/3] drm/i915/xelpd: Add Pipe Color Lut caps to platform config X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" XE_LPD has 128 Lut entries for Degamma, with additional 3 entries for extended range. It has 511 entries for gamma with additional 2 entries for extended range. v2: Updated lut size for 10bit gamma, added lut_tests (Ville) v3: Dropped the gamma lut tests fields (Ville) Signed-off-by: Uma Shankar Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_pci.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 0ba516838b02..6aaa7c644c9b 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -938,7 +938,10 @@ static const struct intel_device_info adl_s_info = { #define XE_LPD_FEATURES \ .abox_mask = GENMASK(1, 0), \ - .color = { .degamma_lut_size = 0, .gamma_lut_size = 0 }, \ + .color = { .degamma_lut_size = 128, .gamma_lut_size = 1024, \ + .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING | \ + DRM_COLOR_LUT_EQUAL_CHANNELS, \ + }, \ .dbuf.size = 4096, \ .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \ BIT(DBUF_S4), \