From patchwork Thu Dec 9 13:46:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12666599 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 51F74C433F5 for ; Thu, 9 Dec 2021 13:52:09 +0000 (UTC) Received: from localhost ([::1]:38446 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mvJqC-0006NS-7Q for qemu-devel@archiver.kernel.org; Thu, 09 Dec 2021 08:52:08 -0500 Received: from eggs.gnu.org ([209.51.188.92]:39632) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mvJkJ-00068Y-8L; Thu, 09 Dec 2021 08:46:03 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:32264) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mvJkF-0002xx-2J; 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Thu, 9 Dec 2021 13:45:47 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7A68611C050; Thu, 9 Dec 2021 13:45:46 +0000 (GMT) Received: from li-c6ac47cc-293c-11b2-a85c-d421c8e4747b.ibm.com.com (unknown [9.171.63.16]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 9 Dec 2021 13:45:46 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v5 01/12] s390x: cpu topology: update linux headers Date: Thu, 9 Dec 2021 14:46:32 +0100 Message-Id: <20211209134643.143866-2-pmorel@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> References: <20211209134643.143866-1-pmorel@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: CqCOUsF5DaoRBVFU5ZgEfcuCDJu07ZsM X-Proofpoint-GUID: hNsTycwQy9_En45a04dsTsaWXdN4Yqjh X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 bulkscore=0 malwarescore=0 phishscore=0 mlxlogscore=999 suspectscore=0 priorityscore=1501 lowpriorityscore=0 mlxscore=0 adultscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112090075 Received-SPF: pass client-ip=148.163.156.1; envelope-from=pmorel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, ehabkost@redhat.com, kvm@vger.kernel.org, david@redhat.com, eblake@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, armbru@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, mst@redhat.com, pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This patch is only here to facilitate the review and the testing. It should be updated from the Linux sources when available. The current Linux patch can be found at: https://lkml.org/lkml/2021/11/22/361 Signed-off-by: Pierre Morel --- linux-headers/linux/kvm.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index bcaf66cc4d..940289c52d 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -1112,6 +1112,8 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_BINARY_STATS_FD 203 #define KVM_CAP_EXIT_ON_EMULATION_FAILURE 204 #define KVM_CAP_ARM_MTE 205 +#define KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM 206 +#define KVM_CAP_S390_CPU_TOPOLOGY 207 #ifdef KVM_CAP_IRQ_ROUTING From patchwork Thu Dec 9 13:46:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12666591 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7A85CC433F5 for ; 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Thu, 09 Dec 2021 13:45:53 +0000 Received: from pps.filterd (ppma03ams.nl.ibm.com [127.0.0.1]) by ppma03ams.nl.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 1B9Dbxe2009243; Thu, 9 Dec 2021 13:45:51 GMT Received: from b06avi18626390.portsmouth.uk.ibm.com (b06avi18626390.portsmouth.uk.ibm.com [9.149.26.192]) by ppma03ams.nl.ibm.com with ESMTP id 3cqyyahxx6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 09 Dec 2021 13:45:51 +0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 1B9Dc2EM29884676 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 9 Dec 2021 13:38:02 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 35A5B11C04A; Thu, 9 Dec 2021 13:45:48 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5F9B811C050; Thu, 9 Dec 2021 13:45:47 +0000 (GMT) Received: from li-c6ac47cc-293c-11b2-a85c-d421c8e4747b.ibm.com.com (unknown [9.171.63.16]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 9 Dec 2021 13:45:47 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v5 02/12] s390x: SCLP: reporting the maximum nested topology entries Date: Thu, 9 Dec 2021 14:46:33 +0100 Message-Id: <20211209134643.143866-3-pmorel@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> References: <20211209134643.143866-1-pmorel@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: aWv139w0_ONYinVpE0bcZf4UC_hZHFsM X-Proofpoint-GUID: ul8qqHcWZFjsMt-SJkcudTdCKRR0vQk9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 mlxscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112090075 Received-SPF: pass client-ip=148.163.158.5; envelope-from=pmorel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, ehabkost@redhat.com, kvm@vger.kernel.org, david@redhat.com, eblake@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, armbru@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, mst@redhat.com, pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The maximum nested topology entries is used by the guest to know how many nested topology are available on the machine. Currently, reporting SCLP reports 0, which is the equivalent of reporting the default value of 2. Let's use the default SCLP value of 2 and increase this value in the future patches implementing higher levels. Signed-off-by: Pierre Morel --- hw/s390x/sclp.c | 1 + include/hw/s390x/sclp.h | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c index 89c30a8a91..7797a45cef 100644 --- a/hw/s390x/sclp.c +++ b/hw/s390x/sclp.c @@ -125,6 +125,7 @@ static void read_SCP_info(SCLPDevice *sclp, SCCB *sccb) /* CPU information */ prepare_cpu_entries(machine, entries_start, &cpu_count); + read_info->stsi_parm = SCLP_READ_SCP_INFO_MNEST; read_info->entries_cpu = cpu_to_be16(cpu_count); read_info->offset_cpu = cpu_to_be16(offset_cpu); read_info->highest_cpu = cpu_to_be16(machine->smp.max_cpus - 1); diff --git a/include/hw/s390x/sclp.h b/include/hw/s390x/sclp.h index d3ade40a5a..c86c2c6619 100644 --- a/include/hw/s390x/sclp.h +++ b/include/hw/s390x/sclp.h @@ -116,7 +116,9 @@ typedef struct ReadInfo { SCCBHeader h; uint16_t rnmax; uint8_t rnsize; - uint8_t _reserved1[16 - 11]; /* 11-15 */ + uint8_t _reserved1[15 - 11]; /* 11-15 */ +#define SCLP_READ_SCP_INFO_MNEST 2 + uint8_t stsi_parm; uint16_t entries_cpu; /* 16-17 */ uint16_t offset_cpu; /* 18-19 */ uint8_t _reserved2[24 - 20]; /* 20-23 */ From patchwork Thu Dec 9 13:46:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12666597 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93706C433EF for ; Thu, 9 Dec 2021 13:49:50 +0000 (UTC) Received: from localhost ([::1]:59478 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mvJnx-0001SG-L9 for qemu-devel@archiver.kernel.org; Thu, 09 Dec 2021 08:49:49 -0500 Received: from eggs.gnu.org ([209.51.188.92]:39612) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mvJkI-00067a-PT; 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Thu, 9 Dec 2021 13:45:49 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 28AD311C064; Thu, 9 Dec 2021 13:45:49 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4A18811C050; Thu, 9 Dec 2021 13:45:48 +0000 (GMT) Received: from li-c6ac47cc-293c-11b2-a85c-d421c8e4747b.ibm.com.com (unknown [9.171.63.16]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 9 Dec 2021 13:45:48 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v5 03/12] s390x: topology: CPU topology objects and structures Date: Thu, 9 Dec 2021 14:46:34 +0100 Message-Id: <20211209134643.143866-4-pmorel@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> References: <20211209134643.143866-1-pmorel@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 3BqRjerEKmhDoBxzyhOAnC7BZxAoaIkD X-Proofpoint-GUID: 4az5SSBAef8LruwyUrZIugH3yee8D2Fn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 impostorscore=0 bulkscore=0 adultscore=0 mlxlogscore=999 lowpriorityscore=0 spamscore=0 phishscore=0 mlxscore=0 clxscore=1015 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112090075 Received-SPF: pass client-ip=148.163.158.5; envelope-from=pmorel@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, ehabkost@redhat.com, kvm@vger.kernel.org, david@redhat.com, eblake@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, armbru@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, mst@redhat.com, pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We use new objects to have a dynamic administration of the CPU topology. The highest level object in this implementation is the s390 book and in this first implementation of CPU topology for S390 we have a single book. The book is built as a SYSBUS bridge during the CPU initialization. Other objects, sockets and core will be built after the parsing of the QEMU -smp argument. Every object under this single book will be build dynamically immediately after a CPU has be realized if it is needed. The CPU will fill the sockets once after the other, according to the number of core per socket defined during the smp parsing. Each CPU inside a socket will be represented by a bit in a 64bit unsigned long. Set on plug and clear on unplug of a CPU. For the S390 CPU topology, thread and cores are merged into topology cores and the number of topology cores is the multiplication of cores by the numbers of threads. Signed-off-by: Pierre Morel --- hw/s390x/cpu-topology.c | 361 ++++++++++++++++++++++++++++++++ hw/s390x/meson.build | 1 + hw/s390x/s390-virtio-ccw.c | 4 + include/hw/s390x/cpu-topology.h | 74 +++++++ target/s390x/cpu.h | 47 +++++ 5 files changed, 487 insertions(+) create mode 100644 hw/s390x/cpu-topology.c create mode 100644 include/hw/s390x/cpu-topology.h diff --git a/hw/s390x/cpu-topology.c b/hw/s390x/cpu-topology.c new file mode 100644 index 0000000000..b7131b4ac3 --- /dev/null +++ b/hw/s390x/cpu-topology.c @@ -0,0 +1,361 @@ +/* + * CPU Topology + * + * Copyright 2021 IBM Corp. + * Author(s): Pierre Morel + + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu/error-report.h" +#include "hw/sysbus.h" +#include "hw/s390x/cpu-topology.h" +#include "hw/qdev-properties.h" +#include "hw/boards.h" +#include "qemu/typedefs.h" +#include "target/s390x/cpu.h" +#include "hw/s390x/s390-virtio-ccw.h" + +static S390TopologyCores *s390_create_cores(S390TopologySocket *socket, + int origin) +{ + DeviceState *dev; + S390TopologyCores *cores; + const MachineState *ms = MACHINE(qdev_get_machine()); + + if (socket->bus->num_children >= (ms->smp.cores * ms->smp.threads)) { + return NULL; + } + + dev = qdev_new(TYPE_S390_TOPOLOGY_CORES); + qdev_realize_and_unref(dev, socket->bus, &error_fatal); + + cores = S390_TOPOLOGY_CORES(dev); + cores->origin = origin; + socket->cnt += 1; + + return cores; +} + +static S390TopologySocket *s390_create_socket(S390TopologyBook *book, int id) +{ + DeviceState *dev; + S390TopologySocket *socket; + const MachineState *ms = MACHINE(qdev_get_machine()); + + if (book->bus->num_children >= ms->smp.sockets) { + return NULL; + } + + dev = qdev_new(TYPE_S390_TOPOLOGY_SOCKET); + qdev_realize_and_unref(dev, book->bus, &error_fatal); + + socket = S390_TOPOLOGY_SOCKET(dev); + socket->socket_id = id; + book->cnt++; + + return socket; +} + +/* + * s390_get_cores: + * @socket: the socket to search into + * @origin: the origin specified for the S390TopologyCores + * + * returns a pointer to a S390TopologyCores structure within a socket having + * the specified origin. + * First search if the socket is already containing the S390TopologyCores + * structure and if not create one with this origin. + */ +static S390TopologyCores *s390_get_cores(S390TopologySocket *socket, int origin) +{ + S390TopologyCores *cores; + BusChild *kid; + + QTAILQ_FOREACH(kid, &socket->bus->children, sibling) { + cores = S390_TOPOLOGY_CORES(kid->child); + if (cores->origin == origin) { + return cores; + } + } + return s390_create_cores(socket, origin); +} + +/* + * s390_get_socket: + * @book: The book to search into + * @socket_id: the identifier of the socket to search for + * + * returns a pointer to a S390TopologySocket structure within a book having + * the specified socket_id. + * First search if the book is already containing the S390TopologySocket + * structure and if not create one with this socket_id. + */ +static S390TopologySocket *s390_get_socket(S390TopologyBook *book, + int socket_id) +{ + S390TopologySocket *socket; + BusChild *kid; + + QTAILQ_FOREACH(kid, &book->bus->children, sibling) { + socket = S390_TOPOLOGY_SOCKET(kid->child); + if (socket->socket_id == socket_id) { + return socket; + } + } + return s390_create_socket(book, socket_id); +} + +/* + * s390_topology_new_cpu: + * @core_id: the core ID is machine wide + * + * We have a single book returned by s390_get_topology(), + * then we build the hierarchy on demand. + * Note that we do not destroy the hierarchy on error creating + * an entry in the topology, we just keep it empty. + * We do not need to worry about not finding a topology level + * entry this would have been caught during smp parsing. + */ +void s390_topology_new_cpu(int core_id) +{ + const MachineState *ms = MACHINE(qdev_get_machine()); + S390TopologyBook *book; + S390TopologySocket *socket; + S390TopologyCores *cores; + int cores_per_socket, sock_idx; + int origin, bit; + + book = s390_get_topology(); + + cores_per_socket = ms->smp.max_cpus / ms->smp.sockets; + + sock_idx = (core_id / cores_per_socket); + socket = s390_get_socket(book, sock_idx); + + /* + * At the core level, each CPU is represented by a bit in a 64bit + * unsigned long. Set on plug and clear on unplug of a CPU. + * The firmware assume that all CPU in the core description have the same + * type, polarization and are all dedicated or shared. + * In the case a socket contains CPU with different type, polarization + * or dedication then they will be defined in different CPU containers. + * Currently we assume all CPU are identical and the only reason to have + * several S390TopologyCores inside a socket is to have more than 64 CPUs + * in that case the origin field, representing the offset of the first CPU + * in the CPU container allows to represent up to the maximal number of + * CPU inside several CPU containers inside the socket container. + */ + origin = 64 * (core_id / 64); + + cores = s390_get_cores(socket, origin); + + bit = 63 - (core_id - origin); + set_bit(bit, &cores->mask); + cores->origin = origin; +} + +/* + * Setting the first topology: 1 book, 1 socket + * This is enough for 64 cores if the topology is flat (single socket) + */ +void s390_topology_setup(MachineState *ms) +{ + DeviceState *dev; + + /* Create BOOK bridge device */ + dev = qdev_new(TYPE_S390_TOPOLOGY_BOOK); + object_property_add_child(qdev_get_machine(), + TYPE_S390_TOPOLOGY_BOOK, OBJECT(dev)); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); +} + +S390TopologyBook *s390_get_topology(void) +{ + static S390TopologyBook *book; + + if (!book) { + book = S390_TOPOLOGY_BOOK( + object_resolve_path(TYPE_S390_TOPOLOGY_BOOK, NULL)); + assert(book != NULL); + } + + return book; +} + +/* --- CORES Definitions --- */ + +static Property s390_topology_cores_properties[] = { + DEFINE_PROP_BOOL("dedicated", S390TopologyCores, dedicated, false), + DEFINE_PROP_UINT8("polarity", S390TopologyCores, polarity, + S390_TOPOLOGY_POLARITY_H), + DEFINE_PROP_UINT8("cputype", S390TopologyCores, cputype, + S390_TOPOLOGY_CPU_TYPE), + DEFINE_PROP_UINT16("origin", S390TopologyCores, origin, 0), + DEFINE_PROP_UINT64("mask", S390TopologyCores, mask, 0), + DEFINE_PROP_UINT8("id", S390TopologyCores, id, 0), + DEFINE_PROP_END_OF_LIST(), +}; + +static void cpu_cores_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); + + device_class_set_props(dc, s390_topology_cores_properties); + hc->unplug = qdev_simple_device_unplug_cb; + dc->bus_type = TYPE_S390_TOPOLOGY_SOCKET_BUS; + dc->desc = "topology cpu entry"; +} + +static const TypeInfo cpu_cores_info = { + .name = TYPE_S390_TOPOLOGY_CORES, + .parent = TYPE_DEVICE, + .instance_size = sizeof(S390TopologyCores), + .class_init = cpu_cores_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_HOTPLUG_HANDLER }, + { } + } +}; + +/* --- SOCKETS Definitions --- */ +static Property s390_topology_socket_properties[] = { + DEFINE_PROP_UINT8("socket_id", S390TopologySocket, socket_id, 0), + DEFINE_PROP_END_OF_LIST(), +}; + +static char *socket_bus_get_dev_path(DeviceState *dev) +{ + S390TopologySocket *socket = S390_TOPOLOGY_SOCKET(dev); + DeviceState *book = dev->parent_bus->parent; + char *id = qdev_get_dev_path(book); + char *ret; + + if (id) { + ret = g_strdup_printf("%s:%02d", id, socket->socket_id); + g_free(id); + } else { + ret = g_strdup_printf("_:%02d", socket->socket_id); + } + + return ret; +} + +static void socket_bus_class_init(ObjectClass *oc, void *data) +{ + BusClass *k = BUS_CLASS(oc); + + k->get_dev_path = socket_bus_get_dev_path; + k->max_dev = S390_MAX_SOCKETS; +} + +static const TypeInfo socket_bus_info = { + .name = TYPE_S390_TOPOLOGY_SOCKET_BUS, + .parent = TYPE_BUS, + .instance_size = 0, + .class_init = socket_bus_class_init, +}; + +static void s390_socket_device_realize(DeviceState *dev, Error **errp) +{ + S390TopologySocket *socket = S390_TOPOLOGY_SOCKET(dev); + BusState *bus; + + bus = qbus_new(TYPE_S390_TOPOLOGY_SOCKET_BUS, dev, + TYPE_S390_TOPOLOGY_SOCKET_BUS); + qbus_set_hotplug_handler(bus, OBJECT(dev)); + socket->bus = bus; +} + +static void socket_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); + + hc->unplug = qdev_simple_device_unplug_cb; + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + dc->bus_type = TYPE_S390_TOPOLOGY_BOOK_BUS; + dc->realize = s390_socket_device_realize; + device_class_set_props(dc, s390_topology_socket_properties); + dc->desc = "topology socket"; +} + +static const TypeInfo socket_info = { + .name = TYPE_S390_TOPOLOGY_SOCKET, + .parent = TYPE_DEVICE, + .instance_size = sizeof(S390TopologySocket), + .class_init = socket_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_HOTPLUG_HANDLER }, + { } + } +}; + +static char *book_bus_get_dev_path(DeviceState *dev) +{ + return g_strdup_printf("00"); +} + +static void book_bus_class_init(ObjectClass *oc, void *data) +{ + BusClass *k = BUS_CLASS(oc); + + k->get_dev_path = book_bus_get_dev_path; + k->max_dev = S390_MAX_BOOKS; +} + +static const TypeInfo book_bus_info = { + .name = TYPE_S390_TOPOLOGY_BOOK_BUS, + .parent = TYPE_BUS, + .instance_size = 0, + .class_init = book_bus_class_init, +}; + +static void s390_book_device_realize(DeviceState *dev, Error **errp) +{ + S390TopologyBook *book = S390_TOPOLOGY_BOOK(dev); + BusState *bus; + + bus = qbus_new(TYPE_S390_TOPOLOGY_BOOK_BUS, dev, + TYPE_S390_TOPOLOGY_BOOK_BUS); + qbus_set_hotplug_handler(bus, OBJECT(dev)); + book->bus = bus; +} + +static void book_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); + + hc->unplug = qdev_simple_device_unplug_cb; + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + dc->realize = s390_book_device_realize; + dc->desc = "topology book"; +} + +static const TypeInfo book_info = { + .name = TYPE_S390_TOPOLOGY_BOOK, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(S390TopologyBook), + .class_init = book_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_HOTPLUG_HANDLER }, + { } + } +}; + +static void topology_register(void) +{ + type_register_static(&cpu_cores_info); + type_register_static(&socket_bus_info); + type_register_static(&socket_info); + type_register_static(&book_bus_info); + type_register_static(&book_info); +} + +type_init(topology_register); diff --git a/hw/s390x/meson.build b/hw/s390x/meson.build index 28484256ec..74678861cf 100644 --- a/hw/s390x/meson.build +++ b/hw/s390x/meson.build @@ -2,6 +2,7 @@ s390x_ss = ss.source_set() s390x_ss.add(files( 'ap-bridge.c', 'ap-device.c', + 'cpu-topology.c', 'ccw-device.c', 'css-bridge.c', 'css.c', diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index 653587ea62..8b624c2e0c 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -42,6 +42,7 @@ #include "sysemu/sysemu.h" #include "hw/s390x/pv.h" #include "migration/blocker.h" +#include "hw/s390x/cpu-topology.h" static Error *pv_mig_blocker; @@ -88,6 +89,7 @@ static void s390_init_cpus(MachineState *machine) /* initialize possible_cpus */ mc->possible_cpu_arch_ids(machine); + s390_topology_setup(machine); for (i = 0; i < machine->smp.cpus; i++) { s390x_new_cpu(machine->cpu_type, i, &error_fatal); } @@ -305,6 +307,8 @@ static void s390_cpu_plug(HotplugHandler *hotplug_dev, g_assert(!ms->possible_cpus->cpus[cpu->env.core_id].cpu); ms->possible_cpus->cpus[cpu->env.core_id].cpu = OBJECT(dev); + s390_topology_new_cpu(cpu->env.core_id); + if (dev->hotplugged) { raise_irq_cpu_hotplug(); } diff --git a/include/hw/s390x/cpu-topology.h b/include/hw/s390x/cpu-topology.h new file mode 100644 index 0000000000..e6e013a8b8 --- /dev/null +++ b/include/hw/s390x/cpu-topology.h @@ -0,0 +1,74 @@ +/* + * CPU Topology + * + * Copyright 2021 IBM Corp. + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ +#ifndef HW_S390X_CPU_TOPOLOGY_H +#define HW_S390X_CPU_TOPOLOGY_H + +#include "hw/qdev-core.h" +#include "qom/object.h" + +#define S390_TOPOLOGY_CPU_TYPE 0x03 + +#define S390_TOPOLOGY_POLARITY_H 0x00 +#define S390_TOPOLOGY_POLARITY_VL 0x01 +#define S390_TOPOLOGY_POLARITY_VM 0x02 +#define S390_TOPOLOGY_POLARITY_VH 0x03 + +#define TYPE_S390_TOPOLOGY_CORES "topology cores" + /* + * Each CPU inside a socket will be represented by a bit in a 64bit + * unsigned long. Set on plug and clear on unplug of a CPU. + * All CPU inside a mask share the same dedicated, polarity and + * cputype values. + * The origin is the offset of the first CPU in a mask. + */ +struct S390TopologyCores { + DeviceState parent_obj; + uint8_t id; + bool dedicated; + uint8_t polarity; + uint8_t cputype; + uint16_t origin; + uint64_t mask; + int cnt; +}; +typedef struct S390TopologyCores S390TopologyCores; +OBJECT_DECLARE_SIMPLE_TYPE(S390TopologyCores, S390_TOPOLOGY_CORES) + +#define TYPE_S390_TOPOLOGY_SOCKET "topology socket" +#define TYPE_S390_TOPOLOGY_SOCKET_BUS "socket-bus" +struct S390TopologySocket { + DeviceState parent_obj; + BusState *bus; + uint8_t socket_id; + int cnt; +}; +typedef struct S390TopologySocket S390TopologySocket; +OBJECT_DECLARE_SIMPLE_TYPE(S390TopologySocket, S390_TOPOLOGY_SOCKET) +#define S390_MAX_SOCKETS 4 + +#define TYPE_S390_TOPOLOGY_BOOK "topology book" +#define TYPE_S390_TOPOLOGY_BOOK_BUS "book-bus" +struct S390TopologyBook { + SysBusDevice parent_obj; + BusState *bus; + uint8_t book_id; + int cnt; +}; +typedef struct S390TopologyBook S390TopologyBook; +OBJECT_DECLARE_SIMPLE_TYPE(S390TopologyBook, S390_TOPOLOGY_BOOK) +#define S390_MAX_BOOKS 1 + +S390TopologyBook *s390_init_topology(void); + +S390TopologyBook *s390_get_topology(void); +void s390_topology_setup(MachineState *ms); +void s390_topology_new_cpu(int core_id); + +#endif diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index ca3845d023..071b3badf4 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -564,6 +564,53 @@ typedef union SysIB { } SysIB; QEMU_BUILD_BUG_ON(sizeof(SysIB) != 4096); +/* CPU type Topology List Entry */ +typedef struct SysIBTl_cpu { + uint8_t nl; + uint8_t reserved0[3]; + uint8_t reserved1:5; + uint8_t dedicated:1; + uint8_t polarity:2; + uint8_t type; + uint16_t origin; + uint64_t mask; +} SysIBTl_cpu; +QEMU_BUILD_BUG_ON(sizeof(SysIBTl_cpu) != 16); + +/* Container type Topology List Entry */ +typedef struct SysIBTl_container { + uint8_t nl; + uint8_t reserved[6]; + uint8_t id; +} QEMU_PACKED SysIBTl_container; +QEMU_BUILD_BUG_ON(sizeof(SysIBTl_container) != 8); + +/* Generic Topology List Entry */ +typedef union SysIBTl_entry { + uint8_t nl; + SysIBTl_container container; + SysIBTl_cpu cpu; +} SysIBTl_entry; + +#define TOPOLOGY_NR_MAG 6 +#define TOPOLOGY_NR_MAG6 0 +#define TOPOLOGY_NR_MAG5 1 +#define TOPOLOGY_NR_MAG4 2 +#define TOPOLOGY_NR_MAG3 3 +#define TOPOLOGY_NR_MAG2 4 +#define TOPOLOGY_NR_MAG1 5 +/* Configuration topology */ +typedef struct SysIB_151x { + uint8_t res0[2]; + uint16_t length; + uint8_t mag[TOPOLOGY_NR_MAG]; + uint8_t res1; + uint8_t mnest; + uint32_t res2; + SysIBTl_entry tle[0]; +} SysIB_151x; +QEMU_BUILD_BUG_ON(sizeof(SysIB_151x) != 16); + /* MMU defines */ #define ASCE_ORIGIN (~0xfffULL) /* segment table origin */ #define ASCE_SUBSPACE 0x200 /* subspace group control */ From patchwork Thu Dec 9 13:46:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12666601 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A2B7BC433EF for ; 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Thu, 9 Dec 2021 13:45:49 +0000 (GMT) Received: from li-c6ac47cc-293c-11b2-a85c-d421c8e4747b.ibm.com.com (unknown [9.171.63.16]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 9 Dec 2021 13:45:49 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v5 04/12] s390x: topology: implementating Store Topology System Information Date: Thu, 9 Dec 2021 14:46:35 +0100 Message-Id: <20211209134643.143866-5-pmorel@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> References: <20211209134643.143866-1-pmorel@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: vaHwwj21J_I07GrwWf4ZsQEkKDqCWlLo X-Proofpoint-ORIG-GUID: CbNdk9LqNOPZGSwpFWAmjmssHwwNKWPO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxlogscore=999 mlxscore=0 malwarescore=0 spamscore=0 clxscore=1015 phishscore=0 suspectscore=0 lowpriorityscore=0 impostorscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112090075 Received-SPF: pass client-ip=148.163.156.1; envelope-from=pmorel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, ehabkost@redhat.com, kvm@vger.kernel.org, david@redhat.com, eblake@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, armbru@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, mst@redhat.com, pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The handling of STSI is enhanced with the interception of the function code 15 for storing CPU topology. Using the objects built during the pluging of CPU, we build the SYSIB 15_1_x structures. With this patch the maximum MNEST level is 2, this is also the only level allowed and only SYSIB 15_1_2 will be built. Signed-off-by: Pierre Morel --- hw/s390x/cpu-topology.c | 12 ++-- target/s390x/cpu.h | 1 + target/s390x/cpu_topology.c | 112 ++++++++++++++++++++++++++++++++++++ target/s390x/kvm/kvm.c | 5 ++ target/s390x/meson.build | 1 + 5 files changed, 124 insertions(+), 7 deletions(-) create mode 100644 target/s390x/cpu_topology.c diff --git a/hw/s390x/cpu-topology.c b/hw/s390x/cpu-topology.c index b7131b4ac3..74e04fd68e 100644 --- a/hw/s390x/cpu-topology.c +++ b/hw/s390x/cpu-topology.c @@ -127,15 +127,14 @@ void s390_topology_new_cpu(int core_id) S390TopologyBook *book; S390TopologySocket *socket; S390TopologyCores *cores; - int cores_per_socket, sock_idx; int origin, bit; + int nb_cores_per_socket; book = s390_get_topology(); - cores_per_socket = ms->smp.max_cpus / ms->smp.sockets; - - sock_idx = (core_id / cores_per_socket); - socket = s390_get_socket(book, sock_idx); + /* Cores for the S390 topology are cores and threads of the QEMU topology */ + nb_cores_per_socket = ms->smp.cores * ms->smp.threads; + socket = s390_get_socket(book, core_id / nb_cores_per_socket); /* * At the core level, each CPU is represented by a bit in a 64bit @@ -151,12 +150,11 @@ void s390_topology_new_cpu(int core_id) * CPU inside several CPU containers inside the socket container. */ origin = 64 * (core_id / 64); - cores = s390_get_cores(socket, origin); + cores->origin = origin; bit = 63 - (core_id - origin); set_bit(bit, &cores->mask); - cores->origin = origin; } /* diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 071b3badf4..b97efe85a5 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -892,4 +892,5 @@ typedef S390CPU ArchCPU; #include "exec/cpu-all.h" +void insert_stsi_15_1_x(S390CPU *cpu, int sel2, __u64 addr, uint8_t ar); #endif diff --git a/target/s390x/cpu_topology.c b/target/s390x/cpu_topology.c new file mode 100644 index 0000000000..7f6db18829 --- /dev/null +++ b/target/s390x/cpu_topology.c @@ -0,0 +1,112 @@ +/* + * QEMU S390x CPU Topology + * + * Copyright IBM Corp. 2021 + * Author(s): Pierre Morel + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "hw/s390x/pv.h" +#include "hw/sysbus.h" +#include "hw/s390x/cpu-topology.h" + +static int stsi_15_container(void *p, int nl, int id) +{ + SysIBTl_container *tle = (SysIBTl_container *)p; + + tle->nl = nl; + tle->id = id; + + return sizeof(*tle); +} + +static int stsi_15_cpus(void *p, S390TopologyCores *cd) +{ + SysIBTl_cpu *tle = (SysIBTl_cpu *)p; + + tle->nl = 0; + tle->dedicated = cd->dedicated; + tle->polarity = cd->polarity; + tle->type = cd->cputype; + tle->origin = be16_to_cpu(cd->origin); + tle->mask = be64_to_cpu(cd->mask); + + return sizeof(*tle); +} + +static int set_socket(const MachineState *ms, void *p, + S390TopologySocket *socket) +{ + BusChild *kid; + int l, len = 0; + + len += stsi_15_container(p, 1, socket->socket_id); + p += len; + + QTAILQ_FOREACH_REVERSE(kid, &socket->bus->children, sibling) { + l = stsi_15_cpus(p, S390_TOPOLOGY_CORES(kid->child)); + p += l; + len += l; + } + return len; +} + +static void setup_stsi(const MachineState *ms, void *p, int level) +{ + S390TopologyBook *book; + SysIB_151x *sysib; + BusChild *kid; + int len, l; + + sysib = (SysIB_151x *)p; + sysib->mnest = level; + sysib->mag[TOPOLOGY_NR_MAG2] = ms->smp.sockets; + sysib->mag[TOPOLOGY_NR_MAG1] = ms->smp.cores * ms->smp.threads; + + book = s390_get_topology(); + len = sizeof(SysIB_151x); + p += len; + + QTAILQ_FOREACH_REVERSE(kid, &book->bus->children, sibling) { + l = set_socket(ms, p, S390_TOPOLOGY_SOCKET(kid->child)); + p += l; + len += l; + } + + sysib->length = be16_to_cpu(len); +} + +void insert_stsi_15_1_x(S390CPU *cpu, int sel2, __u64 addr, uint8_t ar) +{ + const MachineState *machine = MACHINE(qdev_get_machine()); + void *p; + int ret, cc; + + /* + * Until the SCLP STSI Facility reporting the MNEST value is used, + * a sel2 value of 2 is the only value allowed in STSI 15.1.x. + */ + if (sel2 != 2) { + setcc(cpu, 3); + return; + } + + p = g_malloc0(TARGET_PAGE_SIZE); + + setup_stsi(machine, p, 2); + + if (s390_is_pv()) { + ret = s390_cpu_pv_mem_write(cpu, 0, p, TARGET_PAGE_SIZE); + } else { + ret = s390_cpu_virt_mem_write(cpu, addr, ar, p, TARGET_PAGE_SIZE); + } + cc = ret ? 3 : 0; + setcc(cpu, cc); + g_free(p); +} + diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c index 5b1fdb55c4..c17e92fc9c 100644 --- a/target/s390x/kvm/kvm.c +++ b/target/s390x/kvm/kvm.c @@ -52,6 +52,7 @@ #include "hw/s390x/s390-virtio-ccw.h" #include "hw/s390x/s390-virtio-hcall.h" #include "hw/s390x/pv.h" +#include "hw/s390x/cpu-topology.h" #ifndef DEBUG_KVM #define DEBUG_KVM 0 @@ -1906,6 +1907,10 @@ static int handle_stsi(S390CPU *cpu) /* Only sysib 3.2.2 needs post-handling for now. */ insert_stsi_3_2_2(cpu, run->s390_stsi.addr, run->s390_stsi.ar); return 0; + case 15: + insert_stsi_15_1_x(cpu, run->s390_stsi.sel2, run->s390_stsi.addr, + run->s390_stsi.ar); + return 0; default: return 0; } diff --git a/target/s390x/meson.build b/target/s390x/meson.build index 84c1402a6a..890ccfa789 100644 --- a/target/s390x/meson.build +++ b/target/s390x/meson.build @@ -29,6 +29,7 @@ s390x_softmmu_ss.add(files( 'sigp.c', 'cpu-sysemu.c', 'cpu_models_sysemu.c', + 'cpu_topology.c', )) s390x_user_ss = ss.source_set() From patchwork Thu Dec 9 13:46:36 2021 Content-Type: text/plain; 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Thu, 9 Dec 2021 13:45:50 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2033211C04A; Thu, 9 Dec 2021 13:45:50 +0000 (GMT) Received: from li-c6ac47cc-293c-11b2-a85c-d421c8e4747b.ibm.com.com (unknown [9.171.63.16]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 9 Dec 2021 13:45:50 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v5 05/12] s390x: CPU topology: CPU topology migration Date: Thu, 9 Dec 2021 14:46:36 +0100 Message-Id: <20211209134643.143866-6-pmorel@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> References: <20211209134643.143866-1-pmorel@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: ThhCOHH6BxRbALUGSRiJIUMmsQVjLhHL X-Proofpoint-GUID: ZYEKxtZFZ_FSCGvH7kLll4n_XxyMmZEI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 bulkscore=0 malwarescore=0 phishscore=0 mlxlogscore=999 suspectscore=0 priorityscore=1501 lowpriorityscore=0 mlxscore=0 adultscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112090075 Received-SPF: pass client-ip=148.163.156.1; envelope-from=pmorel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, ehabkost@redhat.com, kvm@vger.kernel.org, david@redhat.com, eblake@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, armbru@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, mst@redhat.com, pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Both source and target must have the same configuration regarding the activation of Perform Topology Function and Store Topology System Information. Signed-off-by: Pierre Morel --- target/s390x/cpu.h | 2 ++ target/s390x/cpu_features_def.h.inc | 1 + target/s390x/cpu_models.c | 2 ++ target/s390x/gen-features.c | 3 ++ target/s390x/kvm/kvm.c | 6 ++++ target/s390x/machine.c | 48 +++++++++++++++++++++++++++++ 6 files changed, 62 insertions(+) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index b97efe85a5..674281ce56 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -150,6 +150,8 @@ struct CPUS390XState { /* currently processed sigp order */ uint8_t sigp_order; + /* Using Perform CPU Topology Function*/ + bool using_ptf; }; static inline uint64_t *get_freg(CPUS390XState *cs, int nr) diff --git a/target/s390x/cpu_features_def.h.inc b/target/s390x/cpu_features_def.h.inc index e86662bb3b..27e8904978 100644 --- a/target/s390x/cpu_features_def.h.inc +++ b/target/s390x/cpu_features_def.h.inc @@ -146,6 +146,7 @@ DEF_FEAT(SIE_CEI, "cei", SCLP_CPU, 43, "SIE: Conditional-external-interception f DEF_FEAT(DAT_ENH_2, "dateh2", MISC, 0, "DAT-enhancement facility 2") DEF_FEAT(CMM, "cmm", MISC, 0, "Collaborative-memory-management facility") DEF_FEAT(AP, "ap", MISC, 0, "AP instructions installed") +DEF_FEAT(CPU_TOPOLOGY, "cpu_topology", MISC, 0, "CPU Topology available") /* Features exposed via the PLO instruction. */ DEF_FEAT(PLO_CL, "plo-cl", PLO, 0, "PLO Compare and load (32 bit in general registers)") diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index 11e06cc51f..1f9ea6479d 100644 --- a/target/s390x/cpu_models.c +++ b/target/s390x/cpu_models.c @@ -238,6 +238,7 @@ bool s390_has_feat(S390Feat feat) if (s390_is_pv()) { switch (feat) { + case S390_FEAT_CPU_TOPOLOGY: case S390_FEAT_DIAG_318: case S390_FEAT_HPMA2: case S390_FEAT_SIE_F2: @@ -467,6 +468,7 @@ static void check_consistency(const S390CPUModel *model) { S390_FEAT_DIAG_318, S390_FEAT_EXTENDED_LENGTH_SCCB }, { S390_FEAT_NNPA, S390_FEAT_VECTOR }, { S390_FEAT_RDP, S390_FEAT_LOCAL_TLB_CLEARING }, + { S390_FEAT_CPU_TOPOLOGY, S390_FEAT_CONFIGURATION_TOPOLOGY }, }; int i; diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c index 7cb1a6ec10..377d8aad90 100644 --- a/target/s390x/gen-features.c +++ b/target/s390x/gen-features.c @@ -488,6 +488,7 @@ static uint16_t full_GEN9_GA3[] = { static uint16_t full_GEN10_GA1[] = { S390_FEAT_EDAT, S390_FEAT_CONFIGURATION_TOPOLOGY, + S390_FEAT_CPU_TOPOLOGY, S390_FEAT_GROUP_MSA_EXT_2, S390_FEAT_ESOP, S390_FEAT_SIE_PFMFI, @@ -604,6 +605,8 @@ static uint16_t default_GEN9_GA1[] = { static uint16_t default_GEN10_GA1[] = { S390_FEAT_EDAT, S390_FEAT_GROUP_MSA_EXT_2, + S390_FEAT_CONFIGURATION_TOPOLOGY, + S390_FEAT_CPU_TOPOLOGY, }; #define default_GEN10_GA2 EmptyFeat diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c index c17e92fc9c..6ffc697b51 100644 --- a/target/s390x/kvm/kvm.c +++ b/target/s390x/kvm/kvm.c @@ -612,6 +612,7 @@ int kvm_arch_put_registers(CPUState *cs, int level) } else { /* prefix is only supported via sync regs */ } + return 0; } @@ -2427,6 +2428,10 @@ void kvm_s390_get_host_cpu_model(S390CPUModel *model, Error **errp) clear_bit(S390_FEAT_CMM_NT, model->features); } + if (kvm_check_extension(kvm_state, KVM_CAP_S390_CPU_TOPOLOGY)) { + set_bit(S390_FEAT_CPU_TOPOLOGY, model->features); + } + /* bpb needs kernel support for migration, VSIE and reset */ if (!kvm_check_extension(kvm_state, KVM_CAP_S390_BPB)) { clear_bit(S390_FEAT_BPB, model->features); @@ -2535,6 +2540,7 @@ void kvm_s390_apply_cpu_model(const S390CPUModel *model, Error **errp) error_setg(errp, "KVM: Error configuring CPU subfunctions: %d", rc); return; } + /* enable CMM via CMMA */ if (test_bit(S390_FEAT_CMM, model->features)) { kvm_s390_enable_cmma(); diff --git a/target/s390x/machine.c b/target/s390x/machine.c index 37a076858c..6036e8e856 100644 --- a/target/s390x/machine.c +++ b/target/s390x/machine.c @@ -250,6 +250,53 @@ const VMStateDescription vmstate_diag318 = { } }; +static int cpu_topology_presave(void *opaque) +{ + S390CPU *cpu = opaque; + + cpu->env.using_ptf = s390_has_feat(S390_FEAT_CPU_TOPOLOGY); + return 0; +} + +static int cpu_topology_postload(void *opaque, int version_id) +{ + S390CPU *cpu = opaque; + + if ((cpu->env.using_ptf == s390_has_feat(S390_FEAT_CPU_TOPOLOGY)) && + (cpu->env.using_ptf == s390_has_feat(S390_FEAT_CONFIGURATION_TOPOLOGY))) { + return 0; + } + if (cpu->env.using_ptf) { + error_report("Target needs CPU Topology enabled"); + } else { + if (s390_has_feat(S390_FEAT_CONFIGURATION_TOPOLOGY)) { + error_report("Target is not allowed to enable configuration Topology"); + } + if (s390_has_feat(S390_FEAT_CPU_TOPOLOGY)) { + error_report("Target is not allowed to enable CPU Topology"); + } + } + return -EINVAL; +} + +static bool cpu_topology_needed(void *opaque) +{ + return 1; +} + +const VMStateDescription vmstate_cpu_topology = { + .name = "cpu/cpu_topology", + .version_id = 1, + .pre_save = cpu_topology_presave, + .post_load = cpu_topology_postload, + .minimum_version_id = 1, + .needed = cpu_topology_needed, + .fields = (VMStateField[]) { + VMSTATE_BOOL(env.using_ptf, S390CPU), + VMSTATE_END_OF_LIST() + } +}; + const VMStateDescription vmstate_s390_cpu = { .name = "cpu", .post_load = cpu_post_load, @@ -287,6 +334,7 @@ const VMStateDescription vmstate_s390_cpu = { &vmstate_bpbc, &vmstate_etoken, &vmstate_diag318, + &vmstate_cpu_topology, NULL }, }; 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Thu, 9 Dec 2021 13:45:57 GMT Received: from ppma04fra.de.ibm.com (6a.4a.5195.ip4.static.sl-reverse.com [149.81.74.106]) by mx0b-001b2d01.pphosted.com with ESMTP id 3cug30uw5v-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 09 Dec 2021 13:45:57 +0000 Received: from pps.filterd (ppma04fra.de.ibm.com [127.0.0.1]) by ppma04fra.de.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 1B9Dc3KP017304; Thu, 9 Dec 2021 13:45:55 GMT Received: from b06cxnps4074.portsmouth.uk.ibm.com (d06relay11.portsmouth.uk.ibm.com [9.149.109.196]) by ppma04fra.de.ibm.com with ESMTP id 3cqyya81r5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 09 Dec 2021 13:45:55 +0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 1B9DjpXr21496128 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 9 Dec 2021 13:45:51 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C60B011C05E; Thu, 9 Dec 2021 13:45:51 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0D69B11C04A; Thu, 9 Dec 2021 13:45:51 +0000 (GMT) Received: from li-c6ac47cc-293c-11b2-a85c-d421c8e4747b.ibm.com.com (unknown [9.171.63.16]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 9 Dec 2021 13:45:50 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v5 06/12] s390x: kvm: topology: interception of PTF instruction Date: Thu, 9 Dec 2021 14:46:37 +0100 Message-Id: <20211209134643.143866-7-pmorel@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> References: <20211209134643.143866-1-pmorel@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 5-xImqNiid-zho06blnQUheufsSATOVw X-Proofpoint-ORIG-GUID: CM_N4cHOivJHklOQR1YAV2K53wMFxKAJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 priorityscore=1501 mlxlogscore=999 bulkscore=0 adultscore=0 suspectscore=0 mlxscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112090075 Received-SPF: pass client-ip=148.163.158.5; envelope-from=pmorel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, ehabkost@redhat.com, kvm@vger.kernel.org, david@redhat.com, eblake@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, armbru@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, mst@redhat.com, pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" When the host supports the CPU topology facility, the PTF instruction with function code 2 is interpreted by the SIE, provided that the userland hypervizor activates the interpretation by using the KVM_CAP_S390_CPU_TOPOLOGY KVM extension. The PTF instructions with function code 0 and 1 are intercepted and must be emulated by the userland hypervizor. Signed-off-by: Pierre Morel --- hw/s390x/s390-virtio-ccw.c | 50 ++++++++++++++++++++++++++++++ include/hw/s390x/s390-virtio-ccw.h | 6 ++++ target/s390x/kvm/kvm.c | 15 +++++++++ 3 files changed, 71 insertions(+) diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index 8b624c2e0c..6218352e68 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -408,6 +408,56 @@ static void s390_pv_prepare_reset(S390CcwMachineState *ms) s390_pv_prep_reset(); } +/* + * s390_handle_ptf: + * + * @register 1: contains the function code + * + * Function codes 0 and 1 handle the CPU polarization. + * We assume an horizontal topology, the only one supported currently + * by Linux, consequently we answer to function code 0, requesting + * horizontal polarization that it is already the current polarization + * and reject vertical polarization request without further explanation. + * + * Function code 2 is handling topology changes and is interpreted + * by the SIE. + */ +int s390_handle_ptf(S390CPU *cpu, uint8_t r1, uintptr_t ra) +{ + CPUS390XState *env = &cpu->env; + uint64_t reg = env->regs[r1]; + uint8_t fc = reg & S390_TOPO_FC_MASK; + + if (!s390_has_feat(S390_FEAT_CONFIGURATION_TOPOLOGY)) { + s390_program_interrupt(env, PGM_OPERATION, ra); + return 0; + } + + if (env->psw.mask & PSW_MASK_PSTATE) { + s390_program_interrupt(env, PGM_PRIVILEGED, ra); + return 0; + } + + if (reg & ~S390_TOPO_FC_MASK) { + s390_program_interrupt(env, PGM_SPECIFICATION, ra); + return 0; + } + + switch (fc) { + case 0: /* Horizontal polarization is already set */ + env->regs[r1] |= S390_PTF_REASON_DONE; + return 2; + case 1: /* Vertical polarization is not supported */ + env->regs[r1] |= S390_PTF_REASON_NONE; + return 2; + default: + /* Note that fc == 2 is interpreted by the SIE */ + s390_program_interrupt(env, PGM_SPECIFICATION, ra); + } + + return 0; +} + static void s390_machine_reset(MachineState *machine) { S390CcwMachineState *ms = S390_CCW_MACHINE(machine); diff --git a/include/hw/s390x/s390-virtio-ccw.h b/include/hw/s390x/s390-virtio-ccw.h index 3331990e02..ac4b4a92e7 100644 --- a/include/hw/s390x/s390-virtio-ccw.h +++ b/include/hw/s390x/s390-virtio-ccw.h @@ -30,6 +30,12 @@ struct S390CcwMachineState { uint8_t loadparm[8]; }; +#define S390_PTF_REASON_NONE (0x00 << 8) +#define S390_PTF_REASON_DONE (0x01 << 8) +#define S390_PTF_REASON_BUSY (0x02 << 8) +#define S390_TOPO_FC_MASK 0xffUL +int s390_handle_ptf(S390CPU *cpu, uint8_t r1, uintptr_t ra); + struct S390CcwMachineClass { /*< private >*/ MachineClass parent_class; diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c index 6ffc697b51..42eda0faee 100644 --- a/target/s390x/kvm/kvm.c +++ b/target/s390x/kvm/kvm.c @@ -98,6 +98,7 @@ #define PRIV_B9_EQBS 0x9c #define PRIV_B9_CLP 0xa0 +#define PRIV_B9_PTF 0xa2 #define PRIV_B9_PCISTG 0xd0 #define PRIV_B9_PCILG 0xd2 #define PRIV_B9_RPCIT 0xd3 @@ -363,6 +364,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) kvm_vm_enable_cap(s, KVM_CAP_S390_USER_SIGP, 0); kvm_vm_enable_cap(s, KVM_CAP_S390_VECTOR_REGISTERS, 0); kvm_vm_enable_cap(s, KVM_CAP_S390_USER_STSI, 0); + kvm_vm_enable_cap(s, KVM_CAP_S390_CPU_TOPOLOGY, 0); if (ri_allowed()) { if (kvm_vm_enable_cap(s, KVM_CAP_S390_RI, 0) == 0) { cap_ri = 1; @@ -1454,6 +1456,16 @@ static int kvm_mpcifc_service_call(S390CPU *cpu, struct kvm_run *run) } } +static int kvm_handle_ptf(S390CPU *cpu, struct kvm_run *run) +{ + uint8_t r1 = (run->s390_sieic.ipb >> 20) & 0x0f; + int ret; + + ret = s390_handle_ptf(cpu, r1, RA_IGNORED); + setcc(cpu, ret); + return 0; +} + static int handle_b9(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) { int r = 0; @@ -1471,6 +1483,9 @@ static int handle_b9(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) case PRIV_B9_RPCIT: r = kvm_rpcit_service_call(cpu, run); break; + case PRIV_B9_PTF: + r = kvm_handle_ptf(cpu, run); + break; case PRIV_B9_EQBS: /* just inject exception */ r = -1; From patchwork Thu Dec 9 13:46:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12666611 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 51448C433EF for ; Thu, 9 Dec 2021 13:54:50 +0000 (UTC) Received: from localhost ([::1]:46720 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mvJsn-0003aG-EN for qemu-devel@archiver.kernel.org; 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Thu, 9 Dec 2021 13:45:52 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A439D11C04A; Thu, 9 Dec 2021 13:45:52 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E2EAD11C064; Thu, 9 Dec 2021 13:45:51 +0000 (GMT) Received: from li-c6ac47cc-293c-11b2-a85c-d421c8e4747b.ibm.com.com (unknown [9.171.63.16]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 9 Dec 2021 13:45:51 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v5 07/12] s390: topology: Adding books to CPU topology Date: Thu, 9 Dec 2021 14:46:38 +0100 Message-Id: <20211209134643.143866-8-pmorel@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> References: <20211209134643.143866-1-pmorel@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Gdt3HH8XksUWWb32Iegszv5U1QDxbI5b X-Proofpoint-ORIG-GUID: 4HBmgVeBgnG4meb32hVozS_M8155HU_8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 mlxscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112090075 Received-SPF: pass client-ip=148.163.156.1; envelope-from=pmorel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, ehabkost@redhat.com, kvm@vger.kernel.org, david@redhat.com, eblake@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, armbru@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, mst@redhat.com, pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" S390 CPU topology may have up to 5 topology containers. The first container above the cores is level 2, the sockets. We introduce here the books, book is the level containing sockets. Let's add books, level3, containers to the CPU topology. Signed-off-by: Pierre Morel --- hw/core/machine-smp.c | 28 +++++++++++++++++++++------- hw/core/machine.c | 2 ++ hw/s390x/s390-virtio-ccw.c | 1 + include/hw/boards.h | 4 ++++ qapi/machine.json | 7 ++++++- softmmu/vl.c | 3 +++ 6 files changed, 37 insertions(+), 8 deletions(-) diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c index 116a0cbbfa..4848f546cf 100644 --- a/hw/core/machine-smp.c +++ b/hw/core/machine-smp.c @@ -31,6 +31,10 @@ static char *cpu_hierarchy_to_string(MachineState *ms) MachineClass *mc = MACHINE_GET_CLASS(ms); GString *s = g_string_new(NULL); + if (mc->smp_props.books_supported) { + g_string_append_printf(s, " * books (%u)", ms->smp.books); + } + g_string_append_printf(s, "sockets (%u)", ms->smp.sockets); if (mc->smp_props.dies_supported) { @@ -67,6 +71,7 @@ void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp) { MachineClass *mc = MACHINE_GET_CLASS(ms); unsigned cpus = config->has_cpus ? config->cpus : 0; + unsigned books = config->has_books ? config->books : 0; unsigned sockets = config->has_sockets ? config->sockets : 0; unsigned dies = config->has_dies ? config->dies : 0; unsigned cores = config->has_cores ? config->cores : 0; @@ -78,6 +83,7 @@ void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp) * explicit configuration like "cpus=0" is not allowed. */ if ((config->has_cpus && config->cpus == 0) || + (config->has_books && config->books == 0) || (config->has_sockets && config->sockets == 0) || (config->has_dies && config->dies == 0) || (config->has_cores && config->cores == 0) || @@ -98,6 +104,13 @@ void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp) dies = dies > 0 ? dies : 1; + if (!mc->smp_props.books_supported && books > 1) { + error_setg(errp, "books not supported by this machine's CPU topology"); + return; + } + + books = books > 0 ? books : 1; + /* compute missing values based on the provided ones */ if (cpus == 0 && maxcpus == 0) { sockets = sockets > 0 ? sockets : 1; @@ -111,33 +124,34 @@ void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp) if (sockets == 0) { cores = cores > 0 ? cores : 1; threads = threads > 0 ? threads : 1; - sockets = maxcpus / (dies * cores * threads); + sockets = maxcpus / (books * dies * cores * threads); } else if (cores == 0) { threads = threads > 0 ? threads : 1; - cores = maxcpus / (sockets * dies * threads); + cores = maxcpus / (books * sockets * dies * threads); } } else { /* prefer cores over sockets since 6.2 */ if (cores == 0) { sockets = sockets > 0 ? sockets : 1; threads = threads > 0 ? threads : 1; - cores = maxcpus / (sockets * dies * threads); + cores = maxcpus / (books * sockets * dies * threads); } else if (sockets == 0) { threads = threads > 0 ? threads : 1; - sockets = maxcpus / (dies * cores * threads); + sockets = maxcpus / (books * dies * cores * threads); } } /* try to calculate omitted threads at last */ if (threads == 0) { - threads = maxcpus / (sockets * dies * cores); + threads = maxcpus / (books * sockets * dies * cores); } } - maxcpus = maxcpus > 0 ? maxcpus : sockets * dies * cores * threads; + maxcpus = maxcpus > 0 ? maxcpus : books * sockets * dies * cores * threads; cpus = cpus > 0 ? cpus : maxcpus; ms->smp.cpus = cpus; + ms->smp.books = books; ms->smp.sockets = sockets; ms->smp.dies = dies; ms->smp.cores = cores; @@ -145,7 +159,7 @@ void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp) ms->smp.max_cpus = maxcpus; /* sanity-check of the computed topology */ - if (sockets * dies * cores * threads != maxcpus) { + if (books * sockets * dies * cores * threads != maxcpus) { g_autofree char *topo_msg = cpu_hierarchy_to_string(ms); error_setg(errp, "Invalid CPU topology: " "product of the hierarchy must match maxcpus: " diff --git a/hw/core/machine.c b/hw/core/machine.c index 53a99abc56..d98c9105f7 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -740,6 +740,7 @@ static void machine_get_smp(Object *obj, Visitor *v, const char *name, MachineState *ms = MACHINE(obj); SMPConfiguration *config = &(SMPConfiguration){ .has_cpus = true, .cpus = ms->smp.cpus, + .has_books = true, .books = ms->smp.books, .has_sockets = true, .sockets = ms->smp.sockets, .has_dies = true, .dies = ms->smp.dies, .has_cores = true, .cores = ms->smp.cores, @@ -930,6 +931,7 @@ static void machine_initfn(Object *obj) /* default to mc->default_cpus */ ms->smp.cpus = mc->default_cpus; ms->smp.max_cpus = mc->default_cpus; + ms->smp.books = 1; ms->smp.sockets = 1; ms->smp.dies = 1; ms->smp.cores = 1; diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index 6218352e68..b3c405b4d0 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -666,6 +666,7 @@ static void ccw_machine_class_init(ObjectClass *oc, void *data) hc->unplug_request = s390_machine_device_unplug_request; nc->nmi_monitor_handler = s390_nmi; mc->default_ram_id = "s390.ram"; + mc->smp_props.books_supported = true; } static inline bool machine_get_aes_key_wrap(Object *obj, Error **errp) diff --git a/include/hw/boards.h b/include/hw/boards.h index 9c1c190104..68c58b4b4a 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -128,10 +128,12 @@ typedef struct { * SMPCompatProps: * @prefer_sockets - whether sockets are preferred over cores in smp parsing * @dies_supported - whether dies are supported by the machine + * @books_supported - whether books are supported by the machine */ typedef struct { bool prefer_sockets; bool dies_supported; + bool books_supported; } SMPCompatProps; /** @@ -296,6 +298,7 @@ typedef struct DeviceMemoryState { /** * CpuTopology: * @cpus: the number of present logical processors on the machine + * @books: the number of books on the machine * @sockets: the number of sockets on the machine * @dies: the number of dies in one socket * @cores: the number of cores in one die @@ -304,6 +307,7 @@ typedef struct DeviceMemoryState { */ typedef struct CpuTopology { unsigned int cpus; + unsigned int books; unsigned int sockets; unsigned int dies; unsigned int cores; diff --git a/qapi/machine.json b/qapi/machine.json index 067e3f5378..5761c02070 100644 --- a/qapi/machine.json +++ b/qapi/machine.json @@ -866,12 +866,13 @@ # a CPU is being hotplugged. # # @node-id: NUMA node ID the CPU belongs to +# @book-id: book number within node/board the CPU belongs to # @socket-id: socket number within node/board the CPU belongs to # @die-id: die number within node/board the CPU belongs to (Since 4.1) # @core-id: core number within die the CPU belongs to # @thread-id: thread number within core the CPU belongs to # -# Note: currently there are 5 properties that could be present +# Note: currently there are 6 properties that could be present # but management should be prepared to pass through other # properties with device_add command to allow for future # interface extension. This also requires the filed names to be kept in @@ -881,6 +882,7 @@ ## { 'struct': 'CpuInstanceProperties', 'data': { '*node-id': 'int', + '*book-id': 'int', '*socket-id': 'int', '*die-id': 'int', '*core-id': 'int', @@ -1392,6 +1394,8 @@ # # @cpus: number of virtual CPUs in the virtual machine # +# @books: number of books in the CPU topology +# # @sockets: number of sockets in the CPU topology # # @dies: number of dies per socket in the CPU topology @@ -1406,6 +1410,7 @@ ## { 'struct': 'SMPConfiguration', 'data': { '*cpus': 'int', + '*books': 'int', '*sockets': 'int', '*dies': 'int', '*cores': 'int', diff --git a/softmmu/vl.c b/softmmu/vl.c index 620a1f1367..764403d0b3 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -720,6 +720,9 @@ static QemuOptsList qemu_smp_opts = { { .name = "cpus", .type = QEMU_OPT_NUMBER, + }, { + .name = "books", + .type = QEMU_OPT_NUMBER, }, { .name = "sockets", .type = QEMU_OPT_NUMBER, From patchwork Thu Dec 9 13:46:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12666603 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 17A1BC433F5 for ; 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Thu, 9 Dec 2021 13:45:52 +0000 (GMT) Received: from li-c6ac47cc-293c-11b2-a85c-d421c8e4747b.ibm.com.com (unknown [9.171.63.16]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 9 Dec 2021 13:45:52 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v5 08/12] s390: topology: Adding books to STSI Date: Thu, 9 Dec 2021 14:46:39 +0100 Message-Id: <20211209134643.143866-9-pmorel@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> References: <20211209134643.143866-1-pmorel@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 6wt7RIZsvkTey5tdAGKv50fCQAkaPzt_ X-Proofpoint-GUID: e9XuICFPTc3FSIKHeGlEnQV2RRvW9B2q X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 priorityscore=1501 mlxscore=0 suspectscore=0 mlxlogscore=999 adultscore=0 spamscore=0 bulkscore=0 phishscore=0 malwarescore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112090075 Received-SPF: pass client-ip=148.163.156.1; envelope-from=pmorel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, ehabkost@redhat.com, kvm@vger.kernel.org, david@redhat.com, eblake@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, armbru@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, mst@redhat.com, pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Let's add STSI support for the container level 3, books, and provide the information back to the guest. Signed-off-by: Pierre Morel --- hw/s390x/cpu-topology.c | 147 +++++++++++++++++++++++++++++--- include/hw/s390x/cpu-topology.h | 20 ++++- include/hw/s390x/sclp.h | 2 +- target/s390x/cpu_topology.c | 53 +++++++++--- 4 files changed, 194 insertions(+), 28 deletions(-) diff --git a/hw/s390x/cpu-topology.c b/hw/s390x/cpu-topology.c index 74e04fd68e..43eff650d9 100644 --- a/hw/s390x/cpu-topology.c +++ b/hw/s390x/cpu-topology.c @@ -61,6 +61,26 @@ static S390TopologySocket *s390_create_socket(S390TopologyBook *book, int id) return socket; } +static S390TopologyBook *s390_create_book(S390TopologyDrawer *drawer, int id) +{ + DeviceState *dev; + S390TopologyBook *book; + const MachineState *ms = MACHINE(qdev_get_machine()); + + if (drawer->bus->num_children >= ms->smp.books) { + return NULL; + } + + dev = qdev_new(TYPE_S390_TOPOLOGY_BOOK); + qdev_realize_and_unref(dev, drawer->bus, &error_fatal); + + book = S390_TOPOLOGY_BOOK(dev); + book->book_id = id; + drawer->cnt++; + + return book; +} + /* * s390_get_cores: * @socket: the socket to search into @@ -110,6 +130,31 @@ static S390TopologySocket *s390_get_socket(S390TopologyBook *book, return s390_create_socket(book, socket_id); } +/* + * s390_get_book: + * @drawer: The drawer to search into + * @book_id: the identifier of the book to search for + * + * returns a pointer to a S390TopologySocket structure within a drawer having + * the specified book_id. + * First search if the drawer is already containing the S390TopologySocket + * structure and if not create one with this book_id. + */ +static S390TopologyBook *s390_get_book(S390TopologyDrawer *drawer, + int book_id) +{ + S390TopologyBook *book; + BusChild *kid; + + QTAILQ_FOREACH(kid, &drawer->bus->children, sibling) { + book = S390_TOPOLOGY_BOOK(kid->child); + if (book->book_id == book_id) { + return book; + } + } + return s390_create_book(drawer, book_id); +} + /* * s390_topology_new_cpu: * @core_id: the core ID is machine wide @@ -124,16 +169,21 @@ static S390TopologySocket *s390_get_socket(S390TopologyBook *book, void s390_topology_new_cpu(int core_id) { const MachineState *ms = MACHINE(qdev_get_machine()); + S390TopologyDrawer *drawer; S390TopologyBook *book; S390TopologySocket *socket; S390TopologyCores *cores; int origin, bit; int nb_cores_per_socket; + int nb_cores_per_book; - book = s390_get_topology(); + drawer = s390_get_topology(); /* Cores for the S390 topology are cores and threads of the QEMU topology */ nb_cores_per_socket = ms->smp.cores * ms->smp.threads; + nb_cores_per_book = ms->smp.sockets * nb_cores_per_socket; + + book = s390_get_book(drawer, core_id / nb_cores_per_book); socket = s390_get_socket(book, core_id / nb_cores_per_socket); /* @@ -166,23 +216,23 @@ void s390_topology_setup(MachineState *ms) DeviceState *dev; /* Create BOOK bridge device */ - dev = qdev_new(TYPE_S390_TOPOLOGY_BOOK); + dev = qdev_new(TYPE_S390_TOPOLOGY_DRAWER); object_property_add_child(qdev_get_machine(), - TYPE_S390_TOPOLOGY_BOOK, OBJECT(dev)); + TYPE_S390_TOPOLOGY_DRAWER, OBJECT(dev)); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); } -S390TopologyBook *s390_get_topology(void) +S390TopologyDrawer *s390_get_topology(void) { - static S390TopologyBook *book; + static S390TopologyDrawer *drawer; - if (!book) { - book = S390_TOPOLOGY_BOOK( - object_resolve_path(TYPE_S390_TOPOLOGY_BOOK, NULL)); - assert(book != NULL); + if (!drawer) { + drawer = S390_TOPOLOGY_DRAWER(object_resolve_path(TYPE_S390_TOPOLOGY_DRAWER, + NULL)); + assert(drawer != NULL); } - return book; + return drawer; } /* --- CORES Definitions --- */ @@ -333,12 +383,13 @@ static void book_class_init(ObjectClass *oc, void *data) hc->unplug = qdev_simple_device_unplug_cb; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); dc->realize = s390_book_device_realize; + dc->bus_type = TYPE_S390_TOPOLOGY_DRAWER_BUS; dc->desc = "topology book"; } static const TypeInfo book_info = { .name = TYPE_S390_TOPOLOGY_BOOK, - .parent = TYPE_SYS_BUS_DEVICE, + .parent = TYPE_DEVICE, .instance_size = sizeof(S390TopologyBook), .class_init = book_class_init, .interfaces = (InterfaceInfo[]) { @@ -347,6 +398,78 @@ static const TypeInfo book_info = { } }; +/* --- DRAWER Definitions --- */ +static Property s390_topology_drawer_properties[] = { + DEFINE_PROP_UINT8("drawer_id", S390TopologyDrawer, drawer_id, 0), + DEFINE_PROP_END_OF_LIST(), +}; + +static char *drawer_bus_get_dev_path(DeviceState *dev) +{ + S390TopologyDrawer *drawer = S390_TOPOLOGY_DRAWER(dev); + DeviceState *node = dev->parent_bus->parent; + char *id = qdev_get_dev_path(node); + char *ret; + + if (id) { + ret = g_strdup_printf("%s:%02d", id, drawer->drawer_id); + g_free(id); + } else { + ret = g_malloc(6); + snprintf(ret, 6, "_:%02d", drawer->drawer_id); + } + + return ret; +} + +static void drawer_bus_class_init(ObjectClass *oc, void *data) +{ + BusClass *k = BUS_CLASS(oc); + + k->get_dev_path = drawer_bus_get_dev_path; + k->max_dev = S390_MAX_DRAWERS; +} + +static const TypeInfo drawer_bus_info = { + .name = TYPE_S390_TOPOLOGY_DRAWER_BUS, + .parent = TYPE_BUS, + .instance_size = 0, + .class_init = drawer_bus_class_init, +}; + +static void s390_drawer_device_realize(DeviceState *dev, Error **errp) +{ + S390TopologyDrawer *drawer = S390_TOPOLOGY_DRAWER(dev); + BusState *bus; + + bus = qbus_new(TYPE_S390_TOPOLOGY_DRAWER_BUS, dev, + TYPE_S390_TOPOLOGY_DRAWER_BUS); + qbus_set_hotplug_handler(bus, OBJECT(dev)); + drawer->bus = bus; +} + +static void drawer_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); + + hc->unplug = qdev_simple_device_unplug_cb; + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + dc->realize = s390_drawer_device_realize; + device_class_set_props(dc, s390_topology_drawer_properties); + dc->desc = "topology drawer"; +} + +static const TypeInfo drawer_info = { + .name = TYPE_S390_TOPOLOGY_DRAWER, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(S390TopologyDrawer), + .class_init = drawer_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_HOTPLUG_HANDLER }, + { } + } +}; static void topology_register(void) { type_register_static(&cpu_cores_info); @@ -354,6 +477,8 @@ static void topology_register(void) type_register_static(&socket_info); type_register_static(&book_bus_info); type_register_static(&book_info); + type_register_static(&drawer_bus_info); + type_register_static(&drawer_info); } type_init(topology_register); diff --git a/include/hw/s390x/cpu-topology.h b/include/hw/s390x/cpu-topology.h index e6e013a8b8..78017c3d78 100644 --- a/include/hw/s390x/cpu-topology.h +++ b/include/hw/s390x/cpu-topology.h @@ -56,18 +56,30 @@ OBJECT_DECLARE_SIMPLE_TYPE(S390TopologySocket, S390_TOPOLOGY_SOCKET) #define TYPE_S390_TOPOLOGY_BOOK "topology book" #define TYPE_S390_TOPOLOGY_BOOK_BUS "book-bus" struct S390TopologyBook { - SysBusDevice parent_obj; + DeviceState parent_obj; BusState *bus; uint8_t book_id; int cnt; }; typedef struct S390TopologyBook S390TopologyBook; OBJECT_DECLARE_SIMPLE_TYPE(S390TopologyBook, S390_TOPOLOGY_BOOK) -#define S390_MAX_BOOKS 1 +#define S390_MAX_BOOKS 4 + +#define TYPE_S390_TOPOLOGY_DRAWER "topology drawer" +#define TYPE_S390_TOPOLOGY_DRAWER_BUS "drawer-bus" +struct S390TopologyDrawer { + SysBusDevice parent_obj; + BusState *bus; + uint8_t drawer_id; + int cnt; +}; +typedef struct S390TopologyDrawer S390TopologyDrawer; +OBJECT_DECLARE_SIMPLE_TYPE(S390TopologyDrawer, S390_TOPOLOGY_DRAWER) +#define S390_MAX_DRAWERS 1 -S390TopologyBook *s390_init_topology(void); +S390TopologyDrawer *s390_init_topology(void); -S390TopologyBook *s390_get_topology(void); +S390TopologyDrawer *s390_get_topology(void); void s390_topology_setup(MachineState *ms); void s390_topology_new_cpu(int core_id); diff --git a/include/hw/s390x/sclp.h b/include/hw/s390x/sclp.h index c86c2c6619..c591346aa2 100644 --- a/include/hw/s390x/sclp.h +++ b/include/hw/s390x/sclp.h @@ -117,7 +117,7 @@ typedef struct ReadInfo { uint16_t rnmax; uint8_t rnsize; uint8_t _reserved1[15 - 11]; /* 11-15 */ -#define SCLP_READ_SCP_INFO_MNEST 2 +#define SCLP_READ_SCP_INFO_MNEST 3 uint8_t stsi_parm; uint16_t entries_cpu; /* 16-17 */ uint16_t offset_cpu; /* 18-19 */ diff --git a/target/s390x/cpu_topology.c b/target/s390x/cpu_topology.c index 7f6db18829..08e1fbd13e 100644 --- a/target/s390x/cpu_topology.c +++ b/target/s390x/cpu_topology.c @@ -14,6 +14,7 @@ #include "hw/s390x/pv.h" #include "hw/sysbus.h" #include "hw/s390x/cpu-topology.h" +#include "hw/s390x/sclp.h" static int stsi_15_container(void *p, int nl, int id) { @@ -40,7 +41,7 @@ static int stsi_15_cpus(void *p, S390TopologyCores *cd) } static int set_socket(const MachineState *ms, void *p, - S390TopologySocket *socket) + S390TopologySocket *socket, int level) { BusChild *kid; int l, len = 0; @@ -56,24 +57,56 @@ static int set_socket(const MachineState *ms, void *p, return len; } +static int set_book(const MachineState *ms, void *p, + S390TopologyBook *book, int level) +{ + BusChild *kid; + int l, len = 0; + + if (level >= 3) { + len += stsi_15_container(p, 2, book->book_id); + p += len; + } + + QTAILQ_FOREACH_REVERSE(kid, &book->bus->children, sibling) { + l = set_socket(ms, p, S390_TOPOLOGY_SOCKET(kid->child), level); + p += l; + len += l; + } + + return len; +} + static void setup_stsi(const MachineState *ms, void *p, int level) { - S390TopologyBook *book; + S390TopologyDrawer *drawer; SysIB_151x *sysib; BusChild *kid; + int nb_sockets, nb_books; int len, l; sysib = (SysIB_151x *)p; sysib->mnest = level; - sysib->mag[TOPOLOGY_NR_MAG2] = ms->smp.sockets; + switch (level) { + case 2: + nb_books = 0; + nb_sockets = ms->smp.sockets * ms->smp.books; + break; + case 3: + nb_books = ms->smp.books; + nb_sockets = ms->smp.sockets; + break; + } + sysib->mag[TOPOLOGY_NR_MAG3] = nb_books; + sysib->mag[TOPOLOGY_NR_MAG2] = nb_sockets; sysib->mag[TOPOLOGY_NR_MAG1] = ms->smp.cores * ms->smp.threads; - book = s390_get_topology(); + drawer = s390_get_topology(); len = sizeof(SysIB_151x); p += len; - QTAILQ_FOREACH_REVERSE(kid, &book->bus->children, sibling) { - l = set_socket(ms, p, S390_TOPOLOGY_SOCKET(kid->child)); + QTAILQ_FOREACH_REVERSE(kid, &drawer->bus->children, sibling) { + l = set_book(ms, p, S390_TOPOLOGY_BOOK(kid->child), level); p += l; len += l; } @@ -87,18 +120,14 @@ void insert_stsi_15_1_x(S390CPU *cpu, int sel2, __u64 addr, uint8_t ar) void *p; int ret, cc; - /* - * Until the SCLP STSI Facility reporting the MNEST value is used, - * a sel2 value of 2 is the only value allowed in STSI 15.1.x. - */ - if (sel2 != 2) { + if (sel2 < 2 || sel2 > SCLP_READ_SCP_INFO_MNEST) { setcc(cpu, 3); return; } p = g_malloc0(TARGET_PAGE_SIZE); - setup_stsi(machine, p, 2); + setup_stsi(machine, p, sel2); if (s390_is_pv()) { ret = s390_cpu_pv_mem_write(cpu, 0, p, TARGET_PAGE_SIZE); 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Thu, 9 Dec 2021 13:45:54 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AA44911C04C; Thu, 9 Dec 2021 13:45:53 +0000 (GMT) Received: from li-c6ac47cc-293c-11b2-a85c-d421c8e4747b.ibm.com.com (unknown [9.171.63.16]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 9 Dec 2021 13:45:53 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v5 09/12] s390: topology: Adding drawers to CPU topology Date: Thu, 9 Dec 2021 14:46:40 +0100 Message-Id: <20211209134643.143866-10-pmorel@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> References: <20211209134643.143866-1-pmorel@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 8a_U--OVCr39D_l7Dzxy1knFl4J6mhvA X-Proofpoint-GUID: VqCyLunvLalUjqiUqhUFZkkHcheKx4Uw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 clxscore=1015 spamscore=0 mlxlogscore=999 adultscore=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 phishscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112090075 Received-SPF: pass client-ip=148.163.156.1; envelope-from=pmorel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, ehabkost@redhat.com, kvm@vger.kernel.org, david@redhat.com, eblake@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, armbru@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, mst@redhat.com, pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" S390 CPU topology may have up to 5 topology containers. The first container above the cores is level 2, the sockets, and the level 3, containing sockets are the books. We introduce here the drawers, drawers is the level containing books. Let's add drawers, level4, containers to the CPU topology. Signed-off-by: Pierre Morel --- hw/core/machine-smp.c | 28 +++++++++++++++++++++------- hw/core/machine.c | 2 ++ hw/s390x/s390-virtio-ccw.c | 1 + include/hw/boards.h | 4 ++++ qapi/machine.json | 7 ++++++- softmmu/vl.c | 3 +++ 6 files changed, 37 insertions(+), 8 deletions(-) diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c index 4848f546cf..b80a7785b4 100644 --- a/hw/core/machine-smp.c +++ b/hw/core/machine-smp.c @@ -31,6 +31,10 @@ static char *cpu_hierarchy_to_string(MachineState *ms) MachineClass *mc = MACHINE_GET_CLASS(ms); GString *s = g_string_new(NULL); + if (mc->smp_props.drawers_supported) { + g_string_append_printf(s, " * drawers (%u)", ms->smp.drawers); + } + if (mc->smp_props.books_supported) { g_string_append_printf(s, " * books (%u)", ms->smp.books); } @@ -71,6 +75,7 @@ void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp) { MachineClass *mc = MACHINE_GET_CLASS(ms); unsigned cpus = config->has_cpus ? config->cpus : 0; + unsigned drawers = config->has_drawers ? config->drawers : 0; unsigned books = config->has_books ? config->books : 0; unsigned sockets = config->has_sockets ? config->sockets : 0; unsigned dies = config->has_dies ? config->dies : 0; @@ -83,6 +88,7 @@ void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp) * explicit configuration like "cpus=0" is not allowed. */ if ((config->has_cpus && config->cpus == 0) || + (config->has_drawers && config->drawers == 0) || (config->has_books && config->books == 0) || (config->has_sockets && config->sockets == 0) || (config->has_dies && config->dies == 0) || @@ -111,6 +117,13 @@ void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp) books = books > 0 ? books : 1; + if (!mc->smp_props.drawers_supported && drawers > 1) { + error_setg(errp, "drawers not supported by this machine's CPU topology"); + return; + } + + drawers = drawers > 0 ? drawers : 1; + /* compute missing values based on the provided ones */ if (cpus == 0 && maxcpus == 0) { sockets = sockets > 0 ? sockets : 1; @@ -124,33 +137,34 @@ void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp) if (sockets == 0) { cores = cores > 0 ? cores : 1; threads = threads > 0 ? threads : 1; - sockets = maxcpus / (books * dies * cores * threads); + sockets = maxcpus / (drawers * books * dies * cores * threads); } else if (cores == 0) { threads = threads > 0 ? threads : 1; - cores = maxcpus / (books * sockets * dies * threads); + cores = maxcpus / (drawers * books * sockets * dies * threads); } } else { /* prefer cores over sockets since 6.2 */ if (cores == 0) { sockets = sockets > 0 ? sockets : 1; threads = threads > 0 ? threads : 1; - cores = maxcpus / (books * sockets * dies * threads); + cores = maxcpus / (drawers * books * sockets * dies * threads); } else if (sockets == 0) { threads = threads > 0 ? threads : 1; - sockets = maxcpus / (books * dies * cores * threads); + sockets = maxcpus / (drawers * books * dies * cores * threads); } } /* try to calculate omitted threads at last */ if (threads == 0) { - threads = maxcpus / (books * sockets * dies * cores); + threads = maxcpus / (drawers * books * sockets * dies * cores); } } - maxcpus = maxcpus > 0 ? maxcpus : books * sockets * dies * cores * threads; + maxcpus = maxcpus > 0 ? maxcpus : drawers * books * sockets * dies * cores * threads; cpus = cpus > 0 ? cpus : maxcpus; ms->smp.cpus = cpus; + ms->smp.drawers = drawers; ms->smp.books = books; ms->smp.sockets = sockets; ms->smp.dies = dies; @@ -159,7 +173,7 @@ void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp) ms->smp.max_cpus = maxcpus; /* sanity-check of the computed topology */ - if (books * sockets * dies * cores * threads != maxcpus) { + if (drawers * books * sockets * dies * cores * threads != maxcpus) { g_autofree char *topo_msg = cpu_hierarchy_to_string(ms); error_setg(errp, "Invalid CPU topology: " "product of the hierarchy must match maxcpus: " diff --git a/hw/core/machine.c b/hw/core/machine.c index d98c9105f7..0059070309 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -740,6 +740,7 @@ static void machine_get_smp(Object *obj, Visitor *v, const char *name, MachineState *ms = MACHINE(obj); SMPConfiguration *config = &(SMPConfiguration){ .has_cpus = true, .cpus = ms->smp.cpus, + .has_drawers = true, .drawers = ms->smp.drawers, .has_books = true, .books = ms->smp.books, .has_sockets = true, .sockets = ms->smp.sockets, .has_dies = true, .dies = ms->smp.dies, @@ -931,6 +932,7 @@ static void machine_initfn(Object *obj) /* default to mc->default_cpus */ ms->smp.cpus = mc->default_cpus; ms->smp.max_cpus = mc->default_cpus; + ms->smp.drawers = 1; ms->smp.books = 1; ms->smp.sockets = 1; ms->smp.dies = 1; diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index b3c405b4d0..cd27b4c3af 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -667,6 +667,7 @@ static void ccw_machine_class_init(ObjectClass *oc, void *data) nc->nmi_monitor_handler = s390_nmi; mc->default_ram_id = "s390.ram"; mc->smp_props.books_supported = true; + mc->smp_props.drawers_supported = true; } static inline bool machine_get_aes_key_wrap(Object *obj, Error **errp) diff --git a/include/hw/boards.h b/include/hw/boards.h index 68c58b4b4a..5754a59215 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -129,11 +129,13 @@ typedef struct { * @prefer_sockets - whether sockets are preferred over cores in smp parsing * @dies_supported - whether dies are supported by the machine * @books_supported - whether books are supported by the machine + * @drawers_supported - whether drawers are supported by the machine */ typedef struct { bool prefer_sockets; bool dies_supported; bool books_supported; + bool drawers_supported; } SMPCompatProps; /** @@ -298,6 +300,7 @@ typedef struct DeviceMemoryState { /** * CpuTopology: * @cpus: the number of present logical processors on the machine + * @drawers: the number of drawers on the machine * @books: the number of books on the machine * @sockets: the number of sockets on the machine * @dies: the number of dies in one socket @@ -307,6 +310,7 @@ typedef struct DeviceMemoryState { */ typedef struct CpuTopology { unsigned int cpus; + unsigned int drawers; unsigned int books; unsigned int sockets; unsigned int dies; diff --git a/qapi/machine.json b/qapi/machine.json index 5761c02070..3e0666d95e 100644 --- a/qapi/machine.json +++ b/qapi/machine.json @@ -866,13 +866,14 @@ # a CPU is being hotplugged. # # @node-id: NUMA node ID the CPU belongs to +# @drawer-id: drawer number within node/board the CPU belongs to # @book-id: book number within node/board the CPU belongs to # @socket-id: socket number within node/board the CPU belongs to # @die-id: die number within node/board the CPU belongs to (Since 4.1) # @core-id: core number within die the CPU belongs to # @thread-id: thread number within core the CPU belongs to # -# Note: currently there are 6 properties that could be present +# Note: currently there are 7 properties that could be present # but management should be prepared to pass through other # properties with device_add command to allow for future # interface extension. This also requires the filed names to be kept in @@ -882,6 +883,7 @@ ## { 'struct': 'CpuInstanceProperties', 'data': { '*node-id': 'int', + '*drawer-id': 'int', '*book-id': 'int', '*socket-id': 'int', '*die-id': 'int', @@ -1394,6 +1396,8 @@ # # @cpus: number of virtual CPUs in the virtual machine # +# @drawers: number of drawers in the CPU topology +# # @books: number of books in the CPU topology # # @sockets: number of sockets in the CPU topology @@ -1410,6 +1414,7 @@ ## { 'struct': 'SMPConfiguration', 'data': { '*cpus': 'int', + '*drawers': 'int', '*books': 'int', '*sockets': 'int', '*dies': 'int', diff --git a/softmmu/vl.c b/softmmu/vl.c index 764403d0b3..73d2428da1 100644 --- a/softmmu/vl.c +++ b/softmmu/vl.c @@ -720,6 +720,9 @@ static QemuOptsList qemu_smp_opts = { { .name = "cpus", .type = QEMU_OPT_NUMBER, + }, { + .name = "drawers", + .type = QEMU_OPT_NUMBER, }, { .name = "books", .type = QEMU_OPT_NUMBER, From patchwork Thu Dec 9 13:46:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Morel X-Patchwork-Id: 12666609 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C016DC433EF for ; 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Thu, 9 Dec 2021 13:45:54 +0000 (GMT) Received: from li-c6ac47cc-293c-11b2-a85c-d421c8e4747b.ibm.com.com (unknown [9.171.63.16]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 9 Dec 2021 13:45:54 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v5 10/12] s390: topology: Adding drawers to STSI Date: Thu, 9 Dec 2021 14:46:41 +0100 Message-Id: <20211209134643.143866-11-pmorel@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> References: <20211209134643.143866-1-pmorel@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 48tfpRUPDE5alhs9U3hPc3AJoQBKsEo9 X-Proofpoint-GUID: f5VmMuQpHUVxgBW2ksA6UXvq5whhWVpw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 bulkscore=0 malwarescore=0 phishscore=0 mlxlogscore=999 suspectscore=0 priorityscore=1501 lowpriorityscore=0 mlxscore=0 adultscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112090075 Received-SPF: pass client-ip=148.163.156.1; envelope-from=pmorel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, ehabkost@redhat.com, kvm@vger.kernel.org, david@redhat.com, eblake@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, armbru@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, mst@redhat.com, pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Let's add STSI support for the container level 4, drawers, and provide the information back to the guest. Signed-off-by: Pierre Morel --- hw/s390x/cpu-topology.c | 137 +++++++++++++++++++++++++++++--- include/hw/s390x/cpu-topology.h | 19 ++++- include/hw/s390x/sclp.h | 2 +- target/s390x/cpu_topology.c | 40 ++++++++-- 4 files changed, 176 insertions(+), 22 deletions(-) diff --git a/hw/s390x/cpu-topology.c b/hw/s390x/cpu-topology.c index 43eff650d9..f1048ba648 100644 --- a/hw/s390x/cpu-topology.c +++ b/hw/s390x/cpu-topology.c @@ -81,6 +81,26 @@ static S390TopologyBook *s390_create_book(S390TopologyDrawer *drawer, int id) return book; } +static S390TopologyDrawer *s390_create_drawer(S390TopologyNode *node, int id) +{ + DeviceState *dev; + S390TopologyDrawer *drawer; + const MachineState *ms = MACHINE(qdev_get_machine()); + + if (node->bus->num_children >= ms->smp.drawers) { + return NULL; + } + + dev = qdev_new(TYPE_S390_TOPOLOGY_DRAWER); + qdev_realize_and_unref(dev, node->bus, &error_fatal); + + drawer = S390_TOPOLOGY_DRAWER(dev); + drawer->drawer_id = id; + node->cnt++; + + return drawer; +} + /* * s390_get_cores: * @socket: the socket to search into @@ -130,6 +150,31 @@ static S390TopologySocket *s390_get_socket(S390TopologyBook *book, return s390_create_socket(book, socket_id); } +/* + * s390_get_drawer: + * @node: The node to search into + * @drawer_id: the identifier of the drawer to search for + * + * returns a pointer to a S390TopologyDrawer structure within a book having + * the specified drawer_id. + * First search if the book is already containing the S390TopologyDrawer + * structure and if not create one with this drawer_id. + */ +static S390TopologyDrawer *s390_get_drawer(S390TopologyNode *node, + int drawer_id) +{ + S390TopologyDrawer *drawer; + BusChild *kid; + + QTAILQ_FOREACH(kid, &node->bus->children, sibling) { + drawer = S390_TOPOLOGY_DRAWER(kid->child); + if (drawer->drawer_id == drawer_id) { + return drawer; + } + } + return s390_create_drawer(node, drawer_id); +} + /* * s390_get_book: * @drawer: The drawer to search into @@ -169,6 +214,7 @@ static S390TopologyBook *s390_get_book(S390TopologyDrawer *drawer, void s390_topology_new_cpu(int core_id) { const MachineState *ms = MACHINE(qdev_get_machine()); + S390TopologyNode *node; S390TopologyDrawer *drawer; S390TopologyBook *book; S390TopologySocket *socket; @@ -176,13 +222,16 @@ void s390_topology_new_cpu(int core_id) int origin, bit; int nb_cores_per_socket; int nb_cores_per_book; + int nb_cores_per_drawer; - drawer = s390_get_topology(); + node = s390_get_topology(); /* Cores for the S390 topology are cores and threads of the QEMU topology */ nb_cores_per_socket = ms->smp.cores * ms->smp.threads; nb_cores_per_book = ms->smp.sockets * nb_cores_per_socket; + nb_cores_per_drawer = ms->smp.books * nb_cores_per_book; + drawer = s390_get_drawer(node, core_id / nb_cores_per_drawer); book = s390_get_book(drawer, core_id / nb_cores_per_book); socket = s390_get_socket(book, core_id / nb_cores_per_socket); @@ -216,23 +265,23 @@ void s390_topology_setup(MachineState *ms) DeviceState *dev; /* Create BOOK bridge device */ - dev = qdev_new(TYPE_S390_TOPOLOGY_DRAWER); + dev = qdev_new(TYPE_S390_TOPOLOGY_NODE); object_property_add_child(qdev_get_machine(), - TYPE_S390_TOPOLOGY_DRAWER, OBJECT(dev)); + TYPE_S390_TOPOLOGY_NODE, OBJECT(dev)); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); } -S390TopologyDrawer *s390_get_topology(void) +S390TopologyNode *s390_get_topology(void) { - static S390TopologyDrawer *drawer; + static S390TopologyNode *node; - if (!drawer) { - drawer = S390_TOPOLOGY_DRAWER(object_resolve_path(TYPE_S390_TOPOLOGY_DRAWER, - NULL)); - assert(drawer != NULL); + if (!node) { + node = S390_TOPOLOGY_NODE(object_resolve_path(TYPE_S390_TOPOLOGY_NODE, + NULL)); + assert(node != NULL); } - return drawer; + return node; } /* --- CORES Definitions --- */ @@ -455,6 +504,7 @@ static void drawer_class_init(ObjectClass *oc, void *data) hc->unplug = qdev_simple_device_unplug_cb; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + dc->bus_type = TYPE_S390_TOPOLOGY_NODE_BUS; dc->realize = s390_drawer_device_realize; device_class_set_props(dc, s390_topology_drawer_properties); dc->desc = "topology drawer"; @@ -462,7 +512,7 @@ static void drawer_class_init(ObjectClass *oc, void *data) static const TypeInfo drawer_info = { .name = TYPE_S390_TOPOLOGY_DRAWER, - .parent = TYPE_SYS_BUS_DEVICE, + .parent = TYPE_DEVICE, .instance_size = sizeof(S390TopologyDrawer), .class_init = drawer_class_init, .interfaces = (InterfaceInfo[]) { @@ -470,6 +520,69 @@ static const TypeInfo drawer_info = { { } } }; + +/* --- NODE Definitions --- */ + +/* + * Nodes are the first level of CPU topology we support + * only one NODE for the moment. + */ +static char *node_bus_get_dev_path(DeviceState *dev) +{ + return g_strdup_printf("00"); +} + +static void node_bus_class_init(ObjectClass *oc, void *data) +{ + BusClass *k = BUS_CLASS(oc); + + k->get_dev_path = node_bus_get_dev_path; + k->max_dev = S390_MAX_NODES; +} + +static const TypeInfo node_bus_info = { + .name = TYPE_S390_TOPOLOGY_NODE_BUS, + .parent = TYPE_BUS, + .instance_size = 0, + .class_init = node_bus_class_init, +}; + +static void s390_node_device_realize(DeviceState *dev, Error **errp) +{ + S390TopologyNode *node = S390_TOPOLOGY_NODE(dev); + BusState *bus; + + /* Create NODE bus on NODE bridge device */ + bus = qbus_new(TYPE_S390_TOPOLOGY_NODE_BUS, dev, + TYPE_S390_TOPOLOGY_NODE_BUS); + node->bus = bus; + + /* Enable hotplugging */ + qbus_set_hotplug_handler(bus, OBJECT(dev)); +} + +static void node_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); + + hc->unplug = qdev_simple_device_unplug_cb; + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + dc->realize = s390_node_device_realize; + dc->desc = "topology node"; +} + +static const TypeInfo node_info = { + .name = TYPE_S390_TOPOLOGY_NODE, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(S390TopologyNode), + .class_init = node_class_init, + .interfaces = (InterfaceInfo[]) { + { TYPE_HOTPLUG_HANDLER }, + { } + } +}; + static void topology_register(void) { type_register_static(&cpu_cores_info); @@ -479,6 +592,8 @@ static void topology_register(void) type_register_static(&book_info); type_register_static(&drawer_bus_info); type_register_static(&drawer_info); + type_register_static(&node_bus_info); + type_register_static(&node_info); } type_init(topology_register); diff --git a/include/hw/s390x/cpu-topology.h b/include/hw/s390x/cpu-topology.h index 78017c3d78..10e4bd754f 100644 --- a/include/hw/s390x/cpu-topology.h +++ b/include/hw/s390x/cpu-topology.h @@ -68,18 +68,29 @@ OBJECT_DECLARE_SIMPLE_TYPE(S390TopologyBook, S390_TOPOLOGY_BOOK) #define TYPE_S390_TOPOLOGY_DRAWER "topology drawer" #define TYPE_S390_TOPOLOGY_DRAWER_BUS "drawer-bus" struct S390TopologyDrawer { - SysBusDevice parent_obj; + DeviceState parent_obj; BusState *bus; uint8_t drawer_id; int cnt; }; typedef struct S390TopologyDrawer S390TopologyDrawer; OBJECT_DECLARE_SIMPLE_TYPE(S390TopologyDrawer, S390_TOPOLOGY_DRAWER) -#define S390_MAX_DRAWERS 1 +#define S390_MAX_DRAWERS 4 -S390TopologyDrawer *s390_init_topology(void); +#define TYPE_S390_TOPOLOGY_NODE "topology node" +#define TYPE_S390_TOPOLOGY_NODE_BUS "node-bus" +struct S390TopologyNode { + SysBusDevice parent_obj; + BusState *bus; + uint8_t node_id; + int cnt; +}; +typedef struct S390TopologyNode S390TopologyNode; +OBJECT_DECLARE_SIMPLE_TYPE(S390TopologyNode, S390_TOPOLOGY_NODE) +#define S390_MAX_NODES 1 -S390TopologyDrawer *s390_get_topology(void); +S390TopologyNode *s390_init_topology(void); +S390TopologyNode *s390_get_topology(void); void s390_topology_setup(MachineState *ms); void s390_topology_new_cpu(int core_id); diff --git a/include/hw/s390x/sclp.h b/include/hw/s390x/sclp.h index c591346aa2..6ec1185f30 100644 --- a/include/hw/s390x/sclp.h +++ b/include/hw/s390x/sclp.h @@ -117,7 +117,7 @@ typedef struct ReadInfo { uint16_t rnmax; uint8_t rnsize; uint8_t _reserved1[15 - 11]; /* 11-15 */ -#define SCLP_READ_SCP_INFO_MNEST 3 +#define SCLP_READ_SCP_INFO_MNEST 4 uint8_t stsi_parm; uint16_t entries_cpu; /* 16-17 */ uint16_t offset_cpu; /* 18-19 */ diff --git a/target/s390x/cpu_topology.c b/target/s390x/cpu_topology.c index 08e1fbd13e..fd25c56213 100644 --- a/target/s390x/cpu_topology.c +++ b/target/s390x/cpu_topology.c @@ -77,36 +77,64 @@ static int set_book(const MachineState *ms, void *p, return len; } +static int set_drawer(const MachineState *ms, void *p, + S390TopologyDrawer *drawer, int level) +{ + BusChild *kid; + int l, len = 0; + + if (level >= 4) { + len += stsi_15_container(p, 3, drawer->drawer_id); + p += len; + } + + QTAILQ_FOREACH_REVERSE(kid, &drawer->bus->children, sibling) { + l = set_book(ms, p, S390_TOPOLOGY_BOOK(kid->child), level); + p += l; + len += l; + } + + return len; +} + static void setup_stsi(const MachineState *ms, void *p, int level) { - S390TopologyDrawer *drawer; + S390TopologyNode *node; SysIB_151x *sysib; BusChild *kid; - int nb_sockets, nb_books; + int nb_sockets, nb_books, nb_drawers; int len, l; sysib = (SysIB_151x *)p; sysib->mnest = level; switch (level) { case 2: + nb_drawers = 0; nb_books = 0; - nb_sockets = ms->smp.sockets * ms->smp.books; + nb_sockets = ms->smp.sockets * ms->smp.books * ms->smp.drawers; break; case 3: + nb_drawers = 0; + nb_books = ms->smp.books * ms->smp.drawers; + nb_sockets = ms->smp.sockets; + break; + case 4: + nb_drawers = ms->smp.drawers; nb_books = ms->smp.books; nb_sockets = ms->smp.sockets; break; } + sysib->mag[TOPOLOGY_NR_MAG4] = nb_drawers; sysib->mag[TOPOLOGY_NR_MAG3] = nb_books; sysib->mag[TOPOLOGY_NR_MAG2] = nb_sockets; sysib->mag[TOPOLOGY_NR_MAG1] = ms->smp.cores * ms->smp.threads; - drawer = s390_get_topology(); + node = s390_get_topology(); len = sizeof(SysIB_151x); p += len; - QTAILQ_FOREACH_REVERSE(kid, &drawer->bus->children, sibling) { - l = set_book(ms, p, S390_TOPOLOGY_BOOK(kid->child), level); + QTAILQ_FOREACH_REVERSE(kid, &node->bus->children, sibling) { + l = set_drawer(ms, p, S390_TOPOLOGY_DRAWER(kid->child), level); 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Thu, 9 Dec 2021 13:46:02 GMT Received: from ppma05fra.de.ibm.com (6c.4a.5195.ip4.static.sl-reverse.com [149.81.74.108]) by mx0a-001b2d01.pphosted.com with ESMTP id 3cuhuchmd8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 09 Dec 2021 13:46:02 +0000 Received: from pps.filterd (ppma05fra.de.ibm.com [127.0.0.1]) by ppma05fra.de.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 1B9DbuxD010450; Thu, 9 Dec 2021 13:45:59 GMT Received: from b06cxnps3074.portsmouth.uk.ibm.com (d06relay09.portsmouth.uk.ibm.com [9.149.109.194]) by ppma05fra.de.ibm.com with ESMTP id 3cqyya01wa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 09 Dec 2021 13:45:59 +0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 1B9DjuaW29557094 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 9 Dec 2021 13:45:56 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 30EDF11C069; Thu, 9 Dec 2021 13:45:56 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6356B11C04C; Thu, 9 Dec 2021 13:45:55 +0000 (GMT) Received: from li-c6ac47cc-293c-11b2-a85c-d421c8e4747b.ibm.com.com (unknown [9.171.63.16]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 9 Dec 2021 13:45:55 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v5 11/12] s390x: topology: implementing numa for the s390x topology Date: Thu, 9 Dec 2021 14:46:42 +0100 Message-Id: <20211209134643.143866-12-pmorel@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> References: <20211209134643.143866-1-pmorel@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: K2p3v4xXLpkX6h2bYZUZ-KLU3ZoC82_G X-Proofpoint-ORIG-GUID: yfLuIDe9YJ753H14iU6cjFCkGLjpDOQJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 mlxscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 phishscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112090075 Received-SPF: pass client-ip=148.163.156.1; envelope-from=pmorel@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, ehabkost@redhat.com, kvm@vger.kernel.org, david@redhat.com, eblake@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, armbru@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, mst@redhat.com, pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" S390x CPU Topology allows a non uniform repartition of the CPU inside the topology containers, sockets, books and drawers. We use numa to place the CPU inside the right topology container and report the non uniform topology to the guest. Note that s390x needs CPU0 to belong to the topology and consequently all topology must include CPU0. We accept a partial QEMU numa definition, in that case undefined CPUs are added to free slots in the topology starting with slot 0 and going up. Signed-off-by: Pierre Morel --- hw/core/machine.c | 18 ++++++++++ hw/s390x/s390-virtio-ccw.c | 68 ++++++++++++++++++++++++++++++++++---- 2 files changed, 79 insertions(+), 7 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 0059070309..d65a91c607 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -684,6 +684,16 @@ void machine_set_cpu_numa_node(MachineState *machine, return; } + if (props->has_book_id && !slot->props.has_book_id) { + error_setg(errp, "book-id is not supported"); + return; + } + + if (props->has_drawer_id && !slot->props.has_drawer_id) { + error_setg(errp, "drawer-id is not supported"); + return; + } + /* skip slots with explicit mismatch */ if (props->has_thread_id && props->thread_id != slot->props.thread_id) { continue; @@ -701,6 +711,14 @@ void machine_set_cpu_numa_node(MachineState *machine, continue; } + if (props->has_book_id && props->book_id != slot->props.book_id) { + continue; + } + + if (props->has_drawer_id && props->drawer_id != slot->props.drawer_id) { + continue; + } + /* reject assignment if slot is already assigned, for compatibility * of legacy cpu_index mapping with SPAPR core based mapping do not * error out if cpu thread and matched core have the same node-id */ diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index cd27b4c3af..dcd6a1cf19 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -84,14 +84,34 @@ out: static void s390_init_cpus(MachineState *machine) { MachineClass *mc = MACHINE_GET_CLASS(machine); - int i; + CPUArchId *slot; + int i, n = 0; /* initialize possible_cpus */ mc->possible_cpu_arch_ids(machine); s390_topology_setup(machine); - for (i = 0; i < machine->smp.cpus; i++) { + + /* For NUMA configuration create defined nodes */ + if (machine->numa_state->num_nodes) { + for (i = 0; i < machine->smp.max_cpus; i++) { + slot = &machine->possible_cpus->cpus[i]; + if (slot->arch_id != -1 && n < machine->smp.cpus) { + s390x_new_cpu(machine->cpu_type, i, &error_fatal); + n++; + } + } + } + + /* create all remaining CPUs */ + for (i = 0; n < machine->smp.cpus && i < machine->smp.max_cpus; i++) { + slot = &machine->possible_cpus->cpus[i]; + /* For NUMA configuration skip defined nodes */ + if (machine->numa_state->num_nodes && slot->arch_id != -1) { + continue; + } s390x_new_cpu(machine->cpu_type, i, &error_fatal); + n++; } } @@ -274,6 +294,11 @@ static void ccw_init(MachineState *machine) /* register hypercalls */ virtio_ccw_register_hcalls(); + /* CPU0 must exist on S390x */ + if (!s390_cpu_addr2state(0)) { + error_printf("Core_id 0 must be defined in the CPU configuration\n"); + exit(1); + } s390_enable_css_support(s390_cpu_addr2state(0)); ret = css_create_css_image(VIRTUAL_CSSID, true); @@ -306,6 +331,7 @@ static void s390_cpu_plug(HotplugHandler *hotplug_dev, g_assert(!ms->possible_cpus->cpus[cpu->env.core_id].cpu); ms->possible_cpus->cpus[cpu->env.core_id].cpu = OBJECT(dev); + ms->possible_cpus->cpus[cpu->env.core_id].arch_id = cpu->env.core_id; s390_topology_new_cpu(cpu->env.core_id); @@ -579,7 +605,9 @@ static CpuInstanceProperties s390_cpu_index_to_props(MachineState *ms, static const CPUArchIdList *s390_possible_cpu_arch_ids(MachineState *ms) { int i; + int drawer_id, book_id, socket_id; unsigned int max_cpus = ms->smp.max_cpus; + CPUArchId *slot; if (ms->possible_cpus) { g_assert(ms->possible_cpus && ms->possible_cpus->len == max_cpus); @@ -590,11 +618,25 @@ static const CPUArchIdList *s390_possible_cpu_arch_ids(MachineState *ms) sizeof(CPUArchId) * max_cpus); ms->possible_cpus->len = max_cpus; for (i = 0; i < ms->possible_cpus->len; i++) { - ms->possible_cpus->cpus[i].type = ms->cpu_type; - ms->possible_cpus->cpus[i].vcpus_count = 1; - ms->possible_cpus->cpus[i].arch_id = i; - ms->possible_cpus->cpus[i].props.has_core_id = true; - ms->possible_cpus->cpus[i].props.core_id = i; + slot = &ms->possible_cpus->cpus[i]; + + slot->type = ms->cpu_type; + slot->vcpus_count = 1; + slot->arch_id = i; + slot->props.has_core_id = true; + slot->props.core_id = i; + + socket_id = i / ms->smp.cores; + slot->props.socket_id = socket_id; + slot->props.has_socket_id = true; + + book_id = socket_id / ms->smp.sockets; + slot->props.book_id = book_id; + slot->props.has_book_id = true; + + drawer_id = book_id / ms->smp.books; + slot->props.drawer_id = drawer_id; + slot->props.has_drawer_id = true; } return ms->possible_cpus; @@ -636,6 +678,17 @@ static ram_addr_t s390_fixup_ram_size(ram_addr_t sz) return newsz; } +/* + * S390 defines CPU topology level 2 as the level for which a change in topology + * is worth being taking care of. + * Let use level 2, socket, as the numa node. + */ +static int64_t s390_get_default_cpu_node_id(const MachineState *ms, int idx) +{ + ms->possible_cpus->cpus[idx].arch_id = -1; + return idx / ms->smp.cores; +} + static void ccw_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); @@ -668,6 +721,7 @@ static void ccw_machine_class_init(ObjectClass *oc, void *data) mc->default_ram_id = "s390.ram"; mc->smp_props.books_supported = true; mc->smp_props.drawers_supported = true; + mc->get_default_cpu_node_id = s390_get_default_cpu_node_id; } static inline bool machine_get_aes_key_wrap(Object *obj, Error **errp) From patchwork Thu Dec 9 13:46:43 2021 Content-Type: text/plain; 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Thu, 9 Dec 2021 13:45:57 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4D6C811C04C; Thu, 9 Dec 2021 13:45:56 +0000 (GMT) Received: from li-c6ac47cc-293c-11b2-a85c-d421c8e4747b.ibm.com.com (unknown [9.171.63.16]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 9 Dec 2021 13:45:56 +0000 (GMT) From: Pierre Morel To: qemu-s390x@nongnu.org Subject: [PATCH v5 12/12] s390: Topology: documentation Date: Thu, 9 Dec 2021 14:46:43 +0100 Message-Id: <20211209134643.143866-13-pmorel@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211209134643.143866-1-pmorel@linux.ibm.com> References: <20211209134643.143866-1-pmorel@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: StNHNJt1wlHwx7ptZmToUjUV3PS_UzKn X-Proofpoint-GUID: 8-wc9X6qvAqPUaq3MsST3PAfunTfxgV6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-09_04,2021-12-08_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 impostorscore=0 bulkscore=0 adultscore=0 mlxlogscore=999 lowpriorityscore=0 spamscore=0 phishscore=0 mlxscore=0 clxscore=1015 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112090075 Received-SPF: pass client-ip=148.163.158.5; envelope-from=pmorel@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, ehabkost@redhat.com, kvm@vger.kernel.org, david@redhat.com, eblake@redhat.com, cohuck@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, armbru@redhat.com, pasic@linux.ibm.com, borntraeger@de.ibm.com, mst@redhat.com, pbonzini@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The use of the S390x CPU topology is explain in a new documentation file. Signed-off-by: Pierre Morel --- docs/system/s390x/numa-cpu-topology.rst | 273 ++++++++++++++++++++++++ 1 file changed, 273 insertions(+) create mode 100644 docs/system/s390x/numa-cpu-topology.rst diff --git a/docs/system/s390x/numa-cpu-topology.rst b/docs/system/s390x/numa-cpu-topology.rst new file mode 100644 index 0000000000..9ae15f792f --- /dev/null +++ b/docs/system/s390x/numa-cpu-topology.rst @@ -0,0 +1,273 @@ +NUMA CPU Topology on S390x +========================== + +IBM S390 provides a complex CPU architecture with several cache levels. +Using NUMA with the CPU topology is a way to let the guest optimize his +accesses to the main memory. + +The QEMU smp parameter for S390x allows to specify 4 NUMA levels: +core, socket, drawer and book and these levels are available for +the numa parameter too. + + +Prerequisites +------------- + +To take advantage of the CPU topology, KVM must give support for the +Perform Topology Function and to the Store System Information instructions +as indicated by the Perform CPU Topology facility (stfle bit 11). + +If those requirements are met, the capability ``KVM_CAP_S390_CPU_TOPOLOGY`` +will indicate that KVM can support CPU Topology on that LPAR. + + +Using CPU Topology in QEMU for S390x +------------------------------------ + + +QEMU -smp parameter +~~~~~~~~~~~~~~~~~~~ + +With -smp QEMU provides the user with the possibility to define +a Topology based on :: + + -smp [[cpus=]n][,maxcpus=maxcpus][,drawers=drawers][,books=books] \ + [,sockets=sockets][,cores=cores] + +The topology reported to the guest in this situation will provide +n cpus of a maximum of maxcpus cpus, filling the topology levels one by one +starting with CPU0 being the first CPU on drawer[0] book[0] socket[0]. + +For example ``-smp 5,books=2,sockets=2,cores=2`` will provide :: + + drawer[0]--+--book[0]--+--socket[0]--+--core[0]-CPU0 + | | | + | | +--core[1]-CPU1 + | | + | +--socket[1]--+--core[0]-CPU2 + | | + | +--core[1]-CPU3 + | + +--book[1]--+--socket[0]--+--core[0]-CPU4 + + +Note that the thread parameter can not be defined on S390 as it +has no representation on the CPU topology. + + +QEMU -numa parameter +~~~~~~~~~~~~~~~~~~~ + +With -numa QEMU provides the user with the possibility to define +the Topology in a non uniform way :: + + -smp [[cpus=]n][,maxcpus=maxcpus][,drawers=drawers][,books=books] \ + [,sockets=sockets][,cores=cores] + -numa node[,memdev=id][,cpus=firstcpu[-lastcpu]][,nodeid=node][,initiator=initiator] + -numa cpu,node-id=node[,drawer-id=x][,book-id=x][,socket-id=x][,core-id=y] + +The topology reported to the guest in this situation will provide +n cpus of a maximum of maxcpus cpus, and the topology entries will be + +- if there is less cpus than specified by the -numa arguments + the topology will be build by filling the numa definitions + starting with the lowest node. + +- if there is more cpus than specified by the -numa argument + the numa specification will first be fulfilled and the remaining + CPU will be assigned to unassigned slots starting with the + core 0 on socket 0. + +- a CPU declared with -device does not count inside the ncpus parameter + of the -smp argument and will be added on the topology based on + its core ID. + +For example :: + + -smp 3,drawers=8,books=2,sockets=2,cores=2,maxcpus=64 + -object memory-backend-ram,id=mem0,size=10G + -numa node,nodeid=0,memdev=mem0 + -numa node,nodeid=1 + -numa node,nodeid=2 + -numa cpu,node-id=0,drawer-id=0 + -numa cpu,node-id=1,socket-id=9 + -device host-s390x-cpu,core-id=19 + +Will provide the following topology :: + + drawer[0]--+--book[0]--+--socket[0]--+--core[0]-CPU0 + | | + | +--core[1]-CPU1 + | + +--socket[1]--+--core[0]-CPU2 + + drawer[2]--+--book[0]--+--socket[1]--+--core[1]-CPU19 + + +S390 NUMA specificity +--------------------- + +Heterogene Memory Attributes +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +The S390 topology implementation does not use ACPI HMAT to specify the +cache size and bandwidth between nodes. + +Memory device +~~~~~~~~~~~~~ + +When using NUMA S390 needs a memory device to be associated with +the nodes definitions. As we do not use HMAT, it has little sense +to assign memory to each node and one should assign all memory to +a node without CPU and use other nodes to define the CPU Topology. + +Exemple :: + + -object memory-backend-ram,id=mem0,size=10G + -numa node,nodeid=0,memdev=mem0 + + +CPUs +~~~~ + +In the S390 topology we do not use threads and the first topology +level is the core. +The number of threads can no be defined for S390 and is always equal to 1. + +When using NUMA, QEMU issues a warning for CPUS not assigned to nodes. +The S390 topology will silently assign unassigned CPUs to the topology +searching for free core starting on the first core of the first socket +in the first book. +This is of course advised to assign all possible CPUs to nodes to +guaranty future compatibility. + + +The topology provided to the guest +---------------------------------- + +The guest , when the CPU Topology is available as indicated by the +Perform CPU Topology facility (stfle bit 11) may use two instructions +to retrieve the CPU topology and optimize its CPU scheduling: + +- PTF (Perform Topology function) which will give information + about a change in the CPU Topology, that is a change in the + result of the STSI(15,1,2) instruction. + +- STSI (Stote System Information) with parameters (15,1,2) + to retrieve the CPU Topology. + +Exemple :: + + -smp 3,drawers=8,books=2,sockets=2,cores=2,maxcpus=64 + -object memory-backend-ram,id=mem0,size=10G + -numa node,nodeid=0,memdev=mem0 + -numa node,nodeid=1 + -numa node,nodeid=2 + -numa cpu,node-id=1,drawer-id=0 + -numa cpu,node-id=2,socket-id=9 + -device host-s390x-cpu,core-id=19 + +Formated result for STSI(15,1,2) showing the 6 different levels +with: +- levels 2 (socket) and 1 (core) used. +- 3 sockets with a CPU mask for CPU type 3, non dedicated and + with horizontal polarization. +- The first socket contains 2 cores as specified by the -smp argument +- The second socket contains the 3rd core defined by the -smp argument +- both these sockets belong to drawer-id=0 and to node-1 +- The third socket hold the CPU with core-id 19 assigned to socket-id 9 + and to node-2 + +Here the kernel view :: + + mag[6] = 0 + mag[5] = 0 + mag[4] = 0 + mag[3] = 0 + mag[2] = 32 + mag[1] = 2 + MNest = 2 + socket: 1 0 + cpu type 03 d: 0 pp: 0 + origin : 0000 + mask : c000000000000000 + + socket: 1 1 + cpu type 03 d: 0 pp: 0 + origin : 0000 + mask : 2000000000000000 + + socket: 1 9 + cpu type 03 d: 0 pp: 0 + origin : 0000 + mask : 0000100000000000 + +And the admin view :: + + # lscpu -e + CPU NODE DRAWER BOOK SOCKET CORE L1d:L1i:L2d:L2i ONLINE CONFIGURED POLARIZATION ADDRESS + 0 0 0 0 0 0 0:0:0:0 yes yes horizontal 0 + 1 0 0 0 0 1 1:1:1:1 yes yes horizontal 1 + 2 0 0 0 1 2 2:2:2:2 yes yes horizontal 2 + 3 0 1 1 2 3 3:3:3:3 yes yes horizontal 19 + + +Hotplug with NUMA +----------------- + +Using the core-id the topology is automatically calculated to put the core +inside the right socket. + +Example:: + + (qemu) device_add host-s390x-cpu,core-id=8 + + # lscpu -e + CPU NODE DRAWER BOOK SOCKET CORE L1d:L1i:L2d:L2i ONLINE CONFIGURED POLARIZATION ADDRESS + 0 0 0 0 0 0 0:0:0:0 yes yes horizontal 0 + 1 0 0 0 0 1 1:1:1:1 yes yes horizontal 1 + 2 0 0 0 1 2 2:2:2:2 yes yes horizontal 2 + 3 0 1 1 2 3 3:3:3:3 yes yes horizontal 19 + 4 - - - - - ::: no yes horizontal 8 + + # chcpu -e 4 + CPU 4 enabled + # lscpu -e + CPU NODE DRAWER BOOK SOCKET CORE L1d:L1i:L2d:L2i ONLINE CONFIGURED POLARIZATION ADDRESS + 0 0 0 0 0 0 0:0:0:0 yes yes horizontal 0 + 1 0 0 0 0 1 1:1:1:1 yes yes horizontal 1 + 2 0 0 0 1 2 2:2:2:2 yes yes horizontal 2 + 3 0 1 1 2 3 3:3:3:3 yes yes horizontal 19 + 4 0 2 2 3 4 4:4:4:4 yes yes horizontal 8 + +One can see that the userland tool reports serials IDs which do not correspond +to the firmware IDs but does however report the new CPU on it's own socket. + +The result seen by the kernel looks like :: + + mag[6] = 0 + mag[5] = 0 + mag[4] = 0 + mag[3] = 0 + mag[2] = 32 + mag[1] = 2 + MNest = 2 + 00 - socket: 1 0 + cpu type 03 d: 0 pp: 0 + origin : 0000 + mask : c000000000000000 + + socket: 1 1 + cpu type 03 d: 0 pp: 0 + origin : 0000 + mask : 2000000000000000 + + socket: 1 9 + cpu type 03 d: 0 pp: 0 + origin : 0000 + mask : 0000100000000000 + + socket: 1 4 + cpu type 03 d: 0 pp: 0 + origin : 0000 + mask : 0080000000000000