From patchwork Tue Dec 21 13:17:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 12689655 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C8DBC433F5 for ; Tue, 21 Dec 2021 13:18:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238094AbhLUNSK (ORCPT ); Tue, 21 Dec 2021 08:18:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235070AbhLUNSK (ORCPT ); Tue, 21 Dec 2021 08:18:10 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CEA83C061574; Tue, 21 Dec 2021 05:18:09 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6E9FF615A3; Tue, 21 Dec 2021 13:18:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F1C24C36AE8; Tue, 21 Dec 2021 13:18:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1640092688; bh=u60Gy+HM2Cz89/HOSt7nvfcnD1OA0GjqWTWcgPWp9g8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GW3KEkW84d4/UGEyZIm2MPN+ABDDa0dQtMkLgqKipAc0mjwvInIp/ZSHzUc2LNnET aRVbyR+GAZruHQSe/nY/y8tYEcmODyCqW5cUqEgaCEmGc3uuMHUA0B6P1Cf3QCrBfb FTurQWgTUaHQptQstGP/h3yDtDZvzKk0dlZWI2bPCszmGbWygcwMDkhQmzj0f5m9Cu TkMa86OgbbXQA+6twpBgjOe9NQBD3FgE1733BV1ZGcMSyCoGUVf9dJSmJ5jL7xhb1Y zm/h4NlxN9Fbd5XyrksSqZIwNuGFP/vcer5CVxiZI162bf413A9k224tSaWFtFw08I 0uMlGncBM4Lvw== From: Roger Quadros To: krzysztof.kozlowski@canonical.com, miquel.raynal@bootlin.com, tony@atomide.com Cc: robh@kernel.org, kishon@ti.com, nm@ti.com, vigneshr@ti.com, linux-mtd@lists.infradead.org, linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Roger Quadros Subject: [PATCH v4 1/4] dt-bindings: memory-controllers: ti,gpmc: Add compatible for AM64 Date: Tue, 21 Dec 2021 15:17:54 +0200 Message-Id: <20211221131757.2030-2-rogerq@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211221131757.2030-1-rogerq@kernel.org> References: <20211221131757.2030-1-rogerq@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org AM64 SoC contains the GPMC module. Add compatible for it. Newer SoCs don't necessarily map GPMC data region at the same place as legacy SoCs. Add reg-names "data", to provide this information to the device driver. Signed-off-by: Roger Quadros Reviewed-by: Rob Herring --- .../bindings/memory-controllers/ti,gpmc.yaml | 23 ++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml index 25b42d68f9b3..64dc9d398d9a 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml @@ -23,13 +23,20 @@ properties: items: - enum: - ti,am3352-gpmc + - ti,am64-gpmc - ti,omap2420-gpmc - ti,omap2430-gpmc - ti,omap3430-gpmc - ti,omap4430-gpmc reg: - maxItems: 1 + minItems: 1 + maxItems: 2 + + reg-names: + items: + - const: cfg + - const: data interrupts: maxItems: 1 @@ -44,6 +51,9 @@ properties: items: - const: fck + power-domains: + maxItems: 1 + dmas: items: - description: DMA channel for GPMC NAND prefetch @@ -133,6 +143,17 @@ required: - "#address-cells" - "#size-cells" +allOf: + - if: + properties: + compatible: + contains: + const: ti,am64-gpmc + then: + required: + - reg-names + - power-domains + additionalProperties: false examples: From patchwork Tue Dec 21 13:17:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 12689657 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CCAC6C433EF for ; Tue, 21 Dec 2021 13:18:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238100AbhLUNSP (ORCPT ); Tue, 21 Dec 2021 08:18:15 -0500 Received: from ams.source.kernel.org ([145.40.68.75]:53182 "EHLO ams.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235070AbhLUNSO (ORCPT ); Tue, 21 Dec 2021 08:18:14 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 72967B80E74; Tue, 21 Dec 2021 13:18:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6040BC36AE2; Tue, 21 Dec 2021 13:18:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1640092692; bh=MeirT4xGsKt7osRpBz1wQ0uIbtgu/8LH4Sy26maoJnk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Zit+Yb7cyDorZ9iSV0bEmdgRNfYpo1kgVyNVeWRoq85n99EIDL8cXIoqMS4XSEtYS nyDFrZQkLxbTMKvd/ZxzariP9NNduubecXv8OSHbqp8MbxambWpfIOP42Y+gD/W+2Y mjij64Ils7tm8CA9O2SXLNurgnEoM/UwYxD2cUlDU7t/PslPHCHkpr1nBvtIvA0pmO eVE5ZjG+GlJB7S0okPMdqGxmOreAKO4yVHs1Ra/3frMyu5WQv/DpXIpQbj8Ajp44Pv pkWj9buEalxcPlxcGYaGreT6cYmxaO/b7Wzfc+emfwhudKDdE+OhU/IdYGxMLQGKvC MVPOsj9UTf61A== From: Roger Quadros To: krzysztof.kozlowski@canonical.com, miquel.raynal@bootlin.com, tony@atomide.com Cc: robh@kernel.org, kishon@ti.com, nm@ti.com, vigneshr@ti.com, linux-mtd@lists.infradead.org, linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Roger Quadros Subject: [PATCH v4 2/4] memory: omap-gpmc: Add support for GPMC on AM64 SoC Date: Tue, 21 Dec 2021 15:17:55 +0200 Message-Id: <20211221131757.2030-3-rogerq@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211221131757.2030-1-rogerq@kernel.org> References: <20211221131757.2030-1-rogerq@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The TI's AM64 SoC has the GPMC module. Add compatible for it. Traditionally GPMC external addresses have always been mapped to first 1GB physical address. However newer platforms, can have it mapped at different locations. Support this address provision via device tree. Signed-off-by: Roger Quadros --- drivers/memory/omap-gpmc.c | 40 ++++++++++++++++++++++++++++---------- 1 file changed, 30 insertions(+), 10 deletions(-) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index be0858bff4d3..624153048182 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -237,6 +237,7 @@ struct gpmc_device { struct omap3_gpmc_regs context; int nirqs; unsigned int is_suspended:1; + struct resource *data; }; static struct irq_domain *gpmc_irq_domain; @@ -1456,12 +1457,18 @@ static void gpmc_mem_exit(void) } } -static void gpmc_mem_init(void) +static void gpmc_mem_init(struct gpmc_device *gpmc) { int cs; - gpmc_mem_root.start = GPMC_MEM_START; - gpmc_mem_root.end = GPMC_MEM_END; + if (!gpmc->data) { + /* All legacy devices have same data IO window */ + gpmc_mem_root.start = GPMC_MEM_START; + gpmc_mem_root.end = GPMC_MEM_END; + } else { + gpmc_mem_root.start = gpmc->data->start; + gpmc_mem_root.end = gpmc->data->end; + } /* Reserve all regions that has been set up by bootloader */ for (cs = 0; cs < gpmc_cs_num; cs++) { @@ -1888,6 +1895,7 @@ static const struct of_device_id gpmc_dt_ids[] = { { .compatible = "ti,omap3430-gpmc" }, /* omap3430 & omap3630 */ { .compatible = "ti,omap4430-gpmc" }, /* omap4430 & omap4460 & omap543x */ { .compatible = "ti,am3352-gpmc" }, /* am335x devices */ + { .compatible = "ti,am64-gpmc" }, { } }; @@ -2502,13 +2510,25 @@ static int gpmc_probe(struct platform_device *pdev) gpmc->dev = &pdev->dev; platform_set_drvdata(pdev, gpmc); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -ENOENT; + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg"); + if (!res) { + /* legacy DT */ + gpmc_base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(gpmc_base)) + return PTR_ERR(gpmc_base); + } else { + gpmc_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(gpmc_base)) + return PTR_ERR(gpmc_base); + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "data"); + if (!res) { + dev_err(&pdev->dev, "couldn't get data reg resource\n"); + return -ENOENT; + } - gpmc_base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(gpmc_base)) - return PTR_ERR(gpmc_base); + gpmc->data = res; + } res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (!res) { @@ -2562,7 +2582,7 @@ static int gpmc_probe(struct platform_device *pdev) dev_info(gpmc->dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), GPMC_REVISION_MINOR(l)); - gpmc_mem_init(); + gpmc_mem_init(gpmc); rc = gpmc_gpio_init(gpmc); if (rc) goto gpio_init_failed; From patchwork Tue Dec 21 13:17:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 12689659 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96D30C4332F for ; Tue, 21 Dec 2021 13:18:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238122AbhLUNSR (ORCPT ); Tue, 21 Dec 2021 08:18:17 -0500 Received: from dfw.source.kernel.org ([139.178.84.217]:34380 "EHLO dfw.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235070AbhLUNSQ (ORCPT ); Tue, 21 Dec 2021 08:18:16 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 32A9261599; Tue, 21 Dec 2021 13:18:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BCE06C36AE9; Tue, 21 Dec 2021 13:18:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1640092695; bh=Nqe6mT09B1kTX33/VRmKBI2xx5UPngqh2E87CJblXg0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Q11EtiJnQ+VoC6JNDoZINAHnuKhWEUMv7E0sC7FV5AmFsGffUrgodM7PDzKsrdmKA jJvF7Q7YMIJXB+P5R5xgJY5IwE0JXwbUmtz713iWbBTuwhbqbuyvzpHcFmCRYA6MJa 53i6EJVnT7WcpyNzjVYT0C6kdl9Y2DzoQ9791vDzk/B2cur/IaKIuD9HR53TOGRhV/ uOXD4SbNuCtKfZtkfd5UtixKiYO7flM6Q+k1Kbj9Ssx9F3Pg76NO0s6yyt0+lPoJqo S5MKX27Pswdy3yRLBaffxZKUHSkQBJdQdox/9ihrdowrLOoYdHQ15dMDmPN8e5Zmfe GHi/trBBx+ZVw== From: Roger Quadros To: krzysztof.kozlowski@canonical.com, miquel.raynal@bootlin.com, tony@atomide.com Cc: robh@kernel.org, kishon@ti.com, nm@ti.com, vigneshr@ti.com, linux-mtd@lists.infradead.org, linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Roger Quadros Subject: [PATCH v4 3/4] memory: omap-gpmc: Use a compatible match table when checking for NAND controller Date: Tue, 21 Dec 2021 15:17:56 +0200 Message-Id: <20211221131757.2030-4-rogerq@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211221131757.2030-1-rogerq@kernel.org> References: <20211221131757.2030-1-rogerq@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org As more compatibles can be added to the GPMC NAND controller driver use a compatible match table. Cc: Miquel Raynal Signed-off-by: Roger Quadros Acked-by: Miquel Raynal --- drivers/memory/omap-gpmc.c | 6 +++++- drivers/mtd/nand/raw/omap2.c | 5 +---- include/linux/platform_data/mtd-nand-omap2.h | 9 ++++++++- 3 files changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index 624153048182..d19ffc895e5b 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -2091,6 +2091,7 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, u32 val; struct gpio_desc *waitpin_desc = NULL; struct gpmc_device *gpmc = platform_get_drvdata(pdev); + bool is_nand = false; if (of_property_read_u32(child, "reg", &cs) < 0) { dev_err(&pdev->dev, "%pOF has no 'reg' property\n", @@ -2183,7 +2184,10 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, } } - if (of_device_is_compatible(child, "ti,omap2-nand")) { + if (of_match_node(omap_nand_ids, child)) + is_nand = true; + + if (is_nand) { /* NAND specific setup */ val = 8; of_property_read_u32(child, "nand-bus-width", &val); diff --git a/drivers/mtd/nand/raw/omap2.c b/drivers/mtd/nand/raw/omap2.c index b26d4947af02..e6dd8b4cf0d2 100644 --- a/drivers/mtd/nand/raw/omap2.c +++ b/drivers/mtd/nand/raw/omap2.c @@ -2352,10 +2352,7 @@ static int omap_nand_remove(struct platform_device *pdev) return ret; } -static const struct of_device_id omap_nand_ids[] = { - { .compatible = "ti,omap2-nand", }, - {}, -}; +/* omap_nand_ids defined in linux/platform_data/mtd-nand-omap2.h */ MODULE_DEVICE_TABLE(of, omap_nand_ids); static struct platform_driver omap_nand_driver = { diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h index de6ada739121..92f011805ad4 100644 --- a/include/linux/platform_data/mtd-nand-omap2.h +++ b/include/linux/platform_data/mtd-nand-omap2.h @@ -7,6 +7,7 @@ #define _MTD_NAND_OMAP2_H #include +#include #define GPMC_BCH_NUM_REMAINDER 8 @@ -61,4 +62,10 @@ struct gpmc_nand_regs { void __iomem *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER]; void __iomem *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER]; }; -#endif + +static const struct of_device_id omap_nand_ids[] = { + { .compatible = "ti,omap2-nand", }, + {}, +}; + +#endif /* _MTD_NAND_OMAP2_H */ From patchwork Tue Dec 21 13:17:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 12689661 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02B41C433EF for ; Tue, 21 Dec 2021 13:18:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238132AbhLUNSW (ORCPT ); Tue, 21 Dec 2021 08:18:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235070AbhLUNSV (ORCPT ); Tue, 21 Dec 2021 08:18:21 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 900FBC061574; Tue, 21 Dec 2021 05:18:21 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 39DB5B816B8; Tue, 21 Dec 2021 13:18:20 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 27243C36AEB; Tue, 21 Dec 2021 13:18:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1640092699; bh=rmNCe/Fcv2Cch+PQTMUw4LOnj/3R7KOxvik2UJk4xCI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pEIoMBrrKnxFBsjjGjh+jvTnZ/d73gaJabQeSpd+S2Ca2PwMsYNNELGBItT1QPg7Y 2I+CR++g4v7Udhme+dzwaT94Q8yUqdPJn9zMMgJLbSRZagbWtjPM7RsmLvFriYHiSj Lwn/duPfkwmi7k8y7un0OQ34F2MKktBhmnpczr+zaEdZlXBpGmvAid1Kr7vGqbMqHD kumI7u3W6+S8eULAF5ywElvzwozEGUKddGcHIC8h4Nw4nqDJU7x3XSjixQ7nPOD6qE bSBI7wWVzrZowFMP7ssHjruyqArqJpnr8ZeXVZTAC1veUwC/DsWiBZPSDth6UqXEBy pv+wgGOWX9oNw== From: Roger Quadros To: krzysztof.kozlowski@canonical.com, miquel.raynal@bootlin.com, tony@atomide.com Cc: robh@kernel.org, kishon@ti.com, nm@ti.com, vigneshr@ti.com, linux-mtd@lists.infradead.org, linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Roger Quadros Subject: [PATCH v4 4/4] mtd: rawnand: omap2: Select GPMC device driver for ARCH_K3 Date: Tue, 21 Dec 2021 15:17:57 +0200 Message-Id: <20211221131757.2030-5-rogerq@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211221131757.2030-1-rogerq@kernel.org> References: <20211221131757.2030-1-rogerq@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The GPMC device driver is required for NAND controller to work on K3 Architecture. Select it if required. Cc: Miquel Raynal Signed-off-by: Roger Quadros Acked-by: Miquel Raynal --- drivers/mtd/nand/raw/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 67b7cb67c030..587f20c6184f 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -42,6 +42,7 @@ config MTD_NAND_OMAP2 tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller" depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || COMPILE_TEST depends on HAS_IOMEM + select OMAP_GPMC if ARCH_K3 help Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4 and Keystone platforms.