From patchwork Mon Nov 15 17:02:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Kroah-Hartman X-Patchwork-Id: 12692661 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62CE8C433EF for ; Mon, 15 Nov 2021 18:59:53 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3272B6369B for ; Mon, 15 Nov 2021 18:59:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 3272B6369B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linuxfoundation.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=T+qXscbYVu2vShn5g1PemTp/MlHaw1s3kccqw85UeAU=; b=xr+5/LfTnvCmTl xI/OTn0Gw9XYhaRrrUMqCqdnVuvmwKG3GYdextp2kwN3PxaN/jgoBWY+fyjZdrXVpjBjJN8H9wbUW Nl/oPnc4I75PWTKyjPJ0eq2vVnRhbrhcUP9yeD4XUNjElIyq7wpQfs14kET4d3GWoWaM5+gbqyyYP Cdh5P8OCi8Auw4FkJj141GlJce6fKuSFAhXoQTJbSh0FmjmVt/wXS1KKegEaak/9YMTF76vNsktO6 xhA9z3rVWMt52/1Nds3sqQn1RQSlTn9zB0IbI6WMJDQpha6qsBloIC1XAtHryIRZtlt6vWE/rHM90 SHRC78ceB/ejvTC2LJfQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mmhBe-00GnrU-QK; Mon, 15 Nov 2021 18:58:39 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mmhBY-00GnqM-HT for linux-arm-kernel@lists.infradead.org; Mon, 15 Nov 2021 18:58:33 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 7D47D633DA; Mon, 15 Nov 2021 18:58:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1637002712; bh=yIzlTmEWChwZQlGr+UE5tzq2u0HIYJzQuxIIgotRxm0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FKEDo7NqYGYOUuhSeJfPL6gp3lDY9yiHH6/y/EmDF80wCz7S3rYgnvM+72CVqkr7F 3/zD1RARvMmYik7ON3Tp57a07sa7zgwIdS3q6nF7RT3M+h/Y7O8QR7BqlN7FfI7wbY H6Qhlg93TaEls61ECf1SSLNX2ge7m6XCPHI9qi7U= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Marek Vasut , Alexandre Torgue , Patrice Chotard , Patrick Delaunay , linux-stm32@st-md-mailman.stormreply.com, Sasha Levin Subject: [PATCH 5.15 636/917] ARM: dts: stm32: Reduce DHCOR SPI NOR frequency to 50 MHz Date: Mon, 15 Nov 2021 18:02:11 +0100 Message-Id: <20211115165450.381284021@linuxfoundation.org> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211115165428.722074685@linuxfoundation.org> References: <20211115165428.722074685@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211115_105832_610654_3176C47B X-CRM114-Status: GOOD ( 14.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Marek Vasut [ Upstream commit 2012579b31293d0a8cf2024e9dab66810bf1a15e ] The SPI NOR is a bit further away from the SoC on DHCOR than on DHCOM, which causes additional signal delay. At 108 MHz, this delay triggers a sporadic issue where the first bit of RX data is not received by the QSPI controller. There are two options of addressing this problem, either by using the DLYB block to compensate the extra delay, or by reducing the QSPI bus clock frequency. The former requires calibration and that is overly complex, so opt for the second option. Fixes: 76045bc457104 ("ARM: dts: stm32: Add QSPI NOR on AV96") Signed-off-by: Marek Vasut Cc: Alexandre Torgue Cc: Patrice Chotard Cc: Patrick Delaunay Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue Signed-off-by: Sasha Levin --- arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi index 2b0ac605549d7..44ecc47085871 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi @@ -202,7 +202,7 @@ compatible = "jedec,spi-nor"; reg = <0>; spi-rx-bus-width = <4>; - spi-max-frequency = <108000000>; + spi-max-frequency = <50000000>; #address-cells = <1>; #size-cells = <1>; };