From patchwork Tue Dec 7 06:05:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: qizhong cheng X-Patchwork-Id: 12695084 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F3465C433EF for ; Tue, 7 Dec 2021 06:11:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=O3yqfrZWgX8i4MbQDr2hphZB5+uX4PpPJGOpUz18PRY=; b=3Sh+nEYieiQ21j ghqoHoJ9aE8avQ1uv0xJwwmYE/9GPcsGFpEb6gO1YRDWFKoFy36jaFvcgH5WDZ+AfEFfbFVRloipn fHsCGMcwACztHyayUpY6vsH6IlIMx2A9kLYHeuxd3IeL7wTxfbqbkmhvfJyPKl16mRfgnAjPxOGMt iHZKDOzEMnvdOKx1LCeWS67xpEvrH/r7p3UmwrsZ7dI1RbDgCyDkJda4Sh9LmRVfmHxuN0p4UfN6w 46OcbdN6c+fQiA4dvikP1R+5Phck/8Q0ZMVd703DZbCA7apxZLPoWSTTC1YIvmTSmxm+RzdXbjYxa NgquPPLSunIB45hJl2ng==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1muTgN-0073BP-4o; Tue, 07 Dec 2021 06:10:31 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1muTgH-0073Aj-Q4; Tue, 07 Dec 2021 06:10:28 +0000 X-UUID: b36e84f298de422491ef77dae037c4d4-20211206 X-UUID: b36e84f298de422491ef77dae037c4d4-20211206 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 745218861; Mon, 06 Dec 2021 23:10:20 -0700 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 6 Dec 2021 22:06:01 -0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 7 Dec 2021 14:05:56 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 7 Dec 2021 14:05:56 +0800 From: qizhong cheng To: Ryder Lee , Lorenzo Pieralisi , Bjorn Helgaas , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Jianjun Wang CC: , , , , , Subject: [PATCH] PCI: mediatek: Delay 100ms to wait power and clock to become stable Date: Tue, 7 Dec 2021 14:05:50 +0800 Message-ID: <20211207060550.20918-1-qizhong.cheng@mediatek.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211206_221025_876385_63D077F2 X-CRM114-Status: UNSURE ( 8.05 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Described in PCIe CEM specification setctions 2.2 (PERST# Signal) and 2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should be delayed 100ms (TPVPERL) for the power and clock to become stable. Signed-off-by: qizhong cheng Change-Id: Ia9abe1e763564a5bad1d045fd268c38e76e2ae95 --- drivers/pci/controller/pcie-mediatek.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c index 2f3f974977a3..a61ea3940471 100644 --- a/drivers/pci/controller/pcie-mediatek.c +++ b/drivers/pci/controller/pcie-mediatek.c @@ -702,6 +702,13 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) */ writel(PCIE_LINKDOWN_RST_EN, port->base + PCIE_RST_CTRL); + /* + * Described in PCIe CEM specification setctions 2.2 (PERST# Signal) and + * 2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should + * be delayed 100ms (TPVPERL) for the power and clock to become stable. + */ + msleep(100); + /* De-assert PHY, PE, PIPE, MAC and configuration reset */ val = readl(port->base + PCIE_RST_CTRL); val |= PCIE_PHY_RSTB | PCIE_PERSTB | PCIE_PIPE_SRSTB |